Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,hawi-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Global Clock & Reset Controller on Hawi

maintainers:
  - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
  - Taniya Das <taniya.das@oss.qualcomm.com>

description: |
  Qualcomm global clock control module provides the clocks, resets and power
  domains on Hawi and Maili.

  See also:
    include/dt-bindings/clock/qcom,hawi-gcc.h
    include/dt-bindings/clock/qcom,maili-gcc.h

properties:
  compatible:
    enum:
      - qcom,hawi-gcc
      - qcom,maili-gcc

  clocks:
    items:
      - description: Board XO source
      - description: Board Always On XO source
      - description: Sleep clock source
      - description: PCIE 0 Pipe clock source
      - description: PCIE 1 Pipe clock source
      - description: UFS PHY RX symbol 0 clock
      - description: UFS PHY RX symbol 1 clock
      - description: UFS PHY TX symbol 0 clock
      - description: USB3 PHY wrapper pipe clock

required:
  - compatible
  - clocks
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>
    clock-controller@100000 {
      compatible = "qcom,hawi-gcc";
      reg = <0x00100000 0x1f4200>;
      clocks = <&rpmhcc RPMH_CXO_CLK>,
               <&rpmhcc RPMH_CXO_CLK_A>,
               <&sleep_clk>,
               <&pcie0_phy>,
               <&pcie1_phy>,
               <&ufs_mem_phy 0>,
               <&ufs_mem_phy 1>,
               <&ufs_mem_phy 2>,
               <&usb_1_qmpphy>;
      #clock-cells = <1>;
      #reset-cells = <1>;
      #power-domain-cells = <1>;
    };
...