| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| # Copyright 2024 NXP |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol |
| |
| maintainers: |
| - Peng Fan <peng.fan@nxp.com> |
| |
| allOf: |
| - $ref: /schemas/pinctrl/pinctrl.yaml |
| |
| patternProperties: |
| 'grp$': |
| type: object |
| description: |
| Pinctrl node's client devices use subnodes for desired pin configuration. |
| Client device subnodes use below standard properties. |
| |
| unevaluatedProperties: false |
| |
| properties: |
| fsl,pins: |
| description: |
| each entry consists of 6 integers and represents the mux and config |
| setting for one pin. The first 5 integers <mux_reg conf_reg input_reg |
| mux_val input_val> are specified using a PIN_FUNC_ID macro, which can |
| be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last |
| integer CONFIG is the pad setting value like pull-up on this pin. |
| Please refer to i.MX95 Reference Manual for detailed CONFIG settings. |
| $ref: /schemas/types.yaml#/definitions/uint32-matrix |
| items: |
| items: |
| - description: | |
| "mux_reg" indicates the offset of mux register. |
| - description: | |
| "conf_reg" indicates the offset of pad configuration register. |
| - description: | |
| "input_reg" indicates the offset of select input register. |
| - description: | |
| "mux_val" indicates the mux value to be applied. |
| - description: | |
| "input_val" indicates the select input value to be applied. |
| - description: | |
| "pad_setting" indicates the pad configuration value to be applied. |
| |
| required: |
| - fsl,pins |
| |
| additionalProperties: true |
