| // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| // |
| // Copyright 2013 Freescale Semiconductor, Inc. |
| |
| /dts-v1/; |
| #include "vf610.dtsi" |
| |
| / { |
| model = "VF610 Tower Board"; |
| compatible = "fsl,vf610-twr", "fsl,vf610"; |
| |
| chosen { |
| bootargs = "console=ttyLP1,115200"; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x80000000 0x8000000>; |
| }; |
| |
| audio_ext: mclk_osc { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <24576000>; |
| }; |
| |
| enet_ext: eth_osc { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <50000000>; |
| }; |
| |
| |
| reg_3p3v: regulator-3p3v { |
| compatible = "regulator-fixed"; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc_3v3_mcu"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| sound { |
| compatible = "simple-audio-card"; |
| simple-audio-card,format = "i2s"; |
| simple-audio-card,widgets = |
| "Microphone", "Microphone Jack", |
| "Headphone", "Headphone Jack", |
| "Speaker", "Speaker Ext", |
| "Line", "Line In Jack"; |
| simple-audio-card,routing = |
| "MIC_IN", "Microphone Jack", |
| "Microphone Jack", "Mic Bias", |
| "LINE_IN", "Line In Jack", |
| "Headphone Jack", "HP_OUT", |
| "Speaker Ext", "LINE_OUT"; |
| |
| simple-audio-card,cpu { |
| sound-dai = <&sai2>; |
| frame-master; |
| bitclock-master; |
| }; |
| |
| simple-audio-card,codec { |
| sound-dai = <&codec>; |
| frame-master; |
| bitclock-master; |
| }; |
| }; |
| }; |
| |
| &adc0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_adc0_ad5>; |
| vref-supply = <®_vcc_3v3_mcu>; |
| status = "okay"; |
| }; |
| |
| &clks { |
| clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>; |
| clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext"; |
| assigned-clocks = <&clks VF610_CLK_ENET_SEL>, |
| <&clks VF610_CLK_ENET_TS_SEL>; |
| assigned-clock-parents = <&clks VF610_CLK_ENET_EXT>, |
| <&clks VF610_CLK_ENET_EXT>; |
| }; |
| |
| &dspi0 { |
| bus-num = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_dspi0>; |
| status = "okay"; |
| |
| sflash: at26df081a@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "atmel,at26df081a"; |
| spi-max-frequency = <16000000>; |
| spi-cpol; |
| spi-cpha; |
| reg = <0>; |
| }; |
| }; |
| |
| &edma0 { |
| status = "okay"; |
| }; |
| |
| &esdhc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_esdhc1>; |
| bus-width = <4>; |
| cd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &fec0 { |
| phy-mode = "rmii"; |
| phy-handle = <ðphy0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fec0>; |
| status = "okay"; |
| |
| mdio { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| |
| ethphy1: ethernet-phy@1 { |
| reg = <1>; |
| }; |
| }; |
| }; |
| |
| &fec1 { |
| phy-mode = "rmii"; |
| phy-handle = <ðphy1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fec1>; |
| status = "okay"; |
| }; |
| |
| &i2c0 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c0>; |
| status = "okay"; |
| |
| codec: sgtl5000@a { |
| #sound-dai-cells = <0>; |
| compatible = "fsl,sgtl5000"; |
| reg = <0x0a>; |
| VDDA-supply = <®_3p3v>; |
| VDDIO-supply = <®_3p3v>; |
| clocks = <&clks VF610_CLK_SAI2>; |
| }; |
| }; |
| |
| &iomuxc { |
| vf610-twr { |
| pinctrl_adc0_ad5: adc0ad5grp { |
| fsl,pins = < |
| VF610_PAD_PTC30__ADC0_SE5 0xa1 |
| >; |
| }; |
| |
| pinctrl_dspi0: dspi0grp { |
| fsl,pins = < |
| VF610_PAD_PTB19__DSPI0_CS0 0x1182 |
| VF610_PAD_PTB20__DSPI0_SIN 0x1181 |
| VF610_PAD_PTB21__DSPI0_SOUT 0x1182 |
| VF610_PAD_PTB22__DSPI0_SCK 0x1182 |
| >; |
| }; |
| |
| pinctrl_esdhc1: esdhc1grp { |
| fsl,pins = < |
| VF610_PAD_PTA24__ESDHC1_CLK 0x31ef |
| VF610_PAD_PTA25__ESDHC1_CMD 0x31ef |
| VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef |
| VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef |
| VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef |
| VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef |
| VF610_PAD_PTA7__GPIO_134 0x219d |
| >; |
| }; |
| |
| pinctrl_fec0: fec0grp { |
| fsl,pins = < |
| VF610_PAD_PTA6__RMII_CLKIN 0x30d1 |
| VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3 |
| VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1 |
| VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1 |
| VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1 |
| VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1 |
| VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1 |
| VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2 |
| VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2 |
| VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2 |
| >; |
| }; |
| |
| pinctrl_fec1: fec1grp { |
| fsl,pins = < |
| VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |
| VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 |
| VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 |
| VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 |
| VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 |
| VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 |
| VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 |
| VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 |
| VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 |
| >; |
| }; |
| |
| pinctrl_i2c0: i2c0grp { |
| fsl,pins = < |
| VF610_PAD_PTB14__I2C0_SCL 0x30d3 |
| VF610_PAD_PTB15__I2C0_SDA 0x30d3 |
| >; |
| }; |
| |
| pinctrl_nfc: nfcgrp { |
| fsl,pins = < |
| VF610_PAD_PTD31__NF_IO15 0x28df |
| VF610_PAD_PTD30__NF_IO14 0x28df |
| VF610_PAD_PTD29__NF_IO13 0x28df |
| VF610_PAD_PTD28__NF_IO12 0x28df |
| VF610_PAD_PTD27__NF_IO11 0x28df |
| VF610_PAD_PTD26__NF_IO10 0x28df |
| VF610_PAD_PTD25__NF_IO9 0x28df |
| VF610_PAD_PTD24__NF_IO8 0x28df |
| VF610_PAD_PTD23__NF_IO7 0x28df |
| VF610_PAD_PTD22__NF_IO6 0x28df |
| VF610_PAD_PTD21__NF_IO5 0x28df |
| VF610_PAD_PTD20__NF_IO4 0x28df |
| VF610_PAD_PTD19__NF_IO3 0x28df |
| VF610_PAD_PTD18__NF_IO2 0x28df |
| VF610_PAD_PTD17__NF_IO1 0x28df |
| VF610_PAD_PTD16__NF_IO0 0x28df |
| VF610_PAD_PTB24__NF_WE_B 0x28c2 |
| VF610_PAD_PTB25__NF_CE0_B 0x28c2 |
| VF610_PAD_PTB27__NF_RE_B 0x28c2 |
| VF610_PAD_PTC26__NF_RB_B 0x283d |
| VF610_PAD_PTC27__NF_ALE 0x28c2 |
| VF610_PAD_PTC28__NF_CLE 0x28c2 |
| >; |
| }; |
| |
| pinctrl_pwm0: pwm0grp { |
| fsl,pins = < |
| VF610_PAD_PTB0__FTM0_CH0 0x1582 |
| VF610_PAD_PTB1__FTM0_CH1 0x1582 |
| VF610_PAD_PTB2__FTM0_CH2 0x1582 |
| VF610_PAD_PTB3__FTM0_CH3 0x1582 |
| >; |
| }; |
| |
| pinctrl_sai2: sai2grp { |
| fsl,pins = < |
| VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed |
| VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee |
| VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed |
| VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed |
| VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed |
| VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed |
| VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| VF610_PAD_PTB4__UART1_TX 0x21a2 |
| VF610_PAD_PTB5__UART1_RX 0x21a1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| VF610_PAD_PTB6__UART2_TX 0x21a2 |
| VF610_PAD_PTB7__UART2_RX 0x21a1 |
| >; |
| }; |
| }; |
| }; |
| |
| &nfc { |
| assigned-clocks = <&clks VF610_CLK_NFC>; |
| assigned-clock-rates = <33000000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_nfc>; |
| status = "okay"; |
| |
| nand@0 { |
| compatible = "fsl,vf610-nfc-nandcs"; |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-bus-width = <16>; |
| nand-ecc-mode = "hw"; |
| nand-ecc-strength = <24>; |
| nand-ecc-step-size = <2048>; |
| nand-on-flash-bbt; |
| }; |
| }; |
| |
| &pwm0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm0>; |
| status = "okay"; |
| }; |
| |
| &sai2 { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_sai2>; |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| status = "okay"; |
| }; |
| |
| &usbdev0 { |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usbmisc0 { |
| status = "okay"; |
| }; |
| |
| &usbmisc1 { |
| status = "okay"; |
| }; |
| |
| &usbphy0 { |
| status = "okay"; |
| }; |
| |
| &usbphy1 { |
| status = "okay"; |
| }; |
