| // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| /* |
| * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> |
| */ |
| |
| /dts-v1/; |
| |
| #include "th1520.dtsi" |
| |
| / { |
| model = "Sipeed Lichee Module 4A"; |
| compatible = "sipeed,lichee-module-4a", "thead,th1520"; |
| |
| aliases { |
| ethernet0 = &gmac0; |
| ethernet1 = &gmac1; |
| }; |
| |
| memory@0 { |
| device_type = "memory"; |
| reg = <0x0 0x00000000 0x2 0x00000000>; |
| }; |
| }; |
| |
| &osc { |
| clock-frequency = <24000000>; |
| }; |
| |
| &osc_32k { |
| clock-frequency = <32768>; |
| }; |
| |
| &aogpio { |
| gpio-line-names = "", "", "", |
| "GPIO00", |
| "GPIO04"; |
| }; |
| |
| &dmac0 { |
| status = "okay"; |
| }; |
| |
| &emmc { |
| bus-width = <8>; |
| max-frequency = <198000000>; |
| mmc-hs400-1_8v; |
| non-removable; |
| no-sdio; |
| no-sd; |
| status = "okay"; |
| }; |
| |
| &gmac0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>; |
| phy-handle = <&phy0>; |
| phy-mode = "rgmii-id"; |
| status = "okay"; |
| }; |
| |
| &gmac1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&gmac1_pins>; |
| phy-handle = <&phy1>; |
| phy-mode = "rgmii-id"; |
| status = "okay"; |
| }; |
| |
| &gpio0 { |
| gpio-line-names = "", "", "", "", "", "", "", "", "", "", |
| "", "", "", "", "", "", "", "", "", "", |
| "", "", "", "", |
| "GPIO07", |
| "GPIO08", |
| "", |
| "GPIO01", |
| "GPIO02"; |
| }; |
| |
| &gpio1 { |
| gpio-line-names = "", "", "", |
| "GPIO11", |
| "GPIO12", |
| "GPIO13", |
| "GPIO14", |
| "", "", "", "", "", "", "", "", "", "", |
| "", "", "", "", "", |
| "GPIO06"; |
| }; |
| |
| &gpio2 { |
| gpio-line-names = "GPIO03", |
| "GPIO05"; |
| }; |
| |
| &gpio3 { |
| gpio-line-names = "", "", |
| "GPIO09", |
| "GPIO10"; |
| }; |
| |
| &mdio0 { |
| phy0: ethernet-phy@1 { |
| reg = <1>; |
| }; |
| |
| phy1: ethernet-phy@2 { |
| reg = <2>; |
| }; |
| }; |
| |
| &padctrl0_apsys { |
| gmac0_pins: gmac0-0 { |
| tx-pins { |
| pins = "GMAC0_TX_CLK", |
| "GMAC0_TXEN", |
| "GMAC0_TXD0", |
| "GMAC0_TXD1", |
| "GMAC0_TXD2", |
| "GMAC0_TXD3"; |
| function = "gmac0"; |
| bias-disable; |
| drive-strength = <25>; |
| input-disable; |
| input-schmitt-disable; |
| slew-rate = <0>; |
| }; |
| |
| rx-pins { |
| pins = "GMAC0_RX_CLK", |
| "GMAC0_RXDV", |
| "GMAC0_RXD0", |
| "GMAC0_RXD1", |
| "GMAC0_RXD2", |
| "GMAC0_RXD3"; |
| function = "gmac0"; |
| bias-disable; |
| drive-strength = <1>; |
| input-enable; |
| input-schmitt-disable; |
| slew-rate = <0>; |
| }; |
| }; |
| |
| gmac1_pins: gmac1-0 { |
| tx-pins { |
| pins = "GPIO2_18", /* GMAC1_TX_CLK */ |
| "GPIO2_20", /* GMAC1_TXEN */ |
| "GPIO2_21", /* GMAC1_TXD0 */ |
| "GPIO2_22", /* GMAC1_TXD1 */ |
| "GPIO2_23", /* GMAC1_TXD2 */ |
| "GPIO2_24"; /* GMAC1_TXD3 */ |
| function = "gmac1"; |
| bias-disable; |
| drive-strength = <25>; |
| input-disable; |
| input-schmitt-disable; |
| slew-rate = <0>; |
| }; |
| |
| rx-pins { |
| pins = "GPIO2_19", /* GMAC1_RX_CLK */ |
| "GPIO2_25", /* GMAC1_RXDV */ |
| "GPIO2_30", /* GMAC1_RXD0 */ |
| "GPIO2_31", /* GMAC1_RXD1 */ |
| "GPIO3_0", /* GMAC1_RXD2 */ |
| "GPIO3_1"; /* GMAC1_RXD3 */ |
| function = "gmac1"; |
| bias-disable; |
| drive-strength = <1>; |
| input-enable; |
| input-schmitt-disable; |
| slew-rate = <0>; |
| }; |
| }; |
| |
| mdio0_pins: mdio0-0 { |
| mdc-pins { |
| pins = "GMAC0_MDC"; |
| function = "gmac0"; |
| bias-disable; |
| drive-strength = <13>; |
| input-disable; |
| input-schmitt-disable; |
| slew-rate = <0>; |
| }; |
| |
| mdio-pins { |
| pins = "GMAC0_MDIO"; |
| function = "gmac0"; |
| bias-disable; |
| drive-strength = <13>; |
| input-enable; |
| input-schmitt-enable; |
| slew-rate = <0>; |
| }; |
| }; |
| }; |
| |
| &sdio0 { |
| bus-width = <4>; |
| max-frequency = <198000000>; |
| status = "okay"; |
| }; |