| /* SPDX-License-Identifier: GPL-2.0-only */ |
| /* |
| * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> |
| */ |
| |
| #ifndef DT_CLOCK_OXSEMI_OX820_H |
| #define DT_CLOCK_OXSEMI_OX820_H |
| |
| /* PLLs */ |
| #define CLK_820_PLLA 0 |
| #define CLK_820_PLLB 1 |
| |
| /* Gate Clocks */ |
| #define CLK_820_LEON 2 |
| #define CLK_820_DMA_SGDMA 3 |
| #define CLK_820_CIPHER 4 |
| #define CLK_820_SD 5 |
| #define CLK_820_SATA 6 |
| #define CLK_820_AUDIO 7 |
| #define CLK_820_USBMPH 8 |
| #define CLK_820_ETHA 9 |
| #define CLK_820_PCIEA 10 |
| #define CLK_820_NAND 11 |
| #define CLK_820_PCIEB 12 |
| #define CLK_820_ETHB 13 |
| #define CLK_820_REF600 14 |
| #define CLK_820_USBDEV 15 |
| |
| #endif /* DT_CLOCK_OXSEMI_OX820_H */ |
