| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
| /* |
| * Copyright (c) 2023, Linaro Limited |
| */ |
| |
| #ifndef _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H |
| #define _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H |
| |
| /* TCSR CC clocks */ |
| #define TCSR_PCIE_2L_4_CLKREF_EN 0 |
| #define TCSR_PCIE_2L_5_CLKREF_EN 1 |
| #define TCSR_PCIE_8L_CLKREF_EN 2 |
| #define TCSR_USB3_MP0_CLKREF_EN 3 |
| #define TCSR_USB3_MP1_CLKREF_EN 4 |
| #define TCSR_USB2_1_CLKREF_EN 5 |
| #define TCSR_UFS_PHY_CLKREF_EN 6 |
| #define TCSR_USB4_1_CLKREF_EN 7 |
| #define TCSR_USB4_2_CLKREF_EN 8 |
| #define TCSR_USB2_2_CLKREF_EN 9 |
| #define TCSR_PCIE_4L_CLKREF_EN 10 |
| #define TCSR_EDP_CLKREF_EN 11 |
| |
| #endif |
