| [ |
| { |
| "BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.mem_read.part0", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "LLC_MISSES.PCIE_READ", |
| "FCMask": "0x07", |
| "Filter": "ch_mask=0x1f", |
| "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", |
| "MetricName": "LLC_MISSES.PCIE_READ", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "ScaleUnit": "4Bytes", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.mem_write.part0", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "LLC_MISSES.PCIE_WRITE", |
| "FCMask": "0x07", |
| "Filter": "ch_mask=0x1f", |
| "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", |
| "MetricName": "LLC_MISSES.PCIE_WRITE", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every write request of 4 bytes of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "ScaleUnit": "4Bytes", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Clockticks of the IIO Traffic Controller", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x1", |
| "EventName": "UNC_IIO_CLOCKTICKS", |
| "PerPkg": "1", |
| "PublicDescription": "Counts clockticks of the 1GHz traffic controller clock in the IIO unit.", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", |
| "FCMask": "0x4", |
| "PerPkg": "1", |
| "PortMask": "0x0f", |
| "UMask": "0x3", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", |
| "FCMask": "0x4", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "UMask": "0x3", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", |
| "FCMask": "0x4", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "UMask": "0x3", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", |
| "FCMask": "0x4", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "UMask": "0x3", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", |
| "FCMask": "0x4", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "UMask": "0x3", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer Inserts; Port 3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC2", |
| "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 0-3", |
| "Counter": "2,3", |
| "EventCode": "0xD5", |
| "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", |
| "FCMask": "0x04", |
| "PerPkg": "1", |
| "UMask": "0xf", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 0", |
| "Counter": "2,3", |
| "EventCode": "0xD5", |
| "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", |
| "FCMask": "0x04", |
| "PerPkg": "1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 1", |
| "Counter": "2,3", |
| "EventCode": "0xD5", |
| "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", |
| "FCMask": "0x04", |
| "PerPkg": "1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 2", |
| "Counter": "2,3", |
| "EventCode": "0xD5", |
| "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", |
| "FCMask": "0x04", |
| "PerPkg": "1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 3", |
| "Counter": "2,3", |
| "EventCode": "0xD5", |
| "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", |
| "FCMask": "0x04", |
| "PerPkg": "1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's IO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part0", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part0. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part1", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part1. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part2", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part2. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part3", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part3. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's MMIO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core reading from Card's MMIO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of 4 bytes made to IIO Part0 by the CPU", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a card on IIO Part0 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of 4 bytes made to IIO Part1 by the CPU", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a card on IIO Part1 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of 4 bytes made to IIO Part2 by the CPU", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a card on IIO Part2 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of 4 bytes made to IIO Part3 by the CPU", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a card on IIO Part3 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's MMIO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Core writing to Card's MMIO space", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts ever peer to peer read request for 4 bytes of data made by a different IIO unit to the MMIO space of a card on IIO Part0. Does not include requests made by the same IIO unit. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part1", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts ever peer to peer read request for 4 bytes of data made by a different IIO unit to the MMIO space of a card on IIO Part1. Does not include requests made by the same IIO unit. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part2", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts ever peer to peer read request for 4 bytes of data made by a different IIO unit to the MMIO space of a card on IIO Part2. Does not include requests made by the same IIO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part3", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts ever peer to peer read request for 4 bytes of data made by a different IIO unit to the MMIO space of a card on IIO Part3. Does not include requests made by the same IIO unit. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Another card (different IIO stack) reading from this card.", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Another card (different IIO stack) reading from this card.", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made to the MMIO space of a card on IIO Part0 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part1 by a different IIO unit", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made to the MMIO space of a card on IIO Part1 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part2 by a different IIO unit", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made to the MMIO space of a card on IIO Part2 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part3 by a different IIO unit", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made to the MMIO space of a card on IIO Part3 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Another card (different IIO stack) writing to this card.", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested by the CPU; Another card (different IIO stack) writing to this card.", |
| "Counter": "2,3", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by IIO Part1 to a unit on the main die (generally memory). In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by IIO Part2 to a unit on the main die (generally memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every read request for 4 bytes of data made by IIO Part3 to a unit on the main die (generally memory). In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card reading from DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 0", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card reading from DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every write request of 4 bytes of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every write request of 4 bytes of data made by IIO Part1 to a unit on the main die (generally memory). In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every write request of 4 bytes of data made by IIO Part2 to a unit on the main die (generally memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every write request of 4 bytes of data made by IIO Part3 to a unit on the main die (generally memory). In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card writing to DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 0", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card writing to DRAM", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Messages", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Messages", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Messages", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Messages", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Messages", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Messages", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part0 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer read request for 4 bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part1 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer read request for 4 bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part2 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer read request for 4 bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part3 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer read request for 4 bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card reading from another Card (same or different stack)", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 0", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card reading from another Card (same or different stack)", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer write request of 4 bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card writing to another Card (same or different stack)", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 0", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Data requested of the CPU; Card writing to another Card (same or different stack)", |
| "Counter": "0,1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Number of double word (4 bytes) requests the attached device made of the main die.; VTd - Type 1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Num Link Correctable Errors", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xF", |
| "EventName": "UNC_IIO_LINK_NUM_CORR_ERR", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Num Link Retries", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xE", |
| "EventName": "UNC_IIO_LINK_NUM_RETRIES", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number packets that passed the Mask/Match Filter", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x21", |
| "EventName": "UNC_IIO_MASK_MATCH", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2", |
| "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if all bits specified by mask match", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus and PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2", |
| "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if all bits specified by mask match", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus and !(PCIE bus)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2", |
| "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if all bits specified by mask match", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "AND Mask/match for debug bus; PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2", |
| "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if all bits specified by mask match", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "AND Mask/match for debug bus; !(Non-PCIE bus) and PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2", |
| "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if all bits specified by mask match", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "AND Mask/match for debug bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2", |
| "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if all bits specified by mask match", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x3", |
| "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if any bits specified by mask match", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x3", |
| "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if any bits specified by mask match", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and !(PCIE bus)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x3", |
| "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if any bits specified by mask match", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "OR Mask/match for debug bus; PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x3", |
| "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if any bits specified by mask match", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) and PCIE bus", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x3", |
| "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if any bits specified by mask match", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) and !(PCIE bus)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x3", |
| "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Asserted if any bits specified by mask match", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Counting disabled", |
| "Counter": "0,1,2,3", |
| "EventName": "UNC_IIO_NOTHING", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", |
| "Counter": "0,1", |
| "Deprecated": "1", |
| "EventCode": "0x83", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", |
| "Counter": "2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC0", |
| "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Symbol Times on Link", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x82", |
| "EventName": "UNC_IIO_SYMBOL_TIMES", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "PublicDescription": "Gen1 - increment once every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1nS", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MSG.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MSG.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MSG.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MSG.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MSG.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.MSG.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated.", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x2", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x4", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x8", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", |
| "Counter": "0,1,2,3", |
| "Deprecated": "1", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x7", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; x4 card is plugged in to slot 3", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part0", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part0. In the general case, part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part1", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part1. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part2", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part2. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on IIO Part3. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's MMIO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's MMIO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part0 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part1 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part2 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part3 by a unit on the main die (generally a core) or by another IIO unit. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's MMIO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's MMIO space", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part0", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer read request for up to a 64 byte transaction of data made by a different IIO unit to the MMIO space of a card on IIO Part0. Does not include requests made by the same IIO unit. In the general case, part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part1", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer read request for up to a 64 byte transaction of data made by a different IIO unit to the MMIO space of a card on IIO Part1. Does not include requests made by the same IIO unit. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part2", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer read request for up to a 64 byte transaction of data made by a different IIO unit to the MMIO space of a card on IIO Part2. Does not include requests made by the same IIO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer read request for up to a 64 byte transaction of data made by a different IIO unit to the MMIO space of a card on IIO Part3. Does not include requests made by the same IIO unit. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) reading from this card.", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) reading from this card.", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part0 by a different IIO unit", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part0 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part1 by a different IIO unit", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part1 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part2 by a different IIO unit", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part2 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part3 by a different IIO unit", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made to the MMIO space of a card on IIO Part3 by a different IIO unit. Does not include requests made by the same IIO unit. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) writing to this card.", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 0", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) writing to this card.", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xC1", |
| "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Outbound. Number of requests, to the attached device, initiated by the main die.; VTd - Type 1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 0", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part0 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part1 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by IIO Part1 to a unit on the main die (generally memory). In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part2 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by IIO Part2 to a unit on the main die (generally memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part3 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every read request for up to a 64 byte transaction of data made by IIO Part3 to a unit on the main die (generally memory). In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card reading from DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 0", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card reading from DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part0 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made by IIO Part0 to a unit on the main die (generally memory). In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part1 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made by IIO Part1 to a unit on the main die (generally memory). In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part2 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made by IIO Part2 to a unit on the main die (generally memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part3 to Memory", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every write request of up to a 64 byte transaction of data made by IIO Part3 to a unit on the main die (generally memory). In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card writing to DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 0", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card writing to DRAM", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Messages", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Messages", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x4 card is plugged in to slot 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Messages", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Messages", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; x4 card is plugged in to slot 3", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Messages", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 0", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Messages", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part0 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer read request of up to a 64 byte transaction made by IIO Part0 to the MMIO space of an IIO target. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part1 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer read request of up to a 64 byte transaction made by IIO Part1 to the MMIO space of an IIO target. In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part2 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer read request of up to a 64 byte transaction made by IIO Part2 to the MMIO space of an IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part3 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer read request of up to a 64 byte transaction made by IIO Part3 to the MMIO space of an IIO target. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card reading from another Card (same or different stack)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 0", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card reading from another Card (same or different stack)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part0 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x01", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made by IIO Part0 to the MMIO space of an IIO target. In the general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could also refer to any device plugged into the first slot of a PCIe riser card or to a device attached to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part1 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x02", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made by IIO Part1 to the MMIO space of an IIO target.In the general case, Part1 refers to a x4 PCIe card plugged into the second slot of a PCIe riser card, but it could refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part2 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x04", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made by IIO Part2 to the MMIO space of an IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, but it could refer to any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part3 to an IIO target", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x08", |
| "PublicDescription": "Counts every peer to peer write request of up to a 64 byte transaction of data made by IIO Part3 to the MMIO space of an IIO target. In the general case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but it could brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes supported by the bus.", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card writing to another Card (same or different stack)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD0", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x10", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 0", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "Number Transactions requested of the CPU; Card writing to another Card (same or different stack)", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x84", |
| "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD1", |
| "Experimental": "1", |
| "FCMask": "0x07", |
| "PerPkg": "1", |
| "PortMask": "0x20", |
| "PublicDescription": "Also known as Inbound. Number of 64 byte cache line requests initiated by the attached device.; VTd - Type 1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; context cache miss", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.CTXT_MISS", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x2", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; L1 miss", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.L1_MISS", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x4", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; L2 miss", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.L2_MISS", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x8", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; L3 miss", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.L3_MISS", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x10", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; Vtd hit", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.L4_PAGE_HIT", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x1", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; TLB miss", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.TLB1_MISS", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x80", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; TLB is full", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.TLB_FULL", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x40", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Access; TLB miss", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x41", |
| "EventName": "UNC_IIO_VTD_ACCESS.TLB_MISS", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "UMask": "0x20", |
| "Unit": "IIO" |
| }, |
| { |
| "BriefDescription": "VTd Occupancy", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x40", |
| "EventName": "UNC_IIO_VTD_OCCUPANCY", |
| "Experimental": "1", |
| "PerPkg": "1", |
| "Unit": "IIO" |
| } |
| ] |