| # SPDX-License-Identifier: GPL-2.0-only |
| menuconfig ARCH_SIRF |
| bool "CSR SiRF" |
| depends on ARCH_MULTI_V7 |
| select ARCH_HAS_RESET_CONTROLLER |
| select RESET_CONTROLLER |
| select GENERIC_IRQ_CHIP |
| select GPIOLIB |
| select NO_IOPORT_MAP |
| select REGMAP |
| select PINCTRL |
| select PINCTRL_SIRF |
| help |
| Support for CSR SiRFprimaII/Marco/Polo platforms |
| |
| if ARCH_SIRF |
| |
| comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features" |
| |
| config ARCH_ATLAS6 |
| bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" |
| default y |
| select SIRF_IRQ |
| help |
| Support for CSR SiRFSoC ARM Cortex A9 Platform |
| |
| config ARCH_ATLAS7 |
| bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" |
| default y |
| select ARM_GIC |
| select ATLAS7_TIMER |
| select HAVE_ARM_SCU if SMP |
| help |
| Support for CSR SiRFSoC ARM Cortex A7 Platform |
| |
| config ARCH_PRIMA2 |
| bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" |
| default y |
| select SIRF_IRQ |
| select ZONE_DMA |
| select PRIMA2_TIMER |
| help |
| Support for CSR SiRFSoC ARM Cortex A9 Platform |
| |
| config SIRF_IRQ |
| bool |
| |
| endif |
