| // SPDX-License-Identifier: GPL-2.0 |
| |
| #include "tegra30-asus-nexus7-grouper-common.dtsi" |
| #include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi" |
| |
| / { |
| compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30"; |
| |
| gpio@6000d000 { |
| init-mode-3g-hog { |
| gpio-hog; |
| gpios = <TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(P, 1) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(X, 5) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(U, 5) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(Y, 2) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(U, 3) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(N, 1) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(N, 2) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(N, 0) GPIO_ACTIVE_HIGH>, |
| <TEGRA_GPIO(N, 3) GPIO_ACTIVE_HIGH>; |
| output-low; |
| }; |
| }; |
| |
| pinmux@70000868 { |
| state_default: pinmux { |
| lcd_dc1_pd2 { |
| nvidia,pins = "lcd_dc1_pd2"; |
| nvidia,function = "displaya"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| lcd_pwr2_pc6 { |
| nvidia,pins = "lcd_pwr2_pc6"; |
| nvidia,function = "displaya"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| spi2_cs2_n_pw3 { |
| nvidia,pins = "spi2_cs2_n_pw3"; |
| nvidia,function = "spi2"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| dap3_din_pp1 { |
| nvidia,pins = "dap3_din_pp1"; |
| nvidia,function = "i2s2"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| spi1_sck_px5 { |
| nvidia,pins = "spi1_sck_px5"; |
| nvidia,function = "spi1"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| pu5 { |
| nvidia,pins = "pu5"; |
| nvidia,function = "pwm2"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| spi1_miso_px7 { |
| nvidia,pins = "spi1_miso_px7"; |
| nvidia,function = "spi1"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| spi2_mosi_px0 { |
| nvidia,pins = "spi2_mosi_px0"; |
| nvidia,function = "spi2"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| clk3_req_pee1 { |
| nvidia,pins = "clk3_req_pee1"; |
| nvidia,function = "dev3"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| ulpi_nxt_py2 { |
| nvidia,pins = "ulpi_nxt_py2"; |
| nvidia,function = "uartd"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| ulpi_stp_py3 { |
| nvidia,pins = "ulpi_stp_py3"; |
| nvidia,function = "uartd"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| kb_row7_pr7 { |
| nvidia,pins = "kb_row7_pr7"; |
| nvidia,function = "kbc"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| pu4 { |
| nvidia,pins = "pu4"; |
| nvidia,function = "pwm1"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| pu3 { |
| nvidia,pins = "pu3"; |
| nvidia,function = "rsvd4"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| kb_row15_ps7 { |
| nvidia,pins = "kb_row15_ps7"; |
| nvidia,function = "kbc"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| dap3_sclk_pp3 { |
| nvidia,pins = "dap3_sclk_pp3"; |
| nvidia,function = "i2s2"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| }; |
| kb_row3_pr3 { |
| nvidia,pins = "kb_row3_pr3", |
| "kb_row13_ps5"; |
| nvidia,function = "kbc"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| kb_row13_ps5 { |
| nvidia,pins = "kb_row13_ps5"; |
| nvidia,function = "kbc"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| gmi_wp_n_pc7 { |
| nvidia,pins = "gmi_wp_n_pc7", |
| "gmi_wait_pi7", |
| "gmi_cs4_n_pk2", |
| "gmi_cs3_n_pk4"; |
| nvidia,function = "rsvd1"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| gmi_cs6_n_pi3 { |
| nvidia,pins = "gmi_cs6_n_pi3"; |
| nvidia,function = "gmi"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| }; |
| }; |
| }; |
| |
| i2c@7000c500 { |
| proximity-sensor@28 { |
| compatible = "microchip,cap1106"; |
| reg = <0x28>; |
| |
| /* |
| * Binding doesn't support specifying linux,input-type |
| * and this results in unwanted key-presses handled by |
| * applications, hence keep it disabled for now. |
| */ |
| status = "disabled"; |
| |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>; |
| |
| linux,keycodes = <KEY_RESERVED>, |
| <KEY_RESERVED>, |
| <KEY_RESERVED>, |
| <KEY_RESERVED>, |
| <KEY_RESERVED>, |
| <SW_FRONT_PROXIMITY>; |
| }; |
| |
| nfc@2a { |
| compatible = "nxp,pn544-i2c"; |
| reg = <0x2a>; |
| |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>; |
| |
| enable-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>; |
| firmware-gpios = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| display-panel { |
| enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>; |
| |
| panel-timing { |
| clock-frequency = <81750000>; |
| hactive = <800>; |
| vactive = <1280>; |
| hfront-porch = <64>; |
| hback-porch = <128>; |
| hsync-len = <64>; |
| vsync-len = <1>; |
| vfront-porch = <5>; |
| vback-porch = <2>; |
| }; |
| }; |
| }; |
