| // SPDX-License-Identifier: GPL-2.0+ OR MIT |
| /* |
| * Copyright 2014-2020 Toradex |
| * |
| */ |
| |
| / { |
| aliases { |
| ethernet0 = &fec1; |
| ethernet1 = &fec0; |
| }; |
| |
| bl: backlight { |
| compatible = "pwm-backlight"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpio_bl_on>; |
| pwms = <&pwm0 0 5000000 0>; |
| enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; |
| status = "disabled"; |
| }; |
| |
| reg_module_3v3: regulator-module-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "+V3.3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| reg_module_3v3_avdd: regulator-module-3v3-avdd { |
| compatible = "regulator-fixed"; |
| regulator-name = "+V3.3_AVDD_AUDIO"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| |
| &adc0 { |
| status = "okay"; |
| vref-supply = <®_module_3v3_avdd>; |
| }; |
| |
| &adc1 { |
| status = "okay"; |
| vref-supply = <®_module_3v3_avdd>; |
| }; |
| |
| &can0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan0>; |
| status = "disabled"; |
| }; |
| |
| &can1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1>; |
| status = "disabled"; |
| }; |
| |
| &clks { |
| assigned-clocks = <&clks VF610_CLK_ENET_SEL>, |
| <&clks VF610_CLK_ENET_TS_SEL>; |
| assigned-clock-parents = <&clks VF610_CLK_ENET_50M>, |
| <&clks VF610_CLK_ENET_50M>; |
| }; |
| |
| &dspi1 { |
| bus-num = <1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_dspi1>; |
| }; |
| |
| &edma0 { |
| status = "okay"; |
| }; |
| |
| &edma1 { |
| status = "okay"; |
| }; |
| |
| &esdhc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_esdhc1>; |
| bus-width = <4>; |
| cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
| disable-wp; |
| }; |
| |
| &fec1 { |
| phy-mode = "rmii"; |
| phy-supply = <®_module_3v3>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fec1>; |
| }; |
| |
| &i2c0 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_i2c0>; |
| pinctrl-1 = <&pinctrl_i2c0_gpio>; |
| scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| }; |
| |
| &nfc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_nfc>; |
| status = "okay"; |
| |
| nand@0 { |
| compatible = "fsl,vf610-nfc-nandcs"; |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-bus-width = <8>; |
| nand-ecc-mode = "hw"; |
| nand-ecc-strength = <32>; |
| nand-ecc-step-size = <2048>; |
| nand-on-flash-bbt; |
| }; |
| }; |
| |
| &pwm0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm0>; |
| }; |
| |
| &pwm1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm1>; |
| }; |
| |
| &uart0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart0>; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| }; |
| |
| &usbdev0 { |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usbmisc0 { |
| status = "okay"; |
| }; |
| |
| &usbmisc1 { |
| status = "okay"; |
| }; |
| |
| &usbphy0 { |
| status = "okay"; |
| }; |
| |
| &usbphy1 { |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| vf610-colibri { |
| pinctrl_flexcan0: can0grp { |
| fsl,pins = < |
| VF610_PAD_PTB14__CAN0_RX 0x31F1 |
| VF610_PAD_PTB15__CAN0_TX 0x31F2 |
| >; |
| }; |
| |
| pinctrl_flexcan1: can1grp { |
| fsl,pins = < |
| VF610_PAD_PTB16__CAN1_RX 0x31F1 |
| VF610_PAD_PTB17__CAN1_TX 0x31F2 |
| >; |
| }; |
| |
| pinctrl_gpio_ext: gpio_ext { |
| fsl,pins = < |
| VF610_PAD_PTD10__GPIO_89 0x22ed /* EXT_IO_0 */ |
| VF610_PAD_PTD9__GPIO_88 0x22ed /* EXT_IO_1 */ |
| VF610_PAD_PTD26__GPIO_68 0x22ed /* EXT_IO_2 */ |
| >; |
| }; |
| |
| pinctrl_dcu0_1: dcu0grp_1 { |
| fsl,pins = < |
| VF610_PAD_PTE0__DCU0_HSYNC 0x1902 |
| VF610_PAD_PTE1__DCU0_VSYNC 0x1902 |
| VF610_PAD_PTE2__DCU0_PCLK 0x1902 |
| VF610_PAD_PTE4__DCU0_DE 0x1902 |
| VF610_PAD_PTE5__DCU0_R0 0x1902 |
| VF610_PAD_PTE6__DCU0_R1 0x1902 |
| VF610_PAD_PTE7__DCU0_R2 0x1902 |
| VF610_PAD_PTE8__DCU0_R3 0x1902 |
| VF610_PAD_PTE9__DCU0_R4 0x1902 |
| VF610_PAD_PTE10__DCU0_R5 0x1902 |
| VF610_PAD_PTE11__DCU0_R6 0x1902 |
| VF610_PAD_PTE12__DCU0_R7 0x1902 |
| VF610_PAD_PTE13__DCU0_G0 0x1902 |
| VF610_PAD_PTE14__DCU0_G1 0x1902 |
| VF610_PAD_PTE15__DCU0_G2 0x1902 |
| VF610_PAD_PTE16__DCU0_G3 0x1902 |
| VF610_PAD_PTE17__DCU0_G4 0x1902 |
| VF610_PAD_PTE18__DCU0_G5 0x1902 |
| VF610_PAD_PTE19__DCU0_G6 0x1902 |
| VF610_PAD_PTE20__DCU0_G7 0x1902 |
| VF610_PAD_PTE21__DCU0_B0 0x1902 |
| VF610_PAD_PTE22__DCU0_B1 0x1902 |
| VF610_PAD_PTE23__DCU0_B2 0x1902 |
| VF610_PAD_PTE24__DCU0_B3 0x1902 |
| VF610_PAD_PTE25__DCU0_B4 0x1902 |
| VF610_PAD_PTE26__DCU0_B5 0x1902 |
| VF610_PAD_PTE27__DCU0_B6 0x1902 |
| VF610_PAD_PTE28__DCU0_B7 0x1902 |
| >; |
| }; |
| |
| pinctrl_dspi1: dspi1grp { |
| fsl,pins = < |
| VF610_PAD_PTD5__DSPI1_CS0 0x33e2 |
| VF610_PAD_PTD6__DSPI1_SIN 0x33e1 |
| VF610_PAD_PTD7__DSPI1_SOUT 0x33e2 |
| VF610_PAD_PTD8__DSPI1_SCK 0x33e2 |
| >; |
| }; |
| |
| pinctrl_esdhc1: esdhc1grp { |
| fsl,pins = < |
| VF610_PAD_PTA24__ESDHC1_CLK 0x31ef |
| VF610_PAD_PTA25__ESDHC1_CMD 0x31ef |
| VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef |
| VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef |
| VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef |
| VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef |
| VF610_PAD_PTB20__GPIO_42 0x219d |
| >; |
| }; |
| |
| pinctrl_fec1: fec1grp { |
| fsl,pins = < |
| VF610_PAD_PTA6__RMII_CLKOUT 0x30d2 |
| VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |
| VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 |
| VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 |
| VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 |
| VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 |
| VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 |
| VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 |
| VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 |
| VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 |
| >; |
| }; |
| |
| pinctrl_gpio_bl_on: gpio_bl_on { |
| fsl,pins = < |
| VF610_PAD_PTC0__GPIO_45 0x22ef |
| >; |
| }; |
| |
| pinctrl_i2c0: i2c0grp { |
| fsl,pins = < |
| VF610_PAD_PTB14__I2C0_SCL 0x37ff |
| VF610_PAD_PTB15__I2C0_SDA 0x37ff |
| >; |
| }; |
| |
| pinctrl_i2c0_gpio: i2c0gpiogrp { |
| fsl,pins = < |
| VF610_PAD_PTB14__GPIO_36 0x37ff |
| VF610_PAD_PTB15__GPIO_37 0x37ff |
| >; |
| }; |
| |
| pinctrl_nfc: nfcgrp { |
| fsl,pins = < |
| VF610_PAD_PTD23__NF_IO7 0x28df |
| VF610_PAD_PTD22__NF_IO6 0x28df |
| VF610_PAD_PTD21__NF_IO5 0x28df |
| VF610_PAD_PTD20__NF_IO4 0x28df |
| VF610_PAD_PTD19__NF_IO3 0x28df |
| VF610_PAD_PTD18__NF_IO2 0x28df |
| VF610_PAD_PTD17__NF_IO1 0x28df |
| VF610_PAD_PTD16__NF_IO0 0x28df |
| VF610_PAD_PTB24__NF_WE_B 0x28c2 |
| VF610_PAD_PTB25__NF_CE0_B 0x28c2 |
| VF610_PAD_PTB27__NF_RE_B 0x28c2 |
| VF610_PAD_PTC26__NF_RB_B 0x283d |
| VF610_PAD_PTC27__NF_ALE 0x28c2 |
| VF610_PAD_PTC28__NF_CLE 0x28c2 |
| >; |
| }; |
| |
| pinctrl_pwm0: pwm0grp { |
| fsl,pins = < |
| VF610_PAD_PTB0__FTM0_CH0 0x1182 |
| VF610_PAD_PTB1__FTM0_CH1 0x1182 |
| >; |
| }; |
| |
| pinctrl_pwm1: pwm1grp { |
| fsl,pins = < |
| VF610_PAD_PTB8__FTM1_CH0 0x1182 |
| VF610_PAD_PTB9__FTM1_CH1 0x1182 |
| >; |
| }; |
| |
| pinctrl_uart0: uart0grp { |
| fsl,pins = < |
| VF610_PAD_PTB10__UART0_TX 0x21a2 |
| VF610_PAD_PTB11__UART0_RX 0x21a1 |
| VF610_PAD_PTB12__UART0_RTS 0x21a2 |
| VF610_PAD_PTB13__UART0_CTS 0x21a1 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| VF610_PAD_PTB4__UART1_TX 0x21a2 |
| VF610_PAD_PTB5__UART1_RX 0x21a1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| VF610_PAD_PTD0__UART2_TX 0x21a2 |
| VF610_PAD_PTD1__UART2_RX 0x21a1 |
| VF610_PAD_PTD2__UART2_RTS 0x21a2 |
| VF610_PAD_PTD3__UART2_CTS 0x21a1 |
| >; |
| }; |
| |
| pinctrl_usbh1_reg: gpio_usb_vbus { |
| fsl,pins = < |
| VF610_PAD_PTD4__GPIO_83 0x22ed |
| >; |
| }; |
| }; |
| }; |
