| /* |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| /dts-v1/; |
| |
| #include "omap443x.dtsi" |
| |
| / { |
| model = "Motorola Droid 4 XT894"; |
| compatible = "motorola,droid4", "ti,omap4430", "ti,omap4"; |
| |
| chosen { |
| stdout-path = &uart3; |
| }; |
| |
| /* |
| * We seem to have only 1021 MB accessible, 1021 - 1022 is locked, |
| * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes |
| * below about SRAM and L3_ICLK2 being unused by default, |
| */ |
| memory { |
| device_type = "memory"; |
| reg = <0x80000000 0x3fd00000>; /* 1021 MB */ |
| }; |
| |
| /* CPCAP really supports 1650000 to 3400000 range */ |
| vmmc: regulator-mmc { |
| compatible = "regulator-fixed"; |
| regulator-name = "vmmc"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-always-on; |
| }; |
| |
| /* CPCAP really supports 3000000 to 3100000 range */ |
| vemmc: regulator-emmc { |
| compatible = "regulator-fixed"; |
| regulator-name = "vemmc"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-always-on; |
| }; |
| |
| /* CPCAP really supports 1650000 to 1950000 range */ |
| wl12xx_vmmc: regulator-wl12xx { |
| compatible = "regulator-fixed"; |
| regulator-name = "vwl1271"; |
| regulator-min-microvolt = <1650000>; |
| regulator-max-microvolt = <1650000>; |
| gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */ |
| startup-delay-us = <70000>; |
| enable-active-high; |
| }; |
| }; |
| |
| /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ |
| &gpmc { |
| status = "disabled"; |
| }; |
| |
| &mmc1 { |
| vmmc-supply = <&vmmc>; |
| bus-width = <4>; |
| cd-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */ |
| }; |
| |
| &mmc2 { |
| vmmc-supply = <&vemmc>; |
| bus-width = <8>; |
| non-removable; |
| }; |
| |
| &mmc3 { |
| vmmc-supply = <&wl12xx_vmmc>; |
| interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH |
| &omap4_pmx_core 0xde>; |
| |
| non-removable; |
| bus-width = <4>; |
| cap-power-off-card; |
| |
| #address-cells = <1>; |
| #size-cells = <0>; |
| wlcore: wlcore@2 { |
| compatible = "ti,wl1283"; |
| reg = <2>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */ |
| ref-clock-frequency = <26000000>; |
| tcxo-clock-frequency = <26000000>; |
| }; |
| }; |
| |
| /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ |
| &ocmcram { |
| status = "disabled"; |
| }; |
| |
| &omap4_pmx_core { |
| usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins { |
| /* gpio_60 */ |
| pinctrl-single,pins = < |
| OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) |
| >; |
| }; |
| |
| usb_ulpi_pins: pinmux_usb_ulpi_pins { |
| pinctrl-single,pins = < |
| OMAP4_IOPAD(0x196, MUX_MODE7) |
| OMAP4_IOPAD(0x198, MUX_MODE7) |
| OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0) |
| OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0) |
| >; |
| }; |
| |
| /* usb0_otg_dp and usb0_otg_dm */ |
| usb_utmi_pins: pinmux_usb_utmi_pins { |
| pinctrl-single,pins = < |
| OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0) |
| OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0) |
| OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) |
| >; |
| }; |
| |
| /* uart3_tx_irtx and uart3_rx_irrx */ |
| uart3_pins: pinmux_uart3_pins { |
| pinctrl-single,pins = < |
| OMAP4_IOPAD(0x196, MUX_MODE7) |
| OMAP4_IOPAD(0x198, MUX_MODE7) |
| OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1ba, MUX_MODE2) |
| OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2) |
| OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7) |
| OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) |
| >; |
| }; |
| }; |
| |
| &omap4_pmx_wkup { |
| usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins { |
| /* gpio_wk0 */ |
| pinctrl-single,pins = < |
| OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3) |
| >; |
| }; |
| }; |
| |
| &uart3 { |
| interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH |
| &omap4_pmx_core 0x17c>; |
| }; |
| |
| /* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */ |
| &usb_otg_hs { |
| interface-type = <1>; |
| mode = <3>; |
| power = <50>; |
| }; |
