Thomas Gleixner | c942fdd | 2019-05-27 08:55:06 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 2 | /* |
| 3 | * Driver for Quantek QT1010 silicon tuner |
| 4 | * |
| 5 | * Copyright (C) 2006 Antti Palosaari <crope@iki.fi> |
| 6 | * Aapo Tahkola <aet@rasterburn.org> |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 7 | */ |
| 8 | #include "qt1010.h" |
| 9 | #include "qt1010_priv.h" |
| 10 | |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 11 | /* read single register */ |
| 12 | static int qt1010_readreg(struct qt1010_priv *priv, u8 reg, u8 *val) |
| 13 | { |
| 14 | struct i2c_msg msg[2] = { |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 15 | { .addr = priv->cfg->i2c_address, |
| 16 | .flags = 0, .buf = ®, .len = 1 }, |
| 17 | { .addr = priv->cfg->i2c_address, |
| 18 | .flags = I2C_M_RD, .buf = val, .len = 1 }, |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 19 | }; |
| 20 | |
| 21 | if (i2c_transfer(priv->i2c, msg, 2) != 2) { |
Antti Palosaari | 9d56f5d | 2012-08-21 10:18:58 -0300 | [diff] [blame] | 22 | dev_warn(&priv->i2c->dev, "%s: i2c rd failed reg=%02x\n", |
| 23 | KBUILD_MODNAME, reg); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 24 | return -EREMOTEIO; |
| 25 | } |
| 26 | return 0; |
| 27 | } |
| 28 | |
| 29 | /* write single register */ |
| 30 | static int qt1010_writereg(struct qt1010_priv *priv, u8 reg, u8 val) |
| 31 | { |
| 32 | u8 buf[2] = { reg, val }; |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 33 | struct i2c_msg msg = { .addr = priv->cfg->i2c_address, |
| 34 | .flags = 0, .buf = buf, .len = 2 }; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 35 | |
| 36 | if (i2c_transfer(priv->i2c, &msg, 1) != 1) { |
Antti Palosaari | 9d56f5d | 2012-08-21 10:18:58 -0300 | [diff] [blame] | 37 | dev_warn(&priv->i2c->dev, "%s: i2c wr failed reg=%02x\n", |
| 38 | KBUILD_MODNAME, reg); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 39 | return -EREMOTEIO; |
| 40 | } |
| 41 | return 0; |
| 42 | } |
| 43 | |
Mauro Carvalho Chehab | 14d24d1 | 2011-12-24 12:24:33 -0300 | [diff] [blame] | 44 | static int qt1010_set_params(struct dvb_frontend *fe) |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 45 | { |
Mauro Carvalho Chehab | 8b80ff3 | 2011-12-21 07:39:33 -0300 | [diff] [blame] | 46 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 47 | struct qt1010_priv *priv; |
| 48 | int err; |
| 49 | u32 freq, div, mod1, mod2; |
| 50 | u8 i, tmpval, reg05; |
| 51 | qt1010_i2c_oper_t rd[48] = { |
| 52 | { QT1010_WR, 0x01, 0x80 }, |
| 53 | { QT1010_WR, 0x02, 0x3f }, |
| 54 | { QT1010_WR, 0x05, 0xff }, /* 02 c write */ |
| 55 | { QT1010_WR, 0x06, 0x44 }, |
| 56 | { QT1010_WR, 0x07, 0xff }, /* 04 c write */ |
| 57 | { QT1010_WR, 0x08, 0x08 }, |
| 58 | { QT1010_WR, 0x09, 0xff }, /* 06 c write */ |
| 59 | { QT1010_WR, 0x0a, 0xff }, /* 07 c write */ |
| 60 | { QT1010_WR, 0x0b, 0xff }, /* 08 c write */ |
| 61 | { QT1010_WR, 0x0c, 0xe1 }, |
| 62 | { QT1010_WR, 0x1a, 0xff }, /* 10 c write */ |
| 63 | { QT1010_WR, 0x1b, 0x00 }, |
| 64 | { QT1010_WR, 0x1c, 0x89 }, |
| 65 | { QT1010_WR, 0x11, 0xff }, /* 13 c write */ |
| 66 | { QT1010_WR, 0x12, 0xff }, /* 14 c write */ |
| 67 | { QT1010_WR, 0x22, 0xff }, /* 15 c write */ |
| 68 | { QT1010_WR, 0x1e, 0x00 }, |
| 69 | { QT1010_WR, 0x1e, 0xd0 }, |
| 70 | { QT1010_RD, 0x22, 0xff }, /* 16 c read */ |
| 71 | { QT1010_WR, 0x1e, 0x00 }, |
| 72 | { QT1010_RD, 0x05, 0xff }, /* 20 c read */ |
| 73 | { QT1010_RD, 0x22, 0xff }, /* 21 c read */ |
| 74 | { QT1010_WR, 0x23, 0xd0 }, |
| 75 | { QT1010_WR, 0x1e, 0x00 }, |
| 76 | { QT1010_WR, 0x1e, 0xe0 }, |
| 77 | { QT1010_RD, 0x23, 0xff }, /* 25 c read */ |
| 78 | { QT1010_RD, 0x23, 0xff }, /* 26 c read */ |
| 79 | { QT1010_WR, 0x1e, 0x00 }, |
| 80 | { QT1010_WR, 0x24, 0xd0 }, |
| 81 | { QT1010_WR, 0x1e, 0x00 }, |
| 82 | { QT1010_WR, 0x1e, 0xf0 }, |
| 83 | { QT1010_RD, 0x24, 0xff }, /* 31 c read */ |
| 84 | { QT1010_WR, 0x1e, 0x00 }, |
| 85 | { QT1010_WR, 0x14, 0x7f }, |
| 86 | { QT1010_WR, 0x15, 0x7f }, |
| 87 | { QT1010_WR, 0x05, 0xff }, /* 35 c write */ |
| 88 | { QT1010_WR, 0x06, 0x00 }, |
| 89 | { QT1010_WR, 0x15, 0x1f }, |
| 90 | { QT1010_WR, 0x16, 0xff }, |
| 91 | { QT1010_WR, 0x18, 0xff }, |
| 92 | { QT1010_WR, 0x1f, 0xff }, /* 40 c write */ |
| 93 | { QT1010_WR, 0x20, 0xff }, /* 41 c write */ |
| 94 | { QT1010_WR, 0x21, 0x53 }, |
| 95 | { QT1010_WR, 0x25, 0xff }, /* 43 c write */ |
| 96 | { QT1010_WR, 0x26, 0x15 }, |
| 97 | { QT1010_WR, 0x00, 0xff }, /* 45 c write */ |
| 98 | { QT1010_WR, 0x02, 0x00 }, |
| 99 | { QT1010_WR, 0x01, 0x00 } |
| 100 | }; |
| 101 | |
| 102 | #define FREQ1 32000000 /* 32 MHz */ |
| 103 | #define FREQ2 4000000 /* 4 MHz Quartz oscillator in the stick? */ |
| 104 | |
| 105 | priv = fe->tuner_priv; |
Mauro Carvalho Chehab | 8b80ff3 | 2011-12-21 07:39:33 -0300 | [diff] [blame] | 106 | freq = c->frequency; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 107 | div = (freq + QT1010_OFFSET) / QT1010_STEP; |
| 108 | freq = (div * QT1010_STEP) - QT1010_OFFSET; |
| 109 | mod1 = (freq + QT1010_OFFSET) % FREQ1; |
| 110 | mod2 = (freq + QT1010_OFFSET) % FREQ2; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 111 | priv->frequency = freq; |
| 112 | |
Antti Palosaari | 705d41e | 2007-01-27 16:41:35 -0300 | [diff] [blame] | 113 | if (fe->ops.i2c_gate_ctrl) |
| 114 | fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ |
| 115 | |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 116 | /* reg 05 base value */ |
| 117 | if (freq < 290000000) reg05 = 0x14; /* 290 MHz */ |
| 118 | else if (freq < 610000000) reg05 = 0x34; /* 610 MHz */ |
| 119 | else if (freq < 802000000) reg05 = 0x54; /* 802 MHz */ |
| 120 | else reg05 = 0x74; |
| 121 | |
| 122 | /* 0x5 */ |
| 123 | rd[2].val = reg05; |
| 124 | |
| 125 | /* 07 - set frequency: 32 MHz scale */ |
| 126 | rd[4].val = (freq + QT1010_OFFSET) / FREQ1; |
| 127 | |
| 128 | /* 09 - changes every 8/24 MHz */ |
| 129 | if (mod1 < 8000000) rd[6].val = 0x1d; |
| 130 | else rd[6].val = 0x1c; |
| 131 | |
| 132 | /* 0a - set frequency: 4 MHz scale (max 28 MHz) */ |
| 133 | if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */ |
| 134 | else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */ |
| 135 | else if (mod1 < 3*FREQ2) rd[7].val = 0x0f; /* +8 MHz */ |
| 136 | else if (mod1 < 4*FREQ2) rd[7].val = 0x0e; /* +12 MHz */ |
| 137 | else if (mod1 < 5*FREQ2) rd[7].val = 0x0d; /* +16 MHz */ |
| 138 | else if (mod1 < 6*FREQ2) rd[7].val = 0x0c; /* +20 MHz */ |
| 139 | else if (mod1 < 7*FREQ2) rd[7].val = 0x0b; /* +24 MHz */ |
| 140 | else rd[7].val = 0x0a; /* +28 MHz */ |
| 141 | |
| 142 | /* 0b - changes every 2/2 MHz */ |
| 143 | if (mod2 < 2000000) rd[8].val = 0x45; |
| 144 | else rd[8].val = 0x44; |
| 145 | |
| 146 | /* 1a - set frequency: 125 kHz scale (max 3875 kHz)*/ |
| 147 | tmpval = 0x78; /* byte, overflows intentionally */ |
| 148 | rd[10].val = tmpval-((mod2/QT1010_STEP)*0x08); |
| 149 | |
| 150 | /* 11 */ |
| 151 | rd[13].val = 0xfd; /* TODO: correct value calculation */ |
| 152 | |
| 153 | /* 12 */ |
| 154 | rd[14].val = 0x91; /* TODO: correct value calculation */ |
| 155 | |
| 156 | /* 22 */ |
| 157 | if (freq < 450000000) rd[15].val = 0xd0; /* 450 MHz */ |
| 158 | else if (freq < 482000000) rd[15].val = 0xd1; /* 482 MHz */ |
| 159 | else if (freq < 514000000) rd[15].val = 0xd4; /* 514 MHz */ |
| 160 | else if (freq < 546000000) rd[15].val = 0xd7; /* 546 MHz */ |
| 161 | else if (freq < 610000000) rd[15].val = 0xda; /* 610 MHz */ |
| 162 | else rd[15].val = 0xd0; |
| 163 | |
| 164 | /* 05 */ |
| 165 | rd[35].val = (reg05 & 0xf0); |
| 166 | |
| 167 | /* 1f */ |
| 168 | if (mod1 < 8000000) tmpval = 0x00; |
| 169 | else if (mod1 < 12000000) tmpval = 0x01; |
| 170 | else if (mod1 < 16000000) tmpval = 0x02; |
| 171 | else if (mod1 < 24000000) tmpval = 0x03; |
| 172 | else if (mod1 < 28000000) tmpval = 0x04; |
| 173 | else tmpval = 0x05; |
| 174 | rd[40].val = (priv->reg1f_init_val + 0x0e + tmpval); |
| 175 | |
| 176 | /* 20 */ |
| 177 | if (mod1 < 8000000) tmpval = 0x00; |
| 178 | else if (mod1 < 12000000) tmpval = 0x01; |
| 179 | else if (mod1 < 20000000) tmpval = 0x02; |
| 180 | else if (mod1 < 24000000) tmpval = 0x03; |
| 181 | else if (mod1 < 28000000) tmpval = 0x04; |
| 182 | else tmpval = 0x05; |
| 183 | rd[41].val = (priv->reg20_init_val + 0x0d + tmpval); |
| 184 | |
| 185 | /* 25 */ |
| 186 | rd[43].val = priv->reg25_init_val; |
| 187 | |
| 188 | /* 00 */ |
| 189 | rd[45].val = 0x92; /* TODO: correct value calculation */ |
| 190 | |
Antti Palosaari | 9d56f5d | 2012-08-21 10:18:58 -0300 | [diff] [blame] | 191 | dev_dbg(&priv->i2c->dev, |
| 192 | "%s: freq:%u 05:%02x 07:%02x 09:%02x 0a:%02x 0b:%02x " \ |
| 193 | "1a:%02x 11:%02x 12:%02x 22:%02x 05:%02x 1f:%02x " \ |
| 194 | "20:%02x 25:%02x 00:%02x\n", __func__, \ |
| 195 | freq, rd[2].val, rd[4].val, rd[6].val, rd[7].val, \ |
| 196 | rd[8].val, rd[10].val, rd[13].val, rd[14].val, \ |
| 197 | rd[15].val, rd[35].val, rd[40].val, rd[41].val, \ |
| 198 | rd[43].val, rd[45].val); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 199 | |
Michael Krufky | 47e76c5 | 2007-02-13 17:53:46 -0300 | [diff] [blame] | 200 | for (i = 0; i < ARRAY_SIZE(rd); i++) { |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 201 | if (rd[i].oper == QT1010_WR) { |
| 202 | err = qt1010_writereg(priv, rd[i].reg, rd[i].val); |
| 203 | } else { /* read is required to proper locking */ |
| 204 | err = qt1010_readreg(priv, rd[i].reg, &tmpval); |
| 205 | } |
| 206 | if (err) return err; |
| 207 | } |
| 208 | |
Antti Palosaari | 705d41e | 2007-01-27 16:41:35 -0300 | [diff] [blame] | 209 | if (fe->ops.i2c_gate_ctrl) |
| 210 | fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ |
| 211 | |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 212 | return 0; |
| 213 | } |
| 214 | |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 215 | static int qt1010_init_meas1(struct qt1010_priv *priv, |
| 216 | u8 oper, u8 reg, u8 reg_init_val, u8 *retval) |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 217 | { |
Kees Cook | 3f649ab | 2020-06-03 13:09:38 -0700 | [diff] [blame] | 218 | u8 i, val1, val2; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 219 | int err; |
| 220 | |
| 221 | qt1010_i2c_oper_t i2c_data[] = { |
| 222 | { QT1010_WR, reg, reg_init_val }, |
| 223 | { QT1010_WR, 0x1e, 0x00 }, |
| 224 | { QT1010_WR, 0x1e, oper }, |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 225 | }; |
| 226 | |
Michael Krufky | 47e76c5 | 2007-02-13 17:53:46 -0300 | [diff] [blame] | 227 | for (i = 0; i < ARRAY_SIZE(i2c_data); i++) { |
Mauro Carvalho Chehab | 7a9b561 | 2020-09-01 11:05:19 +0200 | [diff] [blame] | 228 | err = qt1010_writereg(priv, i2c_data[i].reg, |
| 229 | i2c_data[i].val); |
| 230 | if (err) |
| 231 | return err; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 232 | } |
| 233 | |
Mauro Carvalho Chehab | 7a9b561 | 2020-09-01 11:05:19 +0200 | [diff] [blame] | 234 | err = qt1010_readreg(priv, reg, &val2); |
| 235 | if (err) |
| 236 | return err; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 237 | do { |
| 238 | val1 = val2; |
| 239 | err = qt1010_readreg(priv, reg, &val2); |
Mauro Carvalho Chehab | 7a9b561 | 2020-09-01 11:05:19 +0200 | [diff] [blame] | 240 | if (err) |
| 241 | return err; |
| 242 | |
Antti Palosaari | 9d56f5d | 2012-08-21 10:18:58 -0300 | [diff] [blame] | 243 | dev_dbg(&priv->i2c->dev, "%s: compare reg:%02x %02x %02x\n", |
| 244 | __func__, reg, val1, val2); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 245 | } while (val1 != val2); |
| 246 | *retval = val1; |
| 247 | |
| 248 | return qt1010_writereg(priv, 0x1e, 0x00); |
| 249 | } |
| 250 | |
Dan Carpenter | ffd491f | 2012-08-10 05:25:03 -0300 | [diff] [blame] | 251 | static int qt1010_init_meas2(struct qt1010_priv *priv, |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 252 | u8 reg_init_val, u8 *retval) |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 253 | { |
Mauro Carvalho Chehab | 7a9b561 | 2020-09-01 11:05:19 +0200 | [diff] [blame] | 254 | u8 i, val = 0xff; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 255 | int err; |
| 256 | qt1010_i2c_oper_t i2c_data[] = { |
| 257 | { QT1010_WR, 0x07, reg_init_val }, |
| 258 | { QT1010_WR, 0x22, 0xd0 }, |
| 259 | { QT1010_WR, 0x1e, 0x00 }, |
| 260 | { QT1010_WR, 0x1e, 0xd0 }, |
| 261 | { QT1010_RD, 0x22, 0xff }, |
| 262 | { QT1010_WR, 0x1e, 0x00 }, |
| 263 | { QT1010_WR, 0x22, 0xff } |
| 264 | }; |
Mauro Carvalho Chehab | 7a9b561 | 2020-09-01 11:05:19 +0200 | [diff] [blame] | 265 | |
Michael Krufky | 47e76c5 | 2007-02-13 17:53:46 -0300 | [diff] [blame] | 266 | for (i = 0; i < ARRAY_SIZE(i2c_data); i++) { |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 267 | if (i2c_data[i].oper == QT1010_WR) { |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 268 | err = qt1010_writereg(priv, i2c_data[i].reg, |
| 269 | i2c_data[i].val); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 270 | } else { |
| 271 | err = qt1010_readreg(priv, i2c_data[i].reg, &val); |
| 272 | } |
Mauro Carvalho Chehab | 7a9b561 | 2020-09-01 11:05:19 +0200 | [diff] [blame] | 273 | if (err) |
| 274 | return err; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 275 | } |
| 276 | *retval = val; |
| 277 | return 0; |
| 278 | } |
| 279 | |
| 280 | static int qt1010_init(struct dvb_frontend *fe) |
| 281 | { |
| 282 | struct qt1010_priv *priv = fe->tuner_priv; |
Mauro Carvalho Chehab | 8b80ff3 | 2011-12-21 07:39:33 -0300 | [diff] [blame] | 283 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
Marco Schluessler | b79ea69 | 2007-02-13 16:46:13 -0300 | [diff] [blame] | 284 | int err = 0; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 285 | u8 i, tmpval, *valptr = NULL; |
| 286 | |
Mauro Carvalho Chehab | efc0ac5 | 2015-04-28 12:39:02 -0300 | [diff] [blame] | 287 | static const qt1010_i2c_oper_t i2c_data[] = { |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 288 | { QT1010_WR, 0x01, 0x80 }, |
| 289 | { QT1010_WR, 0x0d, 0x84 }, |
| 290 | { QT1010_WR, 0x0e, 0xb7 }, |
| 291 | { QT1010_WR, 0x2a, 0x23 }, |
| 292 | { QT1010_WR, 0x2c, 0xdc }, |
| 293 | { QT1010_M1, 0x25, 0x40 }, /* get reg 25 init value */ |
| 294 | { QT1010_M1, 0x81, 0xff }, /* get reg 25 init value */ |
| 295 | { QT1010_WR, 0x2b, 0x70 }, |
| 296 | { QT1010_WR, 0x2a, 0x23 }, |
| 297 | { QT1010_M1, 0x26, 0x08 }, |
| 298 | { QT1010_M1, 0x82, 0xff }, |
| 299 | { QT1010_WR, 0x05, 0x14 }, |
| 300 | { QT1010_WR, 0x06, 0x44 }, |
| 301 | { QT1010_WR, 0x07, 0x28 }, |
| 302 | { QT1010_WR, 0x08, 0x0b }, |
| 303 | { QT1010_WR, 0x11, 0xfd }, |
| 304 | { QT1010_M1, 0x22, 0x0d }, |
| 305 | { QT1010_M1, 0xd0, 0xff }, |
| 306 | { QT1010_WR, 0x06, 0x40 }, |
| 307 | { QT1010_WR, 0x16, 0xf0 }, |
| 308 | { QT1010_WR, 0x02, 0x38 }, |
| 309 | { QT1010_WR, 0x03, 0x18 }, |
| 310 | { QT1010_WR, 0x20, 0xe0 }, |
| 311 | { QT1010_M1, 0x1f, 0x20 }, /* get reg 1f init value */ |
| 312 | { QT1010_M1, 0x84, 0xff }, /* get reg 1f init value */ |
| 313 | { QT1010_RD, 0x20, 0x20 }, /* get reg 20 init value */ |
| 314 | { QT1010_WR, 0x03, 0x19 }, |
| 315 | { QT1010_WR, 0x02, 0x3f }, |
| 316 | { QT1010_WR, 0x21, 0x53 }, |
| 317 | { QT1010_RD, 0x21, 0xff }, |
| 318 | { QT1010_WR, 0x11, 0xfd }, |
| 319 | { QT1010_WR, 0x05, 0x34 }, |
| 320 | { QT1010_WR, 0x06, 0x44 }, |
| 321 | { QT1010_WR, 0x08, 0x08 } |
| 322 | }; |
| 323 | |
Antti Palosaari | 705d41e | 2007-01-27 16:41:35 -0300 | [diff] [blame] | 324 | if (fe->ops.i2c_gate_ctrl) |
| 325 | fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ |
| 326 | |
Michael Krufky | 47e76c5 | 2007-02-13 17:53:46 -0300 | [diff] [blame] | 327 | for (i = 0; i < ARRAY_SIZE(i2c_data); i++) { |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 328 | switch (i2c_data[i].oper) { |
| 329 | case QT1010_WR: |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 330 | err = qt1010_writereg(priv, i2c_data[i].reg, |
| 331 | i2c_data[i].val); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 332 | break; |
| 333 | case QT1010_RD: |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 334 | if (i2c_data[i].val == 0x20) |
| 335 | valptr = &priv->reg20_init_val; |
| 336 | else |
| 337 | valptr = &tmpval; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 338 | err = qt1010_readreg(priv, i2c_data[i].reg, valptr); |
| 339 | break; |
| 340 | case QT1010_M1: |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 341 | if (i2c_data[i].val == 0x25) |
| 342 | valptr = &priv->reg25_init_val; |
| 343 | else if (i2c_data[i].val == 0x1f) |
| 344 | valptr = &priv->reg1f_init_val; |
| 345 | else |
| 346 | valptr = &tmpval; |
Mauro Carvalho Chehab | 4682b58 | 2015-04-29 09:33:02 -0300 | [diff] [blame] | 347 | |
| 348 | BUG_ON(i >= ARRAY_SIZE(i2c_data) - 1); |
| 349 | |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 350 | err = qt1010_init_meas1(priv, i2c_data[i+1].reg, |
| 351 | i2c_data[i].reg, |
| 352 | i2c_data[i].val, valptr); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 353 | i++; |
| 354 | break; |
| 355 | } |
Mauro Carvalho Chehab | 4682b58 | 2015-04-29 09:33:02 -0300 | [diff] [blame] | 356 | if (err) |
| 357 | return err; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 358 | } |
| 359 | |
| 360 | for (i = 0x31; i < 0x3a; i++) /* 0x31 - 0x39 */ |
| 361 | if ((err = qt1010_init_meas2(priv, i, &tmpval))) |
| 362 | return err; |
| 363 | |
Antti Palosaari | 7f12088 | 2012-08-21 09:08:20 -0300 | [diff] [blame] | 364 | if (!c->frequency) |
| 365 | c->frequency = 545000000; /* Sigmatek DVB-110 545000000 */ |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 366 | /* MSI Megasky 580 GL861 533000000 */ |
Mauro Carvalho Chehab | 14d24d1 | 2011-12-24 12:24:33 -0300 | [diff] [blame] | 367 | return qt1010_set_params(fe); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 368 | } |
| 369 | |
Mauro Carvalho Chehab | f2709c2 | 2016-11-18 20:30:51 -0200 | [diff] [blame] | 370 | static void qt1010_release(struct dvb_frontend *fe) |
| 371 | { |
| 372 | kfree(fe->tuner_priv); |
| 373 | fe->tuner_priv = NULL; |
| 374 | } |
| 375 | |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 376 | static int qt1010_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
| 377 | { |
| 378 | struct qt1010_priv *priv = fe->tuner_priv; |
| 379 | *frequency = priv->frequency; |
| 380 | return 0; |
| 381 | } |
| 382 | |
Antti Palosaari | ed94051 | 2011-11-13 01:07:42 -0300 | [diff] [blame] | 383 | static int qt1010_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) |
| 384 | { |
| 385 | *frequency = 36125000; |
| 386 | return 0; |
| 387 | } |
| 388 | |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 389 | static const struct dvb_tuner_ops qt1010_tuner_ops = { |
| 390 | .info = { |
Mauro Carvalho Chehab | a3f90c7 | 2018-07-05 18:59:35 -0400 | [diff] [blame] | 391 | .name = "Quantek QT1010", |
| 392 | .frequency_min_hz = QT1010_MIN_FREQ, |
| 393 | .frequency_max_hz = QT1010_MAX_FREQ, |
| 394 | .frequency_step_hz = QT1010_STEP, |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 395 | }, |
| 396 | |
Mauro Carvalho Chehab | f2709c2 | 2016-11-18 20:30:51 -0200 | [diff] [blame] | 397 | .release = qt1010_release, |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 398 | .init = qt1010_init, |
| 399 | /* TODO: implement sleep */ |
| 400 | |
| 401 | .set_params = qt1010_set_params, |
| 402 | .get_frequency = qt1010_get_frequency, |
Antti Palosaari | ed94051 | 2011-11-13 01:07:42 -0300 | [diff] [blame] | 403 | .get_if_frequency = qt1010_get_if_frequency, |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 404 | }; |
| 405 | |
| 406 | struct dvb_frontend * qt1010_attach(struct dvb_frontend *fe, |
| 407 | struct i2c_adapter *i2c, |
| 408 | struct qt1010_config *cfg) |
| 409 | { |
| 410 | struct qt1010_priv *priv = NULL; |
| 411 | u8 id; |
| 412 | |
| 413 | priv = kzalloc(sizeof(struct qt1010_priv), GFP_KERNEL); |
| 414 | if (priv == NULL) |
| 415 | return NULL; |
| 416 | |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 417 | priv->cfg = cfg; |
| 418 | priv->i2c = i2c; |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 419 | |
Antti Palosaari | 705d41e | 2007-01-27 16:41:35 -0300 | [diff] [blame] | 420 | if (fe->ops.i2c_gate_ctrl) |
| 421 | fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ |
| 422 | |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 423 | |
| 424 | /* Try to detect tuner chip. Probably this is not correct register. */ |
| 425 | if (qt1010_readreg(priv, 0x29, &id) != 0 || (id != 0x39)) { |
| 426 | kfree(priv); |
| 427 | return NULL; |
| 428 | } |
| 429 | |
Antti Palosaari | 705d41e | 2007-01-27 16:41:35 -0300 | [diff] [blame] | 430 | if (fe->ops.i2c_gate_ctrl) |
| 431 | fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ |
| 432 | |
Antti Palosaari | 9d56f5d | 2012-08-21 10:18:58 -0300 | [diff] [blame] | 433 | dev_info(&priv->i2c->dev, |
| 434 | "%s: Quantek QT1010 successfully identified\n", |
| 435 | KBUILD_MODNAME); |
| 436 | |
Michael Krufky | f6982d5 | 2007-02-13 18:26:26 -0300 | [diff] [blame] | 437 | memcpy(&fe->ops.tuner_ops, &qt1010_tuner_ops, |
| 438 | sizeof(struct dvb_tuner_ops)); |
Antti Palosaari | cbdc80e | 2007-01-21 15:56:10 -0300 | [diff] [blame] | 439 | |
| 440 | fe->tuner_priv = priv; |
| 441 | return fe; |
| 442 | } |
| 443 | EXPORT_SYMBOL(qt1010_attach); |
| 444 | |
| 445 | MODULE_DESCRIPTION("Quantek QT1010 silicon tuner driver"); |
| 446 | MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); |
| 447 | MODULE_AUTHOR("Aapo Tahkola <aet@rasterburn.org>"); |
| 448 | MODULE_VERSION("0.1"); |
| 449 | MODULE_LICENSE("GPL"); |