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Ben Dooks3cba5ef2009-05-17 23:30:45 +01001/* arch/arm/plat-s3c/include/plat/watchdog-reset.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - System define for arch_reset() function
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
Marek Szyprowskicaf27302011-09-05 20:10:06 +090013#include <plat/clock.h>
Ben Dooks3cba5ef2009-05-17 23:30:45 +010014#include <plat/regs-watchdog.h>
Ben Dooks543899f2009-05-17 23:40:30 +010015#include <mach/map.h>
Ben Dooks3cba5ef2009-05-17 23:30:45 +010016
17#include <linux/clk.h>
18#include <linux/err.h>
19#include <linux/io.h>
Kukjin Kimff84ded2012-01-03 14:03:30 +010020#include <linux/delay.h>
Ben Dooks3cba5ef2009-05-17 23:30:45 +010021
22static inline void arch_wdt_reset(void)
23{
Ben Dooks3cba5ef2009-05-17 23:30:45 +010024 printk("arch_reset: attempting watchdog reset\n");
25
26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
27
Marek Szyprowskicaf27302011-09-05 20:10:06 +090028 if (s3c2410_wdtclk)
29 clk_enable(s3c2410_wdtclk);
Ben Dooks3cba5ef2009-05-17 23:30:45 +010030
31 /* put initial values into count and data */
32 __raw_writel(0x80, S3C2410_WTCNT);
33 __raw_writel(0x80, S3C2410_WTDAT);
34
35 /* set the watchdog to go and reset... */
36 __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
37 S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
38
39 /* wait for reset to assert... */
40 mdelay(500);
41
42 printk(KERN_ERR "Watchdog reset failed to assert reset\n");
43
44 /* delay to allow the serial port to show the message */
45 mdelay(50);
46}