Thomas Gleixner | b4d0d23 | 2019-05-20 19:08:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
David Howells | 739d875 | 2018-03-08 09:48:46 +0000 | [diff] [blame] | 2 | /* Generic I/O port emulation. |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. |
| 5 | * Written by David Howells (dhowells@redhat.com) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 6 | */ |
| 7 | #ifndef __ASM_GENERIC_IO_H |
| 8 | #define __ASM_GENERIC_IO_H |
| 9 | |
| 10 | #include <asm/page.h> /* I/O is all done through memory accesses */ |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 11 | #include <linux/string.h> /* for memset() and memcpy() */ |
Kent Overstreet | 0069455 | 2024-03-21 09:36:23 -0700 | [diff] [blame] | 12 | #include <linux/sizes.h> |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 13 | #include <linux/types.h> |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 14 | #include <linux/instruction_pointer.h> |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 15 | |
| 16 | #ifdef CONFIG_GENERIC_IOMAP |
| 17 | #include <asm-generic/iomap.h> |
| 18 | #endif |
| 19 | |
Will Deacon | 60ca1e5 | 2019-02-22 12:59:59 +0000 | [diff] [blame] | 20 | #include <asm/mmiowb.h> |
Michael S. Tsirkin | 66eab4d | 2011-11-24 20:45:20 +0200 | [diff] [blame] | 21 | #include <asm-generic/pci_iomap.h> |
| 22 | |
Sinan Kaya | 64e2c67 | 2018-04-05 09:09:09 -0400 | [diff] [blame] | 23 | #ifndef __io_br |
| 24 | #define __io_br() barrier() |
| 25 | #endif |
| 26 | |
| 27 | /* prevent prefetching of coherent DMA data ahead of a dma-complete */ |
| 28 | #ifndef __io_ar |
| 29 | #ifdef rmb |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 30 | #define __io_ar(v) rmb() |
Sinan Kaya | 64e2c67 | 2018-04-05 09:09:09 -0400 | [diff] [blame] | 31 | #else |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 32 | #define __io_ar(v) barrier() |
Sinan Kaya | 64e2c67 | 2018-04-05 09:09:09 -0400 | [diff] [blame] | 33 | #endif |
| 34 | #endif |
| 35 | |
| 36 | /* flush writes to coherent DMA data before possibly triggering a DMA read */ |
| 37 | #ifndef __io_bw |
| 38 | #ifdef wmb |
| 39 | #define __io_bw() wmb() |
| 40 | #else |
| 41 | #define __io_bw() barrier() |
| 42 | #endif |
| 43 | #endif |
| 44 | |
| 45 | /* serialize device access against a spin_unlock, usually handled there. */ |
| 46 | #ifndef __io_aw |
Will Deacon | 60ca1e5 | 2019-02-22 12:59:59 +0000 | [diff] [blame] | 47 | #define __io_aw() mmiowb_set_pending() |
Sinan Kaya | 64e2c67 | 2018-04-05 09:09:09 -0400 | [diff] [blame] | 48 | #endif |
| 49 | |
| 50 | #ifndef __io_pbw |
| 51 | #define __io_pbw() __io_bw() |
| 52 | #endif |
| 53 | |
| 54 | #ifndef __io_paw |
| 55 | #define __io_paw() __io_aw() |
| 56 | #endif |
| 57 | |
| 58 | #ifndef __io_pbr |
| 59 | #define __io_pbr() __io_br() |
| 60 | #endif |
| 61 | |
| 62 | #ifndef __io_par |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 63 | #define __io_par(v) __io_ar(v) |
Sinan Kaya | 64e2c67 | 2018-04-05 09:09:09 -0400 | [diff] [blame] | 64 | #endif |
| 65 | |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 66 | /* |
| 67 | * "__DISABLE_TRACE_MMIO__" flag can be used to disable MMIO tracing for |
| 68 | * specific kernel drivers in case of excessive/unwanted logging. |
| 69 | * |
| 70 | * Usage: Add a #define flag at the beginning of the driver file. |
| 71 | * Ex: #define __DISABLE_TRACE_MMIO__ |
| 72 | * #include <...> |
| 73 | * ... |
| 74 | */ |
| 75 | #if IS_ENABLED(CONFIG_TRACE_MMIO_ACCESS) && !(defined(__DISABLE_TRACE_MMIO__)) |
| 76 | #include <linux/tracepoint-defs.h> |
| 77 | |
| 78 | DECLARE_TRACEPOINT(rwmmio_write); |
| 79 | DECLARE_TRACEPOINT(rwmmio_post_write); |
| 80 | DECLARE_TRACEPOINT(rwmmio_read); |
| 81 | DECLARE_TRACEPOINT(rwmmio_post_read); |
| 82 | |
| 83 | void log_write_mmio(u64 val, u8 width, volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 84 | unsigned long caller_addr, unsigned long caller_addr0); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 85 | void log_post_write_mmio(u64 val, u8 width, volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 86 | unsigned long caller_addr, unsigned long caller_addr0); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 87 | void log_read_mmio(u8 width, const volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 88 | unsigned long caller_addr, unsigned long caller_addr0); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 89 | void log_post_read_mmio(u64 val, u8 width, const volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 90 | unsigned long caller_addr, unsigned long caller_addr0); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 91 | |
| 92 | #else |
| 93 | |
| 94 | static inline void log_write_mmio(u64 val, u8 width, volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 95 | unsigned long caller_addr, unsigned long caller_addr0) {} |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 96 | static inline void log_post_write_mmio(u64 val, u8 width, volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 97 | unsigned long caller_addr, unsigned long caller_addr0) {} |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 98 | static inline void log_read_mmio(u8 width, const volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 99 | unsigned long caller_addr, unsigned long caller_addr0) {} |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 100 | static inline void log_post_read_mmio(u64 val, u8 width, const volatile void __iomem *addr, |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 101 | unsigned long caller_addr, unsigned long caller_addr0) {} |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 102 | |
| 103 | #endif /* CONFIG_TRACE_MMIO_ACCESS */ |
Sinan Kaya | 64e2c67 | 2018-04-05 09:09:09 -0400 | [diff] [blame] | 104 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 105 | /* |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 106 | * __raw_{read,write}{b,w,l,q}() access memory in native endianness. |
| 107 | * |
| 108 | * On some architectures memory mapped IO needs to be accessed differently. |
| 109 | * On the simple architectures, we just read/write the memory location |
| 110 | * directly. |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 111 | */ |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 112 | |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 113 | #ifndef __raw_readb |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 114 | #define __raw_readb __raw_readb |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 115 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
| 116 | { |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 117 | return *(const volatile u8 __force *)addr; |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 118 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 119 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 120 | |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 121 | #ifndef __raw_readw |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 122 | #define __raw_readw __raw_readw |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 123 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
| 124 | { |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 125 | return *(const volatile u16 __force *)addr; |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 126 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 127 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 128 | |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 129 | #ifndef __raw_readl |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 130 | #define __raw_readl __raw_readl |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 131 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
| 132 | { |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 133 | return *(const volatile u32 __force *)addr; |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 134 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 135 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 136 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 137 | #ifdef CONFIG_64BIT |
| 138 | #ifndef __raw_readq |
| 139 | #define __raw_readq __raw_readq |
| 140 | static inline u64 __raw_readq(const volatile void __iomem *addr) |
| 141 | { |
| 142 | return *(const volatile u64 __force *)addr; |
| 143 | } |
| 144 | #endif |
| 145 | #endif /* CONFIG_64BIT */ |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 146 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 147 | #ifndef __raw_writeb |
| 148 | #define __raw_writeb __raw_writeb |
| 149 | static inline void __raw_writeb(u8 value, volatile void __iomem *addr) |
| 150 | { |
| 151 | *(volatile u8 __force *)addr = value; |
| 152 | } |
| 153 | #endif |
| 154 | |
| 155 | #ifndef __raw_writew |
| 156 | #define __raw_writew __raw_writew |
| 157 | static inline void __raw_writew(u16 value, volatile void __iomem *addr) |
| 158 | { |
| 159 | *(volatile u16 __force *)addr = value; |
| 160 | } |
| 161 | #endif |
| 162 | |
| 163 | #ifndef __raw_writel |
| 164 | #define __raw_writel __raw_writel |
| 165 | static inline void __raw_writel(u32 value, volatile void __iomem *addr) |
| 166 | { |
| 167 | *(volatile u32 __force *)addr = value; |
| 168 | } |
| 169 | #endif |
| 170 | |
| 171 | #ifdef CONFIG_64BIT |
| 172 | #ifndef __raw_writeq |
| 173 | #define __raw_writeq __raw_writeq |
| 174 | static inline void __raw_writeq(u64 value, volatile void __iomem *addr) |
| 175 | { |
| 176 | *(volatile u64 __force *)addr = value; |
| 177 | } |
| 178 | #endif |
| 179 | #endif /* CONFIG_64BIT */ |
| 180 | |
| 181 | /* |
| 182 | * {read,write}{b,w,l,q}() access little endian memory and return result in |
| 183 | * native endianness. |
| 184 | */ |
| 185 | |
| 186 | #ifndef readb |
| 187 | #define readb readb |
| 188 | static inline u8 readb(const volatile void __iomem *addr) |
| 189 | { |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 190 | u8 val; |
| 191 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 192 | log_read_mmio(8, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 193 | __io_br(); |
| 194 | val = __raw_readb(addr); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 195 | __io_ar(val); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 196 | log_post_read_mmio(val, 8, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 197 | return val; |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 198 | } |
| 199 | #endif |
| 200 | |
| 201 | #ifndef readw |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 202 | #define readw readw |
| 203 | static inline u16 readw(const volatile void __iomem *addr) |
| 204 | { |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 205 | u16 val; |
| 206 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 207 | log_read_mmio(16, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 208 | __io_br(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 209 | val = __le16_to_cpu((__le16 __force)__raw_readw(addr)); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 210 | __io_ar(val); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 211 | log_post_read_mmio(val, 16, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 212 | return val; |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 213 | } |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 214 | #endif |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 215 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 216 | #ifndef readl |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 217 | #define readl readl |
| 218 | static inline u32 readl(const volatile void __iomem *addr) |
| 219 | { |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 220 | u32 val; |
| 221 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 222 | log_read_mmio(32, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 223 | __io_br(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 224 | val = __le32_to_cpu((__le32 __force)__raw_readl(addr)); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 225 | __io_ar(val); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 226 | log_post_read_mmio(val, 32, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 227 | return val; |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 228 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 229 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 230 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 231 | #ifdef CONFIG_64BIT |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 232 | #ifndef readq |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 233 | #define readq readq |
| 234 | static inline u64 readq(const volatile void __iomem *addr) |
| 235 | { |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 236 | u64 val; |
| 237 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 238 | log_read_mmio(64, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 239 | __io_br(); |
Vladimir Oltean | d564fa1 | 2023-01-09 15:11:52 +0200 | [diff] [blame] | 240 | val = __le64_to_cpu((__le64 __force)__raw_readq(addr)); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 241 | __io_ar(val); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 242 | log_post_read_mmio(val, 64, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 032d59e | 2018-04-05 09:09:10 -0400 | [diff] [blame] | 243 | return val; |
Heiko Carstens | 7292e7e | 2013-01-07 14:17:23 +0100 | [diff] [blame] | 244 | } |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 245 | #endif |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 246 | #endif /* CONFIG_64BIT */ |
| 247 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 248 | #ifndef writeb |
| 249 | #define writeb writeb |
| 250 | static inline void writeb(u8 value, volatile void __iomem *addr) |
| 251 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 252 | log_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 253 | __io_bw(); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 254 | __raw_writeb(value, addr); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 255 | __io_aw(); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 256 | log_post_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 257 | } |
GuanXuetao | 7dc59bd | 2011-02-22 19:06:43 +0800 | [diff] [blame] | 258 | #endif |
| 259 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 260 | #ifndef writew |
| 261 | #define writew writew |
| 262 | static inline void writew(u16 value, volatile void __iomem *addr) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 263 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 264 | log_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 265 | __io_bw(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 266 | __raw_writew((u16 __force)cpu_to_le16(value), addr); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 267 | __io_aw(); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 268 | log_post_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 269 | } |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 270 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 271 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 272 | #ifndef writel |
| 273 | #define writel writel |
| 274 | static inline void writel(u32 value, volatile void __iomem *addr) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 275 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 276 | log_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 277 | __io_bw(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 278 | __raw_writel((u32 __force)__cpu_to_le32(value), addr); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 279 | __io_aw(); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 280 | log_post_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 281 | } |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 282 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 283 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 284 | #ifdef CONFIG_64BIT |
| 285 | #ifndef writeq |
| 286 | #define writeq writeq |
| 287 | static inline void writeq(u64 value, volatile void __iomem *addr) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 288 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 289 | log_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 290 | __io_bw(); |
Vladimir Oltean | d564fa1 | 2023-01-09 15:11:52 +0200 | [diff] [blame] | 291 | __raw_writeq((u64 __force)__cpu_to_le64(value), addr); |
Sinan Kaya | 755bd04 | 2018-04-05 09:09:11 -0400 | [diff] [blame] | 292 | __io_aw(); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 293 | log_post_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 294 | } |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 295 | #endif |
| 296 | #endif /* CONFIG_64BIT */ |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 297 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 298 | /* |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 299 | * {read,write}{b,w,l,q}_relaxed() are like the regular version, but |
| 300 | * are not guaranteed to provide ordering against spinlocks or memory |
| 301 | * accesses. |
| 302 | */ |
| 303 | #ifndef readb_relaxed |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 304 | #define readb_relaxed readb_relaxed |
| 305 | static inline u8 readb_relaxed(const volatile void __iomem *addr) |
| 306 | { |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 307 | u8 val; |
| 308 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 309 | log_read_mmio(8, addr, _THIS_IP_, _RET_IP_); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 310 | val = __raw_readb(addr); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 311 | log_post_read_mmio(val, 8, addr, _THIS_IP_, _RET_IP_); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 312 | return val; |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 313 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 314 | #endif |
| 315 | |
| 316 | #ifndef readw_relaxed |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 317 | #define readw_relaxed readw_relaxed |
| 318 | static inline u16 readw_relaxed(const volatile void __iomem *addr) |
| 319 | { |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 320 | u16 val; |
| 321 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 322 | log_read_mmio(16, addr, _THIS_IP_, _RET_IP_); |
Vladimir Oltean | 05d3855 | 2023-01-09 15:11:53 +0200 | [diff] [blame] | 323 | val = __le16_to_cpu((__le16 __force)__raw_readw(addr)); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 324 | log_post_read_mmio(val, 16, addr, _THIS_IP_, _RET_IP_); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 325 | return val; |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 326 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 327 | #endif |
| 328 | |
| 329 | #ifndef readl_relaxed |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 330 | #define readl_relaxed readl_relaxed |
| 331 | static inline u32 readl_relaxed(const volatile void __iomem *addr) |
| 332 | { |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 333 | u32 val; |
| 334 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 335 | log_read_mmio(32, addr, _THIS_IP_, _RET_IP_); |
Vladimir Oltean | 05d3855 | 2023-01-09 15:11:53 +0200 | [diff] [blame] | 336 | val = __le32_to_cpu((__le32 __force)__raw_readl(addr)); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 337 | log_post_read_mmio(val, 32, addr, _THIS_IP_, _RET_IP_); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 338 | return val; |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 339 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 340 | #endif |
| 341 | |
Robin Murphy | e511267 | 2016-04-26 11:38:20 +0100 | [diff] [blame] | 342 | #if defined(readq) && !defined(readq_relaxed) |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 343 | #define readq_relaxed readq_relaxed |
| 344 | static inline u64 readq_relaxed(const volatile void __iomem *addr) |
| 345 | { |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 346 | u64 val; |
| 347 | |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 348 | log_read_mmio(64, addr, _THIS_IP_, _RET_IP_); |
Vladimir Oltean | 05d3855 | 2023-01-09 15:11:53 +0200 | [diff] [blame] | 349 | val = __le64_to_cpu((__le64 __force)__raw_readq(addr)); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 350 | log_post_read_mmio(val, 64, addr, _THIS_IP_, _RET_IP_); |
Sai Prakash Ranjan | 2100319 | 2022-05-18 22:14:16 +0530 | [diff] [blame] | 351 | return val; |
Sinan Kaya | 8875c55 | 2018-04-06 14:02:45 -0400 | [diff] [blame] | 352 | } |
Will Deacon | 9439eb3 | 2013-09-03 10:44:00 +0100 | [diff] [blame] | 353 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 354 | |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 355 | #ifndef writeb_relaxed |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 356 | #define writeb_relaxed writeb_relaxed |
| 357 | static inline void writeb_relaxed(u8 value, volatile void __iomem *addr) |
| 358 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 359 | log_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 360 | __raw_writeb(value, addr); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 361 | log_post_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 362 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 363 | #endif |
| 364 | |
| 365 | #ifndef writew_relaxed |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 366 | #define writew_relaxed writew_relaxed |
| 367 | static inline void writew_relaxed(u16 value, volatile void __iomem *addr) |
| 368 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 369 | log_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_); |
Vladimir Oltean | 05d3855 | 2023-01-09 15:11:53 +0200 | [diff] [blame] | 370 | __raw_writew((u16 __force)cpu_to_le16(value), addr); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 371 | log_post_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 372 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 373 | #endif |
| 374 | |
| 375 | #ifndef writel_relaxed |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 376 | #define writel_relaxed writel_relaxed |
| 377 | static inline void writel_relaxed(u32 value, volatile void __iomem *addr) |
| 378 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 379 | log_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_); |
Vladimir Oltean | 05d3855 | 2023-01-09 15:11:53 +0200 | [diff] [blame] | 380 | __raw_writel((u32 __force)__cpu_to_le32(value), addr); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 381 | log_post_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 382 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 383 | #endif |
| 384 | |
Robin Murphy | e511267 | 2016-04-26 11:38:20 +0100 | [diff] [blame] | 385 | #if defined(writeq) && !defined(writeq_relaxed) |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 386 | #define writeq_relaxed writeq_relaxed |
| 387 | static inline void writeq_relaxed(u64 value, volatile void __iomem *addr) |
| 388 | { |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 389 | log_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_); |
Vladimir Oltean | 05d3855 | 2023-01-09 15:11:53 +0200 | [diff] [blame] | 390 | __raw_writeq((u64 __force)__cpu_to_le64(value), addr); |
Sai Prakash Ranjan | 5e5ff73 | 2022-10-17 20:04:50 +0530 | [diff] [blame] | 391 | log_post_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_); |
Sinan Kaya | a71e7c4 | 2018-04-06 14:02:46 -0400 | [diff] [blame] | 392 | } |
Arnd Bergmann | 1c8d296 | 2014-11-11 19:55:45 +0100 | [diff] [blame] | 393 | #endif |
| 394 | |
| 395 | /* |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 396 | * {read,write}s{b,w,l,q}() repeatedly access the same memory address in |
| 397 | * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times). |
| 398 | */ |
| 399 | #ifndef readsb |
| 400 | #define readsb readsb |
| 401 | static inline void readsb(const volatile void __iomem *addr, void *buffer, |
| 402 | unsigned int count) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 403 | { |
| 404 | if (count) { |
| 405 | u8 *buf = buffer; |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 406 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 407 | do { |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 408 | u8 x = __raw_readb(addr); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 409 | *buf++ = x; |
| 410 | } while (--count); |
| 411 | } |
| 412 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 413 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 414 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 415 | #ifndef readsw |
| 416 | #define readsw readsw |
| 417 | static inline void readsw(const volatile void __iomem *addr, void *buffer, |
| 418 | unsigned int count) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 419 | { |
| 420 | if (count) { |
| 421 | u16 *buf = buffer; |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 422 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 423 | do { |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 424 | u16 x = __raw_readw(addr); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 425 | *buf++ = x; |
| 426 | } while (--count); |
| 427 | } |
| 428 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 429 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 430 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 431 | #ifndef readsl |
| 432 | #define readsl readsl |
| 433 | static inline void readsl(const volatile void __iomem *addr, void *buffer, |
| 434 | unsigned int count) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 435 | { |
| 436 | if (count) { |
| 437 | u32 *buf = buffer; |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 438 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 439 | do { |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 440 | u32 x = __raw_readl(addr); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 441 | *buf++ = x; |
| 442 | } while (--count); |
| 443 | } |
| 444 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 445 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 446 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 447 | #ifdef CONFIG_64BIT |
| 448 | #ifndef readsq |
| 449 | #define readsq readsq |
| 450 | static inline void readsq(const volatile void __iomem *addr, void *buffer, |
| 451 | unsigned int count) |
| 452 | { |
| 453 | if (count) { |
| 454 | u64 *buf = buffer; |
| 455 | |
| 456 | do { |
| 457 | u64 x = __raw_readq(addr); |
| 458 | *buf++ = x; |
| 459 | } while (--count); |
| 460 | } |
| 461 | } |
| 462 | #endif |
| 463 | #endif /* CONFIG_64BIT */ |
| 464 | |
| 465 | #ifndef writesb |
| 466 | #define writesb writesb |
| 467 | static inline void writesb(volatile void __iomem *addr, const void *buffer, |
| 468 | unsigned int count) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 469 | { |
| 470 | if (count) { |
| 471 | const u8 *buf = buffer; |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 472 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 473 | do { |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 474 | __raw_writeb(*buf++, addr); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 475 | } while (--count); |
| 476 | } |
| 477 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 478 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 479 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 480 | #ifndef writesw |
| 481 | #define writesw writesw |
| 482 | static inline void writesw(volatile void __iomem *addr, const void *buffer, |
| 483 | unsigned int count) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 484 | { |
| 485 | if (count) { |
| 486 | const u16 *buf = buffer; |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 487 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 488 | do { |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 489 | __raw_writew(*buf++, addr); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 490 | } while (--count); |
| 491 | } |
| 492 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 493 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 494 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 495 | #ifndef writesl |
| 496 | #define writesl writesl |
| 497 | static inline void writesl(volatile void __iomem *addr, const void *buffer, |
| 498 | unsigned int count) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 499 | { |
| 500 | if (count) { |
| 501 | const u32 *buf = buffer; |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 502 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 503 | do { |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 504 | __raw_writel(*buf++, addr); |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 505 | } while (--count); |
| 506 | } |
| 507 | } |
Mike Frysinger | 35dbc0e | 2010-10-18 03:09:39 -0400 | [diff] [blame] | 508 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 509 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 510 | #ifdef CONFIG_64BIT |
| 511 | #ifndef writesq |
| 512 | #define writesq writesq |
| 513 | static inline void writesq(volatile void __iomem *addr, const void *buffer, |
| 514 | unsigned int count) |
| 515 | { |
| 516 | if (count) { |
| 517 | const u64 *buf = buffer; |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 518 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 519 | do { |
| 520 | __raw_writeq(*buf++, addr); |
| 521 | } while (--count); |
| 522 | } |
| 523 | } |
| 524 | #endif |
| 525 | #endif /* CONFIG_64BIT */ |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 526 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 527 | #ifndef PCI_IOBASE |
| 528 | #define PCI_IOBASE ((void __iomem *)0) |
| 529 | #endif |
| 530 | |
GuanXuetao | 7dc59bd | 2011-02-22 19:06:43 +0800 | [diff] [blame] | 531 | #ifndef IO_SPACE_LIMIT |
| 532 | #define IO_SPACE_LIMIT 0xffff |
| 533 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 534 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 535 | /* |
| 536 | * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be |
| 537 | * implemented on hardware that needs an additional delay for I/O accesses to |
| 538 | * take effect. |
| 539 | */ |
| 540 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 541 | #if !defined(inb) && !defined(_inb) |
| 542 | #define _inb _inb |
Stafford Horne | 214ba35 | 2020-07-26 12:11:54 +0900 | [diff] [blame] | 543 | static inline u8 _inb(unsigned long addr) |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 544 | { |
Sinan Kaya | 87fe2d5 | 2018-04-05 09:09:13 -0400 | [diff] [blame] | 545 | u8 val; |
| 546 | |
| 547 | __io_pbr(); |
| 548 | val = __raw_readb(PCI_IOBASE + addr); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 549 | __io_par(val); |
Sinan Kaya | 87fe2d5 | 2018-04-05 09:09:13 -0400 | [diff] [blame] | 550 | return val; |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 551 | } |
| 552 | #endif |
| 553 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 554 | #if !defined(inw) && !defined(_inw) |
| 555 | #define _inw _inw |
| 556 | static inline u16 _inw(unsigned long addr) |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 557 | { |
Sinan Kaya | 87fe2d5 | 2018-04-05 09:09:13 -0400 | [diff] [blame] | 558 | u16 val; |
| 559 | |
| 560 | __io_pbr(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 561 | val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr)); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 562 | __io_par(val); |
Sinan Kaya | 87fe2d5 | 2018-04-05 09:09:13 -0400 | [diff] [blame] | 563 | return val; |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 564 | } |
| 565 | #endif |
| 566 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 567 | #if !defined(inl) && !defined(_inl) |
| 568 | #define _inl _inl |
Stafford Horne | 214ba35 | 2020-07-26 12:11:54 +0900 | [diff] [blame] | 569 | static inline u32 _inl(unsigned long addr) |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 570 | { |
Sinan Kaya | 87fe2d5 | 2018-04-05 09:09:13 -0400 | [diff] [blame] | 571 | u32 val; |
| 572 | |
| 573 | __io_pbr(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 574 | val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr)); |
Will Deacon | abbbbc83 | 2019-02-22 18:04:52 +0000 | [diff] [blame] | 575 | __io_par(val); |
Sinan Kaya | 87fe2d5 | 2018-04-05 09:09:13 -0400 | [diff] [blame] | 576 | return val; |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 577 | } |
| 578 | #endif |
| 579 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 580 | #if !defined(outb) && !defined(_outb) |
| 581 | #define _outb _outb |
| 582 | static inline void _outb(u8 value, unsigned long addr) |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 583 | { |
Sinan Kaya | a7851aa | 2018-04-05 09:09:12 -0400 | [diff] [blame] | 584 | __io_pbw(); |
| 585 | __raw_writeb(value, PCI_IOBASE + addr); |
| 586 | __io_paw(); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 587 | } |
| 588 | #endif |
| 589 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 590 | #if !defined(outw) && !defined(_outw) |
| 591 | #define _outw _outw |
| 592 | static inline void _outw(u16 value, unsigned long addr) |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 593 | { |
Sinan Kaya | a7851aa | 2018-04-05 09:09:12 -0400 | [diff] [blame] | 594 | __io_pbw(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 595 | __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr); |
Sinan Kaya | a7851aa | 2018-04-05 09:09:12 -0400 | [diff] [blame] | 596 | __io_paw(); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 597 | } |
| 598 | #endif |
| 599 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 600 | #if !defined(outl) && !defined(_outl) |
| 601 | #define _outl _outl |
| 602 | static inline void _outl(u32 value, unsigned long addr) |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 603 | { |
Sinan Kaya | a7851aa | 2018-04-05 09:09:12 -0400 | [diff] [blame] | 604 | __io_pbw(); |
Stafford Horne | c1d55d5 | 2020-07-29 21:03:14 +0900 | [diff] [blame] | 605 | __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr); |
Sinan Kaya | a7851aa | 2018-04-05 09:09:12 -0400 | [diff] [blame] | 606 | __io_paw(); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 607 | } |
| 608 | #endif |
| 609 | |
John Garry | f009c89 | 2020-03-28 00:06:12 +0800 | [diff] [blame] | 610 | #include <linux/logic_pio.h> |
| 611 | |
| 612 | #ifndef inb |
| 613 | #define inb _inb |
| 614 | #endif |
| 615 | |
| 616 | #ifndef inw |
| 617 | #define inw _inw |
| 618 | #endif |
| 619 | |
| 620 | #ifndef inl |
| 621 | #define inl _inl |
| 622 | #endif |
| 623 | |
| 624 | #ifndef outb |
| 625 | #define outb _outb |
| 626 | #endif |
| 627 | |
| 628 | #ifndef outw |
| 629 | #define outw _outw |
| 630 | #endif |
| 631 | |
| 632 | #ifndef outl |
| 633 | #define outl _outl |
| 634 | #endif |
| 635 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 636 | #ifndef inb_p |
| 637 | #define inb_p inb_p |
| 638 | static inline u8 inb_p(unsigned long addr) |
| 639 | { |
| 640 | return inb(addr); |
| 641 | } |
| 642 | #endif |
| 643 | |
| 644 | #ifndef inw_p |
| 645 | #define inw_p inw_p |
| 646 | static inline u16 inw_p(unsigned long addr) |
| 647 | { |
| 648 | return inw(addr); |
| 649 | } |
| 650 | #endif |
| 651 | |
| 652 | #ifndef inl_p |
| 653 | #define inl_p inl_p |
| 654 | static inline u32 inl_p(unsigned long addr) |
| 655 | { |
| 656 | return inl(addr); |
| 657 | } |
| 658 | #endif |
| 659 | |
| 660 | #ifndef outb_p |
| 661 | #define outb_p outb_p |
| 662 | static inline void outb_p(u8 value, unsigned long addr) |
| 663 | { |
| 664 | outb(value, addr); |
| 665 | } |
| 666 | #endif |
| 667 | |
| 668 | #ifndef outw_p |
| 669 | #define outw_p outw_p |
| 670 | static inline void outw_p(u16 value, unsigned long addr) |
| 671 | { |
| 672 | outw(value, addr); |
| 673 | } |
| 674 | #endif |
| 675 | |
| 676 | #ifndef outl_p |
| 677 | #define outl_p outl_p |
| 678 | static inline void outl_p(u32 value, unsigned long addr) |
| 679 | { |
| 680 | outl(value, addr); |
| 681 | } |
| 682 | #endif |
| 683 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 684 | /* |
| 685 | * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a |
| 686 | * single I/O port multiple times. |
| 687 | */ |
| 688 | |
| 689 | #ifndef insb |
| 690 | #define insb insb |
| 691 | static inline void insb(unsigned long addr, void *buffer, unsigned int count) |
| 692 | { |
| 693 | readsb(PCI_IOBASE + addr, buffer, count); |
| 694 | } |
| 695 | #endif |
| 696 | |
| 697 | #ifndef insw |
| 698 | #define insw insw |
| 699 | static inline void insw(unsigned long addr, void *buffer, unsigned int count) |
| 700 | { |
| 701 | readsw(PCI_IOBASE + addr, buffer, count); |
| 702 | } |
| 703 | #endif |
| 704 | |
| 705 | #ifndef insl |
| 706 | #define insl insl |
| 707 | static inline void insl(unsigned long addr, void *buffer, unsigned int count) |
| 708 | { |
| 709 | readsl(PCI_IOBASE + addr, buffer, count); |
| 710 | } |
| 711 | #endif |
| 712 | |
| 713 | #ifndef outsb |
| 714 | #define outsb outsb |
| 715 | static inline void outsb(unsigned long addr, const void *buffer, |
| 716 | unsigned int count) |
| 717 | { |
| 718 | writesb(PCI_IOBASE + addr, buffer, count); |
| 719 | } |
| 720 | #endif |
| 721 | |
| 722 | #ifndef outsw |
| 723 | #define outsw outsw |
| 724 | static inline void outsw(unsigned long addr, const void *buffer, |
| 725 | unsigned int count) |
| 726 | { |
| 727 | writesw(PCI_IOBASE + addr, buffer, count); |
| 728 | } |
| 729 | #endif |
| 730 | |
| 731 | #ifndef outsl |
| 732 | #define outsl outsl |
| 733 | static inline void outsl(unsigned long addr, const void *buffer, |
| 734 | unsigned int count) |
| 735 | { |
| 736 | writesl(PCI_IOBASE + addr, buffer, count); |
| 737 | } |
| 738 | #endif |
| 739 | |
| 740 | #ifndef insb_p |
| 741 | #define insb_p insb_p |
| 742 | static inline void insb_p(unsigned long addr, void *buffer, unsigned int count) |
| 743 | { |
| 744 | insb(addr, buffer, count); |
| 745 | } |
| 746 | #endif |
| 747 | |
| 748 | #ifndef insw_p |
| 749 | #define insw_p insw_p |
| 750 | static inline void insw_p(unsigned long addr, void *buffer, unsigned int count) |
| 751 | { |
| 752 | insw(addr, buffer, count); |
| 753 | } |
| 754 | #endif |
| 755 | |
| 756 | #ifndef insl_p |
| 757 | #define insl_p insl_p |
| 758 | static inline void insl_p(unsigned long addr, void *buffer, unsigned int count) |
| 759 | { |
| 760 | insl(addr, buffer, count); |
| 761 | } |
| 762 | #endif |
| 763 | |
| 764 | #ifndef outsb_p |
| 765 | #define outsb_p outsb_p |
| 766 | static inline void outsb_p(unsigned long addr, const void *buffer, |
| 767 | unsigned int count) |
| 768 | { |
| 769 | outsb(addr, buffer, count); |
| 770 | } |
| 771 | #endif |
| 772 | |
| 773 | #ifndef outsw_p |
| 774 | #define outsw_p outsw_p |
| 775 | static inline void outsw_p(unsigned long addr, const void *buffer, |
| 776 | unsigned int count) |
| 777 | { |
| 778 | outsw(addr, buffer, count); |
| 779 | } |
| 780 | #endif |
| 781 | |
| 782 | #ifndef outsl_p |
| 783 | #define outsl_p outsl_p |
| 784 | static inline void outsl_p(unsigned long addr, const void *buffer, |
| 785 | unsigned int count) |
| 786 | { |
| 787 | outsl(addr, buffer, count); |
| 788 | } |
| 789 | #endif |
| 790 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 791 | #ifndef CONFIG_GENERIC_IOMAP |
| 792 | #ifndef ioread8 |
| 793 | #define ioread8 ioread8 |
| 794 | static inline u8 ioread8(const volatile void __iomem *addr) |
| 795 | { |
| 796 | return readb(addr); |
| 797 | } |
| 798 | #endif |
| 799 | |
| 800 | #ifndef ioread16 |
| 801 | #define ioread16 ioread16 |
| 802 | static inline u16 ioread16(const volatile void __iomem *addr) |
| 803 | { |
| 804 | return readw(addr); |
| 805 | } |
| 806 | #endif |
| 807 | |
| 808 | #ifndef ioread32 |
| 809 | #define ioread32 ioread32 |
| 810 | static inline u32 ioread32(const volatile void __iomem *addr) |
| 811 | { |
| 812 | return readl(addr); |
| 813 | } |
| 814 | #endif |
| 815 | |
Horia Geantă | 9e44fb1 | 2016-05-19 18:10:56 +0300 | [diff] [blame] | 816 | #ifdef CONFIG_64BIT |
| 817 | #ifndef ioread64 |
| 818 | #define ioread64 ioread64 |
| 819 | static inline u64 ioread64(const volatile void __iomem *addr) |
| 820 | { |
| 821 | return readq(addr); |
| 822 | } |
| 823 | #endif |
| 824 | #endif /* CONFIG_64BIT */ |
| 825 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 826 | #ifndef iowrite8 |
| 827 | #define iowrite8 iowrite8 |
| 828 | static inline void iowrite8(u8 value, volatile void __iomem *addr) |
| 829 | { |
| 830 | writeb(value, addr); |
| 831 | } |
| 832 | #endif |
| 833 | |
| 834 | #ifndef iowrite16 |
| 835 | #define iowrite16 iowrite16 |
| 836 | static inline void iowrite16(u16 value, volatile void __iomem *addr) |
| 837 | { |
| 838 | writew(value, addr); |
| 839 | } |
| 840 | #endif |
| 841 | |
| 842 | #ifndef iowrite32 |
| 843 | #define iowrite32 iowrite32 |
| 844 | static inline void iowrite32(u32 value, volatile void __iomem *addr) |
| 845 | { |
| 846 | writel(value, addr); |
| 847 | } |
| 848 | #endif |
| 849 | |
Horia Geantă | 9e44fb1 | 2016-05-19 18:10:56 +0300 | [diff] [blame] | 850 | #ifdef CONFIG_64BIT |
| 851 | #ifndef iowrite64 |
| 852 | #define iowrite64 iowrite64 |
| 853 | static inline void iowrite64(u64 value, volatile void __iomem *addr) |
| 854 | { |
| 855 | writeq(value, addr); |
| 856 | } |
| 857 | #endif |
| 858 | #endif /* CONFIG_64BIT */ |
| 859 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 860 | #ifndef ioread16be |
| 861 | #define ioread16be ioread16be |
| 862 | static inline u16 ioread16be(const volatile void __iomem *addr) |
| 863 | { |
Horia Geantă | 7a1aedb | 2016-05-19 18:10:43 +0300 | [diff] [blame] | 864 | return swab16(readw(addr)); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 865 | } |
| 866 | #endif |
| 867 | |
| 868 | #ifndef ioread32be |
| 869 | #define ioread32be ioread32be |
| 870 | static inline u32 ioread32be(const volatile void __iomem *addr) |
| 871 | { |
Horia Geantă | 7a1aedb | 2016-05-19 18:10:43 +0300 | [diff] [blame] | 872 | return swab32(readl(addr)); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 873 | } |
| 874 | #endif |
| 875 | |
Horia Geantă | 9e44fb1 | 2016-05-19 18:10:56 +0300 | [diff] [blame] | 876 | #ifdef CONFIG_64BIT |
| 877 | #ifndef ioread64be |
| 878 | #define ioread64be ioread64be |
| 879 | static inline u64 ioread64be(const volatile void __iomem *addr) |
| 880 | { |
| 881 | return swab64(readq(addr)); |
| 882 | } |
| 883 | #endif |
| 884 | #endif /* CONFIG_64BIT */ |
| 885 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 886 | #ifndef iowrite16be |
| 887 | #define iowrite16be iowrite16be |
| 888 | static inline void iowrite16be(u16 value, void volatile __iomem *addr) |
| 889 | { |
Horia Geantă | 7a1aedb | 2016-05-19 18:10:43 +0300 | [diff] [blame] | 890 | writew(swab16(value), addr); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 891 | } |
| 892 | #endif |
| 893 | |
| 894 | #ifndef iowrite32be |
| 895 | #define iowrite32be iowrite32be |
| 896 | static inline void iowrite32be(u32 value, volatile void __iomem *addr) |
| 897 | { |
Horia Geantă | 7a1aedb | 2016-05-19 18:10:43 +0300 | [diff] [blame] | 898 | writel(swab32(value), addr); |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 899 | } |
| 900 | #endif |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 901 | |
Horia Geantă | 9e44fb1 | 2016-05-19 18:10:56 +0300 | [diff] [blame] | 902 | #ifdef CONFIG_64BIT |
| 903 | #ifndef iowrite64be |
| 904 | #define iowrite64be iowrite64be |
| 905 | static inline void iowrite64be(u64 value, volatile void __iomem *addr) |
| 906 | { |
| 907 | writeq(swab64(value), addr); |
| 908 | } |
| 909 | #endif |
| 910 | #endif /* CONFIG_64BIT */ |
| 911 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 912 | #ifndef ioread8_rep |
| 913 | #define ioread8_rep ioread8_rep |
| 914 | static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer, |
| 915 | unsigned int count) |
| 916 | { |
| 917 | readsb(addr, buffer, count); |
| 918 | } |
| 919 | #endif |
| 920 | |
| 921 | #ifndef ioread16_rep |
| 922 | #define ioread16_rep ioread16_rep |
| 923 | static inline void ioread16_rep(const volatile void __iomem *addr, |
| 924 | void *buffer, unsigned int count) |
| 925 | { |
| 926 | readsw(addr, buffer, count); |
| 927 | } |
| 928 | #endif |
| 929 | |
| 930 | #ifndef ioread32_rep |
| 931 | #define ioread32_rep ioread32_rep |
| 932 | static inline void ioread32_rep(const volatile void __iomem *addr, |
| 933 | void *buffer, unsigned int count) |
| 934 | { |
| 935 | readsl(addr, buffer, count); |
| 936 | } |
| 937 | #endif |
| 938 | |
Horia Geantă | 9e44fb1 | 2016-05-19 18:10:56 +0300 | [diff] [blame] | 939 | #ifdef CONFIG_64BIT |
| 940 | #ifndef ioread64_rep |
| 941 | #define ioread64_rep ioread64_rep |
| 942 | static inline void ioread64_rep(const volatile void __iomem *addr, |
| 943 | void *buffer, unsigned int count) |
| 944 | { |
| 945 | readsq(addr, buffer, count); |
| 946 | } |
| 947 | #endif |
| 948 | #endif /* CONFIG_64BIT */ |
| 949 | |
Thierry Reding | 9ab3a7a | 2014-07-04 13:07:57 +0200 | [diff] [blame] | 950 | #ifndef iowrite8_rep |
| 951 | #define iowrite8_rep iowrite8_rep |
| 952 | static inline void iowrite8_rep(volatile void __iomem *addr, |
| 953 | const void *buffer, |
| 954 | unsigned int count) |
| 955 | { |
| 956 | writesb(addr, buffer, count); |
| 957 | } |
| 958 | #endif |
| 959 | |
| 960 | #ifndef iowrite16_rep |
| 961 | #define iowrite16_rep iowrite16_rep |
| 962 | static inline void iowrite16_rep(volatile void __iomem *addr, |
| 963 | const void *buffer, |
| 964 | unsigned int count) |
| 965 | { |
| 966 | writesw(addr, buffer, count); |
| 967 | } |
| 968 | #endif |
| 969 | |
| 970 | #ifndef iowrite32_rep |
| 971 | #define iowrite32_rep iowrite32_rep |
| 972 | static inline void iowrite32_rep(volatile void __iomem *addr, |
| 973 | const void *buffer, |
| 974 | unsigned int count) |
| 975 | { |
| 976 | writesl(addr, buffer, count); |
| 977 | } |
| 978 | #endif |
Horia Geantă | 9e44fb1 | 2016-05-19 18:10:56 +0300 | [diff] [blame] | 979 | |
| 980 | #ifdef CONFIG_64BIT |
| 981 | #ifndef iowrite64_rep |
| 982 | #define iowrite64_rep iowrite64_rep |
| 983 | static inline void iowrite64_rep(volatile void __iomem *addr, |
| 984 | const void *buffer, |
| 985 | unsigned int count) |
| 986 | { |
| 987 | writesq(addr, buffer, count); |
| 988 | } |
| 989 | #endif |
| 990 | #endif /* CONFIG_64BIT */ |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 991 | #endif /* CONFIG_GENERIC_IOMAP */ |
| 992 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 993 | #ifdef __KERNEL__ |
| 994 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 995 | #define __io_virt(x) ((void __force *)(x)) |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 996 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 997 | /* |
| 998 | * Change virtual addresses to physical addresses and vv. |
| 999 | * These are pretty trivial |
| 1000 | */ |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1001 | #ifndef virt_to_phys |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1002 | #define virt_to_phys virt_to_phys |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1003 | static inline unsigned long virt_to_phys(volatile void *address) |
| 1004 | { |
| 1005 | return __pa((unsigned long)address); |
| 1006 | } |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1007 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1008 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1009 | #ifndef phys_to_virt |
| 1010 | #define phys_to_virt phys_to_virt |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1011 | static inline void *phys_to_virt(unsigned long address) |
| 1012 | { |
| 1013 | return __va(address); |
| 1014 | } |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1015 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1016 | |
Luis R. Rodriguez | 8c7ea50 | 2015-07-09 17:28:16 -0700 | [diff] [blame] | 1017 | /** |
| 1018 | * DOC: ioremap() and ioremap_*() variants |
| 1019 | * |
Christoph Hellwig | 97c9801 | 2019-08-11 14:53:20 +0200 | [diff] [blame] | 1020 | * Architectures with an MMU are expected to provide ioremap() and iounmap() |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1021 | * themselves or rely on GENERIC_IOREMAP. For NOMMU architectures we provide |
| 1022 | * a default nop-op implementation that expect that the physical address used |
| 1023 | * for MMIO are already marked as uncached, and can be used as kernel virtual |
| 1024 | * addresses. |
Luis R. Rodriguez | 8c7ea50 | 2015-07-09 17:28:16 -0700 | [diff] [blame] | 1025 | * |
Christoph Hellwig | 97c9801 | 2019-08-11 14:53:20 +0200 | [diff] [blame] | 1026 | * ioremap_wc() and ioremap_wt() can provide more relaxed caching attributes |
| 1027 | * for specific drivers if the architecture choses to implement them. If they |
Hector Martin | 7c566bb5e | 2021-02-11 21:35:46 +0900 | [diff] [blame] | 1028 | * are not implemented we fall back to plain ioremap. Conversely, ioremap_np() |
| 1029 | * can provide stricter non-posted write semantics if the architecture |
| 1030 | * implements them. |
Luis R. Rodriguez | 8c7ea50 | 2015-07-09 17:28:16 -0700 | [diff] [blame] | 1031 | */ |
Christoph Hellwig | e971339 | 2019-08-13 07:53:05 +0200 | [diff] [blame] | 1032 | #ifndef CONFIG_MMU |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1033 | #ifndef ioremap |
| 1034 | #define ioremap ioremap |
| 1035 | static inline void __iomem *ioremap(phys_addr_t offset, size_t size) |
| 1036 | { |
| 1037 | return (void __iomem *)(unsigned long)offset; |
| 1038 | } |
| 1039 | #endif |
| 1040 | |
Greentime Hu | b3ada9d | 2017-11-22 18:57:46 +0800 | [diff] [blame] | 1041 | #ifndef iounmap |
| 1042 | #define iounmap iounmap |
Adam Borowski | 2fbc349 | 2021-09-12 23:26:06 +0200 | [diff] [blame] | 1043 | static inline void iounmap(volatile void __iomem *addr) |
Greentime Hu | b3ada9d | 2017-11-22 18:57:46 +0800 | [diff] [blame] | 1044 | { |
| 1045 | } |
| 1046 | #endif |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1047 | #elif defined(CONFIG_GENERIC_IOREMAP) |
Mike Rapoport | ca5999f | 2020-06-08 21:32:38 -0700 | [diff] [blame] | 1048 | #include <linux/pgtable.h> |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1049 | |
Christophe Leroy | 7613366 | 2023-07-06 23:45:05 +0800 | [diff] [blame] | 1050 | void __iomem *generic_ioremap_prot(phys_addr_t phys_addr, size_t size, |
| 1051 | pgprot_t prot); |
| 1052 | |
Kefeng Wang | abc5992 | 2022-06-07 20:50:23 +0800 | [diff] [blame] | 1053 | void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size, |
| 1054 | unsigned long prot); |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1055 | void iounmap(volatile void __iomem *addr); |
Christophe Leroy | 7613366 | 2023-07-06 23:45:05 +0800 | [diff] [blame] | 1056 | void generic_iounmap(volatile void __iomem *addr); |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1057 | |
Baoquan He | dfdc6ba | 2023-07-06 23:45:06 +0800 | [diff] [blame] | 1058 | #ifndef ioremap |
| 1059 | #define ioremap ioremap |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1060 | static inline void __iomem *ioremap(phys_addr_t addr, size_t size) |
| 1061 | { |
| 1062 | /* _PAGE_IOREMAP needs to be supplied by the architecture */ |
| 1063 | return ioremap_prot(addr, size, _PAGE_IOREMAP); |
| 1064 | } |
Baoquan He | dfdc6ba | 2023-07-06 23:45:06 +0800 | [diff] [blame] | 1065 | #endif |
Christoph Hellwig | 80b0ca9 | 2019-08-13 11:24:04 +0200 | [diff] [blame] | 1066 | #endif /* !CONFIG_MMU || CONFIG_GENERIC_IOREMAP */ |
Christoph Hellwig | 97c9801 | 2019-08-11 14:53:20 +0200 | [diff] [blame] | 1067 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1068 | #ifndef ioremap_wc |
Christoph Hellwig | d092a87 | 2019-10-16 08:09:38 +0200 | [diff] [blame] | 1069 | #define ioremap_wc ioremap |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1070 | #endif |
| 1071 | |
Toshi Kani | d838270 | 2015-06-04 18:55:15 +0200 | [diff] [blame] | 1072 | #ifndef ioremap_wt |
Christoph Hellwig | d092a87 | 2019-10-16 08:09:38 +0200 | [diff] [blame] | 1073 | #define ioremap_wt ioremap |
Toshi Kani | d838270 | 2015-06-04 18:55:15 +0200 | [diff] [blame] | 1074 | #endif |
| 1075 | |
Christoph Hellwig | e971339 | 2019-08-13 07:53:05 +0200 | [diff] [blame] | 1076 | /* |
| 1077 | * ioremap_uc is special in that we do require an explicit architecture |
| 1078 | * implementation. In general you do not want to use this function in a |
| 1079 | * driver and use plain ioremap, which is uncached by default. Similarly |
| 1080 | * architectures should not implement it unless they have a very good |
| 1081 | * reason. |
| 1082 | */ |
| 1083 | #ifndef ioremap_uc |
| 1084 | #define ioremap_uc ioremap_uc |
| 1085 | static inline void __iomem *ioremap_uc(phys_addr_t offset, size_t size) |
| 1086 | { |
| 1087 | return NULL; |
| 1088 | } |
Hector Martin | ea96292 | 2021-04-09 14:20:38 +0900 | [diff] [blame] | 1089 | #endif |
Hector Martin | 7c566bb5e | 2021-02-11 21:35:46 +0900 | [diff] [blame] | 1090 | |
| 1091 | /* |
| 1092 | * ioremap_np needs an explicit architecture implementation, as it |
| 1093 | * requests stronger semantics than regular ioremap(). Portable drivers |
| 1094 | * should instead use one of the higher-level abstractions, like |
| 1095 | * devm_ioremap_resource(), to choose the correct variant for any given |
| 1096 | * device and bus. Portable drivers with a good reason to want non-posted |
| 1097 | * write semantics should always provide an ioremap() fallback in case |
| 1098 | * ioremap_np() is not available. |
| 1099 | */ |
| 1100 | #ifndef ioremap_np |
| 1101 | #define ioremap_np ioremap_np |
| 1102 | static inline void __iomem *ioremap_np(phys_addr_t offset, size_t size) |
| 1103 | { |
| 1104 | return NULL; |
| 1105 | } |
| 1106 | #endif |
| 1107 | |
Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 1108 | #ifdef CONFIG_HAS_IOPORT_MAP |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1109 | #ifndef CONFIG_GENERIC_IOMAP |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1110 | #ifndef ioport_map |
| 1111 | #define ioport_map ioport_map |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1112 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) |
| 1113 | { |
Andrew Murray | 500dd232 | 2018-09-13 13:48:27 +0100 | [diff] [blame] | 1114 | port &= IO_SPACE_LIMIT; |
| 1115 | return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port; |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1116 | } |
Linus Torvalds | 316e8d7 | 2021-09-19 17:13:35 -0700 | [diff] [blame] | 1117 | #define ARCH_HAS_GENERIC_IOPORT_MAP |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1118 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1119 | |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1120 | #ifndef ioport_unmap |
| 1121 | #define ioport_unmap ioport_unmap |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1122 | static inline void ioport_unmap(void __iomem *p) |
| 1123 | { |
| 1124 | } |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1125 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1126 | #else /* CONFIG_GENERIC_IOMAP */ |
| 1127 | extern void __iomem *ioport_map(unsigned long port, unsigned int nr); |
| 1128 | extern void ioport_unmap(void __iomem *p); |
| 1129 | #endif /* CONFIG_GENERIC_IOMAP */ |
Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 1130 | #endif /* CONFIG_HAS_IOPORT_MAP */ |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1131 | |
Lorenzo Pieralisi | f5810e5 | 2020-09-16 12:06:58 +0100 | [diff] [blame] | 1132 | #ifndef CONFIG_GENERIC_IOMAP |
Lorenzo Pieralisi | f5810e5 | 2020-09-16 12:06:58 +0100 | [diff] [blame] | 1133 | #ifndef pci_iounmap |
Linus Torvalds | 316e8d7 | 2021-09-19 17:13:35 -0700 | [diff] [blame] | 1134 | #define ARCH_WANTS_GENERIC_PCI_IOUNMAP |
Lorenzo Pieralisi | f5810e5 | 2020-09-16 12:06:58 +0100 | [diff] [blame] | 1135 | #endif |
Linus Torvalds | 316e8d7 | 2021-09-19 17:13:35 -0700 | [diff] [blame] | 1136 | #endif |
Lorenzo Pieralisi | f5810e5 | 2020-09-16 12:06:58 +0100 | [diff] [blame] | 1137 | |
Michael Holzheu | 576ebd7 | 2013-05-21 16:08:22 +0200 | [diff] [blame] | 1138 | #ifndef xlate_dev_mem_ptr |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1139 | #define xlate_dev_mem_ptr xlate_dev_mem_ptr |
| 1140 | static inline void *xlate_dev_mem_ptr(phys_addr_t addr) |
| 1141 | { |
| 1142 | return __va(addr); |
| 1143 | } |
| 1144 | #endif |
| 1145 | |
| 1146 | #ifndef unxlate_dev_mem_ptr |
| 1147 | #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr |
| 1148 | static inline void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr) |
| 1149 | { |
| 1150 | } |
Michael Holzheu | 576ebd7 | 2013-05-21 16:08:22 +0200 | [diff] [blame] | 1151 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1152 | |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1153 | #ifndef memset_io |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1154 | #define memset_io memset_io |
Andy Shevchenko | c2327da | 2017-06-30 20:09:32 +0300 | [diff] [blame] | 1155 | /** |
| 1156 | * memset_io Set a range of I/O memory to a constant value |
| 1157 | * @addr: The beginning of the I/O-memory range to set |
| 1158 | * @val: The value to set the memory to |
| 1159 | * @count: The number of bytes to set |
| 1160 | * |
| 1161 | * Set a range of I/O memory to a given value. |
| 1162 | */ |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1163 | static inline void memset_io(volatile void __iomem *addr, int value, |
| 1164 | size_t size) |
| 1165 | { |
| 1166 | memset(__io_virt(addr), value, size); |
| 1167 | } |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1168 | #endif |
| 1169 | |
| 1170 | #ifndef memcpy_fromio |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1171 | #define memcpy_fromio memcpy_fromio |
Andy Shevchenko | c2327da | 2017-06-30 20:09:32 +0300 | [diff] [blame] | 1172 | /** |
| 1173 | * memcpy_fromio Copy a block of data from I/O memory |
| 1174 | * @dst: The (RAM) destination for the copy |
| 1175 | * @src: The (I/O memory) source for the data |
| 1176 | * @count: The number of bytes to copy |
| 1177 | * |
| 1178 | * Copy a block of data from I/O memory. |
| 1179 | */ |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1180 | static inline void memcpy_fromio(void *buffer, |
| 1181 | const volatile void __iomem *addr, |
| 1182 | size_t size) |
| 1183 | { |
| 1184 | memcpy(buffer, __io_virt(addr), size); |
| 1185 | } |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1186 | #endif |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1187 | |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1188 | #ifndef memcpy_toio |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1189 | #define memcpy_toio memcpy_toio |
Andy Shevchenko | c2327da | 2017-06-30 20:09:32 +0300 | [diff] [blame] | 1190 | /** |
| 1191 | * memcpy_toio Copy a block of data into I/O memory |
| 1192 | * @dst: The (I/O memory) destination for the copy |
| 1193 | * @src: The (RAM) source for the data |
| 1194 | * @count: The number of bytes to copy |
| 1195 | * |
| 1196 | * Copy a block of data to I/O memory. |
| 1197 | */ |
Thierry Reding | 9216efa | 2014-10-01 15:20:33 +0200 | [diff] [blame] | 1198 | static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer, |
| 1199 | size_t size) |
| 1200 | { |
| 1201 | memcpy(__io_virt(addr), buffer, size); |
| 1202 | } |
Jan Glauber | cd24834 | 2012-11-29 12:50:30 +0100 | [diff] [blame] | 1203 | #endif |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1204 | |
Palmer Dabbelt | 527701e | 2020-07-09 11:43:21 -0700 | [diff] [blame] | 1205 | extern int devmem_is_allowed(unsigned long pfn); |
Palmer Dabbelt | 527701e | 2020-07-09 11:43:21 -0700 | [diff] [blame] | 1206 | |
Arnd Bergmann | 3f7e212d | 2009-05-13 22:56:35 +0000 | [diff] [blame] | 1207 | #endif /* __KERNEL__ */ |
| 1208 | |
| 1209 | #endif /* __ASM_GENERIC_IO_H */ |