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Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * arch/arm/plat-mxc/include/mach/uncompress.h
3 *
Russell Kinga09e64f2008-08-05 16:14:15 +01004 * Copyright (C) 1999 ARM Limited
5 * Copyright (C) Shane Nay (shane@minirl.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Russell Kinga09e64f2008-08-05 16:14:15 +010016 */
17#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
18#define __ASM_ARCH_MXC_UNCOMPRESS_H__
19
20#define __MXC_BOOT_UNCOMPRESS
21
Sascha Hauerd30c74a2009-06-04 13:29:57 +020022#include <asm/mach-types.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010023
Nicolas Pitre8ea0de42011-04-28 17:00:17 -040024unsigned long uart_base;
Sascha Hauerd30c74a2009-06-04 13:29:57 +020025
26#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
Russell Kinga09e64f2008-08-05 16:14:15 +010027
28#define USR2 0x98
29#define USR2_TXFE (1<<14)
30#define TXR 0x40
31#define UCR1 0x80
32#define UCR1_UARTEN 1
33
34/*
35 * The following code assumes the serial port has already been
36 * initialized by the bootloader. We search for the first enabled
37 * port in the most probable order. If you didn't setup a port in
38 * your bootloader then nothing will appear (which might be desired).
39 *
40 * This does not append a newline
41 */
42
43static void putc(int ch)
44{
Sascha Hauerd30c74a2009-06-04 13:29:57 +020045 if (!uart_base)
46 return;
47 if (!(UART(UCR1) & UCR1_UARTEN))
48 return;
Russell Kinga09e64f2008-08-05 16:14:15 +010049
50 while (!(UART(USR2) & USR2_TXFE))
51 barrier();
52
53 UART(TXR) = ch;
54}
55
Tony Lindgrenb53e9b52010-01-14 20:36:55 +010056static inline void flush(void)
57{
58}
Russell Kinga09e64f2008-08-05 16:14:15 +010059
Sascha Hauerd30c74a2009-06-04 13:29:57 +020060#define MX1_UART1_BASE_ADDR 0x00206000
Sascha Hauer8c25c362009-06-04 11:32:12 +020061#define MX25_UART1_BASE_ADDR 0x43f90000
Sascha Hauerd30c74a2009-06-04 13:29:57 +020062#define MX2X_UART1_BASE_ADDR 0x1000a000
63#define MX3X_UART1_BASE_ADDR 0x43F90000
Dmitriy Taychenachevfd6ac7b2009-07-31 20:29:22 +090064#define MX3X_UART2_BASE_ADDR 0x43F94000
Denis 'GNUtoo' Carikliea7ee4c2011-02-18 22:22:23 +010065#define MX3X_UART5_BASE_ADDR 0x43FB4000
Sascha Hauer48fae652010-03-18 16:55:45 +010066#define MX51_UART1_BASE_ADDR 0x73fbc000
Richard Zhaod3d4b602010-12-30 19:25:06 +080067#define MX50_UART1_BASE_ADDR 0x53fbc000
Yong Shena58154d12011-01-04 14:22:56 +080068#define MX53_UART1_BASE_ADDR 0x53fbc000
Russell Kinga09e64f2008-08-05 16:14:15 +010069
Sascha Hauerd30c74a2009-06-04 13:29:57 +020070static __inline__ void __arch_decomp_setup(unsigned long arch_id)
71{
72 switch (arch_id) {
73 case MACH_TYPE_MX1ADS:
74 case MACH_TYPE_SCB9328:
75 uart_base = MX1_UART1_BASE_ADDR;
76 break;
Sascha Hauer635baf62009-06-04 11:32:46 +020077 case MACH_TYPE_MX25_3DS:
78 uart_base = MX25_UART1_BASE_ADDR;
79 break;
Sascha Hauerd30c74a2009-06-04 13:29:57 +020080 case MACH_TYPE_IMX27LITE:
81 case MACH_TYPE_MX27_3DS:
82 case MACH_TYPE_MX27ADS:
83 case MACH_TYPE_PCM038:
84 case MACH_TYPE_MX21ADS:
Sascha Hauer34499a72009-11-12 11:29:43 +010085 case MACH_TYPE_PCA100:
Alan Carvalho de Assis143a1792009-11-25 15:24:50 -020086 case MACH_TYPE_MXT_TD60:
Fabio Estevam9c2c3582011-01-24 16:55:02 -020087 case MACH_TYPE_IMX27IPCAM:
Sascha Hauerd30c74a2009-06-04 13:29:57 +020088 uart_base = MX2X_UART1_BASE_ADDR;
89 break;
90 case MACH_TYPE_MX31LITE:
91 case MACH_TYPE_ARMADILLO5X0:
92 case MACH_TYPE_MX31MOBOARD:
93 case MACH_TYPE_QONG:
94 case MACH_TYPE_MX31_3DS:
95 case MACH_TYPE_PCM037:
96 case MACH_TYPE_MX31ADS:
97 case MACH_TYPE_MX35_3DS:
98 case MACH_TYPE_PCM043:
Daniel Mack115b40c2009-10-26 11:55:59 +010099 case MACH_TYPE_LILLY1131:
Fabio Estevamc6e76952011-01-21 16:03:57 -0200100 case MACH_TYPE_VPR200:
Sascha Hauerd30c74a2009-06-04 13:29:57 +0200101 uart_base = MX3X_UART1_BASE_ADDR;
102 break;
Dmitriy Taychenachevfd6ac7b2009-07-31 20:29:22 +0900103 case MACH_TYPE_MAGX_ZN5:
104 uart_base = MX3X_UART2_BASE_ADDR;
105 break;
Denis 'GNUtoo' Carikliea7ee4c2011-02-18 22:22:23 +0100106 case MACH_TYPE_BUG:
107 uart_base = MX3X_UART5_BASE_ADDR;
108 break;
Sascha Hauer48fae652010-03-18 16:55:45 +0100109 case MACH_TYPE_MX51_BABBAGE:
Eric BĂ©nard70b17262010-10-12 16:12:36 +0200110 case MACH_TYPE_EUKREA_CPUIMX51SD:
Fabio Estevamc6e76952011-01-21 16:03:57 -0200111 case MACH_TYPE_MX51_3DS:
Sascha Hauer48fae652010-03-18 16:55:45 +0100112 uart_base = MX51_UART1_BASE_ADDR;
113 break;
Richard Zhaod3d4b602010-12-30 19:25:06 +0800114 case MACH_TYPE_MX50_RDP:
115 uart_base = MX50_UART1_BASE_ADDR;
116 break;
Yong Shena58154d12011-01-04 14:22:56 +0800117 case MACH_TYPE_MX53_EVK:
Richard Zhaoc4e942b2011-02-18 12:36:15 +0800118 case MACH_TYPE_MX53_LOCO:
Frank Li646e6102011-02-21 14:28:10 +0800119 case MACH_TYPE_MX53_SMD:
Andre Silvabd897822011-06-10 13:08:14 -0300120 case MACH_TYPE_MX53_ARD:
Yong Shena58154d12011-01-04 14:22:56 +0800121 uart_base = MX53_UART1_BASE_ADDR;
122 break;
Sascha Hauerd30c74a2009-06-04 13:29:57 +0200123 default:
124 break;
125 }
126}
127
128#define arch_decomp_setup() __arch_decomp_setup(arch_id)
Russell Kinga09e64f2008-08-05 16:14:15 +0100129#define arch_decomp_wdog()
130
131#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */