David S. Miller | 3d5ae6b | 2008-03-25 21:51:40 -0700 | [diff] [blame] | 1 | #ifndef _ENTRY_H |
| 2 | #define _ENTRY_H |
| 3 | |
David S. Miller | bfdf9eb | 2008-03-26 00:46:21 -0700 | [diff] [blame] | 4 | #include <linux/kernel.h> |
David S. Miller | 99cd220 | 2008-03-26 00:19:43 -0700 | [diff] [blame] | 5 | #include <linux/types.h> |
David S. Miller | bfdf9eb | 2008-03-26 00:46:21 -0700 | [diff] [blame] | 6 | #include <linux/init.h> |
David S. Miller | 3d5ae6b | 2008-03-25 21:51:40 -0700 | [diff] [blame] | 7 | |
| 8 | extern char *sparc_cpu_type; |
| 9 | extern char *sparc_fpu_type; |
| 10 | |
| 11 | extern void __init per_cpu_patch(void); |
| 12 | extern void __init sun4v_patch(void); |
| 13 | extern void __init boot_cpu_id_too_large(int cpu); |
| 14 | extern unsigned int dcache_parity_tl1_occurred; |
| 15 | extern unsigned int icache_parity_tl1_occurred; |
| 16 | |
David S. Miller | 207ddd0 | 2008-03-26 01:43:29 -0700 | [diff] [blame] | 17 | extern asmlinkage void update_perfctrs(void); |
| 18 | extern asmlinkage void sparc_breakpoint(struct pt_regs *regs); |
David S. Miller | cf3d7c1 | 2008-03-26 01:11:55 -0700 | [diff] [blame] | 19 | extern void timer_interrupt(int irq, struct pt_regs *regs); |
| 20 | |
David S. Miller | 062ea6d | 2008-03-26 01:52:18 -0700 | [diff] [blame] | 21 | extern void do_notify_resume(struct pt_regs *regs, |
| 22 | unsigned long orig_i0, |
David S. Miller | 062ea6d | 2008-03-26 01:52:18 -0700 | [diff] [blame] | 23 | unsigned long thread_info_flags); |
| 24 | |
Roland McGrath | 73ccefa | 2008-07-27 00:30:50 -0700 | [diff] [blame] | 25 | extern asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p); |
David S. Miller | bfdf9eb | 2008-03-26 00:46:21 -0700 | [diff] [blame] | 26 | |
David S. Miller | 99cd220 | 2008-03-26 00:19:43 -0700 | [diff] [blame] | 27 | extern void bad_trap_tl1(struct pt_regs *regs, long lvl); |
| 28 | |
| 29 | extern void do_fpe_common(struct pt_regs *regs); |
| 30 | extern void do_fpieee(struct pt_regs *regs); |
| 31 | extern void do_fpother(struct pt_regs *regs); |
| 32 | extern void do_tof(struct pt_regs *regs); |
| 33 | extern void do_div0(struct pt_regs *regs); |
| 34 | extern void do_illegal_instruction(struct pt_regs *regs); |
| 35 | extern void mem_address_unaligned(struct pt_regs *regs, |
| 36 | unsigned long sfar, |
| 37 | unsigned long sfsr); |
| 38 | extern void sun4v_do_mna(struct pt_regs *regs, |
| 39 | unsigned long addr, |
| 40 | unsigned long type_ctx); |
| 41 | extern void do_privop(struct pt_regs *regs); |
| 42 | extern void do_privact(struct pt_regs *regs); |
| 43 | extern void do_cee(struct pt_regs *regs); |
| 44 | extern void do_cee_tl1(struct pt_regs *regs); |
| 45 | extern void do_dae_tl1(struct pt_regs *regs); |
| 46 | extern void do_iae_tl1(struct pt_regs *regs); |
| 47 | extern void do_div0_tl1(struct pt_regs *regs); |
| 48 | extern void do_fpdis_tl1(struct pt_regs *regs); |
| 49 | extern void do_fpieee_tl1(struct pt_regs *regs); |
| 50 | extern void do_fpother_tl1(struct pt_regs *regs); |
| 51 | extern void do_ill_tl1(struct pt_regs *regs); |
| 52 | extern void do_irq_tl1(struct pt_regs *regs); |
| 53 | extern void do_lddfmna_tl1(struct pt_regs *regs); |
| 54 | extern void do_stdfmna_tl1(struct pt_regs *regs); |
| 55 | extern void do_paw(struct pt_regs *regs); |
| 56 | extern void do_paw_tl1(struct pt_regs *regs); |
| 57 | extern void do_vaw(struct pt_regs *regs); |
| 58 | extern void do_vaw_tl1(struct pt_regs *regs); |
| 59 | extern void do_tof_tl1(struct pt_regs *regs); |
| 60 | extern void do_getpsr(struct pt_regs *regs); |
| 61 | |
| 62 | extern void spitfire_insn_access_exception(struct pt_regs *regs, |
| 63 | unsigned long sfsr, |
| 64 | unsigned long sfar); |
| 65 | extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs, |
| 66 | unsigned long sfsr, |
| 67 | unsigned long sfar); |
| 68 | extern void spitfire_data_access_exception(struct pt_regs *regs, |
| 69 | unsigned long sfsr, |
| 70 | unsigned long sfar); |
| 71 | extern void spitfire_data_access_exception_tl1(struct pt_regs *regs, |
| 72 | unsigned long sfsr, |
| 73 | unsigned long sfar); |
| 74 | extern void spitfire_access_error(struct pt_regs *regs, |
| 75 | unsigned long status_encoded, |
| 76 | unsigned long afar); |
| 77 | |
| 78 | extern void cheetah_fecc_handler(struct pt_regs *regs, |
| 79 | unsigned long afsr, |
| 80 | unsigned long afar); |
| 81 | extern void cheetah_cee_handler(struct pt_regs *regs, |
| 82 | unsigned long afsr, |
| 83 | unsigned long afar); |
| 84 | extern void cheetah_deferred_handler(struct pt_regs *regs, |
| 85 | unsigned long afsr, |
| 86 | unsigned long afar); |
| 87 | extern void cheetah_plus_parity_error(int type, struct pt_regs *regs); |
| 88 | |
| 89 | extern void sun4v_insn_access_exception(struct pt_regs *regs, |
| 90 | unsigned long addr, |
| 91 | unsigned long type_ctx); |
| 92 | extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs, |
| 93 | unsigned long addr, |
| 94 | unsigned long type_ctx); |
| 95 | extern void sun4v_data_access_exception(struct pt_regs *regs, |
| 96 | unsigned long addr, |
| 97 | unsigned long type_ctx); |
| 98 | extern void sun4v_data_access_exception_tl1(struct pt_regs *regs, |
| 99 | unsigned long addr, |
| 100 | unsigned long type_ctx); |
| 101 | extern void sun4v_resum_error(struct pt_regs *regs, |
| 102 | unsigned long offset); |
| 103 | extern void sun4v_resum_overflow(struct pt_regs *regs); |
| 104 | extern void sun4v_nonresum_error(struct pt_regs *regs, |
| 105 | unsigned long offset); |
| 106 | extern void sun4v_nonresum_overflow(struct pt_regs *regs); |
| 107 | |
| 108 | extern unsigned long sun4v_err_itlb_vaddr; |
| 109 | extern unsigned long sun4v_err_itlb_ctx; |
| 110 | extern unsigned long sun4v_err_itlb_pte; |
| 111 | extern unsigned long sun4v_err_itlb_error; |
| 112 | |
| 113 | extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl); |
| 114 | |
| 115 | extern unsigned long sun4v_err_dtlb_vaddr; |
| 116 | extern unsigned long sun4v_err_dtlb_ctx; |
| 117 | extern unsigned long sun4v_err_dtlb_pte; |
| 118 | extern unsigned long sun4v_err_dtlb_error; |
| 119 | |
| 120 | extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl); |
| 121 | extern void hypervisor_tlbop_error(unsigned long err, |
| 122 | unsigned long op); |
| 123 | extern void hypervisor_tlbop_error_xcall(unsigned long err, |
| 124 | unsigned long op); |
| 125 | |
| 126 | /* WARNING: The error trap handlers in assembly know the precise |
| 127 | * layout of the following structure. |
| 128 | * |
| 129 | * C-level handlers in traps.c use this information to log the |
| 130 | * error and then determine how to recover (if possible). |
| 131 | */ |
| 132 | struct cheetah_err_info { |
| 133 | /*0x00*/u64 afsr; |
| 134 | /*0x08*/u64 afar; |
| 135 | |
| 136 | /* D-cache state */ |
| 137 | /*0x10*/u64 dcache_data[4]; /* The actual data */ |
| 138 | /*0x30*/u64 dcache_index; /* D-cache index */ |
| 139 | /*0x38*/u64 dcache_tag; /* D-cache tag/valid */ |
| 140 | /*0x40*/u64 dcache_utag; /* D-cache microtag */ |
| 141 | /*0x48*/u64 dcache_stag; /* D-cache snooptag */ |
| 142 | |
| 143 | /* I-cache state */ |
| 144 | /*0x50*/u64 icache_data[8]; /* The actual insns + predecode */ |
| 145 | /*0x90*/u64 icache_index; /* I-cache index */ |
| 146 | /*0x98*/u64 icache_tag; /* I-cache phys tag */ |
| 147 | /*0xa0*/u64 icache_utag; /* I-cache microtag */ |
| 148 | /*0xa8*/u64 icache_stag; /* I-cache snooptag */ |
| 149 | /*0xb0*/u64 icache_upper; /* I-cache upper-tag */ |
| 150 | /*0xb8*/u64 icache_lower; /* I-cache lower-tag */ |
| 151 | |
| 152 | /* E-cache state */ |
| 153 | /*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */ |
| 154 | /*0xe0*/u64 ecache_index; /* E-cache index */ |
| 155 | /*0xe8*/u64 ecache_tag; /* E-cache tag/state */ |
| 156 | |
| 157 | /*0xf0*/u64 __pad[32 - 30]; |
| 158 | }; |
| 159 | #define CHAFSR_INVALID ((u64)-1L) |
| 160 | |
| 161 | /* This is allocated at boot time based upon the largest hardware |
| 162 | * cpu ID in the system. We allocate two entries per cpu, one for |
| 163 | * TL==0 logging and one for TL >= 1 logging. |
| 164 | */ |
| 165 | extern struct cheetah_err_info *cheetah_error_log; |
| 166 | |
David S. Miller | d91aa12 | 2008-03-26 00:37:51 -0700 | [diff] [blame] | 167 | /* UPA nodes send interrupt packet to UltraSparc with first data reg |
| 168 | * value low 5 (7 on Starfire) bits holding the IRQ identifier being |
| 169 | * delivered. We must translate this into a non-vector IRQ so we can |
| 170 | * set the softint on this cpu. |
| 171 | * |
| 172 | * To make processing these packets efficient and race free we use |
| 173 | * an array of irq buckets below. The interrupt vector handler in |
| 174 | * entry.S feeds incoming packets into per-cpu pil-indexed lists. |
| 175 | * |
| 176 | * If you make changes to ino_bucket, please update hand coded assembler |
| 177 | * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S |
| 178 | */ |
| 179 | struct ino_bucket { |
| 180 | /*0x00*/unsigned long __irq_chain_pa; |
| 181 | |
| 182 | /* Virtual interrupt number assigned to this INO. */ |
| 183 | /*0x08*/unsigned int __virt_irq; |
| 184 | /*0x0c*/unsigned int __pad; |
| 185 | }; |
| 186 | |
| 187 | extern struct ino_bucket *ivector_table; |
| 188 | extern unsigned long ivector_table_pa; |
| 189 | |
| 190 | extern void handler_irq(int irq, struct pt_regs *regs); |
| 191 | extern void init_irqwork_curcpu(void); |
| 192 | extern void __cpuinit sun4v_register_mondo_queues(int this_cpu); |
| 193 | |
David S. Miller | 3d5ae6b | 2008-03-25 21:51:40 -0700 | [diff] [blame] | 194 | #endif /* _ENTRY_H */ |