blob: f1ed1109f4889e006e9df4c6110be001841c0f82 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001config ARM
2 bool
3 default y
Catalin Marinas74634492012-07-30 14:41:09 -07004 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
Kees Cook2b68f6c2015-04-14 15:48:00 -07005 select ARCH_HAS_ELF_RANDOMIZE
Mark Rutland3d067702012-10-30 12:13:42 +00006 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Russell King171b3f02013-09-12 21:24:42 +01007 select ARCH_HAVE_CUSTOM_GPIO_H
Riku Voipio957e3fa2014-12-12 16:57:44 -08008 select ARCH_HAS_GCOV_PROFILE_ALL
Mark Salterd7018842013-10-07 22:07:58 -04009 select ARCH_MIGHT_HAVE_PC_PARPORT
Peter Zijlstra4badad32014-06-06 19:53:16 +020010 select ARCH_SUPPORTS_ATOMIC_RMW
Kim Phillips017f1612013-11-06 05:15:24 +010011 select ARCH_USE_BUILTIN_BSWAP
Will Deacon0cbad9c2013-10-09 17:19:22 +010012 select ARCH_USE_CMPXCHG_LOCKREF
Russell Kingb1b3f492012-10-06 17:12:25 +010013 select ARCH_WANT_IPC_PARSE_VERSION
Stephen Boydee951c62012-10-29 19:19:34 +010014 select BUILDTIME_EXTABLE_SORT if MMU
Russell King171b3f02013-09-12 21:24:42 +010015 select CLONE_BACKWARDS
Russell Kingb1b3f492012-10-06 17:12:25 +010016 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacondce5c9e2013-12-17 19:50:16 +010017 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
Borislav Petkovb01aec92015-05-21 19:59:31 +020018 select EDAC_SUPPORT
19 select EDAC_ATOMIC_SCRUB
Laura Abbott36d0fd22014-10-09 15:26:42 -070020 select GENERIC_ALLOCATOR
Uwe Kleine-König4477ca42013-03-21 21:02:37 +010021 select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
Russell Kingb1b3f492012-10-06 17:12:25 +010022 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Russell King171b3f02013-09-12 21:24:42 +010023 select GENERIC_IDLE_POLL_SETUP
Russell Kingb1b3f492012-10-06 17:12:25 +010024 select GENERIC_IRQ_PROBE
25 select GENERIC_IRQ_SHOW
Geert Uytterhoeven7c070052015-04-01 13:37:11 +010026 select GENERIC_IRQ_SHOW_LEVEL
Russell Kingb1b3f492012-10-06 17:12:25 +010027 select GENERIC_PCI_IOMAP
Stephen Boyd38ff87f2013-06-01 23:39:40 -070028 select GENERIC_SCHED_CLOCK
Russell Kingb1b3f492012-10-06 17:12:25 +010029 select GENERIC_SMP_IDLE_THREAD
30 select GENERIC_STRNCPY_FROM_USER
31 select GENERIC_STRNLEN_USER
Marc Zyngiera71b0922014-08-26 11:03:18 +010032 select HANDLE_DOMAIN_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010033 select HARDIRQS_SW_RESEND
AKASHI Takahiro7a017722014-02-25 18:16:24 +090034 select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
Yalin Wang0b7857d2015-01-16 02:45:55 +010035 select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
Arnd Bergmanncfeec792015-05-26 15:38:01 +010036 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32
37 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32
Kees Cook91702172013-11-09 00:51:56 +010038 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
Wade Farnsworth0693bf62012-04-04 16:19:47 +010039 select HAVE_ARCH_TRACEHOOK
Russell Kingb1b3f492012-10-06 17:12:25 +010040 select HAVE_BPF_JIT
Russell King51aaf812014-04-22 22:26:27 +010041 select HAVE_CC_STACKPROTECTOR
Russell King171b3f02013-09-12 21:24:42 +010042 select HAVE_CONTEXT_TRACKING
Russell Kingb1b3f492012-10-06 17:12:25 +010043 select HAVE_C_RECORDMCOUNT
44 select HAVE_DEBUG_KMEMLEAK
45 select HAVE_DMA_API_DEBUG
46 select HAVE_DMA_ATTRS
47 select HAVE_DMA_CONTIGUOUS if MMU
Arnd Bergmanncfeec792015-05-26 15:38:01 +010048 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32
Will Deacondce5c9e2013-12-17 19:50:16 +010049 select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
Russell Kingb1b3f492012-10-06 17:12:25 +010050 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
51 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
52 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
53 select HAVE_GENERIC_DMA_COHERENT
Russell Kingb1b3f492012-10-06 17:12:25 +010054 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
55 select HAVE_IDE if PCI || ISA || PCMCIA
Russell King87c46b62013-05-04 14:38:59 +010056 select HAVE_IRQ_TIME_ACCOUNTING
Russell Kingb1b3f492012-10-06 17:12:25 +010057 select HAVE_KERNEL_GZIP
Kyungsik Leef9b493a2013-07-08 16:01:48 -070058 select HAVE_KERNEL_LZ4
Russell Kingb1b3f492012-10-06 17:12:25 +010059 select HAVE_KERNEL_LZMA
60 select HAVE_KERNEL_LZO
61 select HAVE_KERNEL_XZ
Arnd Bergmanncb1293e2015-05-26 15:40:44 +010062 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
Ananth N Mavinakayanahalli9edddaa2008-03-04 14:28:37 -080063 select HAVE_KRETPROBES if (HAVE_KPROBES)
Russell Kingb1b3f492012-10-06 17:12:25 +010064 select HAVE_MEMBLOCK
Ard Biesheuvel7d485f62014-11-24 16:54:35 +010065 select HAVE_MOD_ARCH_SPECIFIC
Russell Kingb1b3f492012-10-06 17:12:25 +010066 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
Wang Nan0dc016d2015-01-09 14:37:36 +080067 select HAVE_OPTPROBES if !THUMB2_KERNEL
Jamie Iles7ada1892010-02-02 20:24:58 +010068 select HAVE_PERF_EVENTS
Will Deacon49863892013-09-26 12:36:35 +010069 select HAVE_PERF_REGS
70 select HAVE_PERF_USER_STACK_DUMP
Steve Cappera0ad5492014-10-09 15:29:18 -070071 select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
Will Deacone513f8b2010-06-25 12:24:53 +010072 select HAVE_REGS_AND_STACK_ACCESS_API
Russell Kingb1b3f492012-10-06 17:12:25 +010073 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinasaf1839e2012-10-08 16:28:08 -070074 select HAVE_UID16
Kevin Hilman31c1fc82013-09-16 15:28:22 -070075 select HAVE_VIRT_CPU_ACCOUNTING_GEN
Thomas Gleixnerda0ec6f2013-08-14 20:43:17 +010076 select IRQ_FORCED_THREADING
Russell King171b3f02013-09-12 21:24:42 +010077 select MODULES_USE_ELF_REL
Santosh Shilimkar84f452b2013-06-30 00:28:46 -040078 select NO_BOOTMEM
Russell King171b3f02013-09-12 21:24:42 +010079 select OLD_SIGACTION
80 select OLD_SIGSUSPEND3
Russell Kingb1b3f492012-10-06 17:12:25 +010081 select PERF_USE_VMALLOC
82 select RTC_LIB
83 select SYS_SUPPORTS_APM_EMULATION
Russell King171b3f02013-09-12 21:24:42 +010084 # Above selects are sorted alphabetically; please add new ones
85 # according to that. Thanks.
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 help
87 The ARM series is a line of low-power-consumption RISC chip designs
Martin Michlmayrf6c89652006-02-08 21:09:07 +000088 licensed by ARM Ltd and targeted at embedded applications and
Linus Torvalds1da177e2005-04-16 15:20:36 -070089 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
Martin Michlmayrf6c89652006-02-08 21:09:07 +000090 manufactured, but legacy ARM-based PC hardware remains popular in
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 Europe. There is an ARM Linux project with a web page at
92 <http://www.arm.linux.org.uk/>.
93
Russell King74facff2011-06-02 11:16:22 +010094config ARM_HAS_SG_CHAIN
Laura Abbott308c09f2014-08-08 14:23:25 -070095 select ARCH_HAS_SG_CHAIN
Russell King74facff2011-06-02 11:16:22 +010096 bool
97
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +020098config NEED_SG_DMA_LENGTH
99 bool
100
101config ARM_DMA_USE_IOMMU
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200102 bool
Russell Kingb1b3f492012-10-06 17:12:25 +0100103 select ARM_HAS_SG_CHAIN
104 select NEED_SG_DMA_LENGTH
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200105
Seung-Woo Kim60460ab2013-02-06 13:21:14 +0900106if ARM_DMA_USE_IOMMU
107
108config ARM_DMA_IOMMU_ALIGNMENT
109 int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
110 range 4 9
111 default 8
112 help
113 DMA mapping framework by default aligns all buffers to the smallest
114 PAGE_SIZE order which is greater than or equal to the requested buffer
115 size. This works well for buffers up to a few hundreds kilobytes, but
116 for larger buffers it just a waste of address space. Drivers which has
117 relatively small addressing window (like 64Mib) might run out of
118 virtual space with just a few allocations.
119
120 With this parameter you can specify the maximum PAGE_SIZE order for
121 DMA IOMMU buffers. Larger buffers will be aligned only to this
122 specified order. The order is expressed as a power of two multiplied
123 by the PAGE_SIZE.
124
125endif
126
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100127config MIGHT_HAVE_PCI
128 bool
129
Ralf Baechle75e71532007-02-09 17:08:58 +0000130config SYS_SUPPORTS_APM_EMULATION
131 bool
132
Linus Walleijbc581772009-09-15 17:30:37 +0100133config HAVE_TCM
134 bool
135 select GENERIC_ALLOCATOR
136
Russell Kinge119bff2010-01-10 17:23:29 +0000137config HAVE_PROC_CPU
138 bool
139
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700140config NO_IOPORT_MAP
Al Viro5ea81762007-02-11 15:41:31 +0000141 bool
Al Viro5ea81762007-02-11 15:41:31 +0000142
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143config EISA
144 bool
145 ---help---
146 The Extended Industry Standard Architecture (EISA) bus was
147 developed as an open alternative to the IBM MicroChannel bus.
148
149 The EISA bus provided some of the features of the IBM MicroChannel
150 bus while maintaining backward compatibility with cards made for
151 the older ISA bus. The EISA bus saw limited use between 1988 and
152 1995 when it was made obsolete by the PCI bus.
153
154 Say Y here if you are building a kernel for an EISA-based machine.
155
156 Otherwise, say N.
157
158config SBUS
159 bool
160
Russell Kingf16fb1e2007-04-28 09:59:37 +0100161config STACKTRACE_SUPPORT
162 bool
163 default y
164
Nicolas Pitref76e9152008-04-24 01:31:46 -0400165config HAVE_LATENCYTOP_SUPPORT
166 bool
167 depends on !SMP
168 default y
169
Russell Kingf16fb1e2007-04-28 09:59:37 +0100170config LOCKDEP_SUPPORT
171 bool
172 default y
173
Russell King7ad1bcb2006-08-27 12:07:02 +0100174config TRACE_IRQFLAGS_SUPPORT
175 bool
Arnd Bergmanncb1293e2015-05-26 15:40:44 +0100176 default !CPU_V7M
Russell King7ad1bcb2006-08-27 12:07:02 +0100177
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178config RWSEM_XCHGADD_ALGORITHM
179 bool
Will Deacon8a874112014-05-02 17:06:19 +0100180 default y
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181
David Howellsf0d1b0b2006-12-08 02:37:49 -0800182config ARCH_HAS_ILOG2_U32
183 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800184
185config ARCH_HAS_ILOG2_U64
186 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800187
Eduardo Valentin4a1b5732013-06-13 22:58:52 +0100188config ARCH_HAS_BANDGAP
189 bool
190
Stefan Agnera5f4c562015-08-13 00:01:52 +0100191config FIX_EARLYCON_MEM
192 def_bool y if MMU
193
Akinobu Mitab89c3b12006-03-26 01:39:19 -0800194config GENERIC_HWEIGHT
195 bool
196 default y
197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198config GENERIC_CALIBRATE_DELAY
199 bool
200 default y
201
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100202config ARCH_MAY_HAVE_PC_FDC
203 bool
204
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800205config ZONE_DMA
206 bool
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800207
FUJITA Tomonoriccd7ab72010-03-10 15:23:23 -0800208config NEED_DMA_MAP_STATE
209 def_bool y
210
David A. Longc7edc9e2014-03-07 11:23:04 -0500211config ARCH_SUPPORTS_UPROBES
212 def_bool y
213
Rob Herring58af4a22012-03-20 14:33:01 -0500214config ARCH_HAS_DMA_SET_COHERENT_MASK
215 bool
216
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217config GENERIC_ISA_DMA
218 bool
219
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220config FIQ
221 bool
222
Rob Herring13a5045d2012-02-07 09:28:22 -0600223config NEED_RET_TO_USER
224 bool
225
Al Viro034d2f52005-12-19 16:27:59 -0500226config ARCH_MTD_XIP
227 bool
228
Hyok S. Choic760fc12006-03-27 15:18:50 +0100229config VECTORS_BASE
230 hex
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900231 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
Hyok S. Choic760fc12006-03-27 15:18:50 +0100232 default DRAM_BASE if REMAP_VECTORS_TO_RAM
233 default 0x00000000
234 help
Russell King19accfd2013-07-04 11:40:32 +0100235 The base address of exception vectors. This must be two pages
236 in size.
Hyok S. Choic760fc12006-03-27 15:18:50 +0100237
Russell Kingdc21af92011-01-04 19:09:43 +0000238config ARM_PATCH_PHYS_VIRT
Russell Kingc1beced2011-08-10 10:23:45 +0100239 bool "Patch physical to virtual translations at runtime" if EMBEDDED
240 default y
Nicolas Pitreb511d752011-02-21 06:53:35 +0100241 depends on !XIP_KERNEL && MMU
Russell Kingdc21af92011-01-04 19:09:43 +0000242 depends on !ARCH_REALVIEW || !SPARSEMEM
243 help
Russell King111e9a52011-05-12 10:02:42 +0100244 Patch phys-to-virt and virt-to-phys translation functions at
245 boot and module load time according to the position of the
246 kernel in system memory.
Russell Kingdc21af92011-01-04 19:09:43 +0000247
Russell King111e9a52011-05-12 10:02:42 +0100248 This can only be used with non-XIP MMU kernels where the base
Nicolas Pitredaece592011-08-12 00:14:29 +0100249 of physical memory is at a 16MB boundary.
Russell Kingdc21af92011-01-04 19:09:43 +0000250
Russell Kingc1beced2011-08-10 10:23:45 +0100251 Only disable this option if you know that you do not require
252 this feature (eg, building a kernel for a single machine) and
253 you need to shrink the kernel to the minimal size.
254
Rob Herringc334bc12012-03-04 22:03:33 -0600255config NEED_MACH_IO_H
256 bool
257 help
258 Select this when mach/io.h is required to provide special
259 definitions for this platform. The need for mach/io.h should
260 be avoided when possible.
261
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400262config NEED_MACH_MEMORY_H
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400263 bool
Russell King111e9a52011-05-12 10:02:42 +0100264 help
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400265 Select this when mach/memory.h is required to provide special
266 definitions for this platform. The need for mach/memory.h should
267 be avoided when possible.
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400268
269config PHYS_OFFSET
Nicolas Pitre974c0722011-12-02 23:09:42 +0100270 hex "Physical address of main memory" if MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100271 depends on !ARM_PATCH_PHYS_VIRT
Nicolas Pitre974c0722011-12-02 23:09:42 +0100272 default DRAM_BASE if !MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100273 default 0x00000000 if ARCH_EBSA110 || \
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100274 ARCH_FOOTBRIDGE || \
275 ARCH_INTEGRATOR || \
276 ARCH_IOP13XX || \
277 ARCH_KS8695 || \
278 (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
279 default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
280 default 0x20000000 if ARCH_S5PV210
281 default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700282 default 0xc0000000 if ARCH_SA1100
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400283 help
284 Please provide the physical address corresponding to the
285 location of main memory in your system.
Russell Kingcada3c02011-01-04 19:39:29 +0000286
Simon Glass87e040b2011-08-16 23:44:26 +0100287config GENERIC_BUG
288 def_bool y
289 depends on BUG
290
Kirill A. Shutemov1bcad262015-04-14 15:45:42 -0700291config PGTABLE_LEVELS
292 int
293 default 3 if ARM_LPAE
294 default 2
295
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296source "init/Kconfig"
297
Matt Helsleydc52ddc2008-10-18 20:27:21 -0700298source "kernel/Kconfig.freezer"
299
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300menu "System Type"
301
Hyok S. Choi3c427972009-07-24 12:35:00 +0100302config MMU
303 bool "MMU-based Paged Memory Management Support"
304 default y
305 help
306 Select if you want MMU-based virtualised addressing space
307 support by paged memory management. If unsure, say 'Y'.
308
Russell Kingccf50e22010-03-15 19:03:06 +0000309#
310# The "ARM system type" choice list is ordered alphabetically by option
311# text. Please add new entries in the option alphabetic order.
312#
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313choice
314 prompt "ARM system type"
Arnd Bergmann1420b222013-02-14 13:33:36 +0100315 default ARCH_VERSATILE if !MMU
316 default ARCH_MULTIPLATFORM if MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317
Rob Herring387798b2012-09-06 13:41:12 -0500318config ARCH_MULTIPLATFORM
319 bool "Allow multiple platforms to be selected"
Russell Kingb1b3f492012-10-06 17:12:25 +0100320 depends on MMU
Rob Herringddb902c2013-11-22 09:29:37 -0600321 select ARCH_WANT_OPTIONAL_GPIOLIB
Olof Johansson42dc8362014-03-09 12:46:59 -0700322 select ARM_HAS_SG_CHAIN
Rob Herring387798b2012-09-06 13:41:12 -0500323 select ARM_PATCH_PHYS_VIRT
324 select AUTO_ZRELADDR
Rob Herring6d0add42014-04-16 08:42:13 -0500325 select CLKSRC_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600326 select COMMON_CLK
Rob Herringddb902c2013-11-22 09:29:37 -0600327 select GENERIC_CLOCKEVENTS
Will Deacon08d38be2014-05-27 23:26:35 +0100328 select MIGHT_HAVE_PCI
Rob Herring387798b2012-09-06 13:41:12 -0500329 select MULTI_IRQ_HANDLER
Dinh Nguyen66314222012-07-18 16:07:18 -0600330 select SPARSE_IRQ
331 select USE_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600332
Stefan Agner9c77bc42015-05-20 00:03:51 +0200333config ARM_SINGLE_ARMV7M
334 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
335 depends on !MMU
336 select ARCH_WANT_OPTIONAL_GPIOLIB
337 select ARM_NVIC
Stefan Agner499f1642015-05-21 00:35:44 +0200338 select AUTO_ZRELADDR
Stefan Agner9c77bc42015-05-20 00:03:51 +0200339 select CLKSRC_OF
340 select COMMON_CLK
341 select CPU_V7M
342 select GENERIC_CLOCKEVENTS
343 select NO_IOPORT_MAP
344 select SPARSE_IRQ
345 select USE_OF
346
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100347config ARCH_REALVIEW
348 bool "ARM Ltd. RealView family"
Russell Kingb1b3f492012-10-06 17:12:25 +0100349 select ARCH_WANT_OPTIONAL_GPIOLIB
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100350 select ARM_AMBA
Russell Kingb1b3f492012-10-06 17:12:25 +0100351 select ARM_TIMER_SP804
Linus Walleijf9a6aa42012-08-06 18:32:08 +0200352 select COMMON_CLK
353 select COMMON_CLK_VERSATILE
Catalin Marinasae30cea2008-02-04 17:26:55 +0100354 select GENERIC_CLOCKEVENTS
Russell Kingb1b3f492012-10-06 17:12:25 +0100355 select GPIO_PL061 if GPIOLIB
356 select ICST
357 select NEED_MACH_MEMORY_H
Russell Kingf4b8b312010-01-14 12:48:06 +0000358 select PLAT_VERSATILE
Pawel Moll81cc3f82014-11-25 18:17:34 +0000359 select PLAT_VERSATILE_SCHED_CLOCK
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100360 help
361 This enables support for ARM Ltd RealView boards.
362
363config ARCH_VERSATILE
364 bool "ARM Ltd. Versatile family"
Russell Kingb1b3f492012-10-06 17:12:25 +0100365 select ARCH_WANT_OPTIONAL_GPIOLIB
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100366 select ARM_AMBA
Russell Kingb1b3f492012-10-06 17:12:25 +0100367 select ARM_TIMER_SP804
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100368 select ARM_VIC
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100369 select CLKDEV_LOOKUP
Russell Kingb1b3f492012-10-06 17:12:25 +0100370 select GENERIC_CLOCKEVENTS
Kyungmin Parkaa3831c2011-07-18 16:34:54 +0900371 select HAVE_MACH_CLKDEV
Russell Kingc5a0adb2010-01-16 20:16:10 +0000372 select ICST
Russell Kingf4b8b312010-01-14 12:48:06 +0000373 select PLAT_VERSATILE
Russell Kingb1b3f492012-10-06 17:12:25 +0100374 select PLAT_VERSATILE_CLOCK
Pawel Moll81cc3f82014-11-25 18:17:34 +0000375 select PLAT_VERSATILE_SCHED_CLOCK
Linus Walleij2389d502012-10-31 22:04:31 +0100376 select VERSATILE_FPGA_IRQ
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100377 help
378 This enables support for ARM Ltd Versatile board.
379
Russell King93e22562012-10-12 14:20:52 +0100380config ARCH_CLPS711X
381 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
Alexander Shiyana3b8d4a2012-10-09 20:05:56 +0400382 select ARCH_REQUIRE_GPIOLIB
Alexander Shiyanea7d1bc2012-11-17 17:57:11 +0400383 select AUTO_ZRELADDR
Alexander Shiyanc99f72a2013-05-13 21:07:32 +0400384 select CLKSRC_MMIO
Russell King93e22562012-10-12 14:20:52 +0100385 select COMMON_CLK
386 select CPU_ARM720T
Alexander Shiyan4a8355c2012-10-10 19:45:27 +0400387 select GENERIC_CLOCKEVENTS
Alexander Shiyan65976192013-05-13 21:07:36 +0400388 select MFD_SYSCON
Alexander Shiyane4e3a372014-08-19 16:31:15 +0400389 select SOC_BUS
Russell King93e22562012-10-12 14:20:52 +0100390 help
391 Support for Cirrus Logic 711x/721x/731x based boards.
392
Russell King788c9702009-04-26 14:21:59 +0100393config ARCH_GEMINI
394 bool "Cortina Systems Gemini"
Russell King788c9702009-04-26 14:21:59 +0100395 select ARCH_REQUIRE_GPIOLIB
Linus Walleijf3372c02013-10-01 12:57:20 +0200396 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100397 select CPU_FA526
Linus Walleijf3372c02013-10-01 12:57:20 +0200398 select GENERIC_CLOCKEVENTS
Russell King788c9702009-04-26 14:21:59 +0100399 help
400 Support for the Cortina Systems Gemini family SoCs
401
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402config ARCH_EBSA110
403 bool "EBSA-110"
Russell Kingb1b3f492012-10-06 17:12:25 +0100404 select ARCH_USES_GETTIMEOFFSET
Russell Kingc7508152008-10-26 10:55:14 +0000405 select CPU_SA110
Russell Kingf7e68bb2005-05-05 14:49:01 +0100406 select ISA
Rob Herringc334bc12012-03-04 22:03:33 -0600407 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400408 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700409 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 help
411 This is an evaluation board for the StrongARM processor available
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000412 from Digital. It has limited hardware on-board, including an
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 Ethernet interface, two PCMCIA sockets, two serial ports and a
414 parallel port.
415
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000416config ARCH_EP93XX
417 bool "EP93xx-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100418 select ARCH_HAS_HOLES_MEMORYMODEL
419 select ARCH_REQUIRE_GPIOLIB
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000420 select ARM_AMBA
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700421 select ARM_PATCH_PHYS_VIRT
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000422 select ARM_VIC
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700423 select AUTO_ZRELADDR
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100424 select CLKDEV_LOOKUP
Linus Walleij000bc172015-06-15 14:34:03 +0200425 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100426 select CPU_ARM920T
Linus Walleij000bc172015-06-15 14:34:03 +0200427 select GENERIC_CLOCKEVENTS
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000428 help
429 This enables support for the Cirrus EP93xx series of CPUs.
430
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431config ARCH_FOOTBRIDGE
432 bool "FootBridge"
Russell Kingc7508152008-10-26 10:55:14 +0000433 select CPU_SA110
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434 select FOOTBRIDGE
Russell King4e8d7632011-01-28 21:00:39 +0000435 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200436 select HAVE_IDE
Rob Herring8ef6e622012-03-01 20:48:12 -0600437 select NEED_MACH_IO_H if !MMU
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400438 select NEED_MACH_MEMORY_H
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000439 help
440 Support for systems based on the DC21285 companion chip
441 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100443config ARCH_NETX
444 bool "Hilscher NetX based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100445 select ARM_VIC
Russell King234b6ced2011-05-08 14:09:47 +0100446 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000447 select CPU_ARM926T
Uwe Kleine-König2fcfe6b2008-12-09 21:57:24 +0100448 select GENERIC_CLOCKEVENTS
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000449 help
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100450 This enables support for systems based on the Hilscher NetX Soc
451
Russell King3b938be2007-05-12 11:25:44 +0100452config ARCH_IOP13XX
453 bool "IOP13xx-based"
454 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100455 select CPU_XSC3
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400456 select NEED_MACH_MEMORY_H
Rob Herring13a5045d2012-02-07 09:28:22 -0600457 select NEED_RET_TO_USER
Russell Kingb1b3f492012-10-06 17:12:25 +0100458 select PCI
459 select PLAT_IOP
460 select VMSPLIT_1G
Thomas Gleixner37ebbcf2014-05-07 15:44:04 +0000461 select SPARSE_IRQ
Russell King3b938be2007-05-12 11:25:44 +0100462 help
463 Support for Intel's IOP13XX (XScale) family of processors.
464
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100465config ARCH_IOP32X
466 bool "IOP32x-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100467 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100468 select ARCH_REQUIRE_GPIOLIB
Russell Kingc7508152008-10-26 10:55:14 +0000469 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200470 select GPIO_IOP
Rob Herring13a5045d2012-02-07 09:28:22 -0600471 select NEED_RET_TO_USER
Russell Kingf7e68bb2005-05-05 14:49:01 +0100472 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100473 select PLAT_IOP
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000474 help
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100475 Support for Intel's 80219 and IOP32X (XScale) family of
476 processors.
477
478config ARCH_IOP33X
479 bool "IOP33x-based"
480 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100481 select ARCH_REQUIRE_GPIOLIB
Russell Kingc7508152008-10-26 10:55:14 +0000482 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200483 select GPIO_IOP
Rob Herring13a5045d2012-02-07 09:28:22 -0600484 select NEED_RET_TO_USER
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100485 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100486 select PLAT_IOP
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100487 help
488 Support for Intel's IOP33X (XScale) family of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489
Russell King3b938be2007-05-12 11:25:44 +0100490config ARCH_IXP4XX
491 bool "IXP4xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100492 depends on MMU
Rob Herring58af4a22012-03-20 14:33:01 -0500493 select ARCH_HAS_DMA_SET_COHERENT_MASK
Russell Kingb1b3f492012-10-06 17:12:25 +0100494 select ARCH_REQUIRE_GPIOLIB
Russell King51aaf812014-04-22 22:26:27 +0100495 select ARCH_SUPPORTS_BIG_ENDIAN
Russell King234b6ced2011-05-08 14:09:47 +0100496 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000497 select CPU_XSCALE
Russell Kingb1b3f492012-10-06 17:12:25 +0100498 select DMABOUNCE if PCI
Russell King3b938be2007-05-12 11:25:44 +0100499 select GENERIC_CLOCKEVENTS
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100500 select MIGHT_HAVE_PCI
Rob Herringc334bc12012-03-04 22:03:33 -0600501 select NEED_MACH_IO_H
Florian Fainelli9296d942013-04-09 14:29:26 +0200502 select USB_EHCI_BIG_ENDIAN_DESC
Russell King171b3f02013-09-12 21:24:42 +0100503 select USB_EHCI_BIG_ENDIAN_MMIO
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100504 help
Russell King3b938be2007-05-12 11:25:44 +0100505 Support for Intel's IXP4XX (XScale) family of processors.
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100506
Saeed Bisharaedabd382009-08-06 15:12:43 +0300507config ARCH_DOVE
508 bool "Marvell Dove"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300509 select ARCH_REQUIRE_GPIOLIB
Sebastian Hesselbarth756b2532013-05-02 19:56:12 +0100510 select CPU_PJ4
Saeed Bisharaedabd382009-08-06 15:12:43 +0300511 select GENERIC_CLOCKEVENTS
Russell King0f81bd42012-09-09 20:34:13 +0100512 select MIGHT_HAVE_PCI
Russell King171b3f02013-09-12 21:24:42 +0100513 select MVEBU_MBUS
Sebastian Hesselbarth9139acd2012-11-19 10:39:55 +0100514 select PINCTRL
515 select PINCTRL_DOVE
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200516 select PLAT_ORION_LEGACY
Saeed Bisharaedabd382009-08-06 15:12:43 +0300517 help
518 Support for the Marvell Dove SoC 88AP510
519
Russell King788c9702009-04-26 14:21:59 +0100520config ARCH_MV78XX0
521 bool "Marvell MV78xx0"
Erik Benadaa8865652009-05-28 17:08:55 -0700522 select ARCH_REQUIRE_GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100523 select CPU_FEROCEON
Russell King788c9702009-04-26 14:21:59 +0100524 select GENERIC_CLOCKEVENTS
Russell King171b3f02013-09-12 21:24:42 +0100525 select MVEBU_MBUS
Russell Kingb1b3f492012-10-06 17:12:25 +0100526 select PCI
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200527 select PLAT_ORION_LEGACY
Russell King788c9702009-04-26 14:21:59 +0100528 help
529 Support for the following Marvell MV78xx0 series SoCs:
530 MV781x0, MV782x0.
531
532config ARCH_ORION5X
533 bool "Marvell Orion"
534 depends on MMU
Erik Benadaa8865652009-05-28 17:08:55 -0700535 select ARCH_REQUIRE_GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100536 select CPU_FEROCEON
Russell King788c9702009-04-26 14:21:59 +0100537 select GENERIC_CLOCKEVENTS
Russell King171b3f02013-09-12 21:24:42 +0100538 select MVEBU_MBUS
Russell Kingb1b3f492012-10-06 17:12:25 +0100539 select PCI
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200540 select PLAT_ORION_LEGACY
Benjamin Cama5be9fc22015-07-14 16:25:58 +0200541 select MULTI_IRQ_HANDLER
Russell King788c9702009-04-26 14:21:59 +0100542 help
543 Support for the following Marvell Orion 5x series SoCs:
544 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
545 Orion-2 (5281), Orion-1-90 (6183).
546
547config ARCH_MMP
Haojian Zhuang2f7e8fa2009-12-04 09:41:28 -0500548 bool "Marvell PXA168/910/MMP2"
Russell King788c9702009-04-26 14:21:59 +0100549 depends on MMU
Russell King788c9702009-04-26 14:21:59 +0100550 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100551 select CLKDEV_LOOKUP
Russell Kingb1b3f492012-10-06 17:12:25 +0100552 select GENERIC_ALLOCATOR
Russell King788c9702009-04-26 14:21:59 +0100553 select GENERIC_CLOCKEVENTS
Haojian Zhuang157d2642011-10-17 20:37:52 +0800554 select GPIO_PXA
Haojian Zhuangc24b3112012-04-12 19:02:02 +0800555 select IRQ_DOMAIN
Haojian Zhuang0f374562013-04-21 16:53:02 +0800556 select MULTI_IRQ_HANDLER
Axel Lin7c8f86a2012-11-28 14:42:35 +0800557 select PINCTRL
Russell King788c9702009-04-26 14:21:59 +0100558 select PLAT_PXA
Haojian Zhuang0bd86962010-09-08 09:42:42 -0400559 select SPARSE_IRQ
Russell King788c9702009-04-26 14:21:59 +0100560 help
Haojian Zhuang2f7e8fa2009-12-04 09:41:28 -0500561 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
Russell King788c9702009-04-26 14:21:59 +0100562
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100563config ARCH_KS8695
564 bool "Micrel/Kendin KS8695"
Hartley Sweeten98830bc2010-05-17 17:18:10 +0100565 select ARCH_REQUIRE_GPIOLIB
Linus Walleijc7e783d2012-08-29 20:27:22 +0200566 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100567 select CPU_ARM922T
Linus Walleijc7e783d2012-08-29 20:27:22 +0200568 select GENERIC_CLOCKEVENTS
Russell Kingb1b3f492012-10-06 17:12:25 +0100569 select NEED_MACH_MEMORY_H
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100570 help
571 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
572 System-on-Chip devices.
573
Russell King788c9702009-04-26 14:21:59 +0100574config ARCH_W90X900
575 bool "Nuvoton W90X900 CPU"
wanzongshunc52d3d62009-06-10 15:49:32 +0100576 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100577 select CLKDEV_LOOKUP
Russell King6fa5d5f2011-05-08 15:34:39 +0100578 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100579 select CPU_ARM926T
wanzongshun58b53692009-08-14 15:36:44 +0100580 select GENERIC_CLOCKEVENTS
Lennert Buytenhek777f9be2008-06-22 22:45:02 +0200581 help
wanzongshuna8bc4ea2009-08-14 15:38:29 +0100582 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
583 At present, the w90x900 has been renamed nuc900, regarding
584 the ARM series product line, you can login the following
585 link address to know more.
586
587 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
588 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400589
Russell King93e22562012-10-12 14:20:52 +0100590config ARCH_LPC32XX
591 bool "NXP LPC32XX"
592 select ARCH_REQUIRE_GPIOLIB
593 select ARM_AMBA
Russell King40737232011-01-06 22:32:52 +0000594 select CLKDEV_LOOKUP
Russell King234b6ced2011-05-08 14:09:47 +0100595 select CLKSRC_MMIO
Russell King93e22562012-10-12 14:20:52 +0100596 select CPU_ARM926T
597 select GENERIC_CLOCKEVENTS
598 select HAVE_IDE
Russell King93e22562012-10-12 14:20:52 +0100599 select USE_OF
600 help
601 Support for the NXP LPC32XX family of processors
602
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603config ARCH_PXA
eric miao2c8086a2007-09-11 19:13:17 -0700604 bool "PXA2xx/PXA3xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100605 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100606 select ARCH_MTD_XIP
607 select ARCH_REQUIRE_GPIOLIB
608 select ARM_CPU_SUSPEND if PM
609 select AUTO_ZRELADDR
Robert Jarzmika1c0a6a2015-02-07 22:54:03 +0100610 select COMMON_CLK
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100611 select CLKDEV_LOOKUP
Russell King234b6ced2011-05-08 14:09:47 +0100612 select CLKSRC_MMIO
Robert Jarzmik6f6caea2014-07-14 18:52:03 +0200613 select CLKSRC_OF
Eric Miao981d0f32007-07-24 01:22:43 +0100614 select GENERIC_CLOCKEVENTS
Haojian Zhuang157d2642011-10-17 20:37:52 +0800615 select GPIO_PXA
Russell Kingb1b3f492012-10-06 17:12:25 +0100616 select HAVE_IDE
Robert Jarzmikd6cf30c2015-02-14 22:41:56 +0100617 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100618 select MULTI_IRQ_HANDLER
Eric Miaobd5ce432009-01-20 12:06:01 +0800619 select PLAT_PXA
Haojian Zhuang6ac6b812010-08-20 15:23:59 +0800620 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000621 help
eric miao2c8086a2007-09-11 19:13:17 -0700622 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623
Laurent Pinchartbf98c1e2013-11-09 13:33:48 +0100624config ARCH_SHMOBILE_LEGACY
Laurent Pinchart0d9fd612013-11-28 17:27:29 +0100625 bool "Renesas ARM SoCs (non-multiplatform)"
Laurent Pinchartbf98c1e2013-11-09 13:33:48 +0100626 select ARCH_SHMOBILE
Uwe Kleine-König91942d12014-07-23 20:37:44 +0100627 select ARM_PATCH_PHYS_VIRT if MMU
Paul Mundt5e93c6b2011-01-07 10:29:26 +0900628 select CLKDEV_LOOKUP
Magnus Damm0ed82bc2014-08-25 12:45:41 +0900629 select CPU_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100630 select GENERIC_CLOCKEVENTS
Stephen Boyd4c3ffff2013-02-27 15:28:14 -0800631 select HAVE_ARM_SCU if SMP
Stephen Boyda894fcc22013-02-15 16:02:20 -0800632 select HAVE_ARM_TWD if SMP
Dave Martin3b556582011-12-07 15:38:04 +0000633 select HAVE_SMP
Dave Martince5ea9f2011-11-29 15:56:19 +0000634 select MIGHT_HAVE_CACHE_L2X0
Magnus Damm60f14352010-12-28 08:26:52 +0000635 select MULTI_IRQ_HANDLER
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700636 select NO_IOPORT_MAP
Laurent Pinchart2cd3c922013-05-31 05:00:27 +0200637 select PINCTRL
Russell Kingb1b3f492012-10-06 17:12:25 +0100638 select PM_GENERIC_DOMAINS if PM
Magnus Damm0cdc23d2014-08-25 12:45:50 +0900639 select SH_CLK_CPG
Russell Kingb1b3f492012-10-06 17:12:25 +0100640 select SPARSE_IRQ
Magnus Dammc793c1b2010-02-05 11:14:49 +0000641 help
Laurent Pinchart0d9fd612013-11-28 17:27:29 +0100642 Support for Renesas ARM SoC platforms using a non-multiplatform
643 kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
644 and RZ families.
Magnus Dammc793c1b2010-02-05 11:14:49 +0000645
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646config ARCH_RPC
647 bool "RiscPC"
Russell King868e87c2015-09-28 10:31:50 +0100648 depends on MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649 select ARCH_ACORN
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100650 select ARCH_MAY_HAVE_PC_FDC
Russell King07f841b2008-10-01 17:11:06 +0100651 select ARCH_SPARSEMEM_ENABLE
John Stultz5cfc8ee2010-03-24 00:22:36 +0000652 select ARCH_USES_GETTIMEOFFSET
Arnd Bergmannfa04e202014-02-26 17:39:12 +0100653 select CPU_SA110
Russell Kingb1b3f492012-10-06 17:12:25 +0100654 select FIQ
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200655 select HAVE_IDE
Russell Kingb1b3f492012-10-06 17:12:25 +0100656 select HAVE_PATA_PLATFORM
657 select ISA_DMA_API
Rob Herringc334bc12012-03-04 22:03:33 -0600658 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400659 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700660 select NO_IOPORT_MAP
Arnd Bergmannb4811ba2013-03-13 17:36:37 +0100661 select VIRT_TO_BUS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 help
663 On the Acorn Risc-PC, Linux can support the internal IDE disk and
664 CD-ROM interface, serial and parallel port, and the floppy drive.
665
666config ARCH_SA1100
667 bool "SA1100-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100668 select ARCH_MTD_XIP
Michael Buesch7444a722008-07-25 01:46:11 -0700669 select ARCH_REQUIRE_GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100670 select ARCH_SPARSEMEM_ENABLE
671 select CLKDEV_LOOKUP
672 select CLKSRC_MMIO
673 select CPU_FREQ
674 select CPU_SA1100
675 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200676 select HAVE_IDE
Dmitry Eremin-Solenikov1eca42b2014-11-28 15:56:54 +0100677 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100678 select ISA
Dmitry Eremin-Solenikovaffcab32014-11-28 15:55:16 +0100679 select MULTI_IRQ_HANDLER
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400680 select NEED_MACH_MEMORY_H
Russell King375dec92012-02-23 14:29:33 +0100681 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000682 help
683 Support for StrongARM 11x0 based boards.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900685config ARCH_S3C24XX
686 bool "Samsung S3C24XX SoCs"
Kukjin Kim53650432013-04-04 09:04:30 +0900687 select ARCH_REQUIRE_GPIOLIB
Arnd Bergmann335cce72014-03-13 14:11:16 +0100688 select ATAGS
Russell Kingb1b3f492012-10-06 17:12:25 +0100689 select CLKDEV_LOOKUP
Tomasz Figa42805062013-04-28 02:25:01 +0200690 select CLKSRC_SAMSUNG_PWM
Romain Naour7f78b6e2013-01-09 18:47:04 -0800691 select GENERIC_CLOCKEVENTS
Tomasz Figa880cf072013-06-19 01:22:20 +0900692 select GPIO_SAMSUNG
Kukjin Kim20676c12010-11-13 16:08:32 +0900693 select HAVE_S3C2410_I2C if I2C
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900694 select HAVE_S3C2410_WATCHDOG if WATCHDOG
Russell Kingb1b3f492012-10-06 17:12:25 +0100695 select HAVE_S3C_RTC if RTC_CLASS
Heiko Stuebner17453dd2013-03-07 12:38:25 +0900696 select MULTI_IRQ_HANDLER
Rob Herringc334bc12012-03-04 22:03:33 -0600697 select NEED_MACH_IO_H
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900698 select SAMSUNG_ATAGS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699 help
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900700 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
701 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
702 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
703 Samsung SMDK2410 development board (and derivatives).
Ben Dooks63b1f512010-04-30 16:32:26 +0900704
Ben Dooksa08ab632008-10-21 14:06:39 +0100705config ARCH_S3C64XX
706 bool "Samsung S3C64XX"
Ben Dooks89f0ce72010-01-26 15:49:15 +0900707 select ARCH_REQUIRE_GPIOLIB
Tomasz Figa1db02872013-10-16 21:10:54 +0200708 select ARM_AMBA
Russell Kingb1b3f492012-10-06 17:12:25 +0100709 select ARM_VIC
Arnd Bergmann335cce72014-03-13 14:11:16 +0100710 select ATAGS
Russell Kingb1b3f492012-10-06 17:12:25 +0100711 select CLKDEV_LOOKUP
Tomasz Figa42805062013-04-28 02:25:01 +0200712 select CLKSRC_SAMSUNG_PWM
Pankaj Dubeyccecba32014-05-08 13:07:09 +0900713 select COMMON_CLK_SAMSUNG
Tomasz Figa70bacad2013-10-21 06:56:51 +0900714 select CPU_V6K
Romain Naour04a49b72013-01-09 18:47:04 -0800715 select GENERIC_CLOCKEVENTS
Tomasz Figa880cf072013-06-19 01:22:20 +0900716 select GPIO_SAMSUNG
Kukjin Kim20676c12010-11-13 16:08:32 +0900717 select HAVE_S3C2410_I2C if I2C
Kyungmin Parkc39d8d52010-11-13 16:01:59 +0900718 select HAVE_S3C2410_WATCHDOG if WATCHDOG
Russell Kingb1b3f492012-10-06 17:12:25 +0100719 select HAVE_TCM
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700720 select NO_IOPORT_MAP
Russell Kingb1b3f492012-10-06 17:12:25 +0100721 select PLAT_SAMSUNG
Arnd Bergmann4ab75a32014-03-13 14:35:38 +0100722 select PM_GENERIC_DOMAINS if PM
Russell Kingb1b3f492012-10-06 17:12:25 +0100723 select S3C_DEV_NAND
724 select S3C_GPIO_TRACK
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900725 select SAMSUNG_ATAGS
Tomasz Figa6e2d9e92013-10-06 09:06:27 +0900726 select SAMSUNG_WAKEMASK
Tomasz Figa88f59732013-06-17 23:45:37 +0900727 select SAMSUNG_WDT_RESET
Ben Dooksa08ab632008-10-21 14:06:39 +0100728 help
729 Samsung S3C64XX series based systems
730
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100731config ARCH_DAVINCI
732 bool "TI DaVinci"
Russell Kingb1b3f492012-10-06 17:12:25 +0100733 select ARCH_HAS_HOLES_MEMORYMODEL
David Brownelldce11152008-09-07 23:41:04 -0700734 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100735 select CLKDEV_LOOKUP
David Brownell20e99692009-05-07 09:31:42 -0700736 select GENERIC_ALLOCATOR
Russell Kingb1b3f492012-10-06 17:12:25 +0100737 select GENERIC_CLOCKEVENTS
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100738 select GENERIC_IRQ_CHIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100739 select HAVE_IDE
Matt Porter3ad7a422013-03-06 11:15:31 -0500740 select TI_PRIV_EDMA
Sekhar Nori689e3312012-08-28 15:27:52 +0530741 select USE_OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100742 select ZONE_DMA
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100743 help
744 Support for TI's DaVinci platform.
745
Tony Lindgrena0694862013-01-11 11:24:20 -0800746config ARCH_OMAP1
747 bool "TI OMAP1"
Arnd Bergmann00a36692012-06-07 18:50:51 -0600748 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100749 select ARCH_HAS_HOLES_MEMORYMODEL
Tony Lindgrena0694862013-01-11 11:24:20 -0800750 select ARCH_OMAP
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100751 select ARCH_REQUIRE_GPIOLIB
Tony Priske9a91de2012-08-03 21:00:06 +1200752 select CLKDEV_LOOKUP
viresh kumarcee37e52010-04-01 12:31:05 +0100753 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100754 select GENERIC_CLOCKEVENTS
Tony Lindgrena0694862013-01-11 11:24:20 -0800755 select GENERIC_IRQ_CHIP
Tony Lindgrena0694862013-01-11 11:24:20 -0800756 select HAVE_IDE
757 select IRQ_DOMAIN
Tony Lindgrenb6943312015-05-20 09:01:21 -0700758 select MULTI_IRQ_HANDLER
Tony Lindgrena0694862013-01-11 11:24:20 -0800759 select NEED_MACH_IO_H if PCCARD
760 select NEED_MACH_MEMORY_H
Tony Lindgren685e2d02015-05-20 09:01:21 -0700761 select SPARSE_IRQ
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100762 help
Tony Lindgrena0694862013-01-11 11:24:20 -0800763 Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
Binghua Duan02c981c2011-07-08 17:40:12 +0800764
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765endchoice
766
Rob Herring387798b2012-09-06 13:41:12 -0500767menu "Multiple platform selection"
768 depends on ARCH_MULTIPLATFORM
769
770comment "CPU Core family selection"
771
Arnd Bergmannf8afae42014-03-25 22:19:00 +0100772config ARCH_MULTI_V4
773 bool "ARMv4 based platforms (FA526)"
774 depends on !ARCH_MULTI_V6_V7
775 select ARCH_MULTI_V4_V5
776 select CPU_FA526
777
Rob Herring387798b2012-09-06 13:41:12 -0500778config ARCH_MULTI_V4T
779 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500780 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100781 select ARCH_MULTI_V4_V5
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200782 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
783 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
784 CPU_ARM925T || CPU_ARM940T)
Rob Herring387798b2012-09-06 13:41:12 -0500785
786config ARCH_MULTI_V5
787 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500788 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100789 select ARCH_MULTI_V4_V5
Andrew Lunn12567bb2014-02-22 20:14:54 +0100790 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200791 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
792 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
Rob Herring387798b2012-09-06 13:41:12 -0500793
794config ARCH_MULTI_V4_V5
795 bool
796
797config ARCH_MULTI_V6
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800798 bool "ARMv6 based platforms (ARM11)"
Rob Herring387798b2012-09-06 13:41:12 -0500799 select ARCH_MULTI_V6_V7
Rob Herring42f47542014-01-31 14:26:04 -0600800 select CPU_V6K
Rob Herring387798b2012-09-06 13:41:12 -0500801
802config ARCH_MULTI_V7
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800803 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
Rob Herring387798b2012-09-06 13:41:12 -0500804 default y
805 select ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100806 select CPU_V7
Rob Herring90bc8ac72014-01-31 15:32:02 -0600807 select HAVE_SMP
Rob Herring387798b2012-09-06 13:41:12 -0500808
809config ARCH_MULTI_V6_V7
810 bool
Rob Herring9352b052014-01-31 15:36:10 -0600811 select MIGHT_HAVE_CACHE_L2X0
Rob Herring387798b2012-09-06 13:41:12 -0500812
813config ARCH_MULTI_CPU_AUTO
814 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
815 select ARCH_MULTI_V5
816
817endmenu
818
Rob Herring05e2a3d2013-12-05 10:04:54 -0600819config ARCH_VIRT
820 bool "Dummy Virtual Machine" if ARCH_MULTI_V7
Rob Herring4b8b5f22013-12-05 10:10:34 -0600821 select ARM_AMBA
Rob Herring05e2a3d2013-12-05 10:04:54 -0600822 select ARM_GIC
Jean-Philippe Brucker0b28f1d2015-10-01 13:47:18 +0100823 select ARM_GIC_V3
Rob Herring05e2a3d2013-12-05 10:04:54 -0600824 select ARM_PSCI
Rob Herring4b8b5f22013-12-05 10:10:34 -0600825 select HAVE_ARM_ARCH_TIMER
Rob Herring05e2a3d2013-12-05 10:04:54 -0600826
Russell Kingccf50e22010-03-15 19:03:06 +0000827#
828# This is sorted alphabetically by mach-* pathname. However, plat-*
829# Kconfigs may be included either alphabetically (according to the
830# plat- suffix) or along side the corresponding mach-* source.
831#
Gregory CLEMENT3e93a222012-06-04 18:38:56 +0200832source "arch/arm/mach-mvebu/Kconfig"
833
Tsahee Zidenberg445d9b32015-03-12 13:53:00 +0200834source "arch/arm/mach-alpine/Kconfig"
835
Oleksij Rempeld9bfc862014-11-24 12:08:27 +0100836source "arch/arm/mach-asm9260/Kconfig"
837
Russell King95b8f202010-01-14 11:43:54 +0000838source "arch/arm/mach-at91/Kconfig"
839
Anders Berg1d22924e2014-05-23 11:08:35 +0200840source "arch/arm/mach-axxia/Kconfig"
841
Christian Daudt8ac49e02012-11-19 09:46:10 -0800842source "arch/arm/mach-bcm/Kconfig"
843
Sebastian Hesselbarth1c37fa12013-09-09 14:36:19 +0200844source "arch/arm/mach-berlin/Kconfig"
845
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846source "arch/arm/mach-clps711x/Kconfig"
847
Anton Vorontsovd94f9442010-03-25 17:12:41 +0300848source "arch/arm/mach-cns3xxx/Kconfig"
849
Russell King95b8f202010-01-14 11:43:54 +0000850source "arch/arm/mach-davinci/Kconfig"
851
Baruch Siachdf8d7422015-01-14 10:40:30 +0200852source "arch/arm/mach-digicolor/Kconfig"
853
Russell King95b8f202010-01-14 11:43:54 +0000854source "arch/arm/mach-dove/Kconfig"
855
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000856source "arch/arm/mach-ep93xx/Kconfig"
857
Linus Torvalds1da177e2005-04-16 15:20:36 -0700858source "arch/arm/mach-footbridge/Kconfig"
859
Paulius Zaleckas59d3a192009-03-26 10:06:08 +0200860source "arch/arm/mach-gemini/Kconfig"
861
Rob Herring387798b2012-09-06 13:41:12 -0500862source "arch/arm/mach-highbank/Kconfig"
863
Haojian Zhuang389ee0c2013-12-20 10:52:56 +0800864source "arch/arm/mach-hisi/Kconfig"
865
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866source "arch/arm/mach-integrator/Kconfig"
867
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100868source "arch/arm/mach-iop32x/Kconfig"
869
870source "arch/arm/mach-iop33x/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700871
Dan Williams285f5fa2006-12-07 02:59:39 +0100872source "arch/arm/mach-iop13xx/Kconfig"
873
Linus Torvalds1da177e2005-04-16 15:20:36 -0700874source "arch/arm/mach-ixp4xx/Kconfig"
875
Santosh Shilimkar828989a2013-06-10 11:27:13 -0400876source "arch/arm/mach-keystone/Kconfig"
877
Russell King95b8f202010-01-14 11:43:54 +0000878source "arch/arm/mach-ks8695/Kconfig"
879
Carlo Caione3b8f5032014-09-10 22:16:59 +0200880source "arch/arm/mach-meson/Kconfig"
881
Jonas Jensen17723fd32013-12-18 13:58:45 +0100882source "arch/arm/mach-moxart/Kconfig"
883
Stanislav Samsonov794d15b2008-06-22 22:45:10 +0200884source "arch/arm/mach-mv78xx0/Kconfig"
885
Shawn Guo3995eb82012-09-13 19:48:07 +0800886source "arch/arm/mach-imx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700887
Matthias Bruggerf682a212014-05-13 01:06:13 +0200888source "arch/arm/mach-mediatek/Kconfig"
889
Shawn Guo1d3f33d2010-12-13 20:55:03 +0800890source "arch/arm/mach-mxs/Kconfig"
891
Russell King95b8f202010-01-14 11:43:54 +0000892source "arch/arm/mach-netx/Kconfig"
Eric Miao49cbe782009-01-20 14:15:18 +0800893
Russell King95b8f202010-01-14 11:43:54 +0000894source "arch/arm/mach-nomadik/Kconfig"
Russell King95b8f202010-01-14 11:43:54 +0000895
Daniel Tang9851ca52013-06-11 18:40:17 +1000896source "arch/arm/mach-nspire/Kconfig"
897
Tony Lindgrend48af152005-07-10 19:58:17 +0100898source "arch/arm/plat-omap/Kconfig"
899
900source "arch/arm/mach-omap1/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901
Tony Lindgren1dbae812005-11-10 14:26:51 +0000902source "arch/arm/mach-omap2/Kconfig"
903
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400904source "arch/arm/mach-orion5x/Kconfig"
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400905
Rob Herring387798b2012-09-06 13:41:12 -0500906source "arch/arm/mach-picoxcell/Kconfig"
907
Russell King95b8f202010-01-14 11:43:54 +0000908source "arch/arm/mach-pxa/Kconfig"
909source "arch/arm/plat-pxa/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910
Russell King95b8f202010-01-14 11:43:54 +0000911source "arch/arm/mach-mmp/Kconfig"
912
Kumar Gala8fc1b0f2014-01-21 17:14:10 -0600913source "arch/arm/mach-qcom/Kconfig"
914
Russell King95b8f202010-01-14 11:43:54 +0000915source "arch/arm/mach-realview/Kconfig"
916
Heiko Stuebnerd63dc0512013-06-02 23:09:41 +0200917source "arch/arm/mach-rockchip/Kconfig"
918
Russell King95b8f202010-01-14 11:43:54 +0000919source "arch/arm/mach-sa1100/Kconfig"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300920
Rob Herring387798b2012-09-06 13:41:12 -0500921source "arch/arm/mach-socfpga/Kconfig"
922
Arnd Bergmanna7ed0992012-12-02 15:12:47 +0100923source "arch/arm/mach-spear/Kconfig"
Ben Dooksa21765a2007-02-11 18:31:01 +0100924
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +0100925source "arch/arm/mach-sti/Kconfig"
926
Kukjin Kim85fd6d62012-02-06 09:38:19 +0900927source "arch/arm/mach-s3c24xx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700928
Ben Dooks431107e2010-01-26 10:11:04 +0900929source "arch/arm/mach-s3c64xx/Kconfig"
Ben Dooksa08ab632008-10-21 14:06:39 +0100930
Kukjin Kim170f4e42010-02-24 16:40:44 +0900931source "arch/arm/mach-s5pv210/Kconfig"
932
Kukjin Kim83014572011-11-06 13:54:56 +0900933source "arch/arm/mach-exynos/Kconfig"
Rob Herringe509b282014-06-10 09:06:09 -0500934source "arch/arm/plat-samsung/Kconfig"
Changhwan Youncc0e72b2010-07-16 12:15:38 +0900935
Russell King882d01f2010-03-02 23:40:15 +0000936source "arch/arm/mach-shmobile/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937
Maxime Ripard3b526342012-11-08 12:40:16 +0100938source "arch/arm/mach-sunxi/Kconfig"
939
Barry Song156a0992012-08-23 13:41:58 +0800940source "arch/arm/mach-prima2/Kconfig"
941
Erik Gillingc5f80062010-01-21 16:53:02 -0800942source "arch/arm/mach-tegra/Kconfig"
943
Russell King95b8f202010-01-14 11:43:54 +0000944source "arch/arm/mach-u300/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945
Masahiro Yamadaba56a982015-05-08 13:07:11 +0900946source "arch/arm/mach-uniphier/Kconfig"
947
Russell King95b8f202010-01-14 11:43:54 +0000948source "arch/arm/mach-ux500/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949
950source "arch/arm/mach-versatile/Kconfig"
951
Russell Kingceade892010-02-11 21:44:53 +0000952source "arch/arm/mach-vexpress/Kconfig"
Russell King420c34e2011-01-18 20:08:06 +0000953source "arch/arm/plat-versatile/Kconfig"
Russell Kingceade892010-02-11 21:44:53 +0000954
Tony Prisk6f35f9a2012-10-11 20:13:09 +1300955source "arch/arm/mach-vt8500/Kconfig"
956
wanzongshun7ec80dd2008-12-03 03:55:38 +0100957source "arch/arm/mach-w90x900/Kconfig"
958
Jun Nieacede512015-04-28 17:18:05 +0800959source "arch/arm/mach-zx/Kconfig"
960
Josh Cartwright9a45eb62012-11-19 11:38:29 -0600961source "arch/arm/mach-zynq/Kconfig"
962
Stefan Agner499f1642015-05-21 00:35:44 +0200963# ARMv7-M architecture
964config ARCH_EFM32
965 bool "Energy Micro efm32"
966 depends on ARM_SINGLE_ARMV7M
967 select ARCH_REQUIRE_GPIOLIB
968 help
969 Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
970 processors.
971
972config ARCH_LPC18XX
973 bool "NXP LPC18xx/LPC43xx"
974 depends on ARM_SINGLE_ARMV7M
975 select ARCH_HAS_RESET_CONTROLLER
976 select ARM_AMBA
977 select CLKSRC_LPC32XX
978 select PINCTRL
979 help
980 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
981 high performance microcontrollers.
982
983config ARCH_STM32
984 bool "STMicrolectronics STM32"
985 depends on ARM_SINGLE_ARMV7M
986 select ARCH_HAS_RESET_CONTROLLER
987 select ARMV7M_SYSTICK
Maxime Coquelin25263182015-05-22 23:50:52 +0200988 select CLKSRC_STM32
Stefan Agner499f1642015-05-21 00:35:44 +0200989 select RESET_CONTROLLER
990 help
991 Support for STMicroelectronics STM32 processors.
992
Linus Torvalds1da177e2005-04-16 15:20:36 -0700993# Definitions to make life easier
994config ARCH_ACORN
995 bool
996
Lennert Buytenhek7ae1f7ec2006-09-18 23:12:53 +0100997config PLAT_IOP
998 bool
Mikael Pettersson469d30442009-10-29 11:46:54 -0700999 select GENERIC_CLOCKEVENTS
Lennert Buytenhek7ae1f7ec2006-09-18 23:12:53 +01001000
Lennert Buytenhek69b02f62008-03-27 14:51:39 -04001001config PLAT_ORION
1002 bool
Russell Kingbfe45e02011-05-08 15:33:30 +01001003 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +01001004 select COMMON_CLK
Russell Kingdc7ad3b2011-05-22 10:01:21 +01001005 select GENERIC_IRQ_CHIP
Andrew Lunn278b45b2012-06-27 13:40:04 +02001006 select IRQ_DOMAIN
Lennert Buytenhek69b02f62008-03-27 14:51:39 -04001007
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +02001008config PLAT_ORION_LEGACY
1009 bool
1010 select PLAT_ORION
1011
Eric Miaobd5ce432009-01-20 12:06:01 +08001012config PLAT_PXA
1013 bool
1014
Russell Kingf4b8b312010-01-14 12:48:06 +00001015config PLAT_VERSATILE
1016 bool
1017
Alexandre Courbotd9a1bea2013-11-24 15:30:46 +09001018source "arch/arm/firmware/Kconfig"
1019
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020source arch/arm/mm/Kconfig
1021
Lennert Buytenhekafe4b252006-12-03 18:51:14 +01001022config IWMMXT
Sebastian Hesselbarthd93003e2014-04-24 22:58:30 +01001023 bool "Enable iWMMXt support"
1024 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1025 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
Lennert Buytenhekafe4b252006-12-03 18:51:14 +01001026 help
1027 Enable support for iWMMXt context switching at run time if
1028 running on a CPU that supports it.
1029
eric miao52108642010-12-13 09:42:34 +01001030config MULTI_IRQ_HANDLER
1031 bool
1032 help
1033 Allow each machine to specify it's own IRQ handler at run time.
1034
Hyok S. Choi3b93e7b2006-06-22 11:48:56 +01001035if !MMU
1036source "arch/arm/Kconfig-nommu"
1037endif
1038
Gregory CLEMENT3e0a07f2013-06-23 10:17:11 +01001039config PJ4B_ERRATA_4742
1040 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1041 depends on CPU_PJ4B && MACH_ARMADA_370
1042 default y
1043 help
1044 When coming out of either a Wait for Interrupt (WFI) or a Wait for
1045 Event (WFE) IDLE states, a specific timing sensitivity exists between
1046 the retiring WFI/WFE instructions and the newly issued subsequent
1047 instructions. This sensitivity can result in a CPU hang scenario.
1048 Workaround:
1049 The software must insert either a Data Synchronization Barrier (DSB)
1050 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1051 instruction
1052
Will Deaconf0c4b8d2012-04-20 17:20:08 +01001053config ARM_ERRATA_326103
1054 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1055 depends on CPU_V6
1056 help
1057 Executing a SWP instruction to read-only memory does not set bit 11
1058 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1059 treat the access as a read, preventing a COW from occurring and
1060 causing the faulting task to livelock.
1061
Catalin Marinas9cba3cc2009-04-30 17:06:03 +01001062config ARM_ERRATA_411920
1063 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
Russell Kinge399b1a2011-01-17 15:08:32 +00001064 depends on CPU_V6 || CPU_V6K
Catalin Marinas9cba3cc2009-04-30 17:06:03 +01001065 help
1066 Invalidation of the Instruction Cache operation can
1067 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1068 It does not affect the MPCore. This option enables the ARM Ltd.
1069 recommended workaround.
1070
Catalin Marinas7ce236fc2009-04-30 17:06:09 +01001071config ARM_ERRATA_430973
1072 bool "ARM errata: Stale prediction on replaced interworking branch"
1073 depends on CPU_V7
1074 help
1075 This option enables the workaround for the 430973 Cortex-A8
Russell King79403cd2015-04-13 16:14:37 +01001076 r1p* erratum. If a code sequence containing an ARM/Thumb
Catalin Marinas7ce236fc2009-04-30 17:06:09 +01001077 interworking branch is replaced with another code sequence at the
1078 same virtual address, whether due to self-modifying code or virtual
1079 to physical address re-mapping, Cortex-A8 does not recover from the
1080 stale interworking branch prediction. This results in Cortex-A8
1081 executing the new code sequence in the incorrect ARM or Thumb state.
1082 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1083 and also flushes the branch target cache at every context switch.
1084 Note that setting specific bits in the ACTLR register may not be
1085 available in non-secure mode.
1086
Catalin Marinas855c5512009-04-30 17:06:15 +01001087config ARM_ERRATA_458693
1088 bool "ARM errata: Processor deadlock when a false hazard is created"
1089 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001090 depends on !ARCH_MULTIPLATFORM
Catalin Marinas855c5512009-04-30 17:06:15 +01001091 help
1092 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1093 erratum. For very specific sequences of memory operations, it is
1094 possible for a hazard condition intended for a cache line to instead
1095 be incorrectly associated with a different cache line. This false
1096 hazard might then cause a processor deadlock. The workaround enables
1097 the L1 caching of the NEON accesses and disables the PLD instruction
1098 in the ACTLR register. Note that setting specific bits in the ACTLR
1099 register may not be available in non-secure mode.
1100
Catalin Marinas0516e462009-04-30 17:06:20 +01001101config ARM_ERRATA_460075
1102 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1103 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001104 depends on !ARCH_MULTIPLATFORM
Catalin Marinas0516e462009-04-30 17:06:20 +01001105 help
1106 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1107 erratum. Any asynchronous access to the L2 cache may encounter a
1108 situation in which recent store transactions to the L2 cache are lost
1109 and overwritten with stale memory contents from external memory. The
1110 workaround disables the write-allocate mode for the L2 cache via the
1111 ACTLR register. Note that setting specific bits in the ACTLR register
1112 may not be available in non-secure mode.
1113
Will Deacon9f050272010-09-14 09:51:43 +01001114config ARM_ERRATA_742230
1115 bool "ARM errata: DMB operation may be faulty"
1116 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001117 depends on !ARCH_MULTIPLATFORM
Will Deacon9f050272010-09-14 09:51:43 +01001118 help
1119 This option enables the workaround for the 742230 Cortex-A9
1120 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1121 between two write operations may not ensure the correct visibility
1122 ordering of the two writes. This workaround sets a specific bit in
1123 the diagnostic register of the Cortex-A9 which causes the DMB
1124 instruction to behave as a DSB, ensuring the correct behaviour of
1125 the two writes.
1126
Will Deacona672e992010-09-14 09:53:02 +01001127config ARM_ERRATA_742231
1128 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1129 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001130 depends on !ARCH_MULTIPLATFORM
Will Deacona672e992010-09-14 09:53:02 +01001131 help
1132 This option enables the workaround for the 742231 Cortex-A9
1133 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1134 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1135 accessing some data located in the same cache line, may get corrupted
1136 data due to bad handling of the address hazard when the line gets
1137 replaced from one of the CPUs at the same time as another CPU is
1138 accessing it. This workaround sets specific bits in the diagnostic
1139 register of the Cortex-A9 which reduces the linefill issuing
1140 capabilities of the processor.
1141
Jon Medhurst69155792013-06-07 10:35:35 +01001142config ARM_ERRATA_643719
1143 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1144 depends on CPU_V7 && SMP
Russell Kinge5a5de42015-04-02 23:58:55 +01001145 default y
Jon Medhurst69155792013-06-07 10:35:35 +01001146 help
1147 This option enables the workaround for the 643719 Cortex-A9 (prior to
1148 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1149 register returns zero when it should return one. The workaround
1150 corrects this value, ensuring cache maintenance operations which use
1151 it behave as intended and avoiding data corruption.
1152
Will Deaconcdf357f2010-08-05 11:20:51 +01001153config ARM_ERRATA_720789
1154 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
Dave Martine66dc742011-12-08 13:37:46 +01001155 depends on CPU_V7
Will Deaconcdf357f2010-08-05 11:20:51 +01001156 help
1157 This option enables the workaround for the 720789 Cortex-A9 (prior to
1158 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1159 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1160 As a consequence of this erratum, some TLB entries which should be
1161 invalidated are not, resulting in an incoherency in the system page
1162 tables. The workaround changes the TLB flushing routines to invalidate
1163 entries regardless of the ASID.
Will Deacon475d92f2010-09-28 14:02:02 +01001164
1165config ARM_ERRATA_743622
1166 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1167 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001168 depends on !ARCH_MULTIPLATFORM
Will Deacon475d92f2010-09-28 14:02:02 +01001169 help
1170 This option enables the workaround for the 743622 Cortex-A9
Will Deaconefbc74a2012-02-24 12:12:38 +01001171 (r2p*) erratum. Under very rare conditions, a faulty
Will Deacon475d92f2010-09-28 14:02:02 +01001172 optimisation in the Cortex-A9 Store Buffer may lead to data
1173 corruption. This workaround sets a specific bit in the diagnostic
1174 register of the Cortex-A9 which disables the Store Buffer
1175 optimisation, preventing the defect from occurring. This has no
1176 visible impact on the overall performance or power consumption of the
1177 processor.
1178
Will Deacon9a27c272011-02-18 16:36:35 +01001179config ARM_ERRATA_751472
1180 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
Dave Martinba90c512011-12-08 13:41:06 +01001181 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001182 depends on !ARCH_MULTIPLATFORM
Will Deacon9a27c272011-02-18 16:36:35 +01001183 help
1184 This option enables the workaround for the 751472 Cortex-A9 (prior
1185 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1186 completion of a following broadcasted operation if the second
1187 operation is received by a CPU before the ICIALLUIS has completed,
1188 potentially leading to corrupted entries in the cache or TLB.
1189
Will Deaconfcbdc5fe2011-02-28 18:15:16 +01001190config ARM_ERRATA_754322
1191 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1192 depends on CPU_V7
1193 help
1194 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1195 r3p*) erratum. A speculative memory access may cause a page table walk
1196 which starts prior to an ASID switch but completes afterwards. This
1197 can populate the micro-TLB with a stale entry which may be hit with
1198 the new ASID. This workaround places two dsb instructions in the mm
1199 switching code so that no page table walks can cross the ASID switch.
1200
Will Deacon5dab26a2011-03-04 12:38:54 +01001201config ARM_ERRATA_754327
1202 bool "ARM errata: no automatic Store Buffer drain"
1203 depends on CPU_V7 && SMP
1204 help
1205 This option enables the workaround for the 754327 Cortex-A9 (prior to
1206 r2p0) erratum. The Store Buffer does not have any automatic draining
1207 mechanism and therefore a livelock may occur if an external agent
1208 continuously polls a memory location waiting to observe an update.
1209 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1210 written polling loops from denying visibility of updates to memory.
1211
Catalin Marinas145e10e2011-08-15 11:04:41 +01001212config ARM_ERRATA_364296
1213 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
Fabio Estevamfd832472013-07-09 18:34:01 +01001214 depends on CPU_V6
Catalin Marinas145e10e2011-08-15 11:04:41 +01001215 help
1216 This options enables the workaround for the 364296 ARM1136
1217 r0p2 erratum (possible cache data corruption with
1218 hit-under-miss enabled). It sets the undocumented bit 31 in
1219 the auxiliary control register and the FI bit in the control
1220 register, thus disabling hit-under-miss without putting the
1221 processor into full low interrupt latency mode. ARM11MPCore
1222 is not affected.
1223
Will Deaconf630c1b2011-09-15 11:45:15 +01001224config ARM_ERRATA_764369
1225 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1226 depends on CPU_V7 && SMP
1227 help
1228 This option enables the workaround for erratum 764369
1229 affecting Cortex-A9 MPCore with two or more processors (all
1230 current revisions). Under certain timing circumstances, a data
1231 cache line maintenance operation by MVA targeting an Inner
1232 Shareable memory region may fail to proceed up to either the
1233 Point of Coherency or to the Point of Unification of the
1234 system. This workaround adds a DSB instruction before the
1235 relevant cache maintenance functions and sets a specific bit
1236 in the diagnostic control register of the SCU.
1237
Simon Horman7253b852012-09-28 02:12:45 +01001238config ARM_ERRATA_775420
1239 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1240 depends on CPU_V7
1241 help
1242 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1243 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1244 operation aborts with MMU exception, it might cause the processor
1245 to deadlock. This workaround puts DSB before executing ISB if
1246 an abort may occur on cache maintenance.
1247
Catalin Marinas93dc6882013-03-26 23:35:04 +01001248config ARM_ERRATA_798181
1249 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1250 depends on CPU_V7 && SMP
1251 help
1252 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1253 adequately shooting down all use of the old entries. This
1254 option enables the Linux kernel workaround for this erratum
1255 which sends an IPI to the CPUs that are running the same ASID
1256 as the one being invalidated.
1257
Will Deacon84b65042013-08-20 17:29:55 +01001258config ARM_ERRATA_773022
1259 bool "ARM errata: incorrect instructions may be executed from loop buffer"
1260 depends on CPU_V7
1261 help
1262 This option enables the workaround for the 773022 Cortex-A15
1263 (up to r0p4) erratum. In certain rare sequences of code, the
1264 loop buffer may deliver incorrect instructions. This
1265 workaround disables the loop buffer to avoid the erratum.
1266
Linus Torvalds1da177e2005-04-16 15:20:36 -07001267endmenu
1268
1269source "arch/arm/common/Kconfig"
1270
Linus Torvalds1da177e2005-04-16 15:20:36 -07001271menu "Bus support"
1272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001273config ISA
1274 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001275 help
1276 Find out whether you have ISA slots on your motherboard. ISA is the
1277 name of a bus system, i.e. the way the CPU talks to the other stuff
1278 inside your box. Other bus systems are PCI, EISA, MicroChannel
1279 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1280 newer boards don't support it. If you have ISA, say Y, otherwise N.
1281
Russell King065909b2006-01-04 15:44:16 +00001282# Select ISA DMA controller support
Linus Torvalds1da177e2005-04-16 15:20:36 -07001283config ISA_DMA
1284 bool
Russell King065909b2006-01-04 15:44:16 +00001285 select ISA_DMA_API
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286
Russell King065909b2006-01-04 15:44:16 +00001287# Select ISA DMA interface
Al Viro5cae841b2005-05-04 05:39:22 +01001288config ISA_DMA_API
1289 bool
Al Viro5cae841b2005-05-04 05:39:22 +01001290
Linus Torvalds1da177e2005-04-16 15:20:36 -07001291config PCI
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +01001292 bool "PCI support" if MIGHT_HAVE_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07001293 help
1294 Find out whether you have a PCI motherboard. PCI is the name of a
1295 bus system, i.e. the way the CPU talks to the other stuff inside
1296 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1297 VESA. If you have PCI, say Y, otherwise N.
1298
Anton Vorontsov52882172010-04-19 13:20:49 +01001299config PCI_DOMAINS
1300 bool
1301 depends on PCI
1302
Lorenzo Pieralisi8c7d14742014-11-21 11:29:26 +00001303config PCI_DOMAINS_GENERIC
1304 def_bool PCI_DOMAINS
1305
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +01001306config PCI_NANOENGINE
1307 bool "BSE nanoEngine PCI support"
1308 depends on SA1100_NANOENGINE
1309 help
1310 Enable PCI on the BSE nanoEngine board.
1311
Matthew Wilcox36e23592007-07-10 10:54:40 -06001312config PCI_SYSCALL
1313 def_bool PCI
1314
Mike Rapoporta0113a92007-11-25 08:55:34 +01001315config PCI_HOST_ITE8152
1316 bool
1317 depends on PCI && MACH_ARMCORE
1318 default y
1319 select DMABOUNCE
1320
Linus Torvalds1da177e2005-04-16 15:20:36 -07001321source "drivers/pci/Kconfig"
Jingoo Han3f06d152013-06-21 16:25:29 +09001322source "drivers/pci/pcie/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001323
1324source "drivers/pcmcia/Kconfig"
1325
1326endmenu
1327
1328menu "Kernel Features"
1329
Dave Martin3b556582011-12-07 15:38:04 +00001330config HAVE_SMP
1331 bool
1332 help
1333 This option should be selected by machines which have an SMP-
1334 capable CPU.
1335
1336 The only effect of this option is to make the SMP-related
1337 options available to the user for configuration.
1338
Linus Torvalds1da177e2005-04-16 15:20:36 -07001339config SMP
Russell Kingbb2d8132011-05-12 09:52:02 +01001340 bool "Symmetric Multi-Processing"
Russell Kingfbb4dda2011-01-17 18:01:58 +00001341 depends on CPU_V6K || CPU_V7
Russell Kingbc282482009-05-17 18:58:34 +01001342 depends on GENERIC_CLOCKEVENTS
Dave Martin3b556582011-12-07 15:38:04 +00001343 depends on HAVE_SMP
Jonathan Austin801bb212013-02-22 18:56:04 +00001344 depends on MMU || ARM_MPU
Arnd Bergmann03617482015-05-26 15:36:58 +01001345 select IRQ_WORK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001346 help
1347 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08001348 a system with only one CPU, say N. If you have a system with more
1349 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001350
Robert Graffham4a474152014-01-23 15:55:29 -08001351 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07001352 machines, but will use only one CPU of a multiprocessor machine. If
Robert Graffham4a474152014-01-23 15:55:29 -08001353 you say Y here, the kernel will run on many, but not all,
1354 uniprocessor machines. On a uniprocessor machine, the kernel
1355 will run faster if you say N here.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001356
Paul Bolle395cf962011-08-15 02:02:26 +02001357 See also <file:Documentation/x86/i386/IO-APIC.txt>,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001358 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
Justin P. Mattock50a23e62010-10-16 10:36:23 -07001359 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001360
1361 If you don't know what to do here, say N.
1362
Russell Kingf00ec482010-09-04 10:47:48 +01001363config SMP_ON_UP
Russell King5744ff42015-02-13 11:04:21 +00001364 bool "Allow booting SMP kernel on uniprocessor systems"
Jonathan Austin801bb212013-02-22 18:56:04 +00001365 depends on SMP && !XIP_KERNEL && MMU
Russell Kingf00ec482010-09-04 10:47:48 +01001366 default y
1367 help
1368 SMP kernels contain instructions which fail on non-SMP processors.
1369 Enabling this option allows the kernel to modify itself to make
1370 these instructions safe. Disabling it allows about 1K of space
1371 savings.
1372
1373 If you don't know what to do here, say Y.
1374
Vincent Guittotc9018aa2011-08-08 13:21:59 +01001375config ARM_CPU_TOPOLOGY
1376 bool "Support cpu topology definition"
1377 depends on SMP && CPU_V7
1378 default y
1379 help
1380 Support ARM cpu topology definition. The MPIDR register defines
1381 affinity between processors which is then used to describe the cpu
1382 topology of an ARM System.
1383
1384config SCHED_MC
1385 bool "Multi-core scheduler support"
1386 depends on ARM_CPU_TOPOLOGY
1387 help
1388 Multi-core scheduler support improves the CPU scheduler's decision
1389 making when dealing with multi-core CPU chips at a cost of slightly
1390 increased overhead in some places. If unsure say N here.
1391
1392config SCHED_SMT
1393 bool "SMT scheduler support"
1394 depends on ARM_CPU_TOPOLOGY
1395 help
1396 Improves the CPU scheduler's decision making when dealing with
1397 MultiThreading at a cost of slightly increased overhead in some
1398 places. If unsure say N here.
1399
Russell Kinga8cbcd92009-05-16 11:51:14 +01001400config HAVE_ARM_SCU
1401 bool
Russell Kinga8cbcd92009-05-16 11:51:14 +01001402 help
1403 This option enables support for the ARM system coherency unit
1404
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001405config HAVE_ARM_ARCH_TIMER
Marc Zyngier022c03a2012-01-11 17:25:17 +00001406 bool "Architected timer support"
1407 depends on CPU_V7
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001408 select ARM_ARCH_TIMER
Will Deacon0c4034622013-11-19 15:46:17 +01001409 select GENERIC_CLOCKEVENTS
Marc Zyngier022c03a2012-01-11 17:25:17 +00001410 help
1411 This option enables support for the ARM architected timer
1412
Russell Kingf32f4ce2009-05-16 12:14:21 +01001413config HAVE_ARM_TWD
1414 bool
Rob Herringda4a6862013-02-06 21:17:47 -06001415 select CLKSRC_OF if OF
Russell Kingf32f4ce2009-05-16 12:14:21 +01001416 help
1417 This options enables support for the ARM timer and watchdog unit
1418
Nicolas Pitree8db2882012-04-12 02:45:22 -04001419config MCPM
1420 bool "Multi-Cluster Power Management"
1421 depends on CPU_V7 && SMP
1422 help
1423 This option provides the common power management infrastructure
1424 for (multi-)cluster based systems, such as big.LITTLE based
1425 systems.
1426
Haojian Zhuangebf4a5c2014-04-15 14:52:00 +08001427config MCPM_QUAD_CLUSTER
1428 bool
1429 depends on MCPM
1430 help
1431 To avoid wasting resources unnecessarily, MCPM only supports up
1432 to 2 clusters by default.
1433 Platforms with 3 or 4 clusters that use MCPM must select this
1434 option to allow the additional clusters to be managed.
1435
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001436config BIG_LITTLE
1437 bool "big.LITTLE support (Experimental)"
1438 depends on CPU_V7 && SMP
1439 select MCPM
1440 help
1441 This option enables support selections for the big.LITTLE
1442 system architecture.
1443
1444config BL_SWITCHER
1445 bool "big.LITTLE switcher support"
1446 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001447 select ARM_CPU_SUSPEND
Russell King51aaf812014-04-22 22:26:27 +01001448 select CPU_PM
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001449 help
1450 The big.LITTLE "switcher" provides the core functionality to
1451 transparently handle transition between a cluster of A15's
1452 and a cluster of A7's in a big.LITTLE system.
1453
Nicolas Pitreb22537c2012-04-12 03:04:28 -04001454config BL_SWITCHER_DUMMY_IF
1455 tristate "Simple big.LITTLE switcher user interface"
1456 depends on BL_SWITCHER && DEBUG_KERNEL
1457 help
1458 This is a simple and dummy char dev interface to control
1459 the big.LITTLE switcher core code. It is meant for
1460 debugging purposes only.
1461
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001462choice
1463 prompt "Memory split"
Russell King006fa252014-02-26 19:40:46 +00001464 depends on MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001465 default VMSPLIT_3G
1466 help
1467 Select the desired split between kernel and user memory.
1468
1469 If you are not absolutely sure what you are doing, leave this
1470 option alone!
1471
1472 config VMSPLIT_3G
1473 bool "3G/1G user/kernel split"
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001474 config VMSPLIT_3G_OPT
1475 bool "3G/1G user/kernel split (for full 1G low memory)"
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001476 config VMSPLIT_2G
1477 bool "2G/2G user/kernel split"
1478 config VMSPLIT_1G
1479 bool "1G/3G user/kernel split"
1480endchoice
1481
1482config PAGE_OFFSET
1483 hex
Russell King006fa252014-02-26 19:40:46 +00001484 default PHYS_OFFSET if !MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001485 default 0x40000000 if VMSPLIT_1G
1486 default 0x80000000 if VMSPLIT_2G
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001487 default 0xB0000000 if VMSPLIT_3G_OPT
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001488 default 0xC0000000
1489
Linus Torvalds1da177e2005-04-16 15:20:36 -07001490config NR_CPUS
1491 int "Maximum number of CPUs (2-32)"
1492 range 2 32
1493 depends on SMP
1494 default "4"
1495
Russell Kinga054a812005-11-02 22:24:33 +00001496config HOTPLUG_CPU
Russell King00b7ded2012-10-22 22:54:30 +01001497 bool "Support for hot-pluggable CPUs"
Stephen Rothwell40b31362013-05-21 13:49:35 +10001498 depends on SMP
Russell Kinga054a812005-11-02 22:24:33 +00001499 help
1500 Say Y here to experiment with turning CPUs off and on. CPUs
1501 can be controlled through /sys/devices/system/cpu.
1502
Will Deacon2bdd4242012-12-12 19:20:52 +00001503config ARM_PSCI
1504 bool "Support for the ARM Power State Coordination Interface (PSCI)"
1505 depends on CPU_V7
Mark Rutlandbe120392015-07-31 15:46:19 +01001506 select ARM_PSCI_FW
Will Deacon2bdd4242012-12-12 19:20:52 +00001507 help
1508 Say Y here if you want Linux to communicate with system firmware
1509 implementing the PSCI specification for CPU-centric power
1510 management operations described in ARM document number ARM DEN
1511 0022A ("Power State Coordination Interface System Software on
1512 ARM processors").
1513
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001514# The GPIO number here must be sorted by descending number. In case of
1515# a multiplatform kernel, we just want the highest value required by the
1516# selected platforms.
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001517config ARCH_NR_GPIO
1518 int
Gregory Fongb35d2e52015-05-28 19:14:10 -07001519 default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
1520 ARCH_ZYNQ
Tomasz Figaaa425872014-07-03 13:17:12 +02001521 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1522 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
Boris BREZILLONeb171a92014-04-10 15:52:46 +02001523 default 416 if ARCH_SUNXI
Olof Johansson06b851e2013-04-02 18:33:58 -07001524 default 392 if ARCH_U8500
Tony Prisk01bb9142013-03-09 18:22:30 +13001525 default 352 if ARCH_VT8500
Heiko Stuebner7b5da4c2014-05-26 00:13:51 +02001526 default 288 if ARCH_ROCKCHIP
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001527 default 264 if MACH_H4700
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001528 default 0
1529 help
1530 Maximum number of GPIOs in the system.
1531
1532 If unsure, leave the default value.
1533
Uwe Kleine-Königd45a3982009-08-13 20:38:17 +02001534source kernel/Kconfig.preempt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001535
Russell Kingc9218b12013-04-27 23:31:10 +01001536config HZ_FIXED
Russell Kingf8065812006-03-02 22:41:59 +00001537 int
Kukjin Kim070b8b42014-07-02 07:50:15 +09001538 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
Kukjin Kima73ddc62011-05-11 16:27:51 +09001539 ARCH_S5PV210 || ARCH_EXYNOS4
Alexandre Belloni1164f672015-03-13 22:57:24 +01001540 default 128 if SOC_AT91RM9200
Laurent Pinchartbf98c1e2013-11-09 13:33:48 +01001541 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
Russell King47d84682013-09-10 23:47:55 +01001542 default 0
Russell Kingc9218b12013-04-27 23:31:10 +01001543
1544choice
Russell King47d84682013-09-10 23:47:55 +01001545 depends on HZ_FIXED = 0
Russell Kingc9218b12013-04-27 23:31:10 +01001546 prompt "Timer frequency"
1547
1548config HZ_100
1549 bool "100 Hz"
1550
1551config HZ_200
1552 bool "200 Hz"
1553
1554config HZ_250
1555 bool "250 Hz"
1556
1557config HZ_300
1558 bool "300 Hz"
1559
1560config HZ_500
1561 bool "500 Hz"
1562
1563config HZ_1000
1564 bool "1000 Hz"
1565
1566endchoice
1567
1568config HZ
1569 int
Russell King47d84682013-09-10 23:47:55 +01001570 default HZ_FIXED if HZ_FIXED != 0
Russell Kingc9218b12013-04-27 23:31:10 +01001571 default 100 if HZ_100
1572 default 200 if HZ_200
1573 default 250 if HZ_250
1574 default 300 if HZ_300
1575 default 500 if HZ_500
1576 default 1000
1577
1578config SCHED_HRTICK
1579 def_bool HIGH_RES_TIMERS
Russell Kingf8065812006-03-02 22:41:59 +00001580
Catalin Marinas16c79652009-07-24 12:33:02 +01001581config THUMB2_KERNEL
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001582 bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
Uwe Kleine-König4477ca42013-03-21 21:02:37 +01001583 depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001584 default y if CPU_THUMBONLY
Catalin Marinas16c79652009-07-24 12:33:02 +01001585 select AEABI
1586 select ARM_ASM_UNIFIED
Arnd Bergmann89bace62011-06-10 14:12:21 +00001587 select ARM_UNWIND
Catalin Marinas16c79652009-07-24 12:33:02 +01001588 help
1589 By enabling this option, the kernel will be compiled in
1590 Thumb-2 mode. A compiler/assembler that understand the unified
1591 ARM-Thumb syntax is needed.
1592
1593 If unsure, say N.
1594
Dave Martin6f685c52011-03-03 11:41:12 +01001595config THUMB2_AVOID_R_ARM_THM_JUMP11
1596 bool "Work around buggy Thumb-2 short branch relocations in gas"
1597 depends on THUMB2_KERNEL && MODULES
1598 default y
1599 help
1600 Various binutils versions can resolve Thumb-2 branches to
1601 locally-defined, preemptible global symbols as short-range "b.n"
1602 branch instructions.
1603
1604 This is a problem, because there's no guarantee the final
1605 destination of the symbol, or any candidate locations for a
1606 trampoline, are within range of the branch. For this reason, the
1607 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1608 relocation in modules at all, and it makes little sense to add
1609 support.
1610
1611 The symptom is that the kernel fails with an "unsupported
1612 relocation" error when loading some modules.
1613
1614 Until fixed tools are available, passing
1615 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1616 code which hits this problem, at the cost of a bit of extra runtime
1617 stack usage in some cases.
1618
1619 The problem is described in more detail at:
1620 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1621
1622 Only Thumb-2 kernels are affected.
1623
1624 Unless you are sure your tools don't have this problem, say Y.
1625
Catalin Marinas0becb082009-07-24 12:32:53 +01001626config ARM_ASM_UNIFIED
1627 bool
1628
Nicolas Pitre704bdda2006-01-14 16:33:50 +00001629config AEABI
1630 bool "Use the ARM EABI to compile the kernel"
1631 help
1632 This option allows for the kernel to be compiled using the latest
1633 ARM ABI (aka EABI). This is only useful if you are using a user
1634 space environment that is also compiled with EABI.
1635
1636 Since there are major incompatibilities between the legacy ABI and
1637 EABI, especially with regard to structure member alignment, this
1638 option also changes the kernel syscall calling convention to
1639 disambiguate both ABIs and allow for backward compatibility support
1640 (selected with CONFIG_OABI_COMPAT).
1641
1642 To use this you need GCC version 4.0.0 or later.
1643
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001644config OABI_COMPAT
Russell Kinga73a3ff2006-02-08 21:09:55 +00001645 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08001646 depends on AEABI && !THUMB2_KERNEL
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001647 help
1648 This option preserves the old syscall interface along with the
1649 new (ARM EABI) one. It also provides a compatibility layer to
1650 intercept syscalls that have structure arguments which layout
1651 in memory differs between the legacy ABI and the new ARM EABI
1652 (only for non "thumb" binaries). This option adds a tiny
1653 overhead to all syscalls and produces a slightly larger kernel.
Kees Cook91702172013-11-09 00:51:56 +01001654
1655 The seccomp filter system will not be available when this is
1656 selected, since there is no way yet to sensibly distinguish
1657 between calling conventions during filtering.
1658
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001659 If you know you'll be using only pure EABI user space then you
1660 can say N here. If this option is not selected and you attempt
1661 to execute a legacy ABI binary then the result will be
1662 UNPREDICTABLE (in fact it can be predicted that it won't work
Kees Cookb02f8462013-11-09 00:31:11 +01001663 at all). If in doubt say N.
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001664
Mel Gormaneb335752009-05-13 17:34:48 +01001665config ARCH_HAS_HOLES_MEMORYMODEL
Mel Gormane80d6a22008-08-14 11:10:14 +01001666 bool
Mel Gormane80d6a22008-08-14 11:10:14 +01001667
Russell King05944d72006-11-30 20:43:51 +00001668config ARCH_SPARSEMEM_ENABLE
1669 bool
1670
Russell King07a2f732008-10-01 21:39:58 +01001671config ARCH_SPARSEMEM_DEFAULT
1672 def_bool ARCH_SPARSEMEM_ENABLE
1673
Russell King05944d72006-11-30 20:43:51 +00001674config ARCH_SELECT_MEMORY_MODEL
Russell Kingbe370302010-05-07 17:40:33 +01001675 def_bool ARCH_SPARSEMEM_ENABLE
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07001676
Will Deacon7b7bf492011-05-19 13:21:14 +01001677config HAVE_ARCH_PFN_VALID
1678 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1679
Steve Capperb8cd51a2014-10-09 15:29:20 -07001680config HAVE_GENERIC_RCU_GUP
1681 def_bool y
1682 depends on ARM_LPAE
1683
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001684config HIGHMEM
Russell Kinge8db89a2011-05-12 09:53:05 +01001685 bool "High Memory Support"
1686 depends on MMU
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001687 help
1688 The address space of ARM processors is only 4 Gigabytes large
1689 and it has to accommodate user address space, kernel address
1690 space as well as some memory mapped IO. That means that, if you
1691 have a large amount of physical memory and/or IO, not all of the
1692 memory can be "permanently mapped" by the kernel. The physical
1693 memory that is not permanently mapped is called "high memory".
1694
1695 Depending on the selected kernel/user memory split, minimum
1696 vmalloc space and actual amount of RAM, you may not need this
1697 option which should result in a slightly faster kernel.
1698
1699 If unsure, say n.
1700
Russell King65cec8e2009-08-17 20:02:06 +01001701config HIGHPTE
Russell King9a431bd2015-06-25 10:44:08 +01001702 bool "Allocate 2nd-level pagetables from highmem" if EXPERT
Russell King65cec8e2009-08-17 20:02:06 +01001703 depends on HIGHMEM
Russell King9a431bd2015-06-25 10:44:08 +01001704 default y
Russell Kingb4d103d2015-06-25 10:49:45 +01001705 help
1706 The VM uses one page of physical memory for each page table.
1707 For systems with a lot of processes, this can use a lot of
1708 precious low memory, eventually leading to low memory being
1709 consumed by page tables. Setting this option will allow
1710 user-space 2nd level page tables to reside in high memory.
Russell King65cec8e2009-08-17 20:02:06 +01001711
Russell Kinga5e090a2015-08-19 20:40:41 +01001712config CPU_SW_DOMAIN_PAN
1713 bool "Enable use of CPU domains to implement privileged no-access"
1714 depends on MMU && !ARM_LPAE
Jamie Iles1b8873a2010-02-02 20:25:44 +01001715 default y
1716 help
Russell Kinga5e090a2015-08-19 20:40:41 +01001717 Increase kernel security by ensuring that normal kernel accesses
1718 are unable to access userspace addresses. This can help prevent
1719 use-after-free bugs becoming an exploitable privilege escalation
1720 by ensuring that magic values (such as LIST_POISON) will always
1721 fault when dereferenced.
1722
1723 CPUs with low-vector mappings use a best-efforts implementation.
1724 Their lower 1MB needs to remain accessible for the vectors, but
1725 the remainder of userspace will become appropriately inaccessible.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001726
1727config HW_PERF_EVENTS
Mark Rutlandfa8ad782015-07-06 12:23:53 +01001728 def_bool y
1729 depends on ARM_PMU
Jamie Iles1b8873a2010-02-02 20:25:44 +01001730
Catalin Marinas1355e2a2012-07-25 14:32:38 +01001731config SYS_SUPPORTS_HUGETLBFS
1732 def_bool y
1733 depends on ARM_LPAE
1734
Catalin Marinas8d962502012-07-25 14:39:26 +01001735config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1736 def_bool y
1737 depends on ARM_LPAE
1738
Steven Capper4bfab202013-07-26 14:58:22 +01001739config ARCH_WANT_GENERAL_HUGETLB
1740 def_bool y
1741
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001742config ARM_MODULE_PLTS
1743 bool "Use PLTs to allow module memory to spill over into vmalloc area"
1744 depends on MODULES
1745 help
1746 Allocate PLTs when loading modules so that jumps and calls whose
1747 targets are too far away for their relative offsets to be encoded
1748 in the instructions themselves can be bounced via veneers in the
1749 module's PLT. This allows modules to be allocated in the generic
1750 vmalloc area after the dedicated module memory area has been
1751 exhausted. The modules will use slightly more memory, but after
1752 rounding up to page size, the actual memory footprint is usually
1753 the same.
1754
1755 Say y if you are getting out of memory errors while loading modules
1756
Linus Torvalds1da177e2005-04-16 15:20:36 -07001757source "mm/Kconfig"
1758
Magnus Dammc1b2d972010-07-05 10:00:11 +01001759config FORCE_MAX_ZONEORDER
Laurent Pinchartbf98c1e2013-11-09 13:33:48 +01001760 int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1761 range 11 64 if ARCH_SHMOBILE_LEGACY
Yegor Yefremov898f08e2012-10-08 14:37:53 -07001762 default "12" if SOC_AM33XX
Uwe Kleine-König6d85e2b2011-11-17 14:36:23 +01001763 default "9" if SA1111 || ARCH_EFM32
Magnus Dammc1b2d972010-07-05 10:00:11 +01001764 default "11"
1765 help
1766 The kernel memory allocator divides physically contiguous memory
1767 blocks into "zones", where each zone is a power of two number of
1768 pages. This option selects the largest power of two that the kernel
1769 keeps in the memory allocator. If you need to allocate very large
1770 blocks of physically contiguous memory, then you may need to
1771 increase this value.
1772
1773 This config option is actually maximum order plus one. For example,
1774 a value of 11 means that the largest free memory block is 2^10 pages.
1775
Linus Torvalds1da177e2005-04-16 15:20:36 -07001776config ALIGNMENT_TRAP
1777 bool
Hyok S. Choif12d0d72006-09-26 17:36:37 +09001778 depends on CPU_CP15_MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779 default y if !ARCH_EBSA110
Russell Kinge119bff2010-01-10 17:23:29 +00001780 select HAVE_PROC_CPU if PROC_FS
Linus Torvalds1da177e2005-04-16 15:20:36 -07001781 help
Matt LaPlante84eb8d02006-10-03 22:53:09 +02001782 ARM processors cannot fetch/store information which is not
Linus Torvalds1da177e2005-04-16 15:20:36 -07001783 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1784 address divisible by 4. On 32-bit ARM processors, these non-aligned
1785 fetch/store instructions will be emulated in software if you say
1786 here, which has a severe performance impact. This is necessary for
1787 correct operation of some network protocols. With an IP-only
1788 configuration it is safe to say N, otherwise say Y.
1789
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001790config UACCESS_WITH_MEMCPY
Linus Walleij38ef2ad2012-09-10 16:36:37 +01001791 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1792 depends on MMU
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001793 default y if CPU_FEROCEON
1794 help
1795 Implement faster copy_to_user and clear_user methods for CPU
1796 cores where a 8-word STM instruction give significantly higher
1797 memory write throughput than a sequence of individual 32bit stores.
1798
1799 A possible side effect is a slight increase in scheduling latency
1800 between threads sharing the same address space if they invoke
1801 such copy operations with large buffers.
1802
1803 However, if the CPU data cache is using a write-allocate mode,
1804 this option is unlikely to provide any performance gain.
1805
Nicolas Pitre70c70d92010-08-26 15:08:35 -07001806config SECCOMP
1807 bool
1808 prompt "Enable seccomp to safely compute untrusted bytecode"
1809 ---help---
1810 This kernel feature is useful for number crunching applications
1811 that may need to compute untrusted bytecode during their
1812 execution. By using pipes or other transports made available to
1813 the process as file descriptors supporting the read/write
1814 syscalls, it's possible to isolate those applications in
1815 their own address space using seccomp. Once seccomp is
1816 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1817 and the task is only allowed to execute a few safe syscalls
1818 defined by each seccomp mode.
1819
Stefano Stabellini06e62952013-10-15 15:47:14 +00001820config SWIOTLB
1821 def_bool y
1822
1823config IOMMU_HELPER
1824 def_bool SWIOTLB
1825
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001826config XEN_DOM0
1827 def_bool y
1828 depends on XEN
1829
1830config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -07001831 bool "Xen guest support on ARM"
Ian Campbell85323a92013-03-07 07:17:25 +00001832 depends on ARM && AEABI && OF
Arnd Bergmannf880b672012-10-09 10:33:52 +00001833 depends on CPU_V7 && !CPU_V6
Ian Campbell85323a92013-03-07 07:17:25 +00001834 depends on !GENERIC_ATOMIC64
Uwe Kleine-König7693dec2014-03-03 09:25:52 -05001835 depends on MMU
Russell King51aaf812014-04-22 22:26:27 +01001836 select ARCH_DMA_ADDR_T_64BIT
Stefano Stabellini17b7ab82013-04-24 18:47:18 +00001837 select ARM_PSCI
Stefano Stabellini83862cc2013-10-10 13:40:44 +00001838 select SWIOTLB_XEN
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001839 help
1840 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1841
Linus Torvalds1da177e2005-04-16 15:20:36 -07001842endmenu
1843
1844menu "Boot options"
1845
Grant Likely9eb8f672011-04-28 14:27:20 -06001846config USE_OF
1847 bool "Flattened Device Tree support"
Russell Kingb1b3f492012-10-06 17:12:25 +01001848 select IRQ_DOMAIN
Grant Likely9eb8f672011-04-28 14:27:20 -06001849 select OF
1850 select OF_EARLY_FLATTREE
Marek Szyprowskibcedb5f2014-02-28 14:42:54 +01001851 select OF_RESERVED_MEM
Grant Likely9eb8f672011-04-28 14:27:20 -06001852 help
1853 Include support for flattened device tree machine descriptions.
1854
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001855config ATAGS
1856 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1857 default y
1858 help
1859 This is the traditional way of passing data to the kernel at boot
1860 time. If you are solely relying on the flattened device tree (or
1861 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1862 to remove ATAGS support from your kernel binary. If unsure,
1863 leave this to y.
1864
1865config DEPRECATED_PARAM_STRUCT
1866 bool "Provide old way to pass kernel parameters"
1867 depends on ATAGS
1868 help
1869 This was deprecated in 2001 and announced to live on for 5 years.
1870 Some old boot loaders still use this way.
1871
Linus Torvalds1da177e2005-04-16 15:20:36 -07001872# Compressed boot loader in ROM. Yes, we really want to ask about
1873# TEXT and BSS so we preserve their values in the config files.
1874config ZBOOT_ROM_TEXT
1875 hex "Compressed ROM boot loader base address"
1876 default "0"
1877 help
1878 The physical address at which the ROM-able zImage is to be
1879 placed in the target. Platforms which normally make use of
1880 ROM-able zImage formats normally set this to a suitable
1881 value in their defconfig file.
1882
1883 If ZBOOT_ROM is not enabled, this has no effect.
1884
1885config ZBOOT_ROM_BSS
1886 hex "Compressed ROM boot loader BSS address"
1887 default "0"
1888 help
Dan Fandrichf8c440b2006-09-20 23:28:51 +01001889 The base address of an area of read/write memory in the target
1890 for the ROM-able zImage which must be available while the
1891 decompressor is running. It must be large enough to hold the
1892 entire decompressed kernel plus an additional 128 KiB.
1893 Platforms which normally make use of ROM-able zImage formats
1894 normally set this to a suitable value in their defconfig file.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001895
1896 If ZBOOT_ROM is not enabled, this has no effect.
1897
1898config ZBOOT_ROM
1899 bool "Compressed boot loader in ROM/flash"
1900 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
Russell King10968132014-01-01 11:59:44 +00001901 depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001902 help
1903 Say Y here if you intend to execute your compressed kernel image
1904 (zImage) directly from ROM or flash. If unsure, say N.
1905
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001906config ARM_APPENDED_DTB
1907 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
Russell King10968132014-01-01 11:59:44 +00001908 depends on OF
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001909 help
1910 With this option, the boot code will look for a device tree binary
1911 (DTB) appended to zImage
1912 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1913
1914 This is meant as a backward compatibility convenience for those
1915 systems with a bootloader that can't be upgraded to accommodate
1916 the documented boot protocol using a device tree.
1917
1918 Beware that there is very little in terms of protection against
1919 this option being confused by leftover garbage in memory that might
1920 look like a DTB header after a reboot if no actual DTB is appended
1921 to zImage. Do not leave this option active in a production kernel
1922 if you don't intend to always append a DTB. Proper passing of the
1923 location into r2 of a bootloader provided DTB is always preferable
1924 to this option.
1925
Nicolas Pitreb90b9a32011-09-13 22:37:07 -04001926config ARM_ATAG_DTB_COMPAT
1927 bool "Supplement the appended DTB with traditional ATAG information"
1928 depends on ARM_APPENDED_DTB
1929 help
1930 Some old bootloaders can't be updated to a DTB capable one, yet
1931 they provide ATAGs with memory configuration, the ramdisk address,
1932 the kernel cmdline string, etc. Such information is dynamically
1933 provided by the bootloader and can't always be stored in a static
1934 DTB. To allow a device tree enabled kernel to be used with such
1935 bootloaders, this option allows zImage to extract the information
1936 from the ATAG list and store it at run time into the appended DTB.
1937
Genoud Richardd0f34a12012-06-26 16:37:59 +01001938choice
1939 prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1940 default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1941
1942config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1943 bool "Use bootloader kernel arguments if available"
1944 help
1945 Uses the command-line options passed by the boot loader instead of
1946 the device tree bootargs property. If the boot loader doesn't provide
1947 any, the device tree bootargs property will be used.
1948
1949config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1950 bool "Extend with bootloader kernel arguments"
1951 help
1952 The command-line arguments provided by the boot loader will be
1953 appended to the the device tree bootargs property.
1954
1955endchoice
1956
Linus Torvalds1da177e2005-04-16 15:20:36 -07001957config CMDLINE
1958 string "Default kernel command string"
1959 default ""
1960 help
1961 On some architectures (EBSA110 and CATS), there is currently no way
1962 for the boot loader to pass arguments to the kernel. For these
1963 architectures, you should supply some command-line options at build
1964 time by entering them here. As a minimum, you should specify the
1965 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1966
Victor Boivie4394c122011-05-04 17:07:55 +01001967choice
1968 prompt "Kernel command line type" if CMDLINE != ""
1969 default CMDLINE_FROM_BOOTLOADER
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001970 depends on ATAGS
Victor Boivie4394c122011-05-04 17:07:55 +01001971
1972config CMDLINE_FROM_BOOTLOADER
1973 bool "Use bootloader kernel arguments if available"
1974 help
1975 Uses the command-line options passed by the boot loader. If
1976 the boot loader doesn't provide any, the default kernel command
1977 string provided in CMDLINE will be used.
1978
1979config CMDLINE_EXTEND
1980 bool "Extend bootloader kernel arguments"
1981 help
1982 The command-line arguments provided by the boot loader will be
1983 appended to the default kernel command string.
1984
Alexander Holler92d20402010-02-16 19:04:53 +01001985config CMDLINE_FORCE
1986 bool "Always use the default kernel command string"
Alexander Holler92d20402010-02-16 19:04:53 +01001987 help
1988 Always use the default kernel command string, even if the boot
1989 loader passes other arguments to the kernel.
1990 This is useful if you cannot or don't want to change the
1991 command-line options your boot loader passes to the kernel.
Victor Boivie4394c122011-05-04 17:07:55 +01001992endchoice
Alexander Holler92d20402010-02-16 19:04:53 +01001993
Linus Torvalds1da177e2005-04-16 15:20:36 -07001994config XIP_KERNEL
1995 bool "Kernel Execute-In-Place from ROM"
Russell King10968132014-01-01 11:59:44 +00001996 depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001997 help
1998 Execute-In-Place allows the kernel to run from non-volatile storage
1999 directly addressable by the CPU, such as NOR flash. This saves RAM
2000 space since the text section of the kernel is not loaded from flash
2001 to RAM. Read-write sections, such as the data section and stack,
2002 are still copied to RAM. The XIP kernel is not compressed since
2003 it has to run directly from flash, so it will take more space to
2004 store it. The flash address used to link the kernel object files,
2005 and for storing it, is configuration dependent. Therefore, if you
2006 say Y here, you must know the proper physical address where to
2007 store the kernel image depending on your own flash memory usage.
2008
2009 Also note that the make target becomes "make xipImage" rather than
2010 "make zImage" or "make Image". The final kernel binary to put in
2011 ROM memory will be arch/arm/boot/xipImage.
2012
2013 If unsure, say N.
2014
2015config XIP_PHYS_ADDR
2016 hex "XIP Kernel Physical Location"
2017 depends on XIP_KERNEL
2018 default "0x00080000"
2019 help
2020 This is the physical address in your flash memory the kernel will
2021 be linked for and stored to. This address is dependent on your
2022 own flash usage.
2023
Richard Purdiec587e4a2007-02-06 21:29:00 +01002024config KEXEC
2025 bool "Kexec system call (EXPERIMENTAL)"
Stephen Warren19ab4282013-06-14 16:14:14 +01002026 depends on (!SMP || PM_SLEEP_SMP)
Arnd Bergmanncb1293e2015-05-26 15:40:44 +01002027 depends on !CPU_V7M
Dave Young2965faa2015-09-09 15:38:55 -07002028 select KEXEC_CORE
Richard Purdiec587e4a2007-02-06 21:29:00 +01002029 help
2030 kexec is a system call that implements the ability to shutdown your
2031 current kernel, and to start another kernel. It is like a reboot
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02002032 but it is independent of the system firmware. And like a reboot
Richard Purdiec587e4a2007-02-06 21:29:00 +01002033 you can start any kernel with it, not just Linux.
2034
2035 It is an ongoing process to be certain the hardware in a machine
2036 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02002037 initially work for you.
Richard Purdiec587e4a2007-02-06 21:29:00 +01002038
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01002039config ATAGS_PROC
2040 bool "Export atags in procfs"
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01002041 depends on ATAGS && KEXEC
Uli Luckasb98d7292008-02-22 16:45:18 +01002042 default y
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01002043 help
2044 Should the atags used to boot the kernel be exported in an "atags"
2045 file in procfs. Useful with kexec.
2046
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01002047config CRASH_DUMP
2048 bool "Build kdump crash kernel (EXPERIMENTAL)"
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01002049 help
2050 Generate crash dump after being started by kexec. This should
2051 be normally only set in special crash dump kernels which are
2052 loaded in the main kernel with kexec-tools into a specially
2053 reserved region and then later executed after a crash by
2054 kdump/kexec. The crash dump kernel must be compiled to a
2055 memory address not used by the main kernel
2056
2057 For more details see Documentation/kdump/kdump.txt
2058
Eric Miaoe69edc792010-07-05 15:56:50 +02002059config AUTO_ZRELADDR
2060 bool "Auto calculation of the decompressed kernel image address"
Eric Miaoe69edc792010-07-05 15:56:50 +02002061 help
2062 ZRELADDR is the physical address where the decompressed kernel
2063 image will be placed. If AUTO_ZRELADDR is selected, the address
2064 will be determined at run-time by masking the current IP with
2065 0xf8000000. This assumes the zImage being placed in the first 128MB
2066 from start of memory.
2067
Linus Torvalds1da177e2005-04-16 15:20:36 -07002068endmenu
2069
Russell Kingac9d7ef2008-08-18 17:26:00 +01002070menu "CPU Power Management"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002071
Linus Torvalds1da177e2005-04-16 15:20:36 -07002072source "drivers/cpufreq/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002073
Russell Kingac9d7ef2008-08-18 17:26:00 +01002074source "drivers/cpuidle/Kconfig"
2075
2076endmenu
2077
Linus Torvalds1da177e2005-04-16 15:20:36 -07002078menu "Floating point emulation"
2079
2080comment "At least one emulation must be selected"
2081
2082config FPE_NWFPE
2083 bool "NWFPE math emulation"
Dave Martin593c2522010-12-13 21:56:03 +01002084 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07002085 ---help---
2086 Say Y to include the NWFPE floating point emulator in the kernel.
2087 This is necessary to run most binaries. Linux does not currently
2088 support floating point hardware so you need to say Y here even if
2089 your machine has an FPA or floating point co-processor podule.
2090
2091 You may say N here if you are going to load the Acorn FPEmulator
2092 early in the bootup.
2093
2094config FPE_NWFPE_XP
2095 bool "Support extended precision"
Lennert Buytenhekbedf1422005-11-07 21:12:08 +00002096 depends on FPE_NWFPE
Linus Torvalds1da177e2005-04-16 15:20:36 -07002097 help
2098 Say Y to include 80-bit support in the kernel floating-point
2099 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2100 Note that gcc does not generate 80-bit operations by default,
2101 so in most cases this option only enlarges the size of the
2102 floating point emulator without any good reason.
2103
2104 You almost surely want to say N here.
2105
2106config FPE_FASTFPE
2107 bool "FastFPE math emulation (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08002108 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
Linus Torvalds1da177e2005-04-16 15:20:36 -07002109 ---help---
2110 Say Y here to include the FAST floating point emulator in the kernel.
2111 This is an experimental much faster emulator which now also has full
2112 precision for the mantissa. It does not support any exceptions.
2113 It is very simple, and approximately 3-6 times faster than NWFPE.
2114
2115 It should be sufficient for most programs. It may be not suitable
2116 for scientific calculations, but you have to check this for yourself.
2117 If you do not feel you need a faster FP emulation you should better
2118 choose NWFPE.
2119
2120config VFP
2121 bool "VFP-format floating point maths"
Russell Kinge399b1a2011-01-17 15:08:32 +00002122 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
Linus Torvalds1da177e2005-04-16 15:20:36 -07002123 help
2124 Say Y to include VFP support code in the kernel. This is needed
2125 if your hardware includes a VFP unit.
2126
2127 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2128 release notes and additional status information.
2129
2130 Say N if your target does not have VFP hardware.
2131
Catalin Marinas25ebee02007-09-25 15:22:24 +01002132config VFPv3
2133 bool
2134 depends on VFP
2135 default y if CPU_V7
2136
Catalin Marinasb5872db2008-01-10 19:16:17 +01002137config NEON
2138 bool "Advanced SIMD (NEON) Extension support"
2139 depends on VFPv3 && CPU_V7
2140 help
2141 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2142 Extension.
2143
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002144config KERNEL_MODE_NEON
2145 bool "Support for NEON in kernel mode"
Russell Kingc4a30c32013-09-22 11:08:50 +01002146 depends on NEON && AEABI
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002147 help
2148 Say Y to include support for NEON in kernel mode.
2149
Linus Torvalds1da177e2005-04-16 15:20:36 -07002150endmenu
2151
2152menu "Userspace binary formats"
2153
2154source "fs/Kconfig.binfmt"
2155
Linus Torvalds1da177e2005-04-16 15:20:36 -07002156endmenu
2157
2158menu "Power management options"
2159
Russell Kingeceab4a2005-11-15 11:31:41 +00002160source "kernel/power/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002161
Johannes Bergf4cb5702007-12-08 02:14:00 +01002162config ARCH_SUSPEND_POSSIBLE
Ezequiel Garcia19a05192013-08-16 10:28:24 +01002163 depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
Uwe Kleine-Königf0d75152012-02-01 10:00:00 +01002164 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
Johannes Bergf4cb5702007-12-08 02:14:00 +01002165 def_bool y
2166
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002167config ARM_CPU_SUSPEND
2168 def_bool PM_SLEEP
2169
Sebastian Capella603fb422014-03-25 01:20:29 +01002170config ARCH_HIBERNATION_POSSIBLE
2171 bool
2172 depends on MMU
2173 default y if ARCH_SUSPEND_POSSIBLE
2174
Linus Torvalds1da177e2005-04-16 15:20:36 -07002175endmenu
2176
Sam Ravnborgd5950b42005-07-11 21:03:49 -07002177source "net/Kconfig"
2178
Uwe Kleine-Königac251502009-08-13 21:09:21 +02002179source "drivers/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002180
Kumar Gala916f743d2015-02-26 15:49:09 -06002181source "drivers/firmware/Kconfig"
2182
Linus Torvalds1da177e2005-04-16 15:20:36 -07002183source "fs/Kconfig"
2184
Linus Torvalds1da177e2005-04-16 15:20:36 -07002185source "arch/arm/Kconfig.debug"
2186
2187source "security/Kconfig"
2188
2189source "crypto/Kconfig"
Ard Biesheuvel652ccae2015-03-10 09:47:44 +01002190if CRYPTO
2191source "arch/arm/crypto/Kconfig"
2192endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002193
2194source "lib/Kconfig"
Christoffer Dall749cf76c2013-01-20 18:28:06 -05002195
2196source "arch/arm/kvm/Kconfig"