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Thomas Gleixner3bb16562022-06-07 19:29:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +02002/*
3 * RSB (Reduced Serial Bus) driver.
4 *
5 * Author: Chen-Yu Tsai <wens@csie.org>
6 *
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +02007 * The RSB controller looks like an SMBus controller which only supports
8 * byte and word data transfers. But, it differs from standard SMBus
9 * protocol on several aspects:
10 * - it uses addresses set at runtime to address slaves. Runtime addresses
11 * are sent to slaves using their 12bit hardware addresses. Up to 15
12 * runtime addresses are available.
13 * - it adds a parity bit every 8bits of data and address for read and
14 * write accesses; this replaces the ack bit
15 * - only one read access is required to read a byte (instead of a write
16 * followed by a read access in standard SMBus protocol)
17 * - there's no Ack bit after each read access
18 *
19 * This means this bus cannot be used to interface with standard SMBus
20 * devices. Devices known to support this interface include the AXP223,
21 * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
22 *
23 * A description of the operation and wire protocol can be found in the
24 * RSB section of Allwinner's A80 user manual, which can be found at
25 *
26 * https://github.com/allwinner-zh/documents/tree/master/A80
27 *
28 * This document is officially released by Allwinner.
29 *
30 * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +020031 */
32
33#include <linux/clk.h>
34#include <linux/clk/clk-conf.h>
35#include <linux/device.h>
36#include <linux/interrupt.h>
37#include <linux/io.h>
38#include <linux/iopoll.h>
39#include <linux/module.h>
40#include <linux/of.h>
41#include <linux/of_irq.h>
42#include <linux/of_platform.h>
43#include <linux/platform_device.h>
Samuel Holland84310742021-01-03 05:06:34 -060044#include <linux/pm.h>
Samuel Holland4a0dbc12021-01-03 05:06:35 -060045#include <linux/pm_runtime.h>
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +020046#include <linux/regmap.h>
47#include <linux/reset.h>
48#include <linux/slab.h>
49#include <linux/sunxi-rsb.h>
50#include <linux/types.h>
51
52/* RSB registers */
53#define RSB_CTRL 0x0 /* Global control */
54#define RSB_CCR 0x4 /* Clock control */
55#define RSB_INTE 0x8 /* Interrupt controls */
56#define RSB_INTS 0xc /* Interrupt status */
57#define RSB_ADDR 0x10 /* Address to send with read/write command */
58#define RSB_DATA 0x1c /* Data to read/write */
59#define RSB_LCR 0x24 /* Line control */
60#define RSB_DMCR 0x28 /* Device mode (init) control */
61#define RSB_CMD 0x2c /* RSB Command */
62#define RSB_DAR 0x30 /* Device address / runtime address */
63
64/* CTRL fields */
65#define RSB_CTRL_START_TRANS BIT(7)
66#define RSB_CTRL_ABORT_TRANS BIT(6)
67#define RSB_CTRL_GLOBAL_INT_ENB BIT(1)
68#define RSB_CTRL_SOFT_RST BIT(0)
69
70/* CLK CTRL fields */
71#define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8)
72#define RSB_CCR_MAX_CLK_DIV 0xff
73#define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV)
74
75/* STATUS fields */
76#define RSB_INTS_TRANS_ERR_ACK BIT(16)
77#define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf)
78#define RSB_INTS_TRANS_ERR_DATA GENMASK(11, 8)
79#define RSB_INTS_LOAD_BSY BIT(2)
80#define RSB_INTS_TRANS_ERR BIT(1)
81#define RSB_INTS_TRANS_OVER BIT(0)
82
83/* LINE CTRL fields*/
84#define RSB_LCR_SCL_STATE BIT(5)
85#define RSB_LCR_SDA_STATE BIT(4)
86#define RSB_LCR_SCL_CTL BIT(3)
87#define RSB_LCR_SCL_CTL_EN BIT(2)
88#define RSB_LCR_SDA_CTL BIT(1)
89#define RSB_LCR_SDA_CTL_EN BIT(0)
90
91/* DEVICE MODE CTRL field values */
92#define RSB_DMCR_DEVICE_START BIT(31)
93#define RSB_DMCR_MODE_DATA (0x7c << 16)
94#define RSB_DMCR_MODE_REG (0x3e << 8)
95#define RSB_DMCR_DEV_ADDR 0x00
96
97/* CMD values */
98#define RSB_CMD_RD8 0x8b
99#define RSB_CMD_RD16 0x9c
100#define RSB_CMD_RD32 0xa6
101#define RSB_CMD_WR8 0x4e
102#define RSB_CMD_WR16 0x59
103#define RSB_CMD_WR32 0x63
104#define RSB_CMD_STRA 0xe8
105
106/* DAR fields */
107#define RSB_DAR_RTA(v) (((v) & 0xff) << 16)
108#define RSB_DAR_DA(v) ((v) & 0xffff)
109
110#define RSB_MAX_FREQ 20000000
111
112#define RSB_CTRL_NAME "sunxi-rsb"
113
114struct sunxi_rsb_addr_map {
115 u16 hwaddr;
116 u8 rtaddr;
117};
118
119struct sunxi_rsb {
120 struct device *dev;
121 void __iomem *regs;
122 struct clk *clk;
123 struct reset_control *rstc;
124 struct completion complete;
125 struct mutex lock;
126 unsigned int status;
Samuel Holland22754ac2021-01-03 05:06:33 -0600127 u32 clk_freq;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200128};
129
130/* bus / slave device related functions */
131static struct bus_type sunxi_rsb_bus;
132
133static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
134{
135 return of_driver_match_device(dev, drv);
136}
137
138static int sunxi_rsb_device_probe(struct device *dev)
139{
140 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
141 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
142 int ret;
143
144 if (!drv->probe)
145 return -ENODEV;
146
147 if (!rdev->irq) {
148 int irq = -ENOENT;
149
150 if (dev->of_node)
151 irq = of_irq_get(dev->of_node, 0);
152
153 if (irq == -EPROBE_DEFER)
154 return irq;
155 if (irq < 0)
156 irq = 0;
157
158 rdev->irq = irq;
159 }
160
161 ret = of_clk_set_defaults(dev->of_node, false);
162 if (ret < 0)
163 return ret;
164
165 return drv->probe(rdev);
166}
167
Uwe Kleine-Königfc7a6202021-07-13 21:35:22 +0200168static void sunxi_rsb_device_remove(struct device *dev)
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200169{
170 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
171
Uwe Kleine-König3c15e002020-11-26 11:41:42 +0100172 drv->remove(to_sunxi_rsb_device(dev));
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200173}
174
175static struct bus_type sunxi_rsb_bus = {
176 .name = RSB_CTRL_NAME,
177 .match = sunxi_rsb_device_match,
178 .probe = sunxi_rsb_device_probe,
179 .remove = sunxi_rsb_device_remove,
Stefan Brünse2bf8012017-11-27 20:05:34 +0100180 .uevent = of_device_uevent_modalias,
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200181};
182
183static void sunxi_rsb_dev_release(struct device *dev)
184{
185 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
186
187 kfree(rdev);
188}
189
190/**
191 * sunxi_rsb_device_create() - allocate and add an RSB device
192 * @rsb: RSB controller
193 * @node: RSB slave device node
194 * @hwaddr: RSB slave hardware address
195 * @rtaddr: RSB slave runtime address
196 */
197static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
198 struct device_node *node, u16 hwaddr, u8 rtaddr)
199{
200 int err;
201 struct sunxi_rsb_device *rdev;
202
203 rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
204 if (!rdev)
205 return ERR_PTR(-ENOMEM);
206
207 rdev->rsb = rsb;
208 rdev->hwaddr = hwaddr;
209 rdev->rtaddr = rtaddr;
210 rdev->dev.bus = &sunxi_rsb_bus;
211 rdev->dev.parent = rsb->dev;
212 rdev->dev.of_node = node;
213 rdev->dev.release = sunxi_rsb_dev_release;
214
215 dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr);
216
217 err = device_register(&rdev->dev);
218 if (err < 0) {
219 dev_err(&rdev->dev, "Can't add %s, status %d\n",
220 dev_name(&rdev->dev), err);
221 goto err_device_add;
222 }
223
224 dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
225
Christophe JAILLETfff8c102022-04-21 16:35:49 +0200226 return rdev;
227
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200228err_device_add:
229 put_device(&rdev->dev);
230
231 return ERR_PTR(err);
232}
233
234/**
235 * sunxi_rsb_device_unregister(): unregister an RSB device
236 * @rdev: rsb_device to be removed
237 */
238static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
239{
240 device_unregister(&rdev->dev);
241}
242
243static int sunxi_rsb_remove_devices(struct device *dev, void *data)
244{
245 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
246
247 if (dev->bus == &sunxi_rsb_bus)
248 sunxi_rsb_device_unregister(rdev);
249
250 return 0;
251}
252
253/**
254 * sunxi_rsb_driver_register() - Register device driver with RSB core
255 * @rdrv: device driver to be associated with slave-device.
256 *
257 * This API will register the client driver with the RSB framework.
258 * It is typically called from the driver's module-init function.
259 */
260int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
261{
262 rdrv->driver.bus = &sunxi_rsb_bus;
263 return driver_register(&rdrv->driver);
264}
265EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
266
267/* common code that starts a transfer */
268static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
269{
270 if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
271 dev_dbg(rsb->dev, "RSB transfer still in progress\n");
272 return -EBUSY;
273 }
274
275 reinit_completion(&rsb->complete);
276
277 writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER,
278 rsb->regs + RSB_INTE);
279 writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
280 rsb->regs + RSB_CTRL);
281
282 if (!wait_for_completion_io_timeout(&rsb->complete,
283 msecs_to_jiffies(100))) {
284 dev_dbg(rsb->dev, "RSB timeout\n");
285
286 /* abort the transfer */
287 writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
288
289 /* clear any interrupt flags */
290 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
291
292 return -ETIMEDOUT;
293 }
294
295 if (rsb->status & RSB_INTS_LOAD_BSY) {
296 dev_dbg(rsb->dev, "RSB busy\n");
297 return -EBUSY;
298 }
299
300 if (rsb->status & RSB_INTS_TRANS_ERR) {
301 if (rsb->status & RSB_INTS_TRANS_ERR_ACK) {
302 dev_dbg(rsb->dev, "RSB slave nack\n");
303 return -EINVAL;
304 }
305
306 if (rsb->status & RSB_INTS_TRANS_ERR_DATA) {
307 dev_dbg(rsb->dev, "RSB transfer data error\n");
308 return -EIO;
309 }
310 }
311
312 return 0;
313}
314
315static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
316 u32 *buf, size_t len)
317{
318 u32 cmd;
319 int ret;
320
321 if (!buf)
322 return -EINVAL;
323
324 switch (len) {
325 case 1:
326 cmd = RSB_CMD_RD8;
327 break;
328 case 2:
329 cmd = RSB_CMD_RD16;
330 break;
331 case 4:
332 cmd = RSB_CMD_RD32;
333 break;
334 default:
Andre Przywara2d3e8f72015-12-22 12:27:43 +0000335 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200336 return -EINVAL;
337 }
338
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600339 ret = pm_runtime_resume_and_get(rsb->dev);
340 if (ret)
341 return ret;
342
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200343 mutex_lock(&rsb->lock);
344
345 writel(addr, rsb->regs + RSB_ADDR);
346 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
347 writel(cmd, rsb->regs + RSB_CMD);
348
349 ret = _sunxi_rsb_run_xfer(rsb);
350 if (ret)
Dan Carpenter43675ff2015-11-04 01:02:44 +0300351 goto unlock;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200352
Ondrej Jirmana43ab302020-02-21 21:27:26 +0100353 *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200354
Dan Carpenter43675ff2015-11-04 01:02:44 +0300355unlock:
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200356 mutex_unlock(&rsb->lock);
357
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600358 pm_runtime_mark_last_busy(rsb->dev);
359 pm_runtime_put_autosuspend(rsb->dev);
360
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200361 return ret;
362}
363
364static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
365 const u32 *buf, size_t len)
366{
367 u32 cmd;
368 int ret;
369
370 if (!buf)
371 return -EINVAL;
372
373 switch (len) {
374 case 1:
375 cmd = RSB_CMD_WR8;
376 break;
377 case 2:
378 cmd = RSB_CMD_WR16;
379 break;
380 case 4:
381 cmd = RSB_CMD_WR32;
382 break;
383 default:
Andre Przywara2d3e8f72015-12-22 12:27:43 +0000384 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200385 return -EINVAL;
386 }
387
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600388 ret = pm_runtime_resume_and_get(rsb->dev);
389 if (ret)
390 return ret;
391
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200392 mutex_lock(&rsb->lock);
393
394 writel(addr, rsb->regs + RSB_ADDR);
395 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
396 writel(*buf, rsb->regs + RSB_DATA);
397 writel(cmd, rsb->regs + RSB_CMD);
398 ret = _sunxi_rsb_run_xfer(rsb);
399
400 mutex_unlock(&rsb->lock);
401
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600402 pm_runtime_mark_last_busy(rsb->dev);
403 pm_runtime_put_autosuspend(rsb->dev);
404
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200405 return ret;
406}
407
408/* RSB regmap functions */
409struct sunxi_rsb_ctx {
410 struct sunxi_rsb_device *rdev;
411 int size;
412};
413
414static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
415 unsigned int *val)
416{
417 struct sunxi_rsb_ctx *ctx = context;
418 struct sunxi_rsb_device *rdev = ctx->rdev;
419
420 if (reg > 0xff)
421 return -EINVAL;
422
423 return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size);
424}
425
426static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
427 unsigned int val)
428{
429 struct sunxi_rsb_ctx *ctx = context;
430 struct sunxi_rsb_device *rdev = ctx->rdev;
431
432 return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size);
433}
434
435static void regmap_sunxi_rsb_free_ctx(void *context)
436{
437 struct sunxi_rsb_ctx *ctx = context;
438
439 kfree(ctx);
440}
441
442static struct regmap_bus regmap_sunxi_rsb = {
443 .reg_write = regmap_sunxi_rsb_reg_write,
444 .reg_read = regmap_sunxi_rsb_reg_read,
445 .free_context = regmap_sunxi_rsb_free_ctx,
446 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
447 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
448};
449
450static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
451 const struct regmap_config *config)
452{
453 struct sunxi_rsb_ctx *ctx;
454
455 switch (config->val_bits) {
456 case 8:
457 case 16:
458 case 32:
459 break;
460 default:
461 return ERR_PTR(-EINVAL);
462 }
463
464 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
465 if (!ctx)
466 return ERR_PTR(-ENOMEM);
467
468 ctx->rdev = rdev;
469 ctx->size = config->val_bits / 8;
470
471 return ctx;
472}
473
474struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
475 const struct regmap_config *config,
476 struct lock_class_key *lock_key,
477 const char *lock_name)
478{
479 struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
480
481 if (IS_ERR(ctx))
482 return ERR_CAST(ctx);
483
484 return __devm_regmap_init(&rdev->dev, &regmap_sunxi_rsb, ctx, config,
485 lock_key, lock_name);
486}
487EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
488
489/* RSB controller driver functions */
490static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
491{
492 struct sunxi_rsb *rsb = dev_id;
493 u32 status;
494
495 status = readl(rsb->regs + RSB_INTS);
496 rsb->status = status;
497
498 /* Clear interrupts */
499 status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
500 RSB_INTS_TRANS_OVER);
501 writel(status, rsb->regs + RSB_INTS);
502
503 complete(&rsb->complete);
504
505 return IRQ_HANDLED;
506}
507
508static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
509{
510 int ret = 0;
511 u32 reg;
512
513 /* send init sequence */
514 writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
515 RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR);
516
517 readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
518 !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
519 if (reg & RSB_DMCR_DEVICE_START)
520 ret = -ETIMEDOUT;
521
522 /* clear interrupt status bits */
523 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
524
525 return ret;
526}
527
528/*
529 * There are 15 valid runtime addresses, though Allwinner typically
530 * skips the first, for unknown reasons, and uses the following three.
531 *
532 * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
533 * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
534 *
535 * No designs with 2 RSB slave devices sharing identical hardware
536 * addresses on the same bus have been seen in the wild. All designs
537 * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
538 * there is one, and 0x45 for peripheral ICs.
539 *
540 * The hardware does not seem to support re-setting runtime addresses.
541 * Attempts to do so result in the slave devices returning a NACK.
542 * Hence we just hardcode the mapping here, like Allwinner does.
543 */
544
545static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
Chen-Yu Tsai427d6e42015-12-16 17:14:45 +0800546 { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200547 { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
Chen-Yu Tsaibccd2402015-12-16 17:14:46 +0800548 { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200549};
550
551static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
552{
553 int i;
554
555 for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
556 if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
557 return sunxi_rsb_addr_maps[i].rtaddr;
558
559 return 0; /* 0 is an invalid runtime address */
560}
561
562static int of_rsb_register_devices(struct sunxi_rsb *rsb)
563{
564 struct device *dev = rsb->dev;
565 struct device_node *child, *np = dev->of_node;
566 u32 hwaddr;
567 u8 rtaddr;
568 int ret;
569
570 if (!np)
571 return -EINVAL;
572
573 /* Runtime addresses for all slaves should be set first */
574 for_each_available_child_of_node(np, child) {
Rob Herring9c0982d2017-07-18 16:42:51 -0500575 dev_dbg(dev, "setting child %pOF runtime address\n",
576 child);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200577
578 ret = of_property_read_u32(child, "reg", &hwaddr);
579 if (ret) {
Rob Herring9c0982d2017-07-18 16:42:51 -0500580 dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
581 child, ret);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200582 continue;
583 }
584
585 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
586 if (!rtaddr) {
Rob Herring9c0982d2017-07-18 16:42:51 -0500587 dev_err(dev, "%pOF: unknown hardware device address\n",
588 child);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200589 continue;
590 }
591
592 /*
593 * Since no devices have been registered yet, we are the
594 * only ones using the bus, we can skip locking the bus.
595 */
596
597 /* setup command parameters */
598 writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
599 writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
600 rsb->regs + RSB_DAR);
601
602 /* send command */
603 ret = _sunxi_rsb_run_xfer(rsb);
604 if (ret)
Rob Herring9c0982d2017-07-18 16:42:51 -0500605 dev_warn(dev, "%pOF: set runtime address failed: %d\n",
606 child, ret);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200607 }
608
609 /* Then we start adding devices and probing them */
610 for_each_available_child_of_node(np, child) {
611 struct sunxi_rsb_device *rdev;
612
Rob Herring9c0982d2017-07-18 16:42:51 -0500613 dev_dbg(dev, "adding child %pOF\n", child);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200614
615 ret = of_property_read_u32(child, "reg", &hwaddr);
616 if (ret)
617 continue;
618
619 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
620 if (!rtaddr)
621 continue;
622
623 rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr);
624 if (IS_ERR(rdev))
Rob Herring9c0982d2017-07-18 16:42:51 -0500625 dev_err(dev, "failed to add child device %pOF: %ld\n",
626 child, PTR_ERR(rdev));
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200627 }
628
629 return 0;
630}
631
Samuel Holland22754ac2021-01-03 05:06:33 -0600632static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
633{
634 struct device *dev = rsb->dev;
635 unsigned long p_clk_freq;
636 u32 clk_delay, reg;
637 int clk_div, ret;
638
639 ret = clk_prepare_enable(rsb->clk);
640 if (ret) {
641 dev_err(dev, "failed to enable clk: %d\n", ret);
642 return ret;
643 }
644
645 ret = reset_control_deassert(rsb->rstc);
646 if (ret) {
647 dev_err(dev, "failed to deassert reset line: %d\n", ret);
648 goto err_clk_disable;
649 }
650
651 /* reset the controller */
652 writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
653 readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
654 !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
655
656 /*
657 * Clock frequency and delay calculation code is from
658 * Allwinner U-boot sources.
659 *
660 * From A83 user manual:
661 * bus clock frequency = parent clock frequency / (2 * (divider + 1))
662 */
663 p_clk_freq = clk_get_rate(rsb->clk);
664 clk_div = p_clk_freq / rsb->clk_freq / 2;
665 if (!clk_div)
666 clk_div = 1;
667 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
668 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
669
670 clk_delay = clk_div >> 1;
671 if (!clk_delay)
672 clk_delay = 1;
673
674 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
675 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
676 rsb->regs + RSB_CCR);
677
678 return 0;
679
680err_clk_disable:
681 clk_disable_unprepare(rsb->clk);
682
683 return ret;
684}
685
686static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
687{
688 reset_control_assert(rsb->rstc);
Jernej Skrabec017a7162021-11-21 09:35:37 +0100689
690 /* Keep the clock and PM reference counts consistent. */
691 if (!pm_runtime_status_suspended(rsb->dev))
692 clk_disable_unprepare(rsb->clk);
Samuel Holland22754ac2021-01-03 05:06:33 -0600693}
694
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600695static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
696{
697 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
698
699 clk_disable_unprepare(rsb->clk);
700
701 return 0;
702}
703
704static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
705{
706 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
707
708 return clk_prepare_enable(rsb->clk);
709}
710
Samuel Holland84310742021-01-03 05:06:34 -0600711static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
712{
713 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
714
715 sunxi_rsb_hw_exit(rsb);
716
717 return 0;
718}
719
720static int __maybe_unused sunxi_rsb_resume(struct device *dev)
721{
722 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
723
724 return sunxi_rsb_hw_init(rsb);
725}
726
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200727static int sunxi_rsb_probe(struct platform_device *pdev)
728{
729 struct device *dev = &pdev->dev;
730 struct device_node *np = dev->of_node;
731 struct resource *r;
732 struct sunxi_rsb *rsb;
Samuel Holland22754ac2021-01-03 05:06:33 -0600733 u32 clk_freq = 3000000;
734 int irq, ret;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200735
736 of_property_read_u32(np, "clock-frequency", &clk_freq);
737 if (clk_freq > RSB_MAX_FREQ) {
738 dev_err(dev,
739 "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
740 clk_freq);
741 return -EINVAL;
742 }
743
744 rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
745 if (!rsb)
746 return -ENOMEM;
747
748 rsb->dev = dev;
Samuel Holland22754ac2021-01-03 05:06:33 -0600749 rsb->clk_freq = clk_freq;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200750 platform_set_drvdata(pdev, rsb);
751 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
752 rsb->regs = devm_ioremap_resource(dev, r);
753 if (IS_ERR(rsb->regs))
754 return PTR_ERR(rsb->regs);
755
756 irq = platform_get_irq(pdev, 0);
Stephen Boyd9d4db2f2019-07-30 11:15:02 -0700757 if (irq < 0)
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200758 return irq;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200759
760 rsb->clk = devm_clk_get(dev, NULL);
761 if (IS_ERR(rsb->clk)) {
762 ret = PTR_ERR(rsb->clk);
763 dev_err(dev, "failed to retrieve clk: %d\n", ret);
764 return ret;
765 }
766
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200767 rsb->rstc = devm_reset_control_get(dev, NULL);
768 if (IS_ERR(rsb->rstc)) {
769 ret = PTR_ERR(rsb->rstc);
770 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
Samuel Holland22754ac2021-01-03 05:06:33 -0600771 return ret;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200772 }
773
774 init_completion(&rsb->complete);
775 mutex_init(&rsb->lock);
776
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200777 ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
778 if (ret) {
779 dev_err(dev, "can't register interrupt handler irq %d: %d\n",
780 irq, ret);
Samuel Holland22754ac2021-01-03 05:06:33 -0600781 return ret;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200782 }
783
Samuel Holland22754ac2021-01-03 05:06:33 -0600784 ret = sunxi_rsb_hw_init(rsb);
785 if (ret)
786 return ret;
787
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200788 /* initialize all devices on the bus into RSB mode */
789 ret = sunxi_rsb_init_device_mode(rsb);
790 if (ret)
791 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
792
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600793 pm_suspend_ignore_children(dev, true);
794 pm_runtime_set_active(dev);
795 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
796 pm_runtime_use_autosuspend(dev);
797 pm_runtime_enable(dev);
798
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200799 of_rsb_register_devices(rsb);
800
801 return 0;
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200802}
803
804static int sunxi_rsb_remove(struct platform_device *pdev)
805{
806 struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
807
808 device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600809 pm_runtime_disable(&pdev->dev);
Samuel Holland22754ac2021-01-03 05:06:33 -0600810 sunxi_rsb_hw_exit(rsb);
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200811
812 return 0;
813}
814
Samuel Holland84310742021-01-03 05:06:34 -0600815static void sunxi_rsb_shutdown(struct platform_device *pdev)
816{
817 struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
818
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600819 pm_runtime_disable(&pdev->dev);
Samuel Holland84310742021-01-03 05:06:34 -0600820 sunxi_rsb_hw_exit(rsb);
821}
822
823static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
Samuel Holland4a0dbc12021-01-03 05:06:35 -0600824 SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
825 sunxi_rsb_runtime_resume, NULL)
Samuel Holland84310742021-01-03 05:06:34 -0600826 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
827};
828
Samuel Holland014d65b2021-01-03 05:06:32 -0600829static const struct of_device_id sunxi_rsb_of_match_table[] = {
830 { .compatible = "allwinner,sun8i-a23-rsb" },
831 {}
832};
833MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
834
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200835static struct platform_driver sunxi_rsb_driver = {
836 .probe = sunxi_rsb_probe,
837 .remove = sunxi_rsb_remove,
Samuel Holland84310742021-01-03 05:06:34 -0600838 .shutdown = sunxi_rsb_shutdown,
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200839 .driver = {
840 .name = RSB_CTRL_NAME,
841 .of_match_table = sunxi_rsb_of_match_table,
Samuel Holland84310742021-01-03 05:06:34 -0600842 .pm = &sunxi_rsb_dev_pm_ops,
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200843 },
844};
845
846static int __init sunxi_rsb_init(void)
847{
848 int ret;
849
850 ret = bus_register(&sunxi_rsb_bus);
851 if (ret) {
852 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
853 return ret;
854 }
855
856 return platform_driver_register(&sunxi_rsb_driver);
857}
858module_init(sunxi_rsb_init);
859
860static void __exit sunxi_rsb_exit(void)
861{
862 platform_driver_unregister(&sunxi_rsb_driver);
863 bus_unregister(&sunxi_rsb_bus);
864}
865module_exit(sunxi_rsb_exit);
866
867MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
868MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
869MODULE_LICENSE("GPL v2");