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Sameer Pujar665308c2020-07-19 10:31:20 +05301# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Tegra210 AHUB Device Tree Bindings
8
9description: |
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
12 crossbar for routing audio data across these accelerators. It has
13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
14 engine through ADMAIF.
15
16maintainers:
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
19
20properties:
21 $nodename:
22 pattern: "^ahub@[0-9a-f]*$"
23
24 compatible:
25 oneOf:
26 - enum:
27 - nvidia,tegra210-ahub
28 - nvidia,tegra186-ahub
Sameer Pujarfed44d6c2022-01-28 18:07:54 +053029 - nvidia,tegra234-ahub
Sameer Pujar665308c2020-07-19 10:31:20 +053030 - items:
31 - const: nvidia,tegra194-ahub
32 - const: nvidia,tegra186-ahub
33
34 reg:
35 maxItems: 1
36
37 clocks:
38 maxItems: 1
39
40 clock-names:
41 const: ahub
42
43 assigned-clocks:
44 maxItems: 1
45
46 assigned-clock-parents:
47 maxItems: 1
48
49 assigned-clock-rates:
50 maxItems: 1
51
52 "#address-cells":
53 const: 1
54
55 "#size-cells":
56 const: 1
57
58 ranges: true
59
Sameer Pujar9e0f86f2021-01-19 14:58:11 +053060 ports:
Rob Herring9c1e0432021-03-31 09:27:46 -050061 $ref: /schemas/graph.yaml#/properties/ports
Sameer Pujar9e0f86f2021-01-19 14:58:11 +053062 description: |
63 Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
64 These are connected to ACIF interfaces of AHUB clients. Thus the
65 number of port nodes depend on the number of clients that AHUB may
66 have depending on the SoC revision.
67
Rob Herring9c1e0432021-03-31 09:27:46 -050068 patternProperties:
69 '^port@[0-9]':
70 $ref: audio-graph-port.yaml#
71 unevaluatedProperties: false
72
Rob Herring8b01a0d2021-03-26 13:50:03 -060073patternProperties:
74 '^i2s@[0-9a-f]+$':
75 type: object
76
77 '^dmic@[0-9a-f]+$':
78 type: object
79 $ref: nvidia,tegra210-dmic.yaml#
80
81 '^admaif@[0-9a-f]+$':
82 type: object
83 $ref: nvidia,tegra210-admaif.yaml#
84
85 '^dspk@[0-9a-f]+$':
86 type: object
87 $ref: nvidia,tegra186-dspk.yaml#
88
Sameer Pujaraa56a9d2021-09-13 22:12:12 +053089 '^mvc@[0-9a-f]+$':
90 type: object
91 $ref: nvidia,tegra210-mvc.yaml#
92
93 '^sfc@[0-9a-f]+$':
94 type: object
95 $ref: nvidia,tegra210-sfc.yaml#
96
97 '^amx@[0-9a-f]+$':
98 type: object
99 $ref: nvidia,tegra210-amx.yaml#
100
101 '^adx@[0-9a-f]+$':
102 type: object
103 $ref: nvidia,tegra210-adx.yaml#
104
105 '^amixer@[0-9a-f]+$':
106 type: object
107 $ref: nvidia,tegra210-mixer.yaml#
108
Sameer Pujarc54ce1a2022-03-31 19:33:27 +0530109 '^asrc@[0-9a-f]+$':
110 type: object
111 $ref: nvidia,tegra186-asrc.yaml#
112
Sameer Pujar45c6c5e2022-06-03 12:06:07 +0530113 '^processing-engine@[0-9a-f]+$':
114 type: object
115 $ref: nvidia,tegra210-ope.yaml#
116
Sameer Pujar665308c2020-07-19 10:31:20 +0530117required:
118 - compatible
119 - reg
120 - clocks
121 - clock-names
122 - assigned-clocks
123 - assigned-clock-parents
124 - "#address-cells"
125 - "#size-cells"
126 - ranges
127
Rob Herring9c1e0432021-03-31 09:27:46 -0500128additionalProperties: false
Rob Herring6a0e3212020-10-05 13:38:30 -0500129
Sameer Pujar665308c2020-07-19 10:31:20 +0530130examples:
131 - |
132 #include<dt-bindings/clock/tegra210-car.h>
133
134 ahub@702d0800 {
135 compatible = "nvidia,tegra210-ahub";
136 reg = <0x702d0800 0x800>;
137 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
138 clock-names = "ahub";
139 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
140 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
141 #address-cells = <1>;
142 #size-cells = <1>;
143 ranges = <0x702d0000 0x702d0000 0x0000e400>;
144
145 // All AHUB child nodes below
146 admaif@702d0000 {
147 compatible = "nvidia,tegra210-admaif";
148 reg = <0x702d0000 0x800>;
149 dmas = <&adma 1>, <&adma 1>,
150 <&adma 2>, <&adma 2>,
151 <&adma 3>, <&adma 3>,
152 <&adma 4>, <&adma 4>,
153 <&adma 5>, <&adma 5>,
154 <&adma 6>, <&adma 6>,
155 <&adma 7>, <&adma 7>,
156 <&adma 8>, <&adma 8>,
157 <&adma 9>, <&adma 9>,
158 <&adma 10>, <&adma 10>;
159 dma-names = "rx1", "tx1",
160 "rx2", "tx2",
161 "rx3", "tx3",
162 "rx4", "tx4",
163 "rx5", "tx5",
164 "rx6", "tx6",
165 "rx7", "tx7",
166 "rx8", "tx8",
167 "rx9", "tx9",
168 "rx10", "tx10";
169 };
170
171 i2s@702d1000 {
172 compatible = "nvidia,tegra210-i2s";
173 reg = <0x702d1000 0x100>;
174 clocks = <&tegra_car TEGRA210_CLK_I2S0>;
175 clock-names = "i2s";
176 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
177 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
178 assigned-clock-rates = <1536000>;
179 sound-name-prefix = "I2S1";
180 };
181
182 dmic@702d4000 {
183 compatible = "nvidia,tegra210-dmic";
184 reg = <0x702d4000 0x100>;
185 clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
186 clock-names = "dmic";
187 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
188 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
189 assigned-clock-rates = <3072000>;
190 sound-name-prefix = "DMIC1";
191 };
192
193 // More child nodes to follow
194 };
195
196...