blob: 8c265bd80faa7c7e6f4951ba510cd4924e1cb0e0 [file] [log] [blame]
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -03001/*
Ruslan Pisarevd00586452010-10-20 06:35:54 -03002 * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
3 *
4 * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
5 *
6 * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
7 * - DVB-T support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation version 2
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030017 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
Tejun Heo4ef09882010-03-30 02:52:33 +090021#include <linux/slab.h>
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030022#include <linux/usb.h>
23#include <linux/i2c.h>
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030024#include "tm6000.h"
25#include "tm6000-regs.h"
26#include <media/v4l2-common.h>
27#include <media/tuner.h>
28
Ruslan Pisarev4363a0b2010-10-20 06:34:18 -030029#define USB_TIMEOUT (5 * HZ) /* ms */
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030030
Timofey Trofimov52e0a722010-05-29 13:52:46 -030031int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
32 u16 value, u16 index, u8 *buf, u16 len)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030033{
34 int ret, i;
35 unsigned int pipe;
Timofey Trofimov52e0a722010-05-29 13:52:46 -030036 u8 *data = NULL;
matthieu castet3874cd72011-12-16 14:15:07 -030037 int delay = 5000;
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030038
Dan Carpenter88b404c2013-01-30 03:03:43 -030039 if (len) {
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030040 data = kzalloc(len, GFP_KERNEL);
Dan Carpenter88b404c2013-01-30 03:03:43 -030041 if (!data)
42 return -ENOMEM;
43 }
44
45 mutex_lock(&dev->usb_lock);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030046
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030047 if (req_type & USB_DIR_IN)
Timofey Trofimov52e0a722010-05-29 13:52:46 -030048 pipe = usb_rcvctrlpipe(dev->udev, 0);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030049 else {
Timofey Trofimov52e0a722010-05-29 13:52:46 -030050 pipe = usb_sndctrlpipe(dev->udev, 0);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030051 memcpy(data, buf, len);
52 }
53
Mauro Carvalho Chehabedecce02008-11-28 06:42:24 -030054 if (tm6000_debug & V4L2_DEBUG_I2C) {
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030055 printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030056
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030057 printk(KERN_CONT "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
Timofey Trofimov52e0a722010-05-29 13:52:46 -030058 (req_type & USB_DIR_IN) ? " IN" : "OUT",
Timofey Trofimov52e0a722010-05-29 13:52:46 -030059 req_type, req, value&0xff, value>>8, index&0xff,
60 index>>8, len&0xff, len>>8);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030061
Timofey Trofimov52e0a722010-05-29 13:52:46 -030062 if (!(req_type & USB_DIR_IN)) {
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030063 printk(KERN_CONT ">>> ");
Timofey Trofimov52e0a722010-05-29 13:52:46 -030064 for (i = 0; i < len; i++)
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030065 printk(KERN_CONT " %02x", buf[i]);
66 printk(KERN_CONT "\n");
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030067 }
68 }
69
Timofey Trofimov52e0a722010-05-29 13:52:46 -030070 ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
71 data, len, USB_TIMEOUT);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030072
73 if (req_type & USB_DIR_IN)
74 memcpy(buf, data, len);
75
Mauro Carvalho Chehabedecce02008-11-28 06:42:24 -030076 if (tm6000_debug & V4L2_DEBUG_I2C) {
Timofey Trofimov52e0a722010-05-29 13:52:46 -030077 if (ret < 0) {
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030078 if (req_type & USB_DIR_IN)
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030079 printk(KERN_DEBUG "<<< (len=%d)\n", len);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030080
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030081 printk(KERN_CONT "%s: Error #%d\n", __func__, ret);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030082 } else if (req_type & USB_DIR_IN) {
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030083 printk(KERN_CONT "<<< ");
Timofey Trofimov52e0a722010-05-29 13:52:46 -030084 for (i = 0; i < len; i++)
Mauro Carvalho Chehab45dbf0d2011-09-23 09:26:22 -030085 printk(KERN_CONT " %02x", buf[i]);
86 printk(KERN_CONT "\n");
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -030087 }
88 }
89
90 kfree(data);
Thierry Redingfcd44b92011-12-06 09:05:03 -030091
matthieu castet3874cd72011-12-16 14:15:07 -030092 if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY)
93 delay = 0;
94
95 if (req == REQ_16_SET_GET_I2C_WR1_RDN && !(req_type & USB_DIR_IN)) {
96 unsigned int tsleep;
97 /* Calculate delay time, 14000us for 64 bytes */
98 tsleep = (len * 200) + 200;
99 if (tsleep < delay)
100 tsleep = delay;
101 usleep_range(tsleep, tsleep + 1000);
102 }
103 else if (delay)
104 usleep_range(delay, delay + 1000);
Michel Ludwiga5adfbe2007-07-02 20:59:58 -0300105
Thierry Redingfc4eab22011-08-04 04:14:10 -0300106 mutex_unlock(&dev->usb_lock);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300107 return ret;
108}
109
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300110int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300111{
112 return
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300113 tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
114 req, value, index, NULL, 0);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300115}
Randy Dunlap29ec15e2010-02-10 14:53:57 -0300116EXPORT_SYMBOL_GPL(tm6000_set_reg);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300117
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300118int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300119{
120 int rc;
121 u8 buf[1];
122
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300123 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
124 value, index, buf, 1);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300125
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300126 if (rc < 0)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300127 return rc;
128
129 return *buf;
130}
Randy Dunlap29ec15e2010-02-10 14:53:57 -0300131EXPORT_SYMBOL_GPL(tm6000_get_reg);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300132
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300133int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
134 u16 index, u16 mask)
135{
136 int rc;
137 u8 buf[1];
138 u8 new_index;
139
140 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
Stefan Ringelc00ecc92011-11-28 15:46:17 -0300141 value, 0, buf, 1);
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300142
143 if (rc < 0)
144 return rc;
145
146 new_index = (buf[0] & ~mask) | (index & mask);
147
Stefan Ringelc00ecc92011-11-28 15:46:17 -0300148 if (new_index == buf[0])
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300149 return 0;
150
151 return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
152 req, value, new_index, NULL, 0);
153}
154EXPORT_SYMBOL_GPL(tm6000_set_reg_mask);
155
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300156int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300157{
158 int rc;
159 u8 buf[2];
160
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300161 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
162 value, index, buf, 2);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300163
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300164 if (rc < 0)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300165 return rc;
166
167 return buf[1]|buf[0]<<8;
168}
169
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300170int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
Stefan Ringel2f790882010-04-02 13:52:49 -0300171{
172 int rc;
173 u8 buf[4];
174
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300175 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
176 value, index, buf, 4);
Stefan Ringel2f790882010-04-02 13:52:49 -0300177
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300178 if (rc < 0)
Stefan Ringel2f790882010-04-02 13:52:49 -0300179 return rc;
180
181 return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
182}
183
Dmitri Belimov2a15ac72010-05-18 04:23:29 -0300184int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
185{
186 int rc;
187
188 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
189 if (rc < 0)
190 return rc;
191
192 msleep(tsleep);
193
194 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
195 msleep(tsleep);
196
197 return rc;
198}
199
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300200void tm6000_set_fourcc_format(struct tm6000_core *dev)
201{
Mauro Carvalho Chehab717ecd22008-10-25 08:56:16 -0300202 if (dev->dev_type == TM6010) {
Mauro Carvalho Chehab42238712010-05-03 04:25:59 -0300203 int val;
204
Thierry Reding4129e562011-08-04 04:14:07 -0300205 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc;
Mauro Carvalho Chehab717ecd22008-10-25 08:56:16 -0300206 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
Thierry Reding4129e562011-08-04 04:14:07 -0300207 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val);
Mauro Carvalho Chehab717ecd22008-10-25 08:56:16 -0300208 else
Thierry Reding4129e562011-08-04 04:14:07 -0300209 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val | 1);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300210 } else {
Mauro Carvalho Chehab717ecd22008-10-25 08:56:16 -0300211 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300212 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
Mauro Carvalho Chehab717ecd22008-10-25 08:56:16 -0300213 else
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300214 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300215 }
216}
217
Mauro Carvalho Chehab589851d2010-10-12 12:11:55 -0300218static void tm6000_set_vbi(struct tm6000_core *dev)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300219{
Mauro Carvalho Chehab589851d2010-10-12 12:11:55 -0300220 /*
221 * FIXME:
222 * VBI lines and start/end are different between 60Hz and 50Hz
223 * So, it is very likely that we need to change the config to
224 * something that takes it into account, doing something different
225 * if (dev->norm & V4L2_STD_525_60)
226 */
Mauro Carvalho Chehab94d43502010-10-07 09:42:43 -0300227
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300228 if (dev->dev_type == TM6010) {
Stefan Ringel120756e2010-04-29 09:24:47 -0300229 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
230 tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
231 tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
232 tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
233 tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
234 tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
235 tm6000_set_reg(dev,
236 TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
237 tm6000_set_reg(dev,
238 TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
239 tm6000_set_reg(dev,
240 TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
241 tm6000_set_reg(dev,
242 TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
243 tm6000_set_reg(dev,
244 TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
245 tm6000_set_reg(dev,
246 TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
247 tm6000_set_reg(dev,
248 TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
249 tm6000_set_reg(dev,
250 TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
251 tm6000_set_reg(dev,
252 TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
253 tm6000_set_reg(dev,
254 TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
255 tm6000_set_reg(dev,
256 TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
257 tm6000_set_reg(dev,
258 TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
259 tm6000_set_reg(dev,
260 TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
261 tm6000_set_reg(dev,
262 TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
263 tm6000_set_reg(dev,
264 TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
265 tm6000_set_reg(dev,
266 TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
267 tm6000_set_reg(dev,
268 TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
269 tm6000_set_reg(dev,
270 TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
271 tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
272 tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
273 tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
274 tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
275 tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
276 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
Mauro Carvalho Chehab589851d2010-10-12 12:11:55 -0300277 }
278}
279
280int tm6000_init_analog_mode(struct tm6000_core *dev)
281{
282 struct v4l2_frequency f;
283
284 if (dev->dev_type == TM6010) {
Thierry Reding87354582011-08-04 04:14:08 -0300285 u8 active = TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE;
286
287 if (!dev->radio)
288 active |= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE;
289
Stefan Ringelf010dca2011-05-09 16:53:58 -0300290 /* Enable video and audio */
Thierry Reding4129e562011-08-04 04:14:07 -0300291 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
Thierry Reding87354582011-08-04 04:14:08 -0300292 active, 0x60);
Stefan Ringelf010dca2011-05-09 16:53:58 -0300293 /* Disable TS input */
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300294 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
295 0x00, 0x40);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300296 } else {
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300297 /* Enables soft reset */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300298 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300299
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300300 if (dev->scaler)
Stefan Ringelf010dca2011-05-09 16:53:58 -0300301 /* Disable Hfilter and Enable TS Drop err */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300302 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300303 else /* Enable Hfilter and disable TS Drop err */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300304 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300305
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300306 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
Stefan Ringel98390292011-01-25 13:40:55 -0300307 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23);
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300308 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
309 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
310 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
Stefan Ringel98390292011-01-25 13:40:55 -0300311 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f);
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300312
313 /* AP Software reset */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300314 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
315 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300316
317 tm6000_set_fourcc_format(dev);
318
319 /* Disables soft reset */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300320 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300321 }
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300322 msleep(20);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300323
324 /* Tuner firmware can now be loaded */
325
Mauro Carvalho Chehab94d43502010-10-07 09:42:43 -0300326 /*
327 * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
328 * for more than a few seconds. Not sure why, as this behavior does
329 * not happen on other devices with xc3028. So, I suspect that it
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300330 * is yet another bug at tm6000. After start sleeping, decoding
Mauro Carvalho Chehab94d43502010-10-07 09:42:43 -0300331 * doesn't start automatically. Instead, it requires some
332 * I2C commands to wake it up. As we want to have image at the
333 * beginning, we needed to add this hack. The better would be to
334 * discover some way to make tm6000 to wake up without this hack.
335 */
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300336 f.frequency = dev->freq;
Mauro Carvalho Chehab427f7fa2009-09-14 16:37:13 -0300337 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300338
339 msleep(100);
Stefan Ringel0f6040e2011-05-09 16:53:53 -0300340 tm6000_set_standard(dev);
Mauro Carvalho Chehab589851d2010-10-12 12:11:55 -0300341 tm6000_set_vbi(dev);
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300342 tm6000_set_audio_bitrate(dev, 48000);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300343
Stefan Ringelf36cc032010-05-23 15:29:25 -0300344 /* switch dvb led off */
345 if (dev->gpio.dvb_led) {
346 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
347 dev->gpio.dvb_led, 0x01);
348 }
349
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300350 return 0;
351}
352
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300353int tm6000_init_digital_mode(struct tm6000_core *dev)
Michel Ludwig3169c9b2007-08-21 17:37:22 -0300354{
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300355 if (dev->dev_type == TM6010) {
Stefan Ringelf010dca2011-05-09 16:53:58 -0300356 /* Disable video and audio */
Thierry Reding4129e562011-08-04 04:14:07 -0300357 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
Stefan Ringelf010dca2011-05-09 16:53:58 -0300358 0x00, 0x60);
359 /* Enable TS input */
360 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
361 0x40, 0x40);
362 /* all power down, but not the digital data port */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300363 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
364 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
365 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300366 } else {
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300367 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
368 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
369 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
Stefan Ringel98390292011-01-25 13:40:55 -0300370 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08);
371 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
372 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
373 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8);
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300374 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
375 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
376 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
Stefan Ringel98390292011-01-25 13:40:55 -0300377 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37);
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300378 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
379 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
380 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300381
Stefan Ringel98390292011-01-25 13:40:55 -0300382 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
383 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
384 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08);
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300385 msleep(50);
386
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300387 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300388 msleep(50);
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300389 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300390 msleep(50);
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300391 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
Stefan Ringelc733a4d2010-02-03 17:27:23 -0300392 msleep(100);
393 }
Stefan Ringelf36cc032010-05-23 15:29:25 -0300394
395 /* switch dvb led on */
396 if (dev->gpio.dvb_led) {
397 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
398 dev->gpio.dvb_led, 0x00);
399 }
400
Michel Ludwig3169c9b2007-08-21 17:37:22 -0300401 return 0;
402}
Stefan Ringelcee39262010-05-30 09:19:04 -0300403EXPORT_SYMBOL(tm6000_init_digital_mode);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300404
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300405struct reg_init {
406 u8 req;
407 u8 reg;
408 u8 val;
409};
410
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300411/* The meaning of those initializations are unknown */
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300412static struct reg_init tm6000_init_tab[] = {
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300413 /* REG VALUE */
Stefan Ringel98390292011-01-25 13:40:55 -0300414 { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f },
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300415 { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
416 { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
417 { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
Stefan Ringel98390292011-01-25 13:40:55 -0300418 { TM6000_REQ07_RDA_CLK_SEL, 0x23 },
419 { TM6000_REQ07_RDB_OUT_SEL, 0x08 },
420 { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 },
421 { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 },
422 { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 },
423 { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 },
424 { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */
425 { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 },
426
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300427 { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
428 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
429 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
430 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
431 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
432 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
433 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
434 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
435 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
436 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
437 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
438 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
439 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
440 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
441 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
442 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
443 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
444 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
445 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
446 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
447 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
448 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
449 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
450 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
451 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
452 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
453 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
454 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
455 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
456 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
457 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
458 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
459 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
460 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
461 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
462 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
463 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
464 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
465 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
466 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
467 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
468 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
469 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
470 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
471 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
472 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
473 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
474 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
475 { TM6010_REQ07_RC3_HSTART1, 0x88 },
476 { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
Mauro Carvalho Chehab2415a2c2010-03-11 10:26:45 -0300477 { TM6010_REQ05_R18_IMASK7, 0x00 },
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300478};
479
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300480static struct reg_init tm6010_init_tab[] = {
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300481 { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
482 { TM6010_REQ07_RC4_HSTART0, 0xa0 },
483 { TM6010_REQ07_RC6_HEND0, 0x40 },
484 { TM6010_REQ07_RCA_VEND0, 0x31 },
Thierry Reding4129e562011-08-04 04:14:07 -0300485 { TM6010_REQ07_RCC_ACTIVE_IF, 0xe1 },
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300486 { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
487 { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300488
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300489 { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
490 { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
491 { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
492 { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
493 { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
494 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
495 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
496 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
497 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300498
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300499 { TM6010_REQ07_R3F_RESET, 0x01 },
500 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
501 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
502 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
503 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
504 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
505 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
506 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
507 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
508 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
509 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
510 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
511 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
512 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
513 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
514 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
515 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
516 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
517 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
518 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
519 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
520 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
521 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
522 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
523 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
524 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
525 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
526 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
527 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
528 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
529 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
530 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
531 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
532 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
533 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
534 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
535 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
536 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
537 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
538 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
539 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
540 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
541 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
542 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
543 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
544 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
545 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
546 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
547 { TM6010_REQ07_RC3_HSTART1, 0x88 },
548 { TM6010_REQ07_R3F_RESET, 0x00 },
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300549
Mauro Carvalho Chehab2415a2c2010-03-11 10:26:45 -0300550 { TM6010_REQ05_R18_IMASK7, 0x00 },
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300551
Mauro Carvalho Chehab15a295e2011-11-29 11:35:55 -0300552 { TM6010_REQ07_RDC_IR_LEADER1, 0xaa },
553 { TM6010_REQ07_RDD_IR_LEADER0, 0x30 },
554 { TM6010_REQ07_RDE_IR_PULSE_CNT1, 0x20 },
555 { TM6010_REQ07_RDF_IR_PULSE_CNT0, 0xd0 },
Stefan Ringeld46ca932010-02-15 14:37:16 -0300556 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
Mauro Carvalho Chehab4a83b012011-11-29 11:30:30 -0300557 { TM6010_REQ07_RD8_IR, 0x0f },
Stefan Ringeld46ca932010-02-15 14:37:16 -0300558
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300559 /* set remote wakeup key:any key wakeup */
Mauro Carvalho Chehab9afec492010-03-11 10:26:46 -0300560 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
Mauro Carvalho Chehab15a295e2011-11-29 11:35:55 -0300561 { TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff },
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300562};
563
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300564int tm6000_init(struct tm6000_core *dev)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300565{
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300566 int board, rc = 0, i, size;
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300567 struct reg_init *tab;
568
Stefan Ringelc1937f8e2010-11-09 13:50:28 -0300569 /* Check board revision */
570 board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
571 if (board >= 0) {
572 switch (board & 0xff) {
573 case 0xf3:
574 printk(KERN_INFO "Found tm6000\n");
575 if (dev->dev_type != TM6000)
576 dev->dev_type = TM6000;
577 break;
578 case 0xf4:
579 printk(KERN_INFO "Found tm6010\n");
580 if (dev->dev_type != TM6010)
581 dev->dev_type = TM6010;
582 break;
583 default:
584 printk(KERN_INFO "Unknown board version = 0x%08x\n", board);
585 }
586 } else
587 printk(KERN_ERR "Error %i while retrieving board version\n", board);
588
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300589 if (dev->dev_type == TM6010) {
590 tab = tm6010_init_tab;
591 size = ARRAY_SIZE(tm6010_init_tab);
592 } else {
593 tab = tm6000_init_tab;
594 size = ARRAY_SIZE(tm6000_init_tab);
595 }
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300596
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300597 /* Load board's initialization table */
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300598 for (i = 0; i < size; i++) {
599 rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
600 if (rc < 0) {
Mauro Carvalho Chehab68616502016-10-18 17:44:19 -0200601 printk(KERN_ERR "Error %i while setting req %d, reg %d to value %d\n",
602 rc,
Timofey Trofimov52e0a722010-05-29 13:52:46 -0300603 tab[i].req, tab[i].reg, tab[i].val);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300604 return rc;
605 }
606 }
607
Mauro Carvalho Chehab29c389b2008-01-08 11:19:22 -0300608 msleep(5); /* Just to be conservative */
609
Mauro Carvalho Chehabe3ee9e52010-02-08 08:43:41 -0200610 rc = tm6000_cards_setup(dev);
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300611
Mauro Carvalho Chehabe3ee9e52010-02-08 08:43:41 -0200612 return rc;
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300613}
614
Thierry Redingdd0c8ab2011-08-04 04:14:13 -0300615
Mauro Carvalho Chehab44351aa2008-01-11 13:19:45 -0300616int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300617{
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300618 int val = 0;
619 u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
620 u8 areg_0a = 0x91; /* SIF 48KHz */
621
622 switch (bitrate) {
623 case 48000:
624 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
625 areg_0a = 0x91; /* SIF 48KHz */
626 dev->audio_bitrate = bitrate;
627 break;
628 case 32000:
629 areg_f0 = 0x00; /* ADC MCLK = 375 Fs */
630 areg_0a = 0x90; /* SIF 32KHz */
631 dev->audio_bitrate = bitrate;
632 break;
633 default:
634 return -EINVAL;
635 }
636
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300637
Stefan Ringel98390292011-01-25 13:40:55 -0300638 /* enable I2S, if we use sif or external I2S device */
Mauro Carvalho Chehaba59bff32010-06-07 11:57:01 -0300639 if (dev->dev_type == TM6010) {
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300640 val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a);
Mauro Carvalho Chehaba59bff32010-06-07 11:57:01 -0300641 if (val < 0)
642 return val;
Mauro Carvalho Chehaba59bff32010-06-07 11:57:01 -0300643
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300644 val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
645 areg_f0, 0xf0);
Stefan Ringel98390292011-01-25 13:40:55 -0300646 if (val < 0)
647 return val;
648 } else {
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300649 val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
650 areg_f0, 0xf0);
Stefan Ringel98390292011-01-25 13:40:55 -0300651 if (val < 0)
652 return val;
653 }
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300654 return 0;
Mauro Carvalho Chehab9701dc92009-09-14 09:42:41 -0300655}
Mauro Carvalho Chehab44351aa2008-01-11 13:19:45 -0300656EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
Stefan Ringel0439db752010-05-10 13:22:51 -0300657
Stefan Ringel0f6040e2011-05-09 16:53:53 -0300658int tm6000_set_audio_rinput(struct tm6000_core *dev)
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300659{
660 if (dev->dev_type == TM6010) {
661 /* Audio crossbar setting, default SIF1 */
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300662 u8 areg_f0;
Mauro Carvalho Chehab32f6f3a2011-11-24 12:20:12 -0300663 u8 areg_07 = 0x10;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300664
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300665 switch (dev->rinput.amux) {
666 case TM6000_AMUX_SIF1:
667 case TM6000_AMUX_SIF2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300668 areg_f0 = 0x03;
Mauro Carvalho Chehab32f6f3a2011-11-24 12:20:12 -0300669 areg_07 = 0x30;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300670 break;
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300671 case TM6000_AMUX_ADC1:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300672 areg_f0 = 0x00;
673 break;
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300674 case TM6000_AMUX_ADC2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300675 areg_f0 = 0x08;
676 break;
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300677 case TM6000_AMUX_I2S:
678 areg_f0 = 0x04;
679 break;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300680 default:
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300681 printk(KERN_INFO "%s: audio input dosn't support\n",
682 dev->name);
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300683 return 0;
684 break;
685 }
686 /* Set audio input crossbar */
687 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
688 areg_f0, 0x0f);
Mauro Carvalho Chehab32f6f3a2011-11-24 12:20:12 -0300689 /* Mux overflow workaround */
690 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
691 areg_07, 0xf0);
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300692 } else {
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300693 u8 areg_eb;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300694 /* Audio setting, default LINE1 */
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300695 switch (dev->rinput.amux) {
696 case TM6000_AMUX_ADC1:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300697 areg_eb = 0x00;
698 break;
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300699 case TM6000_AMUX_ADC2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300700 areg_eb = 0x04;
701 break;
702 default:
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300703 printk(KERN_INFO "%s: audio input dosn't support\n",
704 dev->name);
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300705 return 0;
706 break;
707 }
708 /* Set audio input */
709 tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
710 areg_eb, 0x0f);
711 }
712 return 0;
713}
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300714
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300715static void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute)
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300716{
717 u8 mute_reg = 0;
718
719 if (mute)
720 mute_reg = 0x08;
721
722 tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08);
723}
724
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300725static void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute)
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300726{
727 u8 mute_reg = 0;
728
729 if (mute)
730 mute_reg = 0x20;
731
732 if (dev->dev_type == TM6010) {
733 tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL,
734 mute_reg, 0x20);
735 tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL,
736 mute_reg, 0x20);
737 } else {
738 tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL,
739 mute_reg, 0x20);
740 tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL,
741 mute_reg, 0x20);
742 }
743}
744
745int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute)
746{
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300747 enum tm6000_mux mux;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300748
749 if (dev->radio)
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300750 mux = dev->rinput.amux;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300751 else
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300752 mux = dev->vinput[dev->input].amux;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300753
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300754 switch (mux) {
755 case TM6000_AMUX_SIF1:
756 case TM6000_AMUX_SIF2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300757 if (dev->dev_type == TM6010)
758 tm6010_set_mute_sif(dev, mute);
759 else {
Mauro Carvalho Chehab68616502016-10-18 17:44:19 -0200760 printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has SIF audio inputs. Please check the %s configuration.\n",
761 dev->name);
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300762 return -EINVAL;
763 }
764 break;
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300765 case TM6000_AMUX_ADC1:
766 case TM6000_AMUX_ADC2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300767 tm6010_set_mute_adc(dev, mute);
768 break;
769 default:
770 return -EINVAL;
771 break;
772 }
773 return 0;
774}
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300775
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300776static void tm6010_set_volume_sif(struct tm6000_core *dev, int vol)
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300777{
778 u8 vol_reg;
779
780 vol_reg = vol & 0x0F;
781
782 if (vol < 0)
783 vol_reg |= 0x40;
784
785 tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg);
786 tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg);
787}
788
Thierry Reding3d1a51d2011-08-04 04:14:01 -0300789static void tm6010_set_volume_adc(struct tm6000_core *dev, int vol)
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300790{
791 u8 vol_reg;
792
793 vol_reg = (vol + 0x10) & 0x1f;
794
795 if (dev->dev_type == TM6010) {
796 tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg);
797 tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg);
798 } else {
799 tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg);
800 tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg);
801 }
802}
803
804void tm6000_set_volume(struct tm6000_core *dev, int vol)
805{
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300806 enum tm6000_mux mux;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300807
808 if (dev->radio) {
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300809 mux = dev->rinput.amux;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300810 vol += 8; /* Offset to 0 dB */
811 } else
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300812 mux = dev->vinput[dev->input].amux;
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300813
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300814 switch (mux) {
815 case TM6000_AMUX_SIF1:
816 case TM6000_AMUX_SIF2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300817 if (dev->dev_type == TM6010)
818 tm6010_set_volume_sif(dev, vol);
819 else
Mauro Carvalho Chehab68616502016-10-18 17:44:19 -0200820 printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has SIF audio inputs. Please check the %s configuration.\n",
821 dev->name);
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300822 break;
Stefan Ringelfb7ef982011-05-09 16:53:51 -0300823 case TM6000_AMUX_ADC1:
824 case TM6000_AMUX_ADC2:
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300825 tm6010_set_volume_adc(dev, vol);
826 break;
827 default:
828 break;
829 }
830}
Dmitri Belimov8aff8ba2011-02-17 22:11:05 -0300831
Stefan Ringel0439db752010-05-10 13:22:51 -0300832static LIST_HEAD(tm6000_devlist);
833static DEFINE_MUTEX(tm6000_devlist_mutex);
834
835/*
836 * tm6000_realease_resource()
837 */
838
839void tm6000_remove_from_devlist(struct tm6000_core *dev)
840{
841 mutex_lock(&tm6000_devlist_mutex);
842 list_del(&dev->devlist);
843 mutex_unlock(&tm6000_devlist_mutex);
844};
845
846void tm6000_add_into_devlist(struct tm6000_core *dev)
847{
848 mutex_lock(&tm6000_devlist_mutex);
849 list_add_tail(&dev->devlist, &tm6000_devlist);
850 mutex_unlock(&tm6000_devlist_mutex);
851};
852
853/*
854 * Extension interface
855 */
856
857static LIST_HEAD(tm6000_extension_devlist);
Stefan Ringel0439db752010-05-10 13:22:51 -0300858
Mauro Carvalho Chehabb17b8692010-06-03 17:16:28 -0300859int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
860 char *buf, int size)
861{
862 struct tm6000_ops *ops = NULL;
863
864 /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
865
866 if (!list_empty(&tm6000_extension_devlist)) {
867 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
868 if (ops->fillbuf && ops->type == type)
869 ops->fillbuf(dev, buf, size);
870 }
871 }
872
873 return 0;
874}
875
Stefan Ringel0439db752010-05-10 13:22:51 -0300876int tm6000_register_extension(struct tm6000_ops *ops)
877{
878 struct tm6000_core *dev = NULL;
879
880 mutex_lock(&tm6000_devlist_mutex);
Stefan Ringel0439db752010-05-10 13:22:51 -0300881 list_add_tail(&ops->next, &tm6000_extension_devlist);
882 list_for_each_entry(dev, &tm6000_devlist, devlist) {
Mauro Carvalho Chehab3f23a812010-06-05 15:10:36 -0300883 ops->init(dev);
884 printk(KERN_INFO "%s: Initialized (%s) extension\n",
885 dev->name, ops->name);
Stefan Ringel0439db752010-05-10 13:22:51 -0300886 }
Stefan Ringel0439db752010-05-10 13:22:51 -0300887 mutex_unlock(&tm6000_devlist_mutex);
888 return 0;
889}
890EXPORT_SYMBOL(tm6000_register_extension);
891
892void tm6000_unregister_extension(struct tm6000_ops *ops)
893{
894 struct tm6000_core *dev = NULL;
895
896 mutex_lock(&tm6000_devlist_mutex);
Julia Lawalla3d7fc52010-08-03 23:34:36 +0200897 list_for_each_entry(dev, &tm6000_devlist, devlist)
898 ops->fini(dev);
Stefan Ringel0439db752010-05-10 13:22:51 -0300899
Stefan Ringel0439db752010-05-10 13:22:51 -0300900 printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
901 list_del(&ops->next);
Stefan Ringel0439db752010-05-10 13:22:51 -0300902 mutex_unlock(&tm6000_devlist_mutex);
903}
904EXPORT_SYMBOL(tm6000_unregister_extension);
905
906void tm6000_init_extension(struct tm6000_core *dev)
907{
908 struct tm6000_ops *ops = NULL;
909
Mauro Carvalho Chehab4ae18392010-10-11 09:57:34 -0300910 mutex_lock(&tm6000_devlist_mutex);
Stefan Ringel0439db752010-05-10 13:22:51 -0300911 if (!list_empty(&tm6000_extension_devlist)) {
912 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
913 if (ops->init)
914 ops->init(dev);
915 }
916 }
Mauro Carvalho Chehab4ae18392010-10-11 09:57:34 -0300917 mutex_unlock(&tm6000_devlist_mutex);
Stefan Ringel0439db752010-05-10 13:22:51 -0300918}
919
920void tm6000_close_extension(struct tm6000_core *dev)
921{
922 struct tm6000_ops *ops = NULL;
923
Mauro Carvalho Chehab4ae18392010-10-11 09:57:34 -0300924 mutex_lock(&tm6000_devlist_mutex);
Stefan Ringel0439db752010-05-10 13:22:51 -0300925 if (!list_empty(&tm6000_extension_devlist)) {
926 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
927 if (ops->fini)
928 ops->fini(dev);
929 }
930 }
Dmitri Belimov427aacf2010-12-28 21:49:07 -0300931 mutex_unlock(&tm6000_devlist_mutex);
Stefan Ringel0439db752010-05-10 13:22:51 -0300932}