Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 1 | /* |
Ruslan Pisarev | d0058645 | 2010-10-20 06:35:54 -0300 | [diff] [blame] | 2 | * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices |
| 3 | * |
| 4 | * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org> |
| 5 | * |
| 6 | * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com> |
| 7 | * - DVB-T support |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation version 2 |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 17 | */ |
| 18 | |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/kernel.h> |
Tejun Heo | 4ef0988 | 2010-03-30 02:52:33 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 22 | #include <linux/usb.h> |
| 23 | #include <linux/i2c.h> |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 24 | #include "tm6000.h" |
| 25 | #include "tm6000-regs.h" |
| 26 | #include <media/v4l2-common.h> |
| 27 | #include <media/tuner.h> |
| 28 | |
Ruslan Pisarev | 4363a0b | 2010-10-20 06:34:18 -0300 | [diff] [blame] | 29 | #define USB_TIMEOUT (5 * HZ) /* ms */ |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 30 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 31 | int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req, |
| 32 | u16 value, u16 index, u8 *buf, u16 len) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 33 | { |
| 34 | int ret, i; |
| 35 | unsigned int pipe; |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 36 | u8 *data = NULL; |
matthieu castet | 3874cd7 | 2011-12-16 14:15:07 -0300 | [diff] [blame] | 37 | int delay = 5000; |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 38 | |
Dan Carpenter | 88b404c | 2013-01-30 03:03:43 -0300 | [diff] [blame] | 39 | if (len) { |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 40 | data = kzalloc(len, GFP_KERNEL); |
Dan Carpenter | 88b404c | 2013-01-30 03:03:43 -0300 | [diff] [blame] | 41 | if (!data) |
| 42 | return -ENOMEM; |
| 43 | } |
| 44 | |
| 45 | mutex_lock(&dev->usb_lock); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 46 | |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 47 | if (req_type & USB_DIR_IN) |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 48 | pipe = usb_rcvctrlpipe(dev->udev, 0); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 49 | else { |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 50 | pipe = usb_sndctrlpipe(dev->udev, 0); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 51 | memcpy(data, buf, len); |
| 52 | } |
| 53 | |
Mauro Carvalho Chehab | edecce0 | 2008-11-28 06:42:24 -0300 | [diff] [blame] | 54 | if (tm6000_debug & V4L2_DEBUG_I2C) { |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 55 | printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 56 | |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 57 | printk(KERN_CONT "%s: %02x %02x %02x %02x %02x %02x %02x %02x ", |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 58 | (req_type & USB_DIR_IN) ? " IN" : "OUT", |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 59 | req_type, req, value&0xff, value>>8, index&0xff, |
| 60 | index>>8, len&0xff, len>>8); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 61 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 62 | if (!(req_type & USB_DIR_IN)) { |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 63 | printk(KERN_CONT ">>> "); |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 64 | for (i = 0; i < len; i++) |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 65 | printk(KERN_CONT " %02x", buf[i]); |
| 66 | printk(KERN_CONT "\n"); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 67 | } |
| 68 | } |
| 69 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 70 | ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index, |
| 71 | data, len, USB_TIMEOUT); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 72 | |
| 73 | if (req_type & USB_DIR_IN) |
| 74 | memcpy(buf, data, len); |
| 75 | |
Mauro Carvalho Chehab | edecce0 | 2008-11-28 06:42:24 -0300 | [diff] [blame] | 76 | if (tm6000_debug & V4L2_DEBUG_I2C) { |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 77 | if (ret < 0) { |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 78 | if (req_type & USB_DIR_IN) |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 79 | printk(KERN_DEBUG "<<< (len=%d)\n", len); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 80 | |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 81 | printk(KERN_CONT "%s: Error #%d\n", __func__, ret); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 82 | } else if (req_type & USB_DIR_IN) { |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 83 | printk(KERN_CONT "<<< "); |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 84 | for (i = 0; i < len; i++) |
Mauro Carvalho Chehab | 45dbf0d | 2011-09-23 09:26:22 -0300 | [diff] [blame] | 85 | printk(KERN_CONT " %02x", buf[i]); |
| 86 | printk(KERN_CONT "\n"); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 87 | } |
| 88 | } |
| 89 | |
| 90 | kfree(data); |
Thierry Reding | fcd44b9 | 2011-12-06 09:05:03 -0300 | [diff] [blame] | 91 | |
matthieu castet | 3874cd7 | 2011-12-16 14:15:07 -0300 | [diff] [blame] | 92 | if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY) |
| 93 | delay = 0; |
| 94 | |
| 95 | if (req == REQ_16_SET_GET_I2C_WR1_RDN && !(req_type & USB_DIR_IN)) { |
| 96 | unsigned int tsleep; |
| 97 | /* Calculate delay time, 14000us for 64 bytes */ |
| 98 | tsleep = (len * 200) + 200; |
| 99 | if (tsleep < delay) |
| 100 | tsleep = delay; |
| 101 | usleep_range(tsleep, tsleep + 1000); |
| 102 | } |
| 103 | else if (delay) |
| 104 | usleep_range(delay, delay + 1000); |
Michel Ludwig | a5adfbe | 2007-07-02 20:59:58 -0300 | [diff] [blame] | 105 | |
Thierry Reding | fc4eab2 | 2011-08-04 04:14:10 -0300 | [diff] [blame] | 106 | mutex_unlock(&dev->usb_lock); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 107 | return ret; |
| 108 | } |
| 109 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 110 | int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 111 | { |
| 112 | return |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 113 | tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR, |
| 114 | req, value, index, NULL, 0); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 115 | } |
Randy Dunlap | 29ec15e | 2010-02-10 14:53:57 -0300 | [diff] [blame] | 116 | EXPORT_SYMBOL_GPL(tm6000_set_reg); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 117 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 118 | int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 119 | { |
| 120 | int rc; |
| 121 | u8 buf[1]; |
| 122 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 123 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req, |
| 124 | value, index, buf, 1); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 125 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 126 | if (rc < 0) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 127 | return rc; |
| 128 | |
| 129 | return *buf; |
| 130 | } |
Randy Dunlap | 29ec15e | 2010-02-10 14:53:57 -0300 | [diff] [blame] | 131 | EXPORT_SYMBOL_GPL(tm6000_get_reg); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 132 | |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 133 | int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value, |
| 134 | u16 index, u16 mask) |
| 135 | { |
| 136 | int rc; |
| 137 | u8 buf[1]; |
| 138 | u8 new_index; |
| 139 | |
| 140 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req, |
Stefan Ringel | c00ecc9 | 2011-11-28 15:46:17 -0300 | [diff] [blame] | 141 | value, 0, buf, 1); |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 142 | |
| 143 | if (rc < 0) |
| 144 | return rc; |
| 145 | |
| 146 | new_index = (buf[0] & ~mask) | (index & mask); |
| 147 | |
Stefan Ringel | c00ecc9 | 2011-11-28 15:46:17 -0300 | [diff] [blame] | 148 | if (new_index == buf[0]) |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 149 | return 0; |
| 150 | |
| 151 | return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR, |
| 152 | req, value, new_index, NULL, 0); |
| 153 | } |
| 154 | EXPORT_SYMBOL_GPL(tm6000_set_reg_mask); |
| 155 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 156 | int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 157 | { |
| 158 | int rc; |
| 159 | u8 buf[2]; |
| 160 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 161 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req, |
| 162 | value, index, buf, 2); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 163 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 164 | if (rc < 0) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 165 | return rc; |
| 166 | |
| 167 | return buf[1]|buf[0]<<8; |
| 168 | } |
| 169 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 170 | int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index) |
Stefan Ringel | 2f79088 | 2010-04-02 13:52:49 -0300 | [diff] [blame] | 171 | { |
| 172 | int rc; |
| 173 | u8 buf[4]; |
| 174 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 175 | rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req, |
| 176 | value, index, buf, 4); |
Stefan Ringel | 2f79088 | 2010-04-02 13:52:49 -0300 | [diff] [blame] | 177 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 178 | if (rc < 0) |
Stefan Ringel | 2f79088 | 2010-04-02 13:52:49 -0300 | [diff] [blame] | 179 | return rc; |
| 180 | |
| 181 | return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24; |
| 182 | } |
| 183 | |
Dmitri Belimov | 2a15ac7 | 2010-05-18 04:23:29 -0300 | [diff] [blame] | 184 | int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep) |
| 185 | { |
| 186 | int rc; |
| 187 | |
| 188 | rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0); |
| 189 | if (rc < 0) |
| 190 | return rc; |
| 191 | |
| 192 | msleep(tsleep); |
| 193 | |
| 194 | rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1); |
| 195 | msleep(tsleep); |
| 196 | |
| 197 | return rc; |
| 198 | } |
| 199 | |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 200 | void tm6000_set_fourcc_format(struct tm6000_core *dev) |
| 201 | { |
Mauro Carvalho Chehab | 717ecd2 | 2008-10-25 08:56:16 -0300 | [diff] [blame] | 202 | if (dev->dev_type == TM6010) { |
Mauro Carvalho Chehab | 4223871 | 2010-05-03 04:25:59 -0300 | [diff] [blame] | 203 | int val; |
| 204 | |
Thierry Reding | 4129e56 | 2011-08-04 04:14:07 -0300 | [diff] [blame] | 205 | val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc; |
Mauro Carvalho Chehab | 717ecd2 | 2008-10-25 08:56:16 -0300 | [diff] [blame] | 206 | if (dev->fourcc == V4L2_PIX_FMT_UYVY) |
Thierry Reding | 4129e56 | 2011-08-04 04:14:07 -0300 | [diff] [blame] | 207 | tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val); |
Mauro Carvalho Chehab | 717ecd2 | 2008-10-25 08:56:16 -0300 | [diff] [blame] | 208 | else |
Thierry Reding | 4129e56 | 2011-08-04 04:14:07 -0300 | [diff] [blame] | 209 | tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val | 1); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 210 | } else { |
Mauro Carvalho Chehab | 717ecd2 | 2008-10-25 08:56:16 -0300 | [diff] [blame] | 211 | if (dev->fourcc == V4L2_PIX_FMT_UYVY) |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 212 | tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0); |
Mauro Carvalho Chehab | 717ecd2 | 2008-10-25 08:56:16 -0300 | [diff] [blame] | 213 | else |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 214 | tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 215 | } |
| 216 | } |
| 217 | |
Mauro Carvalho Chehab | 589851d | 2010-10-12 12:11:55 -0300 | [diff] [blame] | 218 | static void tm6000_set_vbi(struct tm6000_core *dev) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 219 | { |
Mauro Carvalho Chehab | 589851d | 2010-10-12 12:11:55 -0300 | [diff] [blame] | 220 | /* |
| 221 | * FIXME: |
| 222 | * VBI lines and start/end are different between 60Hz and 50Hz |
| 223 | * So, it is very likely that we need to change the config to |
| 224 | * something that takes it into account, doing something different |
| 225 | * if (dev->norm & V4L2_STD_525_60) |
| 226 | */ |
Mauro Carvalho Chehab | 94d4350 | 2010-10-07 09:42:43 -0300 | [diff] [blame] | 227 | |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 228 | if (dev->dev_type == TM6010) { |
Stefan Ringel | 120756e | 2010-04-29 09:24:47 -0300 | [diff] [blame] | 229 | tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01); |
| 230 | tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27); |
| 231 | tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55); |
| 232 | tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66); |
| 233 | tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66); |
| 234 | tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66); |
| 235 | tm6000_set_reg(dev, |
| 236 | TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66); |
| 237 | tm6000_set_reg(dev, |
| 238 | TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66); |
| 239 | tm6000_set_reg(dev, |
| 240 | TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66); |
| 241 | tm6000_set_reg(dev, |
| 242 | TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66); |
| 243 | tm6000_set_reg(dev, |
| 244 | TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66); |
| 245 | tm6000_set_reg(dev, |
| 246 | TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66); |
| 247 | tm6000_set_reg(dev, |
| 248 | TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66); |
| 249 | tm6000_set_reg(dev, |
| 250 | TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66); |
| 251 | tm6000_set_reg(dev, |
| 252 | TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66); |
| 253 | tm6000_set_reg(dev, |
| 254 | TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66); |
| 255 | tm6000_set_reg(dev, |
| 256 | TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66); |
| 257 | tm6000_set_reg(dev, |
| 258 | TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66); |
| 259 | tm6000_set_reg(dev, |
| 260 | TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66); |
| 261 | tm6000_set_reg(dev, |
| 262 | TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00); |
| 263 | tm6000_set_reg(dev, |
| 264 | TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00); |
| 265 | tm6000_set_reg(dev, |
| 266 | TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01); |
| 267 | tm6000_set_reg(dev, |
| 268 | TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00); |
| 269 | tm6000_set_reg(dev, |
| 270 | TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02); |
| 271 | tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35); |
| 272 | tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0); |
| 273 | tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11); |
| 274 | tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c); |
| 275 | tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01); |
| 276 | tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00); |
Mauro Carvalho Chehab | 589851d | 2010-10-12 12:11:55 -0300 | [diff] [blame] | 277 | } |
| 278 | } |
| 279 | |
| 280 | int tm6000_init_analog_mode(struct tm6000_core *dev) |
| 281 | { |
| 282 | struct v4l2_frequency f; |
| 283 | |
| 284 | if (dev->dev_type == TM6010) { |
Thierry Reding | 8735458 | 2011-08-04 04:14:08 -0300 | [diff] [blame] | 285 | u8 active = TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE; |
| 286 | |
| 287 | if (!dev->radio) |
| 288 | active |= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE; |
| 289 | |
Stefan Ringel | f010dca | 2011-05-09 16:53:58 -0300 | [diff] [blame] | 290 | /* Enable video and audio */ |
Thierry Reding | 4129e56 | 2011-08-04 04:14:07 -0300 | [diff] [blame] | 291 | tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF, |
Thierry Reding | 8735458 | 2011-08-04 04:14:08 -0300 | [diff] [blame] | 292 | active, 0x60); |
Stefan Ringel | f010dca | 2011-05-09 16:53:58 -0300 | [diff] [blame] | 293 | /* Disable TS input */ |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 294 | tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, |
| 295 | 0x00, 0x40); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 296 | } else { |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 297 | /* Enables soft reset */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 298 | tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01); |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 299 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 300 | if (dev->scaler) |
Stefan Ringel | f010dca | 2011-05-09 16:53:58 -0300 | [diff] [blame] | 301 | /* Disable Hfilter and Enable TS Drop err */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 302 | tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20); |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 303 | else /* Enable Hfilter and disable TS Drop err */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 304 | tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80); |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 305 | |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 306 | tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88); |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 307 | tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23); |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 308 | tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0); |
| 309 | tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8); |
| 310 | tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06); |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 311 | tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f); |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 312 | |
| 313 | /* AP Software reset */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 314 | tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08); |
| 315 | tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00); |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 316 | |
| 317 | tm6000_set_fourcc_format(dev); |
| 318 | |
| 319 | /* Disables soft reset */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 320 | tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 321 | } |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 322 | msleep(20); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 323 | |
| 324 | /* Tuner firmware can now be loaded */ |
| 325 | |
Mauro Carvalho Chehab | 94d4350 | 2010-10-07 09:42:43 -0300 | [diff] [blame] | 326 | /* |
| 327 | * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected |
| 328 | * for more than a few seconds. Not sure why, as this behavior does |
| 329 | * not happen on other devices with xc3028. So, I suspect that it |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 330 | * is yet another bug at tm6000. After start sleeping, decoding |
Mauro Carvalho Chehab | 94d4350 | 2010-10-07 09:42:43 -0300 | [diff] [blame] | 331 | * doesn't start automatically. Instead, it requires some |
| 332 | * I2C commands to wake it up. As we want to have image at the |
| 333 | * beginning, we needed to add this hack. The better would be to |
| 334 | * discover some way to make tm6000 to wake up without this hack. |
| 335 | */ |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 336 | f.frequency = dev->freq; |
Mauro Carvalho Chehab | 427f7fa | 2009-09-14 16:37:13 -0300 | [diff] [blame] | 337 | v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 338 | |
| 339 | msleep(100); |
Stefan Ringel | 0f6040e | 2011-05-09 16:53:53 -0300 | [diff] [blame] | 340 | tm6000_set_standard(dev); |
Mauro Carvalho Chehab | 589851d | 2010-10-12 12:11:55 -0300 | [diff] [blame] | 341 | tm6000_set_vbi(dev); |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 342 | tm6000_set_audio_bitrate(dev, 48000); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 343 | |
Stefan Ringel | f36cc03 | 2010-05-23 15:29:25 -0300 | [diff] [blame] | 344 | /* switch dvb led off */ |
| 345 | if (dev->gpio.dvb_led) { |
| 346 | tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, |
| 347 | dev->gpio.dvb_led, 0x01); |
| 348 | } |
| 349 | |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 350 | return 0; |
| 351 | } |
| 352 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 353 | int tm6000_init_digital_mode(struct tm6000_core *dev) |
Michel Ludwig | 3169c9b | 2007-08-21 17:37:22 -0300 | [diff] [blame] | 354 | { |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 355 | if (dev->dev_type == TM6010) { |
Stefan Ringel | f010dca | 2011-05-09 16:53:58 -0300 | [diff] [blame] | 356 | /* Disable video and audio */ |
Thierry Reding | 4129e56 | 2011-08-04 04:14:07 -0300 | [diff] [blame] | 357 | tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF, |
Stefan Ringel | f010dca | 2011-05-09 16:53:58 -0300 | [diff] [blame] | 358 | 0x00, 0x60); |
| 359 | /* Enable TS input */ |
| 360 | tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, |
| 361 | 0x40, 0x40); |
| 362 | /* all power down, but not the digital data port */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 363 | tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28); |
| 364 | tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc); |
| 365 | tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff); |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 366 | } else { |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 367 | tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08); |
| 368 | tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00); |
| 369 | tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01); |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 370 | tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08); |
| 371 | tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c); |
| 372 | tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff); |
| 373 | tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8); |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 374 | tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40); |
| 375 | tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0); |
| 376 | tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09); |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 377 | tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37); |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 378 | tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8); |
| 379 | tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0); |
| 380 | tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60); |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 381 | |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 382 | tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c); |
| 383 | tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff); |
| 384 | tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08); |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 385 | msleep(50); |
| 386 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 387 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00); |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 388 | msleep(50); |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 389 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01); |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 390 | msleep(50); |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 391 | tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00); |
Stefan Ringel | c733a4d | 2010-02-03 17:27:23 -0300 | [diff] [blame] | 392 | msleep(100); |
| 393 | } |
Stefan Ringel | f36cc03 | 2010-05-23 15:29:25 -0300 | [diff] [blame] | 394 | |
| 395 | /* switch dvb led on */ |
| 396 | if (dev->gpio.dvb_led) { |
| 397 | tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, |
| 398 | dev->gpio.dvb_led, 0x00); |
| 399 | } |
| 400 | |
Michel Ludwig | 3169c9b | 2007-08-21 17:37:22 -0300 | [diff] [blame] | 401 | return 0; |
| 402 | } |
Stefan Ringel | cee3926 | 2010-05-30 09:19:04 -0300 | [diff] [blame] | 403 | EXPORT_SYMBOL(tm6000_init_digital_mode); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 404 | |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 405 | struct reg_init { |
| 406 | u8 req; |
| 407 | u8 reg; |
| 408 | u8 val; |
| 409 | }; |
| 410 | |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 411 | /* The meaning of those initializations are unknown */ |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 412 | static struct reg_init tm6000_init_tab[] = { |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 413 | /* REG VALUE */ |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 414 | { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f }, |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 415 | { TM6010_REQ07_RFF_SOFT_RESET, 0x08 }, |
| 416 | { TM6010_REQ07_RFF_SOFT_RESET, 0x00 }, |
| 417 | { TM6010_REQ07_RD5_POWERSAVE, 0x4f }, |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 418 | { TM6000_REQ07_RDA_CLK_SEL, 0x23 }, |
| 419 | { TM6000_REQ07_RDB_OUT_SEL, 0x08 }, |
| 420 | { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 }, |
| 421 | { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 }, |
| 422 | { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 }, |
| 423 | { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 }, |
| 424 | { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */ |
| 425 | { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 }, |
| 426 | |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 427 | { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */ |
| 428 | { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 }, |
| 429 | { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 }, |
| 430 | { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f }, |
| 431 | { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 }, |
| 432 | { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 }, |
| 433 | { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 }, |
| 434 | { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 }, |
| 435 | { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 }, |
| 436 | { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 }, |
| 437 | { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a }, |
| 438 | { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 }, |
| 439 | { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 }, |
| 440 | { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b }, |
| 441 | { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 }, |
| 442 | { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f }, |
| 443 | { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd }, |
| 444 | { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e }, |
| 445 | { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b }, |
| 446 | { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 }, |
| 447 | { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 }, |
| 448 | { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c }, |
| 449 | { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc }, |
| 450 | { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc }, |
| 451 | { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd }, |
| 452 | { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c }, |
| 453 | { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c }, |
| 454 | { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 }, |
| 455 | { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 }, |
| 456 | { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 }, |
| 457 | { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 }, |
| 458 | { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 }, |
| 459 | { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c }, |
| 460 | { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 }, |
| 461 | { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c }, |
| 462 | { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a }, |
| 463 | { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 }, |
| 464 | { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 }, |
| 465 | { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a }, |
| 466 | { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 }, |
| 467 | { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 }, |
| 468 | { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 }, |
| 469 | { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 }, |
| 470 | { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 }, |
| 471 | { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 }, |
| 472 | { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 }, |
| 473 | { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 }, |
| 474 | { TM6010_REQ07_RC1_TRESHOLD, 0xd0 }, |
| 475 | { TM6010_REQ07_RC3_HSTART1, 0x88 }, |
| 476 | { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */ |
Mauro Carvalho Chehab | 2415a2c | 2010-03-11 10:26:45 -0300 | [diff] [blame] | 477 | { TM6010_REQ05_R18_IMASK7, 0x00 }, |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 478 | }; |
| 479 | |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 480 | static struct reg_init tm6010_init_tab[] = { |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 481 | { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 }, |
| 482 | { TM6010_REQ07_RC4_HSTART0, 0xa0 }, |
| 483 | { TM6010_REQ07_RC6_HEND0, 0x40 }, |
| 484 | { TM6010_REQ07_RCA_VEND0, 0x31 }, |
Thierry Reding | 4129e56 | 2011-08-04 04:14:07 -0300 | [diff] [blame] | 485 | { TM6010_REQ07_RCC_ACTIVE_IF, 0xe1 }, |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 486 | { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 }, |
| 487 | { TM6010_REQ07_RFE_POWER_DOWN, 0x7f }, |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 488 | |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 489 | { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 }, |
| 490 | { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 }, |
| 491 | { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 }, |
| 492 | { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 }, |
| 493 | { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 }, |
| 494 | { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 }, |
| 495 | { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 }, |
| 496 | { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 }, |
| 497 | { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc }, |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 498 | |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 499 | { TM6010_REQ07_R3F_RESET, 0x01 }, |
| 500 | { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 }, |
| 501 | { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 }, |
| 502 | { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f }, |
| 503 | { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 }, |
| 504 | { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 }, |
| 505 | { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 }, |
| 506 | { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 }, |
| 507 | { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 }, |
| 508 | { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 }, |
| 509 | { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a }, |
| 510 | { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 }, |
| 511 | { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 }, |
| 512 | { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b }, |
| 513 | { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 }, |
| 514 | { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f }, |
| 515 | { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd }, |
| 516 | { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e }, |
| 517 | { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b }, |
| 518 | { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 }, |
| 519 | { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 }, |
| 520 | { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c }, |
| 521 | { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc }, |
| 522 | { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc }, |
| 523 | { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd }, |
| 524 | { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c }, |
| 525 | { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c }, |
| 526 | { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 }, |
| 527 | { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 }, |
| 528 | { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 }, |
| 529 | { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 }, |
| 530 | { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 }, |
| 531 | { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c }, |
| 532 | { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 }, |
| 533 | { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c }, |
| 534 | { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a }, |
| 535 | { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 }, |
| 536 | { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 }, |
| 537 | { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a }, |
| 538 | { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 }, |
| 539 | { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 }, |
| 540 | { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 }, |
| 541 | { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 }, |
| 542 | { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 }, |
| 543 | { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 }, |
| 544 | { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 }, |
| 545 | { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 }, |
| 546 | { TM6010_REQ07_RC1_TRESHOLD, 0xd0 }, |
| 547 | { TM6010_REQ07_RC3_HSTART1, 0x88 }, |
| 548 | { TM6010_REQ07_R3F_RESET, 0x00 }, |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 549 | |
Mauro Carvalho Chehab | 2415a2c | 2010-03-11 10:26:45 -0300 | [diff] [blame] | 550 | { TM6010_REQ05_R18_IMASK7, 0x00 }, |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 551 | |
Mauro Carvalho Chehab | 15a295e | 2011-11-29 11:35:55 -0300 | [diff] [blame] | 552 | { TM6010_REQ07_RDC_IR_LEADER1, 0xaa }, |
| 553 | { TM6010_REQ07_RDD_IR_LEADER0, 0x30 }, |
| 554 | { TM6010_REQ07_RDE_IR_PULSE_CNT1, 0x20 }, |
| 555 | { TM6010_REQ07_RDF_IR_PULSE_CNT0, 0xd0 }, |
Stefan Ringel | d46ca93 | 2010-02-15 14:37:16 -0300 | [diff] [blame] | 556 | { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 }, |
Mauro Carvalho Chehab | 4a83b01 | 2011-11-29 11:30:30 -0300 | [diff] [blame] | 557 | { TM6010_REQ07_RD8_IR, 0x0f }, |
Stefan Ringel | d46ca93 | 2010-02-15 14:37:16 -0300 | [diff] [blame] | 558 | |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 559 | /* set remote wakeup key:any key wakeup */ |
Mauro Carvalho Chehab | 9afec49 | 2010-03-11 10:26:46 -0300 | [diff] [blame] | 560 | { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe }, |
Mauro Carvalho Chehab | 15a295e | 2011-11-29 11:35:55 -0300 | [diff] [blame] | 561 | { TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff }, |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 562 | }; |
| 563 | |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 564 | int tm6000_init(struct tm6000_core *dev) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 565 | { |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 566 | int board, rc = 0, i, size; |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 567 | struct reg_init *tab; |
| 568 | |
Stefan Ringel | c1937f8e | 2010-11-09 13:50:28 -0300 | [diff] [blame] | 569 | /* Check board revision */ |
| 570 | board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0); |
| 571 | if (board >= 0) { |
| 572 | switch (board & 0xff) { |
| 573 | case 0xf3: |
| 574 | printk(KERN_INFO "Found tm6000\n"); |
| 575 | if (dev->dev_type != TM6000) |
| 576 | dev->dev_type = TM6000; |
| 577 | break; |
| 578 | case 0xf4: |
| 579 | printk(KERN_INFO "Found tm6010\n"); |
| 580 | if (dev->dev_type != TM6010) |
| 581 | dev->dev_type = TM6010; |
| 582 | break; |
| 583 | default: |
| 584 | printk(KERN_INFO "Unknown board version = 0x%08x\n", board); |
| 585 | } |
| 586 | } else |
| 587 | printk(KERN_ERR "Error %i while retrieving board version\n", board); |
| 588 | |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 589 | if (dev->dev_type == TM6010) { |
| 590 | tab = tm6010_init_tab; |
| 591 | size = ARRAY_SIZE(tm6010_init_tab); |
| 592 | } else { |
| 593 | tab = tm6000_init_tab; |
| 594 | size = ARRAY_SIZE(tm6000_init_tab); |
| 595 | } |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 596 | |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 597 | /* Load board's initialization table */ |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 598 | for (i = 0; i < size; i++) { |
| 599 | rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val); |
| 600 | if (rc < 0) { |
Mauro Carvalho Chehab | 6861650 | 2016-10-18 17:44:19 -0200 | [diff] [blame] | 601 | printk(KERN_ERR "Error %i while setting req %d, reg %d to value %d\n", |
| 602 | rc, |
Timofey Trofimov | 52e0a72 | 2010-05-29 13:52:46 -0300 | [diff] [blame] | 603 | tab[i].req, tab[i].reg, tab[i].val); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 604 | return rc; |
| 605 | } |
| 606 | } |
| 607 | |
Mauro Carvalho Chehab | 29c389b | 2008-01-08 11:19:22 -0300 | [diff] [blame] | 608 | msleep(5); /* Just to be conservative */ |
| 609 | |
Mauro Carvalho Chehab | e3ee9e5 | 2010-02-08 08:43:41 -0200 | [diff] [blame] | 610 | rc = tm6000_cards_setup(dev); |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 611 | |
Mauro Carvalho Chehab | e3ee9e5 | 2010-02-08 08:43:41 -0200 | [diff] [blame] | 612 | return rc; |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 613 | } |
| 614 | |
Thierry Reding | dd0c8ab | 2011-08-04 04:14:13 -0300 | [diff] [blame] | 615 | |
Mauro Carvalho Chehab | 44351aa | 2008-01-11 13:19:45 -0300 | [diff] [blame] | 616 | int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate) |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 617 | { |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 618 | int val = 0; |
| 619 | u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */ |
| 620 | u8 areg_0a = 0x91; /* SIF 48KHz */ |
| 621 | |
| 622 | switch (bitrate) { |
| 623 | case 48000: |
| 624 | areg_f0 = 0x60; /* ADC MCLK = 250 Fs */ |
| 625 | areg_0a = 0x91; /* SIF 48KHz */ |
| 626 | dev->audio_bitrate = bitrate; |
| 627 | break; |
| 628 | case 32000: |
| 629 | areg_f0 = 0x00; /* ADC MCLK = 375 Fs */ |
| 630 | areg_0a = 0x90; /* SIF 32KHz */ |
| 631 | dev->audio_bitrate = bitrate; |
| 632 | break; |
| 633 | default: |
| 634 | return -EINVAL; |
| 635 | } |
| 636 | |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 637 | |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 638 | /* enable I2S, if we use sif or external I2S device */ |
Mauro Carvalho Chehab | a59bff3 | 2010-06-07 11:57:01 -0300 | [diff] [blame] | 639 | if (dev->dev_type == TM6010) { |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 640 | val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a); |
Mauro Carvalho Chehab | a59bff3 | 2010-06-07 11:57:01 -0300 | [diff] [blame] | 641 | if (val < 0) |
| 642 | return val; |
Mauro Carvalho Chehab | a59bff3 | 2010-06-07 11:57:01 -0300 | [diff] [blame] | 643 | |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 644 | val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, |
| 645 | areg_f0, 0xf0); |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 646 | if (val < 0) |
| 647 | return val; |
| 648 | } else { |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 649 | val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE, |
| 650 | areg_f0, 0xf0); |
Stefan Ringel | 9839029 | 2011-01-25 13:40:55 -0300 | [diff] [blame] | 651 | if (val < 0) |
| 652 | return val; |
| 653 | } |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 654 | return 0; |
Mauro Carvalho Chehab | 9701dc9 | 2009-09-14 09:42:41 -0300 | [diff] [blame] | 655 | } |
Mauro Carvalho Chehab | 44351aa | 2008-01-11 13:19:45 -0300 | [diff] [blame] | 656 | EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 657 | |
Stefan Ringel | 0f6040e | 2011-05-09 16:53:53 -0300 | [diff] [blame] | 658 | int tm6000_set_audio_rinput(struct tm6000_core *dev) |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 659 | { |
| 660 | if (dev->dev_type == TM6010) { |
| 661 | /* Audio crossbar setting, default SIF1 */ |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 662 | u8 areg_f0; |
Mauro Carvalho Chehab | 32f6f3a | 2011-11-24 12:20:12 -0300 | [diff] [blame] | 663 | u8 areg_07 = 0x10; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 664 | |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 665 | switch (dev->rinput.amux) { |
| 666 | case TM6000_AMUX_SIF1: |
| 667 | case TM6000_AMUX_SIF2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 668 | areg_f0 = 0x03; |
Mauro Carvalho Chehab | 32f6f3a | 2011-11-24 12:20:12 -0300 | [diff] [blame] | 669 | areg_07 = 0x30; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 670 | break; |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 671 | case TM6000_AMUX_ADC1: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 672 | areg_f0 = 0x00; |
| 673 | break; |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 674 | case TM6000_AMUX_ADC2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 675 | areg_f0 = 0x08; |
| 676 | break; |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 677 | case TM6000_AMUX_I2S: |
| 678 | areg_f0 = 0x04; |
| 679 | break; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 680 | default: |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 681 | printk(KERN_INFO "%s: audio input dosn't support\n", |
| 682 | dev->name); |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 683 | return 0; |
| 684 | break; |
| 685 | } |
| 686 | /* Set audio input crossbar */ |
| 687 | tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, |
| 688 | areg_f0, 0x0f); |
Mauro Carvalho Chehab | 32f6f3a | 2011-11-24 12:20:12 -0300 | [diff] [blame] | 689 | /* Mux overflow workaround */ |
| 690 | tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL, |
| 691 | areg_07, 0xf0); |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 692 | } else { |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 693 | u8 areg_eb; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 694 | /* Audio setting, default LINE1 */ |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 695 | switch (dev->rinput.amux) { |
| 696 | case TM6000_AMUX_ADC1: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 697 | areg_eb = 0x00; |
| 698 | break; |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 699 | case TM6000_AMUX_ADC2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 700 | areg_eb = 0x04; |
| 701 | break; |
| 702 | default: |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 703 | printk(KERN_INFO "%s: audio input dosn't support\n", |
| 704 | dev->name); |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 705 | return 0; |
| 706 | break; |
| 707 | } |
| 708 | /* Set audio input */ |
| 709 | tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE, |
| 710 | areg_eb, 0x0f); |
| 711 | } |
| 712 | return 0; |
| 713 | } |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 714 | |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 715 | static void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute) |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 716 | { |
| 717 | u8 mute_reg = 0; |
| 718 | |
| 719 | if (mute) |
| 720 | mute_reg = 0x08; |
| 721 | |
| 722 | tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08); |
| 723 | } |
| 724 | |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 725 | static void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute) |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 726 | { |
| 727 | u8 mute_reg = 0; |
| 728 | |
| 729 | if (mute) |
| 730 | mute_reg = 0x20; |
| 731 | |
| 732 | if (dev->dev_type == TM6010) { |
| 733 | tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, |
| 734 | mute_reg, 0x20); |
| 735 | tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, |
| 736 | mute_reg, 0x20); |
| 737 | } else { |
| 738 | tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, |
| 739 | mute_reg, 0x20); |
| 740 | tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, |
| 741 | mute_reg, 0x20); |
| 742 | } |
| 743 | } |
| 744 | |
| 745 | int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute) |
| 746 | { |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 747 | enum tm6000_mux mux; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 748 | |
| 749 | if (dev->radio) |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 750 | mux = dev->rinput.amux; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 751 | else |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 752 | mux = dev->vinput[dev->input].amux; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 753 | |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 754 | switch (mux) { |
| 755 | case TM6000_AMUX_SIF1: |
| 756 | case TM6000_AMUX_SIF2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 757 | if (dev->dev_type == TM6010) |
| 758 | tm6010_set_mute_sif(dev, mute); |
| 759 | else { |
Mauro Carvalho Chehab | 6861650 | 2016-10-18 17:44:19 -0200 | [diff] [blame] | 760 | printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has SIF audio inputs. Please check the %s configuration.\n", |
| 761 | dev->name); |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 762 | return -EINVAL; |
| 763 | } |
| 764 | break; |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 765 | case TM6000_AMUX_ADC1: |
| 766 | case TM6000_AMUX_ADC2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 767 | tm6010_set_mute_adc(dev, mute); |
| 768 | break; |
| 769 | default: |
| 770 | return -EINVAL; |
| 771 | break; |
| 772 | } |
| 773 | return 0; |
| 774 | } |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 775 | |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 776 | static void tm6010_set_volume_sif(struct tm6000_core *dev, int vol) |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 777 | { |
| 778 | u8 vol_reg; |
| 779 | |
| 780 | vol_reg = vol & 0x0F; |
| 781 | |
| 782 | if (vol < 0) |
| 783 | vol_reg |= 0x40; |
| 784 | |
| 785 | tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg); |
| 786 | tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg); |
| 787 | } |
| 788 | |
Thierry Reding | 3d1a51d | 2011-08-04 04:14:01 -0300 | [diff] [blame] | 789 | static void tm6010_set_volume_adc(struct tm6000_core *dev, int vol) |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 790 | { |
| 791 | u8 vol_reg; |
| 792 | |
| 793 | vol_reg = (vol + 0x10) & 0x1f; |
| 794 | |
| 795 | if (dev->dev_type == TM6010) { |
| 796 | tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg); |
| 797 | tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg); |
| 798 | } else { |
| 799 | tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg); |
| 800 | tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg); |
| 801 | } |
| 802 | } |
| 803 | |
| 804 | void tm6000_set_volume(struct tm6000_core *dev, int vol) |
| 805 | { |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 806 | enum tm6000_mux mux; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 807 | |
| 808 | if (dev->radio) { |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 809 | mux = dev->rinput.amux; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 810 | vol += 8; /* Offset to 0 dB */ |
| 811 | } else |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 812 | mux = dev->vinput[dev->input].amux; |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 813 | |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 814 | switch (mux) { |
| 815 | case TM6000_AMUX_SIF1: |
| 816 | case TM6000_AMUX_SIF2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 817 | if (dev->dev_type == TM6010) |
| 818 | tm6010_set_volume_sif(dev, vol); |
| 819 | else |
Mauro Carvalho Chehab | 6861650 | 2016-10-18 17:44:19 -0200 | [diff] [blame] | 820 | printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has SIF audio inputs. Please check the %s configuration.\n", |
| 821 | dev->name); |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 822 | break; |
Stefan Ringel | fb7ef98 | 2011-05-09 16:53:51 -0300 | [diff] [blame] | 823 | case TM6000_AMUX_ADC1: |
| 824 | case TM6000_AMUX_ADC2: |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 825 | tm6010_set_volume_adc(dev, vol); |
| 826 | break; |
| 827 | default: |
| 828 | break; |
| 829 | } |
| 830 | } |
Dmitri Belimov | 8aff8ba | 2011-02-17 22:11:05 -0300 | [diff] [blame] | 831 | |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 832 | static LIST_HEAD(tm6000_devlist); |
| 833 | static DEFINE_MUTEX(tm6000_devlist_mutex); |
| 834 | |
| 835 | /* |
| 836 | * tm6000_realease_resource() |
| 837 | */ |
| 838 | |
| 839 | void tm6000_remove_from_devlist(struct tm6000_core *dev) |
| 840 | { |
| 841 | mutex_lock(&tm6000_devlist_mutex); |
| 842 | list_del(&dev->devlist); |
| 843 | mutex_unlock(&tm6000_devlist_mutex); |
| 844 | }; |
| 845 | |
| 846 | void tm6000_add_into_devlist(struct tm6000_core *dev) |
| 847 | { |
| 848 | mutex_lock(&tm6000_devlist_mutex); |
| 849 | list_add_tail(&dev->devlist, &tm6000_devlist); |
| 850 | mutex_unlock(&tm6000_devlist_mutex); |
| 851 | }; |
| 852 | |
| 853 | /* |
| 854 | * Extension interface |
| 855 | */ |
| 856 | |
| 857 | static LIST_HEAD(tm6000_extension_devlist); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 858 | |
Mauro Carvalho Chehab | b17b869 | 2010-06-03 17:16:28 -0300 | [diff] [blame] | 859 | int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type, |
| 860 | char *buf, int size) |
| 861 | { |
| 862 | struct tm6000_ops *ops = NULL; |
| 863 | |
| 864 | /* FIXME: tm6000_extension_devlist_lock should be a spinlock */ |
| 865 | |
| 866 | if (!list_empty(&tm6000_extension_devlist)) { |
| 867 | list_for_each_entry(ops, &tm6000_extension_devlist, next) { |
| 868 | if (ops->fillbuf && ops->type == type) |
| 869 | ops->fillbuf(dev, buf, size); |
| 870 | } |
| 871 | } |
| 872 | |
| 873 | return 0; |
| 874 | } |
| 875 | |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 876 | int tm6000_register_extension(struct tm6000_ops *ops) |
| 877 | { |
| 878 | struct tm6000_core *dev = NULL; |
| 879 | |
| 880 | mutex_lock(&tm6000_devlist_mutex); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 881 | list_add_tail(&ops->next, &tm6000_extension_devlist); |
| 882 | list_for_each_entry(dev, &tm6000_devlist, devlist) { |
Mauro Carvalho Chehab | 3f23a81 | 2010-06-05 15:10:36 -0300 | [diff] [blame] | 883 | ops->init(dev); |
| 884 | printk(KERN_INFO "%s: Initialized (%s) extension\n", |
| 885 | dev->name, ops->name); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 886 | } |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 887 | mutex_unlock(&tm6000_devlist_mutex); |
| 888 | return 0; |
| 889 | } |
| 890 | EXPORT_SYMBOL(tm6000_register_extension); |
| 891 | |
| 892 | void tm6000_unregister_extension(struct tm6000_ops *ops) |
| 893 | { |
| 894 | struct tm6000_core *dev = NULL; |
| 895 | |
| 896 | mutex_lock(&tm6000_devlist_mutex); |
Julia Lawall | a3d7fc5 | 2010-08-03 23:34:36 +0200 | [diff] [blame] | 897 | list_for_each_entry(dev, &tm6000_devlist, devlist) |
| 898 | ops->fini(dev); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 899 | |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 900 | printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name); |
| 901 | list_del(&ops->next); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 902 | mutex_unlock(&tm6000_devlist_mutex); |
| 903 | } |
| 904 | EXPORT_SYMBOL(tm6000_unregister_extension); |
| 905 | |
| 906 | void tm6000_init_extension(struct tm6000_core *dev) |
| 907 | { |
| 908 | struct tm6000_ops *ops = NULL; |
| 909 | |
Mauro Carvalho Chehab | 4ae1839 | 2010-10-11 09:57:34 -0300 | [diff] [blame] | 910 | mutex_lock(&tm6000_devlist_mutex); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 911 | if (!list_empty(&tm6000_extension_devlist)) { |
| 912 | list_for_each_entry(ops, &tm6000_extension_devlist, next) { |
| 913 | if (ops->init) |
| 914 | ops->init(dev); |
| 915 | } |
| 916 | } |
Mauro Carvalho Chehab | 4ae1839 | 2010-10-11 09:57:34 -0300 | [diff] [blame] | 917 | mutex_unlock(&tm6000_devlist_mutex); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 918 | } |
| 919 | |
| 920 | void tm6000_close_extension(struct tm6000_core *dev) |
| 921 | { |
| 922 | struct tm6000_ops *ops = NULL; |
| 923 | |
Mauro Carvalho Chehab | 4ae1839 | 2010-10-11 09:57:34 -0300 | [diff] [blame] | 924 | mutex_lock(&tm6000_devlist_mutex); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 925 | if (!list_empty(&tm6000_extension_devlist)) { |
| 926 | list_for_each_entry(ops, &tm6000_extension_devlist, next) { |
| 927 | if (ops->fini) |
| 928 | ops->fini(dev); |
| 929 | } |
| 930 | } |
Dmitri Belimov | 427aacf | 2010-12-28 21:49:07 -0300 | [diff] [blame] | 931 | mutex_unlock(&tm6000_devlist_mutex); |
Stefan Ringel | 0439db75 | 2010-05-10 13:22:51 -0300 | [diff] [blame] | 932 | } |