Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 1 | /* |
| 2 | * arch/sh/kernel/timers/timer-cmt.c - CMT Timer Support |
| 3 | * |
| 4 | * Copyright (C) 2005 Yoshinori Sato |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | * for more details. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/interrupt.h> |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 14 | #include <linux/seqlock.h> |
| 15 | #include <asm/timer.h> |
| 16 | #include <asm/rtc.h> |
| 17 | #include <asm/io.h> |
| 18 | #include <asm/irq.h> |
| 19 | #include <asm/clock.h> |
| 20 | |
| 21 | #if defined(CONFIG_CPU_SUBTYPE_SH7619) |
| 22 | #define CMT_CMSTR 0xf84a0070 |
| 23 | #define CMT_CMCSR_0 0xf84a0072 |
| 24 | #define CMT_CMCNT_0 0xf84a0074 |
| 25 | #define CMT_CMCOR_0 0xf84a0076 |
| 26 | #define CMT_CMCSR_1 0xf84a0078 |
| 27 | #define CMT_CMCNT_1 0xf84a007a |
| 28 | #define CMT_CMCOR_1 0xf84a007c |
| 29 | |
| 30 | #define STBCR3 0xf80a0000 |
| 31 | #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0) |
| 32 | #define CMT_CMCSR_INIT 0x0040 |
| 33 | #define CMT_CMCSR_CALIB 0x0000 |
Paul Mundt | a8f67f4 | 2007-11-26 19:54:02 +0900 | [diff] [blame] | 34 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ |
| 35 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
| 36 | defined(CONFIG_CPU_SUBTYPE_SH7263) |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 37 | #define CMT_CMSTR 0xfffec000 |
| 38 | #define CMT_CMCSR_0 0xfffec002 |
| 39 | #define CMT_CMCNT_0 0xfffec004 |
| 40 | #define CMT_CMCOR_0 0xfffec006 |
| 41 | |
| 42 | #define STBCR4 0xfffe040c |
| 43 | #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR4) & ~0x04, STBCR4); } while(0) |
| 44 | #define CMT_CMCSR_INIT 0x0040 |
| 45 | #define CMT_CMCSR_CALIB 0x0000 |
| 46 | #else |
| 47 | #error "Unknown CPU SUBTYPE" |
| 48 | #endif |
| 49 | |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 50 | static unsigned long cmt_timer_get_offset(void) |
| 51 | { |
| 52 | int count; |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 53 | static unsigned short count_p = 0xffff; /* for the first call after boot */ |
| 54 | static unsigned long jiffies_p = 0; |
| 55 | |
| 56 | /* |
| 57 | * cache volatile jiffies temporarily; we have IRQs turned off. |
| 58 | */ |
| 59 | unsigned long jiffies_t; |
| 60 | |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 61 | /* timer count may underflow right here */ |
| 62 | count = ctrl_inw(CMT_CMCOR_0); |
| 63 | count -= ctrl_inw(CMT_CMCNT_0); |
| 64 | |
| 65 | jiffies_t = jiffies; |
| 66 | |
| 67 | /* |
| 68 | * avoiding timer inconsistencies (they are rare, but they happen)... |
| 69 | * there is one kind of problem that must be avoided here: |
| 70 | * 1. the timer counter underflows |
| 71 | */ |
| 72 | |
| 73 | if (jiffies_t == jiffies_p) { |
| 74 | if (count > count_p) { |
| 75 | /* the nutcase */ |
| 76 | if (ctrl_inw(CMT_CMCSR_0) & 0x80) { /* Check CMF bit */ |
| 77 | count -= LATCH; |
| 78 | } else { |
| 79 | printk("%s (): hardware timer problem?\n", |
Harvey Harrison | 866e6b9 | 2008-03-04 15:23:47 -0800 | [diff] [blame] | 80 | __func__); |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 81 | } |
| 82 | } |
| 83 | } else |
| 84 | jiffies_p = jiffies_t; |
| 85 | |
| 86 | count_p = count; |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 87 | |
| 88 | count = ((LATCH-1) - count) * TICK_SIZE; |
| 89 | count = (count + LATCH/2) / LATCH; |
| 90 | |
| 91 | return count; |
| 92 | } |
| 93 | |
Paul Mundt | 710ee0c | 2006-11-05 16:48:42 +0900 | [diff] [blame] | 94 | static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id) |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 95 | { |
| 96 | unsigned long timer_status; |
| 97 | |
| 98 | /* Clear CMF bit */ |
| 99 | timer_status = ctrl_inw(CMT_CMCSR_0); |
| 100 | timer_status &= ~0x80; |
| 101 | ctrl_outw(timer_status, CMT_CMCSR_0); |
| 102 | |
Paul Mundt | 710ee0c | 2006-11-05 16:48:42 +0900 | [diff] [blame] | 103 | handle_timer_tick(); |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 104 | |
| 105 | return IRQ_HANDLED; |
| 106 | } |
| 107 | |
| 108 | static struct irqaction cmt_irq = { |
| 109 | .name = "timer", |
| 110 | .handler = cmt_timer_interrupt, |
Bernhard Walle | e9485ba | 2007-05-08 00:35:34 -0700 | [diff] [blame] | 111 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 112 | }; |
| 113 | |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 114 | static void cmt_clk_init(struct clk *clk) |
| 115 | { |
| 116 | u8 divisor = CMT_CMCSR_INIT & 0x3; |
| 117 | ctrl_inw(CMT_CMCSR_0); |
| 118 | ctrl_outw(CMT_CMCSR_INIT, CMT_CMCSR_0); |
Paul Mundt | 1d11856 | 2006-12-01 13:15:14 +0900 | [diff] [blame] | 119 | clk->parent = clk_get(NULL, "module_clk"); |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 120 | clk->rate = clk->parent->rate / (8 << (divisor << 1)); |
| 121 | } |
| 122 | |
| 123 | static void cmt_clk_recalc(struct clk *clk) |
| 124 | { |
| 125 | u8 divisor = ctrl_inw(CMT_CMCSR_0) & 0x3; |
| 126 | clk->rate = clk->parent->rate / (8 << (divisor << 1)); |
| 127 | } |
| 128 | |
| 129 | static struct clk_ops cmt_clk_ops = { |
| 130 | .init = cmt_clk_init, |
| 131 | .recalc = cmt_clk_recalc, |
| 132 | }; |
| 133 | |
| 134 | static struct clk cmt0_clk = { |
| 135 | .name = "cmt0_clk", |
| 136 | .ops = &cmt_clk_ops, |
| 137 | }; |
| 138 | |
| 139 | static int cmt_timer_start(void) |
| 140 | { |
| 141 | ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR); |
| 142 | return 0; |
| 143 | } |
| 144 | |
| 145 | static int cmt_timer_stop(void) |
| 146 | { |
| 147 | ctrl_outw(ctrl_inw(CMT_CMSTR) & ~0x01, CMT_CMSTR); |
| 148 | return 0; |
| 149 | } |
| 150 | |
| 151 | static int cmt_timer_init(void) |
| 152 | { |
| 153 | unsigned long interval; |
| 154 | |
| 155 | cmt_clock_enable(); |
| 156 | |
Paul Mundt | 417528a | 2006-11-20 11:18:30 +0900 | [diff] [blame] | 157 | setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq); |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 158 | |
Paul Mundt | 1d11856 | 2006-12-01 13:15:14 +0900 | [diff] [blame] | 159 | cmt0_clk.parent = clk_get(NULL, "module_clk"); |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 160 | |
| 161 | cmt_timer_stop(); |
| 162 | |
| 163 | interval = cmt0_clk.parent->rate / 8 / HZ; |
| 164 | printk(KERN_INFO "Interval = %ld\n", interval); |
| 165 | |
| 166 | ctrl_outw(interval, CMT_CMCOR_0); |
| 167 | |
| 168 | clk_register(&cmt0_clk); |
| 169 | clk_enable(&cmt0_clk); |
| 170 | |
| 171 | cmt_timer_start(); |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
Paul Mundt | fa43972 | 2008-09-04 18:53:58 +0900 | [diff] [blame] | 176 | static struct sys_timer_ops cmt_timer_ops = { |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 177 | .init = cmt_timer_init, |
| 178 | .start = cmt_timer_start, |
| 179 | .stop = cmt_timer_stop, |
Paul Mundt | 710ee0c | 2006-11-05 16:48:42 +0900 | [diff] [blame] | 180 | #ifndef CONFIG_GENERIC_TIME |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 181 | .get_offset = cmt_timer_get_offset, |
Paul Mundt | 710ee0c | 2006-11-05 16:48:42 +0900 | [diff] [blame] | 182 | #endif |
Yoshinori Sato | 9d4436a | 2006-11-05 15:40:13 +0900 | [diff] [blame] | 183 | }; |
| 184 | |
| 185 | struct sys_timer cmt_timer = { |
| 186 | .name = "cmt", |
| 187 | .ops = &cmt_timer_ops, |
| 188 | }; |