Marc Zyngier | 60ce16c | 2019-06-21 13:54:37 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * System register offsets in the VNCR page |
| 4 | * All offsets are *byte* displacements! |
| 5 | */ |
| 6 | |
| 7 | #ifndef __ARM64_VNCR_MAPPING_H__ |
| 8 | #define __ARM64_VNCR_MAPPING_H__ |
| 9 | |
| 10 | #define VNCR_VTTBR_EL2 0x020 |
| 11 | #define VNCR_VTCR_EL2 0x040 |
| 12 | #define VNCR_VMPIDR_EL2 0x050 |
| 13 | #define VNCR_CNTVOFF_EL2 0x060 |
| 14 | #define VNCR_HCR_EL2 0x078 |
| 15 | #define VNCR_HSTR_EL2 0x080 |
| 16 | #define VNCR_VPIDR_EL2 0x088 |
| 17 | #define VNCR_TPIDR_EL2 0x090 |
| 18 | #define VNCR_HCRX_EL2 0x0A0 |
| 19 | #define VNCR_VNCR_EL2 0x0B0 |
| 20 | #define VNCR_CPACR_EL1 0x100 |
| 21 | #define VNCR_CONTEXTIDR_EL1 0x108 |
| 22 | #define VNCR_SCTLR_EL1 0x110 |
| 23 | #define VNCR_ACTLR_EL1 0x118 |
| 24 | #define VNCR_TCR_EL1 0x120 |
| 25 | #define VNCR_AFSR0_EL1 0x128 |
| 26 | #define VNCR_AFSR1_EL1 0x130 |
| 27 | #define VNCR_ESR_EL1 0x138 |
| 28 | #define VNCR_MAIR_EL1 0x140 |
| 29 | #define VNCR_AMAIR_EL1 0x148 |
| 30 | #define VNCR_MDSCR_EL1 0x158 |
| 31 | #define VNCR_SPSR_EL1 0x160 |
| 32 | #define VNCR_CNTV_CVAL_EL0 0x168 |
| 33 | #define VNCR_CNTV_CTL_EL0 0x170 |
| 34 | #define VNCR_CNTP_CVAL_EL0 0x178 |
| 35 | #define VNCR_CNTP_CTL_EL0 0x180 |
| 36 | #define VNCR_SCXTNUM_EL1 0x188 |
| 37 | #define VNCR_TFSR_EL1 0x190 |
| 38 | #define VNCR_HFGRTR_EL2 0x1B8 |
| 39 | #define VNCR_HFGWTR_EL2 0x1C0 |
| 40 | #define VNCR_HFGITR_EL2 0x1C8 |
| 41 | #define VNCR_HDFGRTR_EL2 0x1D0 |
| 42 | #define VNCR_HDFGWTR_EL2 0x1D8 |
| 43 | #define VNCR_ZCR_EL1 0x1E0 |
| 44 | #define VNCR_HAFGRTR_EL2 0x1E8 |
| 45 | #define VNCR_TTBR0_EL1 0x200 |
| 46 | #define VNCR_TTBR1_EL1 0x210 |
| 47 | #define VNCR_FAR_EL1 0x220 |
| 48 | #define VNCR_ELR_EL1 0x230 |
| 49 | #define VNCR_SP_EL1 0x240 |
| 50 | #define VNCR_VBAR_EL1 0x250 |
| 51 | #define VNCR_TCR2_EL1 0x270 |
| 52 | #define VNCR_PIRE0_EL1 0x290 |
| 53 | #define VNCR_PIRE0_EL2 0x298 |
| 54 | #define VNCR_PIR_EL1 0x2A0 |
| 55 | #define VNCR_ICH_LR0_EL2 0x400 |
| 56 | #define VNCR_ICH_LR1_EL2 0x408 |
| 57 | #define VNCR_ICH_LR2_EL2 0x410 |
| 58 | #define VNCR_ICH_LR3_EL2 0x418 |
| 59 | #define VNCR_ICH_LR4_EL2 0x420 |
| 60 | #define VNCR_ICH_LR5_EL2 0x428 |
| 61 | #define VNCR_ICH_LR6_EL2 0x430 |
| 62 | #define VNCR_ICH_LR7_EL2 0x438 |
| 63 | #define VNCR_ICH_LR8_EL2 0x440 |
| 64 | #define VNCR_ICH_LR9_EL2 0x448 |
| 65 | #define VNCR_ICH_LR10_EL2 0x450 |
| 66 | #define VNCR_ICH_LR11_EL2 0x458 |
| 67 | #define VNCR_ICH_LR12_EL2 0x460 |
| 68 | #define VNCR_ICH_LR13_EL2 0x468 |
| 69 | #define VNCR_ICH_LR14_EL2 0x470 |
| 70 | #define VNCR_ICH_LR15_EL2 0x478 |
| 71 | #define VNCR_ICH_AP0R0_EL2 0x480 |
| 72 | #define VNCR_ICH_AP0R1_EL2 0x488 |
| 73 | #define VNCR_ICH_AP0R2_EL2 0x490 |
| 74 | #define VNCR_ICH_AP0R3_EL2 0x498 |
| 75 | #define VNCR_ICH_AP1R0_EL2 0x4A0 |
| 76 | #define VNCR_ICH_AP1R1_EL2 0x4A8 |
| 77 | #define VNCR_ICH_AP1R2_EL2 0x4B0 |
| 78 | #define VNCR_ICH_AP1R3_EL2 0x4B8 |
| 79 | #define VNCR_ICH_HCR_EL2 0x4C0 |
| 80 | #define VNCR_ICH_VMCR_EL2 0x4C8 |
| 81 | #define VNCR_VDISR_EL2 0x500 |
| 82 | #define VNCR_PMBLIMITR_EL1 0x800 |
| 83 | #define VNCR_PMBPTR_EL1 0x810 |
| 84 | #define VNCR_PMBSR_EL1 0x820 |
| 85 | #define VNCR_PMSCR_EL1 0x828 |
| 86 | #define VNCR_PMSEVFR_EL1 0x830 |
| 87 | #define VNCR_PMSICR_EL1 0x838 |
| 88 | #define VNCR_PMSIRR_EL1 0x840 |
| 89 | #define VNCR_PMSLATFR_EL1 0x848 |
| 90 | #define VNCR_TRFCR_EL1 0x880 |
| 91 | #define VNCR_MPAM1_EL1 0x900 |
| 92 | #define VNCR_MPAMHCR_EL2 0x930 |
| 93 | #define VNCR_MPAMVPMV_EL2 0x938 |
| 94 | #define VNCR_MPAMVPM0_EL2 0x940 |
| 95 | #define VNCR_MPAMVPM1_EL2 0x948 |
| 96 | #define VNCR_MPAMVPM2_EL2 0x950 |
| 97 | #define VNCR_MPAMVPM3_EL2 0x958 |
| 98 | #define VNCR_MPAMVPM4_EL2 0x960 |
| 99 | #define VNCR_MPAMVPM5_EL2 0x968 |
| 100 | #define VNCR_MPAMVPM6_EL2 0x970 |
| 101 | #define VNCR_MPAMVPM7_EL2 0x978 |
| 102 | |
| 103 | #endif /* __ARM64_VNCR_MAPPING_H__ */ |