Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * TQM8xx(L) board specific definitions |
| 3 | * |
| 4 | * Copyright (c) 1999-2002 Wolfgang Denk (wd@denx.de) |
| 5 | */ |
| 6 | |
| 7 | #ifdef __KERNEL__ |
| 8 | #ifndef __MACH_TQM8xx_H |
| 9 | #define __MACH_TQM8xx_H |
| 10 | |
| 11 | #include <linux/config.h> |
| 12 | |
| 13 | #include <asm/ppcboot.h> |
| 14 | |
| 15 | #ifndef __ASSEMBLY__ |
| 16 | #define TQM_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ |
| 17 | #define TQM_IMAP_SIZE (64 * 1024) /* size of mapped area */ |
| 18 | |
| 19 | #define IMAP_ADDR TQM_IMMR_BASE /* physical base address of IMMR area */ |
| 20 | #define IMAP_SIZE TQM_IMAP_SIZE /* mapped size of IMMR area */ |
| 21 | |
| 22 | /*----------------------------------------------------------------------- |
| 23 | * PCMCIA stuff |
| 24 | *----------------------------------------------------------------------- |
| 25 | * |
| 26 | */ |
| 27 | #define PCMCIA_MEM_SIZE ( 64 << 20 ) |
| 28 | |
| 29 | #ifndef CONFIG_KUP4K |
| 30 | # define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */ |
| 31 | |
| 32 | #else /* CONFIG_KUP4K */ |
| 33 | |
| 34 | # define MAX_HWIFS 2 /* overwrite default in include/asm-ppc/ide.h */ |
| 35 | # ifndef __ASSEMBLY__ |
| 36 | # include <asm/8xx_immap.h> |
| 37 | static __inline__ void ide_led(int on) |
| 38 | { |
| 39 | volatile immap_t *immap = (immap_t *)IMAP_ADDR; |
| 40 | |
| 41 | if (on) { |
| 42 | immap->im_ioport.iop_padat &= ~0x80; |
| 43 | } else { |
| 44 | immap->im_ioport.iop_padat |= 0x80; |
| 45 | } |
| 46 | } |
| 47 | # endif /* __ASSEMBLY__ */ |
| 48 | # define IDE_LED(x) ide_led((x)) |
| 49 | #endif /* CONFIG_KUP4K */ |
| 50 | |
| 51 | /* |
| 52 | * Definitions for IDE0 Interface |
| 53 | */ |
| 54 | #define IDE0_BASE_OFFSET 0 |
| 55 | #define IDE0_DATA_REG_OFFSET (PCMCIA_MEM_SIZE + 0x320) |
| 56 | #define IDE0_ERROR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 1) |
| 57 | #define IDE0_NSECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 2) |
| 58 | #define IDE0_SECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 3) |
| 59 | #define IDE0_LCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 4) |
| 60 | #define IDE0_HCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 5) |
| 61 | #define IDE0_SELECT_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 6) |
| 62 | #define IDE0_STATUS_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 7) |
| 63 | #define IDE0_CONTROL_REG_OFFSET 0x0106 |
| 64 | #define IDE0_IRQ_REG_OFFSET 0x000A /* not used */ |
| 65 | |
| 66 | /* define IO_BASE for PCMCIA */ |
| 67 | #define _IO_BASE 0x80000000 |
| 68 | #define _IO_BASE_SIZE (64<<10) |
| 69 | |
| 70 | #define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */ |
| 71 | #define PHY_INTERRUPT 12 /* = IRQ6 */ |
| 72 | #define IDE0_INTERRUPT 13 |
| 73 | |
| 74 | #ifdef CONFIG_IDE |
| 75 | #endif |
| 76 | |
| 77 | /*----------------------------------------------------------------------- |
| 78 | * CPM Ethernet through SCCx. |
| 79 | *----------------------------------------------------------------------- |
| 80 | * |
| 81 | */ |
| 82 | |
| 83 | /*** TQM823L, TQM850L ***********************************************/ |
| 84 | |
| 85 | #if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) |
| 86 | /* Bits in parallel I/O port registers that have to be set/cleared |
| 87 | * to configure the pins for SCC1 use. |
| 88 | */ |
| 89 | #define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */ |
| 90 | #define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */ |
| 91 | #define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ |
| 92 | #define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ |
| 93 | |
| 94 | #define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */ |
| 95 | |
| 96 | #define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */ |
| 97 | #define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */ |
| 98 | |
| 99 | /* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to |
| 100 | * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero. |
| 101 | */ |
| 102 | #define SICR_ENET_MASK ((uint)0x0000ff00) |
| 103 | #define SICR_ENET_CLKRT ((uint)0x00002600) |
| 104 | #endif /* CONFIG_TQM823L, CONFIG_TQM850L */ |
| 105 | |
| 106 | /*** TQM860L ********************************************************/ |
| 107 | |
| 108 | #ifdef CONFIG_TQM860L |
| 109 | /* Bits in parallel I/O port registers that have to be set/cleared |
| 110 | * to configure the pins for SCC1 use. |
| 111 | */ |
| 112 | #define PA_ENET_RXD ((ushort)0x0001) /* PA 15 */ |
| 113 | #define PA_ENET_TXD ((ushort)0x0002) /* PA 14 */ |
| 114 | #define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ |
| 115 | #define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ |
| 116 | |
| 117 | #define PC_ENET_TENA ((ushort)0x0001) /* PC 15 */ |
| 118 | #define PC_ENET_CLSN ((ushort)0x0010) /* PC 11 */ |
| 119 | #define PC_ENET_RENA ((ushort)0x0020) /* PC 10 */ |
| 120 | |
| 121 | /* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to |
| 122 | * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. |
| 123 | */ |
| 124 | #define SICR_ENET_MASK ((uint)0x000000ff) |
| 125 | #define SICR_ENET_CLKRT ((uint)0x00000026) |
| 126 | #endif /* CONFIG_TQM860L */ |
| 127 | |
| 128 | /*** FPS850L *********************************************************/ |
| 129 | |
| 130 | #ifdef CONFIG_FPS850L |
| 131 | /* Bits in parallel I/O port registers that have to be set/cleared |
| 132 | * to configure the pins for SCC1 use. |
| 133 | */ |
| 134 | #define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */ |
| 135 | #define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */ |
| 136 | #define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ |
| 137 | #define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ |
| 138 | |
| 139 | #define PC_ENET_TENA ((ushort)0x0002) /* PC 14 */ |
| 140 | #define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */ |
| 141 | #define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */ |
| 142 | |
| 143 | /* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to |
| 144 | * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero. |
| 145 | */ |
| 146 | #define SICR_ENET_MASK ((uint)0x0000ff00) |
| 147 | #define SICR_ENET_CLKRT ((uint)0x00002600) |
| 148 | #endif /* CONFIG_FPS850L */ |
| 149 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | /* We don't use the 8259. |
| 151 | */ |
| 152 | #define NR_8259_INTS 0 |
| 153 | |
| 154 | #endif /* !__ASSEMBLY__ */ |
| 155 | #endif /* __MACH_TQM8xx_H */ |
| 156 | #endif /* __KERNEL__ */ |