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Nicolas Ferree2615012011-11-22 22:26:09 +01001* Advanced Interrupt Controller (AIC)
2
3Required properties:
4- compatible: Should be "atmel,<chip>-aic"
Nicolas Ferre62a993d2015-06-18 15:07:35 +02005 <chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4"
Nicolas Ferree2615012011-11-22 22:26:09 +01006- interrupt-controller: Identifies the node as an interrupt controller.
Masanari Iidaf21ccfa2013-01-14 15:14:56 +09007- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
Nicolas Ferree2615012011-11-22 22:26:09 +01008 The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
9 The second cell is used to specify flags:
10 bits[3:0] trigger type and level flags:
11 1 = low-to-high edge triggered.
12 2 = high-to-low edge triggered.
13 4 = active high level-sensitive.
14 8 = active low level-sensitive.
15 Valid combinations are 1, 2, 3, 4, 8.
16 Default flag for internal sources should be set to 4 (active high).
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020017 The third cell is used to specify the irq priority from 0 (lowest) to 7
18 (highest).
Nicolas Ferree2615012011-11-22 22:26:09 +010019- reg: Should contain AIC registers location and length
Jean-Christophe PLAGNIOL-VILLARDc6573942012-04-09 19:36:36 +080020- atmel,external-irqs: u32 array of external irqs.
Nicolas Ferree2615012011-11-22 22:26:09 +010021
22Examples:
23 /*
24 * AIC
25 */
26 aic: interrupt-controller@fffff000 {
27 compatible = "atmel,at91rm9200-aic";
28 interrupt-controller;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020029 #interrupt-cells = <3>;
Nicolas Ferree2615012011-11-22 22:26:09 +010030 reg = <0xfffff000 0x200>;
31 };
32
33 /*
34 * An interrupt generating device that is wired to an AIC.
35 */
36 dma: dma-controller@ffffec00 {
37 compatible = "atmel,at91sam9g45-dma";
38 reg = <0xffffec00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020039 interrupts = <21 4 5>;
Nicolas Ferree2615012011-11-22 22:26:09 +010040 };