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David Schleefed9eccb2008-11-04 20:29:31 -08001/*
Ian Abbott2892ffc2016-02-09 15:17:20 +00002 * comedi.h
3 * header file for COMEDI user API
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01004 *
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
David Schleefed9eccb2008-11-04 20:29:31 -080018
19#ifndef _COMEDI_H
20#define _COMEDI_H
21
David Schleefed9eccb2008-11-04 20:29:31 -080022#define COMEDI_MAJORVERSION 0
23#define COMEDI_MINORVERSION 7
24#define COMEDI_MICROVERSION 76
25#define VERSION "0.7.76"
26
27/* comedi's major device number */
28#define COMEDI_MAJOR 98
29
30/*
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +010031 * maximum number of minor devices. This can be increased, although
32 * kernel structures are currently statically allocated, thus you
33 * don't want this to be much more than you actually use.
David Schleefed9eccb2008-11-04 20:29:31 -080034 */
35#define COMEDI_NDEVICES 16
36
37/* number of config options in the config structure */
38#define COMEDI_NDEVCONFOPTS 32
H Hartley Sweetend1843132013-01-09 09:46:10 -070039
40/*
41 * NOTE: 'comedi_config --init-data' is deprecated
42 *
43 * The following indexes in the config options were used by
44 * comedi_config to pass firmware blobs from user space to the
45 * comedi drivers. The request_firmware() hotplug interface is
46 * now used by all comedi drivers instead.
47 */
48
49/* length of nth chunk of firmware data -*/
David Schleefed9eccb2008-11-04 20:29:31 -080050#define COMEDI_DEVCONF_AUX_DATA3_LENGTH 25
51#define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26
52#define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27
53#define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28
Mark Rankilore012b4c2010-05-06 18:07:44 +080054/* most significant 32 bits of pointer address (if needed) */
55#define COMEDI_DEVCONF_AUX_DATA_HI 29
56/* least significant 32 bits of pointer address */
57#define COMEDI_DEVCONF_AUX_DATA_LO 30
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -080058#define COMEDI_DEVCONF_AUX_DATA_LENGTH 31 /* total data length */
David Schleefed9eccb2008-11-04 20:29:31 -080059
60/* max length of device and driver names */
61#define COMEDI_NAMELEN 20
62
David Schleefed9eccb2008-11-04 20:29:31 -080063/* packs and unpacks a channel/range number */
64
Mark Rankilore012b4c2010-05-06 18:07:44 +080065#define CR_PACK(chan, rng, aref) \
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +010066 ((((aref) & 0x3) << 24) | (((rng) & 0xff) << 16) | (chan))
Mark Rankilore012b4c2010-05-06 18:07:44 +080067#define CR_PACK_FLAGS(chan, range, aref, flags) \
68 (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK))
David Schleefed9eccb2008-11-04 20:29:31 -080069
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +010070#define CR_CHAN(a) ((a) & 0xffff)
71#define CR_RANGE(a) (((a) >> 16) & 0xff)
72#define CR_AREF(a) (((a) >> 24) & 0x03)
David Schleefed9eccb2008-11-04 20:29:31 -080073
74#define CR_FLAGS_MASK 0xfc000000
Ian Abbott9cee3d42016-03-02 14:27:37 +000075#define CR_ALT_FILTER 0x04000000
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -080076#define CR_DITHER CR_ALT_FILTER
77#define CR_DEGLITCH CR_ALT_FILTER
Ian Abbott9cee3d42016-03-02 14:27:37 +000078#define CR_ALT_SOURCE 0x08000000
79#define CR_EDGE 0x40000000
80#define CR_INVERT 0x80000000
David Schleefed9eccb2008-11-04 20:29:31 -080081
82#define AREF_GROUND 0x00 /* analog ref = analog ground */
83#define AREF_COMMON 0x01 /* analog ref = analog common */
84#define AREF_DIFF 0x02 /* analog ref = differential */
85#define AREF_OTHER 0x03 /* analog ref = other (undefined) */
86
87/* counters -- these are arbitrary values */
88#define GPCT_RESET 0x0001
89#define GPCT_SET_SOURCE 0x0002
90#define GPCT_SET_GATE 0x0004
91#define GPCT_SET_DIRECTION 0x0008
92#define GPCT_SET_OPERATION 0x0010
93#define GPCT_ARM 0x0020
94#define GPCT_DISARM 0x0040
95#define GPCT_GET_INT_CLK_FRQ 0x0080
96
97#define GPCT_INT_CLOCK 0x0001
98#define GPCT_EXT_PIN 0x0002
99#define GPCT_NO_GATE 0x0004
100#define GPCT_UP 0x0008
101#define GPCT_DOWN 0x0010
102#define GPCT_HWUD 0x0020
103#define GPCT_SIMPLE_EVENT 0x0040
104#define GPCT_SINGLE_PERIOD 0x0080
105#define GPCT_SINGLE_PW 0x0100
106#define GPCT_CONT_PULSE_OUT 0x0200
107#define GPCT_SINGLE_PULSE_OUT 0x0400
108
109/* instructions */
110
111#define INSN_MASK_WRITE 0x8000000
112#define INSN_MASK_READ 0x4000000
113#define INSN_MASK_SPECIAL 0x2000000
114
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -0800115#define INSN_READ (0 | INSN_MASK_READ)
116#define INSN_WRITE (1 | INSN_MASK_WRITE)
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100117#define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE)
118#define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE)
119#define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL)
120#define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL)
121#define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL)
David Schleefed9eccb2008-11-04 20:29:31 -0800122
David Schleefed9eccb2008-11-04 20:29:31 -0800123/* command flags */
124/* These flags are used in comedi_cmd structures */
125
Ian Abbottdd7eb122014-09-03 13:45:43 +0100126#define CMDF_BOGUS 0x00000001 /* do the motions */
127
Mark Rankilore012b4c2010-05-06 18:07:44 +0800128/* try to use a real-time interrupt while performing command */
129#define CMDF_PRIORITY 0x00000008
David Schleefed9eccb2008-11-04 20:29:31 -0800130
Ian Abbott3e15acd2014-09-03 13:45:29 +0100131/* wake up on end-of-scan events */
132#define CMDF_WAKE_EOS 0x00000020
David Schleefed9eccb2008-11-04 20:29:31 -0800133
134#define CMDF_WRITE 0x00000040
David Schleefed9eccb2008-11-04 20:29:31 -0800135
136#define CMDF_RAWDATA 0x00000080
137
Ian Abbott3ab4ca12014-09-03 13:45:45 +0100138/* timer rounding definitions */
139#define CMDF_ROUND_MASK 0x00030000
140#define CMDF_ROUND_NEAREST 0x00000000
141#define CMDF_ROUND_DOWN 0x00010000
142#define CMDF_ROUND_UP 0x00020000
143#define CMDF_ROUND_UP_NEXT 0x00030000
144
David Schleefed9eccb2008-11-04 20:29:31 -0800145#define COMEDI_EV_START 0x00040000
146#define COMEDI_EV_SCAN_BEGIN 0x00080000
147#define COMEDI_EV_CONVERT 0x00100000
148#define COMEDI_EV_SCAN_END 0x00200000
149#define COMEDI_EV_STOP 0x00400000
150
Ian Abbott3e15acd2014-09-03 13:45:29 +0100151/* compatibility definitions */
Ian Abbottdd7eb122014-09-03 13:45:43 +0100152#define TRIG_BOGUS CMDF_BOGUS
Ian Abbott3e15acd2014-09-03 13:45:29 +0100153#define TRIG_RT CMDF_PRIORITY
154#define TRIG_WAKE_EOS CMDF_WAKE_EOS
155#define TRIG_WRITE CMDF_WRITE
Ian Abbott3ab4ca12014-09-03 13:45:45 +0100156#define TRIG_ROUND_MASK CMDF_ROUND_MASK
157#define TRIG_ROUND_NEAREST CMDF_ROUND_NEAREST
158#define TRIG_ROUND_DOWN CMDF_ROUND_DOWN
159#define TRIG_ROUND_UP CMDF_ROUND_UP
160#define TRIG_ROUND_UP_NEXT CMDF_ROUND_UP_NEXT
Ian Abbott3e15acd2014-09-03 13:45:29 +0100161
David Schleefed9eccb2008-11-04 20:29:31 -0800162/* trigger sources */
163
164#define TRIG_ANY 0xffffffff
165#define TRIG_INVALID 0x00000000
166
Marka9560a72010-05-10 17:56:05 +0800167#define TRIG_NONE 0x00000001 /* never trigger */
168#define TRIG_NOW 0x00000002 /* trigger now + N ns */
169#define TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */
170#define TRIG_TIME 0x00000008 /* trigger at time N ns */
171#define TRIG_TIMER 0x00000010 /* trigger at rate N ns */
172#define TRIG_COUNT 0x00000020 /* trigger when count reaches N */
173#define TRIG_EXT 0x00000040 /* trigger on external signal N */
174#define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */
175#define TRIG_OTHER 0x00000100 /* driver defined */
David Schleefed9eccb2008-11-04 20:29:31 -0800176
177/* subdevice flags */
178
179#define SDF_BUSY 0x0001 /* device is busy */
180#define SDF_BUSY_OWNER 0x0002 /* device is busy with your job */
181#define SDF_LOCKED 0x0004 /* subdevice is locked */
182#define SDF_LOCK_OWNER 0x0008 /* you own lock */
183#define SDF_MAXDATA 0x0010 /* maxdata depends on channel */
184#define SDF_FLAGS 0x0020 /* flags depend on channel */
185#define SDF_RANGETYPE 0x0040 /* range type depends on channel */
Ian Abbott222c4022016-02-09 15:17:24 +0000186#define SDF_PWM_COUNTER 0x0080 /* PWM can automatically switch off */
187#define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */
David Schleefed9eccb2008-11-04 20:29:31 -0800188#define SDF_CMD 0x1000 /* can do commands (deprecated) */
Marka9560a72010-05-10 17:56:05 +0800189#define SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */
190#define SDF_CMD_WRITE 0x4000 /* can do output commands */
191#define SDF_CMD_READ 0x8000 /* can do input commands */
David Schleefed9eccb2008-11-04 20:29:31 -0800192
Marka9560a72010-05-10 17:56:05 +0800193/* subdevice can be read (e.g. analog input) */
194#define SDF_READABLE 0x00010000
195/* subdevice can be written (e.g. analog output) */
196#define SDF_WRITABLE 0x00020000
David Schleefed9eccb2008-11-04 20:29:31 -0800197#define SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */
Marka9560a72010-05-10 17:56:05 +0800198/* subdevice does not have externally visible lines */
199#define SDF_INTERNAL 0x00040000
David Schleefed9eccb2008-11-04 20:29:31 -0800200#define SDF_GROUND 0x00100000 /* can do aref=ground */
201#define SDF_COMMON 0x00200000 /* can do aref=common */
202#define SDF_DIFF 0x00400000 /* can do aref=diff */
203#define SDF_OTHER 0x00800000 /* can do aref=other */
204#define SDF_DITHER 0x01000000 /* can do dithering */
205#define SDF_DEGLITCH 0x02000000 /* can do deglitching */
206#define SDF_MMAP 0x04000000 /* can do mmap() */
207#define SDF_RUNNING 0x08000000 /* subdevice is acquiring data */
208#define SDF_LSAMPL 0x10000000 /* subdevice uses 32-bit samples */
209#define SDF_PACKED 0x20000000 /* subdevice can do packed DIO */
David Schleefed9eccb2008-11-04 20:29:31 -0800210
211/* subdevice types */
212
Ian Abbott8fb02b22016-02-09 15:17:21 +0000213/**
214 * enum comedi_subdevice_type - COMEDI subdevice types
215 * @COMEDI_SUBD_UNUSED: Unused subdevice.
216 * @COMEDI_SUBD_AI: Analog input.
217 * @COMEDI_SUBD_AO: Analog output.
218 * @COMEDI_SUBD_DI: Digital input.
219 * @COMEDI_SUBD_DO: Digital output.
220 * @COMEDI_SUBD_DIO: Digital input/output.
221 * @COMEDI_SUBD_COUNTER: Counter.
222 * @COMEDI_SUBD_TIMER: Timer.
223 * @COMEDI_SUBD_MEMORY: Memory, EEPROM, DPRAM.
224 * @COMEDI_SUBD_CALIB: Calibration DACs.
225 * @COMEDI_SUBD_PROC: Processor, DSP.
226 * @COMEDI_SUBD_SERIAL: Serial I/O.
227 * @COMEDI_SUBD_PWM: Pulse-Width Modulation output.
228 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700229enum comedi_subdevice_type {
Ian Abbott8fb02b22016-02-09 15:17:21 +0000230 COMEDI_SUBD_UNUSED,
231 COMEDI_SUBD_AI,
232 COMEDI_SUBD_AO,
233 COMEDI_SUBD_DI,
234 COMEDI_SUBD_DO,
235 COMEDI_SUBD_DIO,
236 COMEDI_SUBD_COUNTER,
237 COMEDI_SUBD_TIMER,
238 COMEDI_SUBD_MEMORY,
239 COMEDI_SUBD_CALIB,
240 COMEDI_SUBD_PROC,
241 COMEDI_SUBD_SERIAL,
242 COMEDI_SUBD_PWM
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700243};
David Schleefed9eccb2008-11-04 20:29:31 -0800244
245/* configuration instructions */
246
Ian Abbott8fb02b22016-02-09 15:17:21 +0000247/**
Spencer E. Olsoncc7a6d62016-10-08 15:38:43 -0600248 * enum comedi_io_direction - COMEDI I/O directions
249 * @COMEDI_INPUT: Input.
250 * @COMEDI_OUTPUT: Output.
251 * @COMEDI_OPENDRAIN: Open-drain (or open-collector) output.
252 *
253 * These are used by the %INSN_CONFIG_DIO_QUERY configuration instruction to
254 * report a direction. They may also be used in other places where a direction
255 * needs to be specified.
256 */
257enum comedi_io_direction {
258 COMEDI_INPUT = 0,
259 COMEDI_OUTPUT = 1,
260 COMEDI_OPENDRAIN = 2
261};
262
263/**
Ian Abbott8fb02b22016-02-09 15:17:21 +0000264 * enum configuration_ids - COMEDI configuration instruction codes
265 * @INSN_CONFIG_DIO_INPUT: Configure digital I/O as input.
266 * @INSN_CONFIG_DIO_OUTPUT: Configure digital I/O as output.
267 * @INSN_CONFIG_DIO_OPENDRAIN: Configure digital I/O as open-drain (or open
268 * collector) output.
269 * @INSN_CONFIG_ANALOG_TRIG: Configure analog trigger.
270 * @INSN_CONFIG_ALT_SOURCE: Configure alternate input source.
271 * @INSN_CONFIG_DIGITAL_TRIG: Configure digital trigger.
272 * @INSN_CONFIG_BLOCK_SIZE: Configure block size for DMA transfers.
273 * @INSN_CONFIG_TIMER_1: Configure divisor for external clock.
274 * @INSN_CONFIG_FILTER: Configure a filter.
275 * @INSN_CONFIG_CHANGE_NOTIFY: Configure change notification for digital
276 * inputs. (New drivers should use
277 * %INSN_CONFIG_DIGITAL_TRIG instead.)
278 * @INSN_CONFIG_SERIAL_CLOCK: Configure clock for serial I/O.
279 * @INSN_CONFIG_BIDIRECTIONAL_DATA: Send and receive byte over serial I/O.
280 * @INSN_CONFIG_DIO_QUERY: Query direction of digital I/O channel.
281 * @INSN_CONFIG_PWM_OUTPUT: Configure pulse-width modulator output.
282 * @INSN_CONFIG_GET_PWM_OUTPUT: Get pulse-width modulator output configuration.
283 * @INSN_CONFIG_ARM: Arm a subdevice or channel.
284 * @INSN_CONFIG_DISARM: Disarm a subdevice or channel.
285 * @INSN_CONFIG_GET_COUNTER_STATUS: Get counter status.
286 * @INSN_CONFIG_RESET: Reset a subdevice or channel.
287 * @INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR: Configure counter/timer as
288 * single pulse generator.
289 * @INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR: Configure counter/timer as
290 * pulse train generator.
291 * @INSN_CONFIG_GPCT_QUADRATURE_ENCODER: Configure counter as a quadrature
292 * encoder.
293 * @INSN_CONFIG_SET_GATE_SRC: Set counter/timer gate source.
294 * @INSN_CONFIG_GET_GATE_SRC: Get counter/timer gate source.
295 * @INSN_CONFIG_SET_CLOCK_SRC: Set counter/timer master clock source.
296 * @INSN_CONFIG_GET_CLOCK_SRC: Get counter/timer master clock source.
297 * @INSN_CONFIG_SET_OTHER_SRC: Set counter/timer "other" source.
298 * @INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE: Get size (in bytes) of subdevice's
299 * on-board FIFOs used during streaming
300 * input/output.
301 * @INSN_CONFIG_SET_COUNTER_MODE: Set counter/timer mode.
302 * @INSN_CONFIG_8254_SET_MODE: (Deprecated) Same as
303 * %INSN_CONFIG_SET_COUNTER_MODE.
304 * @INSN_CONFIG_8254_READ_STATUS: Read status of 8254 counter channel.
305 * @INSN_CONFIG_SET_ROUTING: Set routing for a channel.
306 * @INSN_CONFIG_GET_ROUTING: Get routing for a channel.
307 * @INSN_CONFIG_PWM_SET_PERIOD: Set PWM period in nanoseconds.
308 * @INSN_CONFIG_PWM_GET_PERIOD: Get PWM period in nanoseconds.
309 * @INSN_CONFIG_GET_PWM_STATUS: Get PWM status.
310 * @INSN_CONFIG_PWM_SET_H_BRIDGE: Set PWM H bridge duty cycle and polarity for
311 * a relay simultaneously.
312 * @INSN_CONFIG_PWM_GET_H_BRIDGE: Get PWM H bridge duty cycle and polarity.
313 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700314enum configuration_ids {
Spencer E. Olsoncc7a6d62016-10-08 15:38:43 -0600315 INSN_CONFIG_DIO_INPUT = COMEDI_INPUT,
316 INSN_CONFIG_DIO_OUTPUT = COMEDI_OUTPUT,
317 INSN_CONFIG_DIO_OPENDRAIN = COMEDI_OPENDRAIN,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700318 INSN_CONFIG_ANALOG_TRIG = 16,
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -0800319/* INSN_CONFIG_WAVEFORM = 17, */
320/* INSN_CONFIG_TRIG = 18, */
321/* INSN_CONFIG_COUNTER = 19, */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700322 INSN_CONFIG_ALT_SOURCE = 20,
323 INSN_CONFIG_DIGITAL_TRIG = 21,
324 INSN_CONFIG_BLOCK_SIZE = 22,
325 INSN_CONFIG_TIMER_1 = 23,
326 INSN_CONFIG_FILTER = 24,
327 INSN_CONFIG_CHANGE_NOTIFY = 25,
David Schleefed9eccb2008-11-04 20:29:31 -0800328
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700329 INSN_CONFIG_SERIAL_CLOCK = 26, /*ALPHA*/
330 INSN_CONFIG_BIDIRECTIONAL_DATA = 27,
331 INSN_CONFIG_DIO_QUERY = 28,
332 INSN_CONFIG_PWM_OUTPUT = 29,
333 INSN_CONFIG_GET_PWM_OUTPUT = 30,
334 INSN_CONFIG_ARM = 31,
335 INSN_CONFIG_DISARM = 32,
336 INSN_CONFIG_GET_COUNTER_STATUS = 33,
337 INSN_CONFIG_RESET = 34,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700338 INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700339 INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700340 INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003,
Ian Abbott8fb02b22016-02-09 15:17:21 +0000341 INSN_CONFIG_SET_GATE_SRC = 2001,
342 INSN_CONFIG_GET_GATE_SRC = 2002,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700343 INSN_CONFIG_SET_CLOCK_SRC = 2003,
Ian Abbott8fb02b22016-02-09 15:17:21 +0000344 INSN_CONFIG_GET_CLOCK_SRC = 2004,
345 INSN_CONFIG_SET_OTHER_SRC = 2005,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700346 INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006,
347 INSN_CONFIG_SET_COUNTER_MODE = 4097,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700348 INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE,
349 INSN_CONFIG_8254_READ_STATUS = 4098,
350 INSN_CONFIG_SET_ROUTING = 4099,
351 INSN_CONFIG_GET_ROUTING = 4109,
Ian Abbott8fb02b22016-02-09 15:17:21 +0000352 INSN_CONFIG_PWM_SET_PERIOD = 5000,
353 INSN_CONFIG_PWM_GET_PERIOD = 5001,
354 INSN_CONFIG_GET_PWM_STATUS = 5002,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700355 INSN_CONFIG_PWM_SET_H_BRIDGE = 5003,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700356 INSN_CONFIG_PWM_GET_H_BRIDGE = 5004
357};
David Schleefed9eccb2008-11-04 20:29:31 -0800358
Ian Abbott8fb02b22016-02-09 15:17:21 +0000359/**
360 * enum comedi_digital_trig_op - operations for configuring a digital trigger
361 * @COMEDI_DIGITAL_TRIG_DISABLE: Return digital trigger to its default,
362 * inactive, unconfigured state.
363 * @COMEDI_DIGITAL_TRIG_ENABLE_EDGES: Set rising and/or falling edge inputs
364 * that each can fire the trigger.
365 * @COMEDI_DIGITAL_TRIG_ENABLE_LEVELS: Set a combination of high and/or low
366 * level inputs that can fire the trigger.
Ian Abbott206cb102012-11-14 11:22:55 +0000367 *
Ian Abbott8fb02b22016-02-09 15:17:21 +0000368 * These are used with the %INSN_CONFIG_DIGITAL_TRIG configuration instruction.
369 * The data for the configuration instruction is as follows...
Ian Abbott206cb102012-11-14 11:22:55 +0000370 *
Ian Abbott8fb02b22016-02-09 15:17:21 +0000371 * data[%0] = %INSN_CONFIG_DIGITAL_TRIG
Ian Abbott206cb102012-11-14 11:22:55 +0000372 *
Ian Abbott8fb02b22016-02-09 15:17:21 +0000373 * data[%1] = trigger ID
Ian Abbott206cb102012-11-14 11:22:55 +0000374 *
Ian Abbott8fb02b22016-02-09 15:17:21 +0000375 * data[%2] = configuration operation
Ian Abbott206cb102012-11-14 11:22:55 +0000376 *
Ian Abbott8fb02b22016-02-09 15:17:21 +0000377 * data[%3] = configuration parameter 1
Ian Abbott206cb102012-11-14 11:22:55 +0000378 *
Ian Abbott8fb02b22016-02-09 15:17:21 +0000379 * data[%4] = configuration parameter 2
380 *
381 * data[%5] = configuration parameter 3
382 *
383 * The trigger ID (data[%1]) is used to differentiate multiple digital triggers
384 * belonging to the same subdevice. The configuration operation (data[%2]) is
385 * one of the enum comedi_digital_trig_op values. The configuration
386 * parameters (data[%3], data[%4], and data[%5]) depend on the operation; they
387 * are not used with %COMEDI_DIGITAL_TRIG_DISABLE.
388 *
389 * For %COMEDI_DIGITAL_TRIG_ENABLE_EDGES and %COMEDI_DIGITAL_TRIG_ENABLE_LEVELS,
390 * configuration parameter 1 (data[%3]) contains a "left-shift" value that
391 * specifies the input corresponding to bit 0 of configuration parameters 2
392 * and 3. This is useful if the trigger has more than 32 inputs.
393 *
394 * For %COMEDI_DIGITAL_TRIG_ENABLE_EDGES, configuration parameter 2 (data[%4])
395 * specifies which of up to 32 inputs have rising-edge sensitivity, and
396 * configuration parameter 3 (data[%5]) specifies which of up to 32 inputs
397 * have falling-edge sensitivity that can fire the trigger.
398 *
399 * For %COMEDI_DIGITAL_TRIG_ENABLE_LEVELS, configuration parameter 2 (data[%4])
400 * specifies which of up to 32 inputs must be at a high level, and
401 * configuration parameter 3 (data[%5]) specifies which of up to 32 inputs
402 * must be at a low level for the trigger to fire.
403 *
404 * Some sequences of %INSN_CONFIG_DIGITAL_TRIG instructions may have a (partly)
Ian Abbott206cb102012-11-14 11:22:55 +0000405 * accumulative effect, depending on the low-level driver. This is useful
Ian Abbott8fb02b22016-02-09 15:17:21 +0000406 * when setting up a trigger that has more than 32 inputs, or has a combination
407 * of edge- and level-triggered inputs.
Ian Abbott206cb102012-11-14 11:22:55 +0000408 */
409enum comedi_digital_trig_op {
410 COMEDI_DIGITAL_TRIG_DISABLE = 0,
411 COMEDI_DIGITAL_TRIG_ENABLE_EDGES = 1,
412 COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = 2
413};
414
Ian Abbott8fb02b22016-02-09 15:17:21 +0000415/**
Ian Abbott8fb02b22016-02-09 15:17:21 +0000416 * enum comedi_support_level - support level for a COMEDI feature
417 * @COMEDI_UNKNOWN_SUPPORT: Unspecified support for feature.
418 * @COMEDI_SUPPORTED: Feature is supported.
419 * @COMEDI_UNSUPPORTED: Feature is unsupported.
420 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700421enum comedi_support_level {
422 COMEDI_UNKNOWN_SUPPORT = 0,
423 COMEDI_SUPPORTED,
424 COMEDI_UNSUPPORTED
425};
David Schleefed9eccb2008-11-04 20:29:31 -0800426
Ian Abbott8fb02b22016-02-09 15:17:21 +0000427/**
428 * enum comedi_counter_status_flags - counter status bits
429 * @COMEDI_COUNTER_ARMED: Counter is armed.
430 * @COMEDI_COUNTER_COUNTING: Counter is counting.
431 * @COMEDI_COUNTER_TERMINAL_COUNT: Counter reached terminal count.
432 *
433 * These bitwise values are used by the %INSN_CONFIG_GET_COUNTER_STATUS
434 * configuration instruction to report the status of a counter.
435 */
436enum comedi_counter_status_flags {
437 COMEDI_COUNTER_ARMED = 0x1,
438 COMEDI_COUNTER_COUNTING = 0x2,
439 COMEDI_COUNTER_TERMINAL_COUNT = 0x4,
440};
441
David Schleefed9eccb2008-11-04 20:29:31 -0800442/* ioctls */
443
444#define CIO 'd'
Bill Pemberton0707bb02009-03-16 22:06:20 -0400445#define COMEDI_DEVCONFIG _IOW(CIO, 0, struct comedi_devconfig)
Bill Pemberton063db042009-03-16 22:06:15 -0400446#define COMEDI_DEVINFO _IOR(CIO, 1, struct comedi_devinfo)
Bill Pembertonbd52efbb2009-03-16 22:06:09 -0400447#define COMEDI_SUBDINFO _IOR(CIO, 2, struct comedi_subdinfo)
Bill Pembertona18b4162009-03-16 22:06:04 -0400448#define COMEDI_CHANINFO _IOR(CIO, 3, struct comedi_chaninfo)
Ian Abbott75aa1ca2016-02-09 15:17:23 +0000449/* _IOWR(CIO, 4, ...) is reserved */
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -0800450#define COMEDI_LOCK _IO(CIO, 5)
451#define COMEDI_UNLOCK _IO(CIO, 6)
452#define COMEDI_CANCEL _IO(CIO, 7)
Bill Pembertond0a353f2009-03-16 22:06:26 -0400453#define COMEDI_RANGEINFO _IOR(CIO, 8, struct comedi_rangeinfo)
Bill Pembertonea6d0d42009-03-16 22:05:47 -0400454#define COMEDI_CMD _IOR(CIO, 9, struct comedi_cmd)
455#define COMEDI_CMDTEST _IOR(CIO, 10, struct comedi_cmd)
Bill Pembertonda613f42009-03-16 22:05:59 -0400456#define COMEDI_INSNLIST _IOR(CIO, 11, struct comedi_insnlist)
Bill Pemberton90035c02009-03-16 22:05:53 -0400457#define COMEDI_INSN _IOR(CIO, 12, struct comedi_insn)
Bill Pembertonbe6aba42009-03-16 22:06:37 -0400458#define COMEDI_BUFCONFIG _IOR(CIO, 13, struct comedi_bufconfig)
Bill Pemberton9aa53392009-03-16 22:06:42 -0400459#define COMEDI_BUFINFO _IOWR(CIO, 14, struct comedi_bufinfo)
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -0800460#define COMEDI_POLL _IO(CIO, 15)
Ian Abbottc299a672014-11-04 18:09:01 +0000461#define COMEDI_SETRSUBD _IO(CIO, 16)
462#define COMEDI_SETWSUBD _IO(CIO, 17)
David Schleefed9eccb2008-11-04 20:29:31 -0800463
464/* structures */
465
Ian Abbottace7aa72016-02-09 15:17:22 +0000466/**
467 * struct comedi_insn - COMEDI instruction
468 * @insn: COMEDI instruction type (%INSN_xxx).
469 * @n: Length of @data[].
470 * @data: Pointer to data array operated on by the instruction.
471 * @subdev: Subdevice index.
472 * @chanspec: A packed "chanspec" value consisting of channel number,
473 * analog range index, analog reference type, and flags.
474 * @unused: Reserved for future use.
475 *
476 * This is used with the %COMEDI_INSN ioctl, and indirectly with the
477 * %COMEDI_INSNLIST ioctl.
478 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700479struct comedi_insn {
480 unsigned int insn;
481 unsigned int n;
482 unsigned int __user *data;
483 unsigned int subdev;
484 unsigned int chanspec;
485 unsigned int unused[3];
486};
David Schleefed9eccb2008-11-04 20:29:31 -0800487
Ian Abbottace7aa72016-02-09 15:17:22 +0000488/**
489 * struct comedi_insnlist - list of COMEDI instructions
490 * @n_insns: Number of COMEDI instructions.
491 * @insns: Pointer to array COMEDI instructions.
492 *
493 * This is used with the %COMEDI_INSNLIST ioctl.
494 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700495struct comedi_insnlist {
496 unsigned int n_insns;
497 struct comedi_insn __user *insns;
498};
David Schleefed9eccb2008-11-04 20:29:31 -0800499
Ian Abbottace7aa72016-02-09 15:17:22 +0000500/**
501 * struct comedi_cmd - COMEDI asynchronous acquisition command details
502 * @subdev: Subdevice index.
503 * @flags: Command flags (%CMDF_xxx).
504 * @start_src: "Start acquisition" trigger source (%TRIG_xxx).
505 * @start_arg: "Start acquisition" trigger argument.
506 * @scan_begin_src: "Scan begin" trigger source.
507 * @scan_begin_arg: "Scan begin" trigger argument.
508 * @convert_src: "Convert" trigger source.
509 * @convert_arg: "Convert" trigger argument.
510 * @scan_end_src: "Scan end" trigger source.
511 * @scan_end_arg: "Scan end" trigger argument.
512 * @stop_src: "Stop acquisition" trigger source.
513 * @stop_arg: "Stop acquisition" trigger argument.
514 * @chanlist: Pointer to array of "chanspec" values, containing a
515 * sequence of channel numbers packed with analog range
516 * index, etc.
517 * @chanlist_len: Number of channels in sequence.
518 * @data: Pointer to miscellaneous set-up data (not used).
519 * @data_len: Length of miscellaneous set-up data.
520 *
521 * This is used with the %COMEDI_CMD or %COMEDI_CMDTEST ioctl to set-up
522 * or validate an asynchronous acquisition command. The ioctl may modify
523 * the &struct comedi_cmd and copy it back to the caller.
524 *
525 * Optional command @flags values that can be ORed together...
526 *
527 * %CMDF_BOGUS - makes %COMEDI_CMD ioctl return error %EAGAIN instead of
528 * starting the command.
529 *
530 * %CMDF_PRIORITY - requests "hard real-time" processing (which is not
531 * supported in this version of COMEDI).
532 *
533 * %CMDF_WAKE_EOS - requests the command makes data available for reading
534 * after every "scan" period.
535 *
536 * %CMDF_WRITE - marks the command as being in the "write" (to device)
537 * direction. This does not need to be specified by the caller unless the
538 * subdevice supports commands in either direction.
539 *
540 * %CMDF_RAWDATA - prevents the command from "munging" the data between the
541 * COMEDI sample format and the raw hardware sample format.
542 *
543 * %CMDF_ROUND_NEAREST - requests timing periods to be rounded to nearest
544 * supported values.
545 *
546 * %CMDF_ROUND_DOWN - requests timing periods to be rounded down to supported
547 * values (frequencies rounded up).
548 *
549 * %CMDF_ROUND_UP - requests timing periods to be rounded up to supported
550 * values (frequencies rounded down).
551 *
552 * Trigger source values for @start_src, @scan_begin_src, @convert_src,
553 * @scan_end_src, and @stop_src...
554 *
555 * %TRIG_ANY - "all ones" value used to test which trigger sources are
556 * supported.
557 *
558 * %TRIG_INVALID - "all zeroes" value used to indicate that all requested
559 * trigger sources are invalid.
560 *
561 * %TRIG_NONE - never trigger (often used as a @stop_src value).
562 *
563 * %TRIG_NOW - trigger after '_arg' nanoseconds.
564 *
565 * %TRIG_FOLLOW - trigger follows another event.
566 *
567 * %TRIG_TIMER - trigger every '_arg' nanoseconds.
568 *
569 * %TRIG_COUNT - trigger when count '_arg' is reached.
570 *
571 * %TRIG_EXT - trigger on external signal specified by '_arg'.
572 *
573 * %TRIG_INT - trigger on internal, software trigger specified by '_arg'.
574 *
575 * %TRIG_OTHER - trigger on other, driver-defined signal specified by '_arg'.
576 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700577struct comedi_cmd {
578 unsigned int subdev;
579 unsigned int flags;
David Schleefed9eccb2008-11-04 20:29:31 -0800580
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700581 unsigned int start_src;
582 unsigned int start_arg;
David Schleefed9eccb2008-11-04 20:29:31 -0800583
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700584 unsigned int scan_begin_src;
585 unsigned int scan_begin_arg;
David Schleefed9eccb2008-11-04 20:29:31 -0800586
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700587 unsigned int convert_src;
588 unsigned int convert_arg;
David Schleefed9eccb2008-11-04 20:29:31 -0800589
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700590 unsigned int scan_end_src;
591 unsigned int scan_end_arg;
David Schleefed9eccb2008-11-04 20:29:31 -0800592
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700593 unsigned int stop_src;
594 unsigned int stop_arg;
David Schleefed9eccb2008-11-04 20:29:31 -0800595
Ian Abbottace7aa72016-02-09 15:17:22 +0000596 unsigned int *chanlist;
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700597 unsigned int chanlist_len;
David Schleefed9eccb2008-11-04 20:29:31 -0800598
Ian Abbottace7aa72016-02-09 15:17:22 +0000599 short __user *data;
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700600 unsigned int data_len;
601};
David Schleefed9eccb2008-11-04 20:29:31 -0800602
Ian Abbottace7aa72016-02-09 15:17:22 +0000603/**
604 * struct comedi_chaninfo - used to retrieve per-channel information
605 * @subdev: Subdevice index.
606 * @maxdata_list: Optional pointer to per-channel maximum data values.
607 * @flaglist: Optional pointer to per-channel flags.
608 * @rangelist: Optional pointer to per-channel range types.
609 * @unused: Reserved for future use.
610 *
611 * This is used with the %COMEDI_CHANINFO ioctl to get per-channel information
612 * for the subdevice. Use of this requires knowledge of the number of channels
613 * and subdevice flags obtained using the %COMEDI_SUBDINFO ioctl.
614 *
615 * The @maxdata_list member must be %NULL unless the %SDF_MAXDATA subdevice
616 * flag is set. The @flaglist member must be %NULL unless the %SDF_FLAGS
617 * subdevice flag is set. The @rangelist member must be %NULL unless the
618 * %SDF_RANGETYPE subdevice flag is set. Otherwise, the arrays they point to
619 * must be at least as long as the number of channels.
620 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700621struct comedi_chaninfo {
622 unsigned int subdev;
623 unsigned int __user *maxdata_list;
624 unsigned int __user *flaglist;
625 unsigned int __user *rangelist;
626 unsigned int unused[4];
627};
David Schleefed9eccb2008-11-04 20:29:31 -0800628
Ian Abbottace7aa72016-02-09 15:17:22 +0000629/**
630 * struct comedi_rangeinfo - used to retrieve the range table for a channel
631 * @range_type: Encodes subdevice index (bits 27:24), channel index
632 * (bits 23:16) and range table length (bits 15:0).
633 * @range_ptr: Pointer to array of @struct comedi_krange to be filled
634 * in with the range table for the channel or subdevice.
635 *
636 * This is used with the %COMEDI_RANGEINFO ioctl to retrieve the range table
637 * for a specific channel (if the subdevice has the %SDF_RANGETYPE flag set to
638 * indicate that the range table depends on the channel), or for the subdevice
639 * as a whole (if the %SDF_RANGETYPE flag is clear, indicating the range table
640 * is shared by all channels).
641 *
642 * The @range_type value is an input to the ioctl and comes from a previous
643 * use of the %COMEDI_SUBDINFO ioctl (if the %SDF_RANGETYPE flag is clear),
644 * or the %COMEDI_CHANINFO ioctl (if the %SDF_RANGETYPE flag is set).
645 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700646struct comedi_rangeinfo {
647 unsigned int range_type;
648 void __user *range_ptr;
649};
David Schleefed9eccb2008-11-04 20:29:31 -0800650
Ian Abbottace7aa72016-02-09 15:17:22 +0000651/**
652 * struct comedi_krange - describes a range in a range table
653 * @min: Minimum value in millionths (1e-6) of a unit.
654 * @max: Maximum value in millionths (1e-6) of a unit.
655 * @flags: Indicates the units (in bits 7:0) OR'ed with optional flags.
656 *
657 * A range table is associated with a single channel, or with all channels in a
658 * subdevice, and a list of one or more ranges. A %struct comedi_krange
659 * describes the physical range of units for one of those ranges. Sample
660 * values in COMEDI are unsigned from %0 up to some 'maxdata' value. The
661 * mapping from sample values to physical units is assumed to be nomimally
662 * linear (for the purpose of describing the range), with sample value %0
663 * mapping to @min, and the 'maxdata' sample value mapping to @max.
664 *
665 * The currently defined units are %UNIT_volt (%0), %UNIT_mA (%1), and
666 * %UNIT_none (%2). The @min and @max values are the physical range multiplied
667 * by 1e6, so a @max value of %1000000 (with %UNIT_volt) represents a maximal
668 * value of 1 volt.
669 *
Ian Abbottd20f8a72016-03-02 14:27:38 +0000670 * The only defined flag value is %RF_EXTERNAL (%0x100), indicating that the
Ian Abbottace7aa72016-02-09 15:17:22 +0000671 * the range needs to be multiplied by an external reference.
672 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700673struct comedi_krange {
Ian Abbottace7aa72016-02-09 15:17:22 +0000674 int min;
675 int max;
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700676 unsigned int flags;
677};
David Schleefed9eccb2008-11-04 20:29:31 -0800678
Ian Abbottace7aa72016-02-09 15:17:22 +0000679/**
680 * struct comedi_subdinfo - used to retrieve information about a subdevice
681 * @type: Type of subdevice from &enum comedi_subdevice_type.
682 * @n_chan: Number of channels the subdevice supports.
683 * @subd_flags: A mixture of static and dynamic flags describing
684 * aspects of the subdevice and its current state.
685 * @timer_type: Timer type. Always set to %5 ("nanosecond timer").
686 * @len_chanlist: Maximum length of a channel list if the subdevice
687 * supports asynchronous acquisition commands.
688 * @maxdata: Maximum sample value for all channels if the
689 * %SDF_MAXDATA subdevice flag is clear.
690 * @flags: Channel flags for all channels if the %SDF_FLAGS
691 * subdevice flag is clear.
692 * @range_type: The range type for all channels if the %SDF_RANGETYPE
693 * subdevice flag is clear. Encodes the subdevice index
694 * (bits 27:24), a dummy channel index %0 (bits 23:16),
695 * and the range table length (bits 15:0).
696 * @settling_time_0: Not used.
697 * @insn_bits_support: Set to %COMEDI_SUPPORTED if the subdevice supports the
698 * %INSN_BITS instruction, or to %COMEDI_UNSUPPORTED if it
699 * does not.
700 * @unused: Reserved for future use.
701 *
702 * This is used with the %COMEDI_SUBDINFO ioctl which copies an array of
703 * &struct comedi_subdinfo back to user space, with one element per subdevice.
704 * Use of this requires knowledge of the number of subdevices obtained from
705 * the %COMEDI_DEVINFO ioctl.
706 *
707 * These are the @subd_flags values that may be ORed together...
708 *
709 * %SDF_BUSY - the subdevice is busy processing an asynchronous command or a
710 * synchronous instruction.
711 *
712 * %SDF_BUSY_OWNER - the subdevice is busy processing an asynchronous
713 * acquisition command started on the current file object (the file object
714 * issuing the %COMEDI_SUBDINFO ioctl).
715 *
716 * %SDF_LOCKED - the subdevice is locked by a %COMEDI_LOCK ioctl.
717 *
718 * %SDF_LOCK_OWNER - the subdevice is locked by a %COMEDI_LOCK ioctl from the
719 * current file object.
720 *
721 * %SDF_MAXDATA - maximum sample values are channel-specific.
722 *
723 * %SDF_FLAGS - channel flags are channel-specific.
724 *
725 * %SDF_RANGETYPE - range types are channel-specific.
726 *
Ian Abbott222c4022016-02-09 15:17:24 +0000727 * %SDF_PWM_COUNTER - PWM can switch off automatically.
Ian Abbottace7aa72016-02-09 15:17:22 +0000728 *
Ian Abbott222c4022016-02-09 15:17:24 +0000729 * %SDF_PWM_HBRIDGE - or PWM is signed (H-bridge).
Ian Abbottace7aa72016-02-09 15:17:22 +0000730 *
731 * %SDF_CMD - the subdevice supports asynchronous commands.
732 *
733 * %SDF_SOFT_CALIBRATED - the subdevice uses software calibration.
734 *
735 * %SDF_CMD_WRITE - the subdevice supports asynchronous commands in the output
736 * ("write") direction.
737 *
738 * %SDF_CMD_READ - the subdevice supports asynchronous commands in the input
739 * ("read") direction.
740 *
741 * %SDF_READABLE - the subdevice is readable (e.g. analog input).
742 *
743 * %SDF_WRITABLE (aliased as %SDF_WRITEABLE) - the subdevice is writable (e.g.
744 * analog output).
745 *
746 * %SDF_INTERNAL - the subdevice has no externally visible lines.
747 *
748 * %SDF_GROUND - the subdevice can use ground as an analog reference.
749 *
750 * %SDF_COMMON - the subdevice can use a common analog reference.
751 *
752 * %SDF_DIFF - the subdevice can use differential inputs (or outputs).
753 *
754 * %SDF_OTHER - the subdevice can use some other analog reference.
755 *
756 * %SDF_DITHER - the subdevice can do dithering.
757 *
758 * %SDF_DEGLITCH - the subdevice can do deglitching.
759 *
760 * %SDF_MMAP - this is never set.
761 *
762 * %SDF_RUNNING - an asynchronous command is still running.
763 *
764 * %SDF_LSAMPL - the subdevice uses "long" (32-bit) samples (for asynchronous
765 * command data).
766 *
767 * %SDF_PACKED - the subdevice packs several DIO samples into a single sample
768 * (for asynchronous command data).
769 *
770 * No "channel flags" (@flags) values are currently defined.
771 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700772struct comedi_subdinfo {
773 unsigned int type;
774 unsigned int n_chan;
775 unsigned int subd_flags;
776 unsigned int timer_type;
777 unsigned int len_chanlist;
778 unsigned int maxdata;
Ian Abbottace7aa72016-02-09 15:17:22 +0000779 unsigned int flags;
780 unsigned int range_type;
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700781 unsigned int settling_time_0;
Nikita Eshkeevf7ede002016-05-03 18:22:23 +0300782 unsigned int insn_bits_support;
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700783 unsigned int unused[8];
784};
David Schleefed9eccb2008-11-04 20:29:31 -0800785
Ian Abbottace7aa72016-02-09 15:17:22 +0000786/**
787 * struct comedi_devinfo - used to retrieve information about a COMEDI device
788 * @version_code: COMEDI version code.
789 * @n_subdevs: Number of subdevices the device has.
790 * @driver_name: Null-terminated COMEDI driver name.
791 * @board_name: Null-terminated COMEDI board name.
792 * @read_subdevice: Index of the current "read" subdevice (%-1 if none).
793 * @write_subdevice: Index of the current "write" subdevice (%-1 if none).
794 * @unused: Reserved for future use.
795 *
796 * This is used with the %COMEDI_DEVINFO ioctl to get basic information about
797 * the device.
798 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700799struct comedi_devinfo {
800 unsigned int version_code;
801 unsigned int n_subdevs;
802 char driver_name[COMEDI_NAMELEN];
803 char board_name[COMEDI_NAMELEN];
804 int read_subdevice;
805 int write_subdevice;
806 int unused[30];
807};
David Schleefed9eccb2008-11-04 20:29:31 -0800808
Ian Abbottace7aa72016-02-09 15:17:22 +0000809/**
810 * struct comedi_devconfig - used to configure a legacy COMEDI device
811 * @board_name: Null-terminated string specifying the type of board
812 * to configure.
813 * @options: An array of integer configuration options.
814 *
815 * This is used with the %COMEDI_DEVCONFIG ioctl to configure a "legacy" COMEDI
816 * device, such as an ISA card. Not all COMEDI drivers support this. Those
817 * that do either expect the specified board name to match one of a list of
818 * names registered with the COMEDI core, or expect the specified board name
819 * to match the COMEDI driver name itself. The configuration options are
820 * handled in a driver-specific manner.
821 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700822struct comedi_devconfig {
823 char board_name[COMEDI_NAMELEN];
824 int options[COMEDI_NDEVCONFOPTS];
825};
David Schleefed9eccb2008-11-04 20:29:31 -0800826
Ian Abbottace7aa72016-02-09 15:17:22 +0000827/**
828 * struct comedi_bufconfig - used to set or get buffer size for a subdevice
829 * @subdevice: Subdevice index.
830 * @flags: Not used.
831 * @maximum_size: Maximum allowed buffer size.
832 * @size: Buffer size.
833 * @unused: Reserved for future use.
834 *
835 * This is used with the %COMEDI_BUFCONFIG ioctl to get or configure the
836 * maximum buffer size and current buffer size for a COMEDI subdevice that
837 * supports asynchronous commands. If the subdevice does not support
838 * asynchronous commands, @maximum_size and @size are ignored and set to 0.
839 *
840 * On ioctl input, non-zero values of @maximum_size and @size specify a
841 * new maximum size and new current size (in bytes), respectively. These
842 * will by rounded up to a multiple of %PAGE_SIZE. Specifying a new maximum
843 * size requires admin capabilities.
844 *
845 * On ioctl output, @maximum_size and @size and set to the current maximum
846 * buffer size and current buffer size, respectively.
847 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700848struct comedi_bufconfig {
849 unsigned int subdevice;
850 unsigned int flags;
David Schleefed9eccb2008-11-04 20:29:31 -0800851
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700852 unsigned int maximum_size;
853 unsigned int size;
David Schleefed9eccb2008-11-04 20:29:31 -0800854
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700855 unsigned int unused[4];
856};
David Schleefed9eccb2008-11-04 20:29:31 -0800857
Ian Abbottace7aa72016-02-09 15:17:22 +0000858/**
859 * struct comedi_bufinfo - used to manipulate buffer position for a subdevice
860 * @subdevice: Subdevice index.
861 * @bytes_read: Specify amount to advance read position for an
862 * asynchronous command in the input ("read") direction.
863 * @buf_write_ptr: Current write position (index) within the buffer.
864 * @buf_read_ptr: Current read position (index) within the buffer.
865 * @buf_write_count: Total amount written, modulo 2^32.
866 * @buf_read_count: Total amount read, modulo 2^32.
867 * @bytes_written: Specify amount to advance write position for an
868 * asynchronous command in the output ("write") direction.
869 * @unused: Reserved for future use.
870 *
871 * This is used with the %COMEDI_BUFINFO ioctl to optionally advance the
872 * current read or write position in an asynchronous acquisition data buffer,
873 * and to get the current read and write positions in the buffer.
874 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700875struct comedi_bufinfo {
876 unsigned int subdevice;
877 unsigned int bytes_read;
David Schleefed9eccb2008-11-04 20:29:31 -0800878
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700879 unsigned int buf_write_ptr;
880 unsigned int buf_read_ptr;
881 unsigned int buf_write_count;
882 unsigned int buf_read_count;
David Schleefed9eccb2008-11-04 20:29:31 -0800883
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700884 unsigned int bytes_written;
David Schleefed9eccb2008-11-04 20:29:31 -0800885
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700886 unsigned int unused[4];
887};
David Schleefed9eccb2008-11-04 20:29:31 -0800888
889/* range stuff */
890
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100891#define __RANGE(a, b) ((((a) & 0xffff) << 16) | ((b) & 0xffff))
David Schleefed9eccb2008-11-04 20:29:31 -0800892
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100893#define RANGE_OFFSET(a) (((a) >> 16) & 0xffff)
894#define RANGE_LENGTH(b) ((b) & 0xffff)
David Schleefed9eccb2008-11-04 20:29:31 -0800895
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100896#define RF_UNIT(flags) ((flags) & 0xff)
Ian Abbott9cee3d42016-03-02 14:27:37 +0000897#define RF_EXTERNAL 0x100
David Schleefed9eccb2008-11-04 20:29:31 -0800898
899#define UNIT_volt 0
900#define UNIT_mA 1
901#define UNIT_none 2
902
Pablo G. Gallardob9491ea2016-02-04 21:43:13 -0200903#define COMEDI_MIN_SPEED 0xffffffffu
David Schleefed9eccb2008-11-04 20:29:31 -0800904
David Schleefed9eccb2008-11-04 20:29:31 -0800905/**********************************************************/
906/* everything after this line is ALPHA */
907/**********************************************************/
908
909/*
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100910 * 8254 specific configuration.
911 *
912 * It supports two config commands:
913 *
914 * 0 ID: INSN_CONFIG_SET_COUNTER_MODE
915 * 1 8254 Mode
916 * I8254_MODE0, I8254_MODE1, ..., I8254_MODE5
917 * OR'ed with:
918 * I8254_BCD, I8254_BINARY
919 *
920 * 0 ID: INSN_CONFIG_8254_READ_STATUS
921 * 1 <-- Status byte returned here.
922 * B7 = Output
923 * B6 = NULL Count
924 * B5 - B0 Current mode.
925 */
David Schleefed9eccb2008-11-04 20:29:31 -0800926
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700927enum i8254_mode {
928 I8254_MODE0 = (0 << 1), /* Interrupt on terminal count */
929 I8254_MODE1 = (1 << 1), /* Hardware retriggerable one-shot */
930 I8254_MODE2 = (2 << 1), /* Rate generator */
931 I8254_MODE3 = (3 << 1), /* Square wave mode */
932 I8254_MODE4 = (4 << 1), /* Software triggered strobe */
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100933 /* Hardware triggered strobe (retriggerable) */
934 I8254_MODE5 = (5 << 1),
935 /* Use binary-coded decimal instead of binary (pretty useless) */
936 I8254_BCD = 1,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700937 I8254_BINARY = 0
938};
David Schleefed9eccb2008-11-04 20:29:31 -0800939
H Hartley Sweeten40af57a2014-07-18 14:28:13 -0700940#define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x)))
941#define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b)
Ralf Thielowf80d1d22011-05-28 01:37:03 +0200942
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +0100943/*
944 * mode bits for NI general-purpose counters, set with
945 * INSN_CONFIG_SET_COUNTER_MODE
946 */
David Schleefed9eccb2008-11-04 20:29:31 -0800947#define NI_GPCT_COUNTING_MODE_SHIFT 16
948#define NI_GPCT_INDEX_PHASE_BITSHIFT 20
949#define NI_GPCT_COUNTING_DIRECTION_SHIFT 24
H Hartley Sweeten25b73c72012-09-18 11:40:15 -0700950enum ni_gpct_mode_bits {
951 NI_GPCT_GATE_ON_BOTH_EDGES_BIT = 0x4,
952 NI_GPCT_EDGE_GATE_MODE_MASK = 0x18,
953 NI_GPCT_EDGE_GATE_STARTS_STOPS_BITS = 0x0,
954 NI_GPCT_EDGE_GATE_STOPS_STARTS_BITS = 0x8,
955 NI_GPCT_EDGE_GATE_STARTS_BITS = 0x10,
956 NI_GPCT_EDGE_GATE_NO_STARTS_NO_STOPS_BITS = 0x18,
957 NI_GPCT_STOP_MODE_MASK = 0x60,
958 NI_GPCT_STOP_ON_GATE_BITS = 0x00,
959 NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20,
960 NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40,
961 NI_GPCT_LOAD_B_SELECT_BIT = 0x80,
962 NI_GPCT_OUTPUT_MODE_MASK = 0x300,
963 NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100,
964 NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200,
965 NI_GPCT_OUTPUT_TC_OR_GATE_TOGGLE_BITS = 0x300,
966 NI_GPCT_HARDWARE_DISARM_MASK = 0xc00,
967 NI_GPCT_NO_HARDWARE_DISARM_BITS = 0x000,
968 NI_GPCT_DISARM_AT_TC_BITS = 0x400,
969 NI_GPCT_DISARM_AT_GATE_BITS = 0x800,
970 NI_GPCT_DISARM_AT_TC_OR_GATE_BITS = 0xc00,
971 NI_GPCT_LOADING_ON_TC_BIT = 0x1000,
972 NI_GPCT_LOADING_ON_GATE_BIT = 0x4000,
973 NI_GPCT_COUNTING_MODE_MASK = 0x7 << NI_GPCT_COUNTING_MODE_SHIFT,
974 NI_GPCT_COUNTING_MODE_NORMAL_BITS =
975 0x0 << NI_GPCT_COUNTING_MODE_SHIFT,
976 NI_GPCT_COUNTING_MODE_QUADRATURE_X1_BITS =
977 0x1 << NI_GPCT_COUNTING_MODE_SHIFT,
978 NI_GPCT_COUNTING_MODE_QUADRATURE_X2_BITS =
979 0x2 << NI_GPCT_COUNTING_MODE_SHIFT,
980 NI_GPCT_COUNTING_MODE_QUADRATURE_X4_BITS =
981 0x3 << NI_GPCT_COUNTING_MODE_SHIFT,
982 NI_GPCT_COUNTING_MODE_TWO_PULSE_BITS =
983 0x4 << NI_GPCT_COUNTING_MODE_SHIFT,
984 NI_GPCT_COUNTING_MODE_SYNC_SOURCE_BITS =
985 0x6 << NI_GPCT_COUNTING_MODE_SHIFT,
986 NI_GPCT_INDEX_PHASE_MASK = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
987 NI_GPCT_INDEX_PHASE_LOW_A_LOW_B_BITS =
988 0x0 << NI_GPCT_INDEX_PHASE_BITSHIFT,
989 NI_GPCT_INDEX_PHASE_LOW_A_HIGH_B_BITS =
990 0x1 << NI_GPCT_INDEX_PHASE_BITSHIFT,
991 NI_GPCT_INDEX_PHASE_HIGH_A_LOW_B_BITS =
992 0x2 << NI_GPCT_INDEX_PHASE_BITSHIFT,
993 NI_GPCT_INDEX_PHASE_HIGH_A_HIGH_B_BITS =
994 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
995 NI_GPCT_INDEX_ENABLE_BIT = 0x400000,
996 NI_GPCT_COUNTING_DIRECTION_MASK =
997 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
998 NI_GPCT_COUNTING_DIRECTION_DOWN_BITS =
999 0x00 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
1000 NI_GPCT_COUNTING_DIRECTION_UP_BITS =
1001 0x1 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
1002 NI_GPCT_COUNTING_DIRECTION_HW_UP_DOWN_BITS =
1003 0x2 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
1004 NI_GPCT_COUNTING_DIRECTION_HW_GATE_BITS =
1005 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
1006 NI_GPCT_RELOAD_SOURCE_MASK = 0xc000000,
1007 NI_GPCT_RELOAD_SOURCE_FIXED_BITS = 0x0,
1008 NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS = 0x4000000,
1009 NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS = 0x8000000,
1010 NI_GPCT_OR_GATE_BIT = 0x10000000,
1011 NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000
1012};
David Schleefed9eccb2008-11-04 20:29:31 -08001013
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001014/*
1015 * Bits for setting a clock source with
1016 * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters.
1017 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001018enum ni_gpct_clock_source_bits {
1019 NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x3f,
1020 NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0,
1021 NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS = 0x1,
1022 NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS = 0x2,
1023 NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
1024 NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
1025 NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
1026 /* NI 660x-specific */
1027 NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6,
1028 NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
1029 NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
1030 NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
1031 NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
1032 NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
1033 /* divide source by 2 */
1034 NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000,
1035 /* divide source by 8 */
1036 NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000,
1037 NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
1038};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001039
1040/* NI 660x-specific */
1041#define NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(x) (0x10 + (x))
1042
1043#define NI_GPCT_RTSI_CLOCK_SRC_BITS(x) (0x18 + (x))
1044
1045/* no pfi on NI 660x */
1046#define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x))
David Schleefed9eccb2008-11-04 20:29:31 -08001047
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001048/*
1049 * Possibilities for setting a gate source with
1050 * INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters.
1051 * May be bitwise-or'd with CR_EDGE or CR_INVERT.
1052 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001053enum ni_gpct_gate_select {
1054 /* m-series gates */
1055 NI_GPCT_TIMESTAMP_MUX_GATE_SELECT = 0x0,
1056 NI_GPCT_AI_START2_GATE_SELECT = 0x12,
1057 NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT = 0x13,
1058 NI_GPCT_NEXT_OUT_GATE_SELECT = 0x14,
1059 NI_GPCT_AI_START1_GATE_SELECT = 0x1c,
1060 NI_GPCT_NEXT_SOURCE_GATE_SELECT = 0x1d,
1061 NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT = 0x1e,
1062 NI_GPCT_LOGIC_LOW_GATE_SELECT = 0x1f,
1063 /* more gates for 660x */
1064 NI_GPCT_SOURCE_PIN_i_GATE_SELECT = 0x100,
1065 NI_GPCT_GATE_PIN_i_GATE_SELECT = 0x101,
1066 /* more gates for 660x "second gate" */
1067 NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201,
1068 NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e,
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001069 /*
1070 * m-series "second gate" sources are unknown,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001071 * we should add them here with an offset of 0x300 when
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001072 * known.
1073 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001074 NI_GPCT_DISABLED_GATE_SELECT = 0x8000,
1075};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001076
1077#define NI_GPCT_GATE_PIN_GATE_SELECT(x) (0x102 + (x))
1078#define NI_GPCT_RTSI_GATE_SELECT(x) NI_USUAL_RTSI_SELECT(x)
1079#define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x)
1080#define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x))
David Schleefed9eccb2008-11-04 20:29:31 -08001081
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001082/*
1083 * Possibilities for setting a source with
1084 * INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters.
1085 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001086enum ni_gpct_other_index {
1087 NI_GPCT_SOURCE_ENCODER_A,
1088 NI_GPCT_SOURCE_ENCODER_B,
1089 NI_GPCT_SOURCE_ENCODER_Z
1090};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001091
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001092enum ni_gpct_other_select {
1093 /* m-series gates */
1094 /* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */
1095 NI_GPCT_DISABLED_OTHER_SELECT = 0x8000,
1096};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001097
1098#define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x)
David Schleefed9eccb2008-11-04 20:29:31 -08001099
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001100/*
1101 * start sources for ni general-purpose counters for use with
1102 * INSN_CONFIG_ARM
1103 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001104enum ni_gpct_arm_source {
1105 NI_GPCT_ARM_IMMEDIATE = 0x0,
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001106 /*
Spencer E. Olson5c534402016-10-08 15:37:29 -06001107 * Start both the counter and the adjacent paired counter simultaneously
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001108 */
1109 NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1,
1110 /*
Spencer E. Olson5c534402016-10-08 15:37:29 -06001111 * If the NI_GPCT_HW_ARM bit is set, we will pass the least significant
1112 * bits (3 bits for 660x or 5 bits for m-series) through to the
1113 * hardware. To select a hardware trigger, pass the appropriate select
1114 * bit, e.g.,
1115 * NI_GPCT_HW_ARM | NI_GPCT_AI_START1_GATE_SELECT or
1116 * NI_GPCT_HW_ARM | NI_GPCT_PFI_GATE_SELECT(pfi_number)
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001117 */
Spencer E. Olson5c534402016-10-08 15:37:29 -06001118 NI_GPCT_HW_ARM = 0x1000,
1119 NI_GPCT_ARM_UNKNOWN = NI_GPCT_HW_ARM, /* for backward compatibility */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001120};
David Schleefed9eccb2008-11-04 20:29:31 -08001121
1122/* digital filtering options for ni 660x for use with INSN_CONFIG_FILTER. */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001123enum ni_gpct_filter_select {
1124 NI_GPCT_FILTER_OFF = 0x0,
1125 NI_GPCT_FILTER_TIMEBASE_3_SYNC = 0x1,
1126 NI_GPCT_FILTER_100x_TIMEBASE_1 = 0x2,
1127 NI_GPCT_FILTER_20x_TIMEBASE_1 = 0x3,
1128 NI_GPCT_FILTER_10x_TIMEBASE_1 = 0x4,
1129 NI_GPCT_FILTER_2x_TIMEBASE_1 = 0x5,
1130 NI_GPCT_FILTER_2x_TIMEBASE_3 = 0x6
1131};
David Schleefed9eccb2008-11-04 20:29:31 -08001132
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001133/*
1134 * PFI digital filtering options for ni m-series for use with
1135 * INSN_CONFIG_FILTER.
1136 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001137enum ni_pfi_filter_select {
1138 NI_PFI_FILTER_OFF = 0x0,
1139 NI_PFI_FILTER_125ns = 0x1,
1140 NI_PFI_FILTER_6425ns = 0x2,
1141 NI_PFI_FILTER_2550us = 0x3
1142};
David Schleefed9eccb2008-11-04 20:29:31 -08001143
1144/* master clock sources for ni mio boards and INSN_CONFIG_SET_CLOCK_SRC */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001145enum ni_mio_clock_source {
1146 NI_MIO_INTERNAL_CLOCK = 0,
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001147 /*
1148 * Doesn't work for m-series, use NI_MIO_PLL_RTSI_CLOCK()
1149 * the NI_MIO_PLL_* sources are m-series only
1150 */
1151 NI_MIO_RTSI_CLOCK = 1,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001152 NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2,
1153 NI_MIO_PLL_PXI10_CLOCK = 3,
1154 NI_MIO_PLL_RTSI0_CLOCK = 4
1155};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001156
1157#define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x))
David Schleefed9eccb2008-11-04 20:29:31 -08001158
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001159/*
1160 * Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING.
1161 * The numbers assigned are not arbitrary, they correspond to the bits required
1162 * to program the board.
1163 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001164enum ni_rtsi_routing {
1165 NI_RTSI_OUTPUT_ADR_START1 = 0,
1166 NI_RTSI_OUTPUT_ADR_START2 = 1,
1167 NI_RTSI_OUTPUT_SCLKG = 2,
1168 NI_RTSI_OUTPUT_DACUPDN = 3,
1169 NI_RTSI_OUTPUT_DA_START1 = 4,
1170 NI_RTSI_OUTPUT_G_SRC0 = 5,
1171 NI_RTSI_OUTPUT_G_GATE0 = 6,
1172 NI_RTSI_OUTPUT_RGOUT0 = 7,
1173 NI_RTSI_OUTPUT_RTSI_BRD_0 = 8,
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001174 /* Pre-m-series always have RTSI clock on line 7 */
1175 NI_RTSI_OUTPUT_RTSI_OSC = 12
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001176};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001177
1178#define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x))
David Schleefed9eccb2008-11-04 20:29:31 -08001179
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001180/*
1181 * Signals which can be routed to an NI PFI pin on an m-series board with
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -08001182 * INSN_CONFIG_SET_ROUTING. These numbers are also returned by
1183 * INSN_CONFIG_GET_ROUTING on pre-m-series boards, even though their routing
1184 * cannot be changed. The numbers assigned are not arbitrary, they correspond
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001185 * to the bits required to program the board.
1186 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001187enum ni_pfi_routing {
1188 NI_PFI_OUTPUT_PFI_DEFAULT = 0,
1189 NI_PFI_OUTPUT_AI_START1 = 1,
1190 NI_PFI_OUTPUT_AI_START2 = 2,
1191 NI_PFI_OUTPUT_AI_CONVERT = 3,
1192 NI_PFI_OUTPUT_G_SRC1 = 4,
1193 NI_PFI_OUTPUT_G_GATE1 = 5,
1194 NI_PFI_OUTPUT_AO_UPDATE_N = 6,
1195 NI_PFI_OUTPUT_AO_START1 = 7,
1196 NI_PFI_OUTPUT_AI_START_PULSE = 8,
1197 NI_PFI_OUTPUT_G_SRC0 = 9,
1198 NI_PFI_OUTPUT_G_GATE0 = 10,
1199 NI_PFI_OUTPUT_EXT_STROBE = 11,
1200 NI_PFI_OUTPUT_AI_EXT_MUX_CLK = 12,
1201 NI_PFI_OUTPUT_GOUT0 = 13,
1202 NI_PFI_OUTPUT_GOUT1 = 14,
1203 NI_PFI_OUTPUT_FREQ_OUT = 15,
1204 NI_PFI_OUTPUT_PFI_DO = 16,
1205 NI_PFI_OUTPUT_I_ATRIG = 17,
1206 NI_PFI_OUTPUT_RTSI0 = 18,
1207 NI_PFI_OUTPUT_PXI_STAR_TRIGGER_IN = 26,
1208 NI_PFI_OUTPUT_SCXI_TRIG1 = 27,
1209 NI_PFI_OUTPUT_DIO_CHANGE_DETECT_RTSI = 28,
1210 NI_PFI_OUTPUT_CDI_SAMPLE = 29,
1211 NI_PFI_OUTPUT_CDO_UPDATE = 30
1212};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001213
1214#define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x))
David Schleefed9eccb2008-11-04 20:29:31 -08001215
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001216/*
1217 * Signals which can be routed to output on a NI PFI pin on a 660x board
1218 * with INSN_CONFIG_SET_ROUTING. The numbers assigned are
1219 * not arbitrary, they correspond to the bits required
1220 * to program the board. Lines 0 to 7 can only be set to
1221 * NI_660X_PFI_OUTPUT_DIO. Lines 32 to 39 can only be set to
1222 * NI_660X_PFI_OUTPUT_COUNTER.
1223 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001224enum ni_660x_pfi_routing {
1225 NI_660X_PFI_OUTPUT_COUNTER = 1, /* counter */
1226 NI_660X_PFI_OUTPUT_DIO = 2, /* static digital output */
1227};
David Schleefed9eccb2008-11-04 20:29:31 -08001228
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001229/*
1230 * NI External Trigger lines. These values are not arbitrary, but are related
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -08001231 * to the bits required to program the board (offset by 1 for historical
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001232 * reasons).
1233 */
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001234#define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1)
1235#define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1)
David Schleefed9eccb2008-11-04 20:29:31 -08001236
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001237/*
1238 * Clock sources for CDIO subdevice on NI m-series boards. Used as the
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -08001239 * scan_begin_arg for a comedi_command. These sources may also be bitwise-or'd
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001240 * with CR_INVERT to change polarity.
1241 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001242enum ni_m_series_cdio_scan_begin_src {
1243 NI_CDIO_SCAN_BEGIN_SRC_GROUND = 0,
1244 NI_CDIO_SCAN_BEGIN_SRC_AI_START = 18,
1245 NI_CDIO_SCAN_BEGIN_SRC_AI_CONVERT = 19,
1246 NI_CDIO_SCAN_BEGIN_SRC_PXI_STAR_TRIGGER = 20,
1247 NI_CDIO_SCAN_BEGIN_SRC_G0_OUT = 28,
1248 NI_CDIO_SCAN_BEGIN_SRC_G1_OUT = 29,
1249 NI_CDIO_SCAN_BEGIN_SRC_ANALOG_TRIGGER = 30,
1250 NI_CDIO_SCAN_BEGIN_SRC_AO_UPDATE = 31,
1251 NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32,
1252 NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33
1253};
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001254
1255#define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x)
1256#define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x)
David Schleefed9eccb2008-11-04 20:29:31 -08001257
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001258/*
1259 * scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI
Greg Kroah-Hartmane0dcef72008-11-13 16:36:22 -08001260 * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001261 * change polarity.
1262 */
H Hartley Sweeten40af57a2014-07-18 14:28:13 -07001263#define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x)
1264#define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x)
David Schleefed9eccb2008-11-04 20:29:31 -08001265
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001266/*
1267 * Bits for setting a clock source with
1268 * INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice.
1269 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001270enum ni_freq_out_clock_source_bits {
1271 NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC, /* 10 MHz */
1272 NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC /* 100 KHz */
1273};
David Schleefed9eccb2008-11-04 20:29:31 -08001274
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001275/*
1276 * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for
1277 * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver).
1278 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001279enum amplc_dio_clock_source {
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001280 /*
1281 * Per channel external clock
1282 * input/output pin (pin is only an
1283 * input when clock source set to this value,
1284 * otherwise it is an output)
1285 */
1286 AMPLC_DIO_CLK_CLKN,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001287 AMPLC_DIO_CLK_10MHZ, /* 10 MHz internal clock */
1288 AMPLC_DIO_CLK_1MHZ, /* 1 MHz internal clock */
1289 AMPLC_DIO_CLK_100KHZ, /* 100 kHz internal clock */
1290 AMPLC_DIO_CLK_10KHZ, /* 10 kHz internal clock */
1291 AMPLC_DIO_CLK_1KHZ, /* 1 kHz internal clock */
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001292 /*
1293 * Output of preceding counter channel
1294 * (for channel 0, preceding counter
1295 * channel is channel 2 on preceding
1296 * counter subdevice, for first counter
1297 * subdevice, preceding counter
1298 * subdevice is the last counter
1299 * subdevice)
1300 */
1301 AMPLC_DIO_CLK_OUTNM1,
Ian Abbott025d1f62012-10-24 16:48:09 +01001302 AMPLC_DIO_CLK_EXT, /* per chip external input pin */
1303 /* the following are "enhanced" clock sources for PCIe models */
1304 AMPLC_DIO_CLK_VCC, /* clock input HIGH */
1305 AMPLC_DIO_CLK_GND, /* clock input LOW */
1306 AMPLC_DIO_CLK_PAT_PRESENT, /* "pattern present" signal */
1307 AMPLC_DIO_CLK_20MHZ /* 20 MHz internal clock */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001308};
David Schleefed9eccb2008-11-04 20:29:31 -08001309
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001310/*
1311 * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for
1312 * timer subdevice on some Amplicon DIO PCIe boards (amplc_dio200 driver).
1313 */
Ian Abbottc59515a2012-10-24 16:48:12 +01001314enum amplc_dio_ts_clock_src {
1315 AMPLC_DIO_TS_CLK_1GHZ, /* 1 ns period with 20 ns granularity */
1316 AMPLC_DIO_TS_CLK_1MHZ, /* 1 us period */
1317 AMPLC_DIO_TS_CLK_1KHZ /* 1 ms period */
1318};
1319
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001320/*
1321 * Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for
1322 * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver).
1323 */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001324enum amplc_dio_gate_source {
1325 AMPLC_DIO_GAT_VCC, /* internal high logic level */
1326 AMPLC_DIO_GAT_GND, /* internal low logic level */
1327 AMPLC_DIO_GAT_GATN, /* per channel external gate input */
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001328 /*
1329 * negated output of counter channel minus 2
1330 * (for channels 0 or 1, channel minus 2 is channel 1 or 2 on
1331 * the preceding counter subdevice, for the first counter subdevice
1332 * the preceding counter subdevice is the last counter subdevice)
1333 */
1334 AMPLC_DIO_GAT_NOUTNM2,
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001335 AMPLC_DIO_GAT_RESERVED4,
1336 AMPLC_DIO_GAT_RESERVED5,
1337 AMPLC_DIO_GAT_RESERVED6,
Ian Abbott025d1f62012-10-24 16:48:09 +01001338 AMPLC_DIO_GAT_RESERVED7,
1339 /* the following are "enhanced" gate sources for PCIe models */
1340 AMPLC_DIO_GAT_NGATN = 6, /* negated per channel gate input */
Daniel H. Hemmingsenaf904c42015-11-12 17:03:18 +01001341 /* non-negated output of counter channel minus 2 */
1342 AMPLC_DIO_GAT_OUTNM2,
Ian Abbott025d1f62012-10-24 16:48:09 +01001343 AMPLC_DIO_GAT_PAT_PRESENT, /* "pattern present" signal */
1344 AMPLC_DIO_GAT_PAT_OCCURRED, /* "pattern occurred" latched */
1345 AMPLC_DIO_GAT_PAT_GONE, /* "pattern gone away" latched */
1346 AMPLC_DIO_GAT_NPAT_PRESENT, /* negated "pattern present" */
1347 AMPLC_DIO_GAT_NPAT_OCCURRED, /* negated "pattern occurred" */
1348 AMPLC_DIO_GAT_NPAT_GONE /* negated "pattern gone away" */
H Hartley Sweeten25b73c72012-09-18 11:40:15 -07001349};
David Schleefed9eccb2008-11-04 20:29:31 -08001350
H Hartley Sweeten5fc39182014-06-20 10:39:43 -07001351/*
1352 * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for
1353 * the counter subdevice on the Kolter Electronic PCI-Counter board
1354 * (ke_counter driver).
1355 */
1356enum ke_counter_clock_source {
1357 KE_CLK_20MHZ, /* internal 20MHz (default) */
1358 KE_CLK_4MHZ, /* internal 4MHz (option) */
1359 KE_CLK_EXT /* external clock on pin 21 of D-Sub */
1360};
1361
David Schleefed9eccb2008-11-04 20:29:31 -08001362#endif /* _COMEDI_H */