blob: 2c44c07923012a58e9f430bf4754910984771556 [file] [log] [blame]
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001/*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Thanks to Ben LaHaise for precious feedback.
Ingo Molnar9f4c8152008-01-30 13:33:41 +01004 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/highmem.h>
Ingo Molnar81922062008-01-30 13:34:04 +01006#include <linux/bootmem.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01007#include <linux/sched.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01008#include <linux/mm.h>
Thomas Gleixner76ebd052008-02-09 23:24:09 +01009#include <linux/interrupt.h>
Thomas Gleixneree7ae7a2008-04-17 17:40:45 +020010#include <linux/seq_file.h>
11#include <linux/debugfs.h>
Tejun Heoe59a1bb2009-06-22 11:56:24 +090012#include <linux/pfn.h>
Tejun Heo8c4bfc62009-07-04 08:10:59 +090013#include <linux/percpu.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090014#include <linux/gfp.h>
Matthieu Castet5bd5a452010-11-16 22:31:26 +010015#include <linux/pci.h>
Stephen Rothwelld6472302015-06-02 19:01:38 +100016#include <linux/vmalloc.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010017
Thomas Gleixner950f9d92008-01-30 13:34:06 +010018#include <asm/e820.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <asm/processor.h>
20#include <asm/tlbflush.h>
Dave Jonesf8af0952006-01-06 00:12:10 -080021#include <asm/sections.h>
Jeremy Fitzhardinge93dbda72009-02-26 17:35:44 -080022#include <asm/setup.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010023#include <asm/uaccess.h>
24#include <asm/pgalloc.h>
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010025#include <asm/proto.h>
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -070026#include <asm/pat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Ingo Molnar9df84992008-02-04 16:48:09 +010028/*
29 * The current flushing context - we pass it instead of 5 arguments:
30 */
Thomas Gleixner72e458d2008-02-04 16:48:07 +010031struct cpa_data {
Shaohua Lid75586a2008-08-21 10:46:06 +080032 unsigned long *vaddr;
Borislav Petkov0fd64c22013-10-31 17:25:00 +010033 pgd_t *pgd;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010034 pgprot_t mask_set;
35 pgprot_t mask_clr;
Thomas Gleixner65e074d2008-02-04 16:48:07 +010036 int numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +080037 int flags;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010038 unsigned long pfn;
Andi Kleenc9caa022008-03-12 03:53:29 +010039 unsigned force_split : 1;
Shaohua Lid75586a2008-08-21 10:46:06 +080040 int curpage;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070041 struct page **pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010042};
43
Suresh Siddhaad5ca552008-09-23 14:00:42 -070044/*
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
49 */
50static DEFINE_SPINLOCK(cpa_lock);
51
Shaohua Lid75586a2008-08-21 10:46:06 +080052#define CPA_FLUSHTLB 1
53#define CPA_ARRAY 2
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070054#define CPA_PAGES_ARRAY 4
Shaohua Lid75586a2008-08-21 10:46:06 +080055
Thomas Gleixner65280e62008-05-05 16:35:21 +020056#ifdef CONFIG_PROC_FS
Andi Kleence0c0e52008-05-02 11:46:49 +020057static unsigned long direct_pages_count[PG_LEVEL_NUM];
58
Thomas Gleixner65280e62008-05-05 16:35:21 +020059void update_page_count(int level, unsigned long pages)
Andi Kleence0c0e52008-05-02 11:46:49 +020060{
Andi Kleence0c0e52008-05-02 11:46:49 +020061 /* Protect against CPA */
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080062 spin_lock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020063 direct_pages_count[level] += pages;
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080064 spin_unlock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020065}
66
Thomas Gleixner65280e62008-05-05 16:35:21 +020067static void split_page_count(int level)
68{
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
71}
72
Alexey Dobriyane1759c22008-10-15 23:50:22 +040073void arch_report_meminfo(struct seq_file *m)
Thomas Gleixner65280e62008-05-05 16:35:21 +020074{
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000075 seq_printf(m, "DirectMap4k: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010076 direct_pages_count[PG_LEVEL_4K] << 2);
77#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000078 seq_printf(m, "DirectMap2M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010079 direct_pages_count[PG_LEVEL_2M] << 11);
80#else
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000081 seq_printf(m, "DirectMap4M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010082 direct_pages_count[PG_LEVEL_2M] << 12);
83#endif
Hugh Dickinsa06de632008-08-15 13:58:32 +010084 if (direct_gbpages)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000085 seq_printf(m, "DirectMap1G: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010086 direct_pages_count[PG_LEVEL_1G] << 20);
Thomas Gleixner65280e62008-05-05 16:35:21 +020087}
88#else
89static inline void split_page_count(int level) { }
90#endif
91
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010092#ifdef CONFIG_X86_64
93
94static inline unsigned long highmap_start_pfn(void)
95{
Alexander Duyckfc8d7822012-11-16 13:57:13 -080096 return __pa_symbol(_text) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010097}
98
99static inline unsigned long highmap_end_pfn(void)
100{
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800101 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100102}
103
104#endif
105
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100106#ifdef CONFIG_DEBUG_PAGEALLOC
107# define debug_pagealloc 1
108#else
109# define debug_pagealloc 0
110#endif
111
Arjan van de Vened724be2008-01-30 13:34:04 +0100112static inline int
113within(unsigned long addr, unsigned long start, unsigned long end)
Ingo Molnar687c4822008-01-30 13:34:04 +0100114{
Arjan van de Vened724be2008-01-30 13:34:04 +0100115 return addr >= start && addr < end;
116}
117
118/*
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100119 * Flushing functions
120 */
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100121
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100122/**
123 * clflush_cache_range - flush a cache range with clflush
Wanpeng Li9efc31b2012-06-10 10:50:52 +0800124 * @vaddr: virtual start address
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100125 * @size: number of bytes to flush
126 *
Ross Zwisler8b80fd82014-02-26 12:06:50 -0700127 * clflushopt is an unordered instruction which needs fencing with mfence or
128 * sfence to avoid ordering issues.
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100129 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100130void clflush_cache_range(void *vaddr, unsigned int size)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100131{
Ross Zwisler6c434d62015-05-11 10:15:49 +0200132 unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
133 void *vend = vaddr + size;
134 void *p;
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100135
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100136 mb();
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100137
Ross Zwisler6c434d62015-05-11 10:15:49 +0200138 for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
139 p < vend; p += boot_cpu_data.x86_clflush_size)
140 clflushopt(p);
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100141
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100142 mb();
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100143}
Eric Anholte517a5e2009-09-10 17:48:48 -0700144EXPORT_SYMBOL_GPL(clflush_cache_range);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100145
Thomas Gleixneraf1e6842008-01-30 13:34:08 +0100146static void __cpa_flush_all(void *arg)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100147{
Andi Kleen6bb83832008-02-04 16:48:06 +0100148 unsigned long cache = (unsigned long)arg;
149
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100150 /*
151 * Flush all to work around Errata in early athlons regarding
152 * large page flushing.
153 */
154 __flush_tlb_all();
155
venkatesh.pallipadi@intel.com0b827532009-05-22 13:23:37 -0700156 if (cache && boot_cpu_data.x86 >= 4)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100157 wbinvd();
158}
159
Andi Kleen6bb83832008-02-04 16:48:06 +0100160static void cpa_flush_all(unsigned long cache)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100161{
162 BUG_ON(irqs_disabled());
163
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200164 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100165}
166
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100167static void __cpa_flush_range(void *arg)
168{
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100169 /*
170 * We could optimize that further and do individual per page
171 * tlb invalidates for a low number of pages. Caveat: we must
172 * flush the high aliases on 64bit as well.
173 */
174 __flush_tlb_all();
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100175}
176
Andi Kleen6bb83832008-02-04 16:48:06 +0100177static void cpa_flush_range(unsigned long start, int numpages, int cache)
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100178{
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100179 unsigned int i, level;
180 unsigned long addr;
181
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100182 BUG_ON(irqs_disabled());
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100183 WARN_ON(PAGE_ALIGN(start) != start);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100184
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200185 on_each_cpu(__cpa_flush_range, NULL, 1);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100186
Andi Kleen6bb83832008-02-04 16:48:06 +0100187 if (!cache)
188 return;
189
Thomas Gleixner3b233e52008-01-30 13:34:08 +0100190 /*
191 * We only need to flush on one CPU,
192 * clflush is a MESI-coherent instruction that
193 * will cause all other CPUs to flush the same
194 * cachelines:
195 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100196 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
197 pte_t *pte = lookup_address(addr, &level);
198
199 /*
200 * Only flush present addresses:
201 */
Thomas Gleixner7bfb72e2008-02-04 16:48:08 +0100202 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100203 clflush_cache_range((void *) addr, PAGE_SIZE);
204 }
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100205}
206
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700207static void cpa_flush_array(unsigned long *start, int numpages, int cache,
208 int in_flags, struct page **pages)
Shaohua Lid75586a2008-08-21 10:46:06 +0800209{
210 unsigned int i, level;
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700211 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
Shaohua Lid75586a2008-08-21 10:46:06 +0800212
213 BUG_ON(irqs_disabled());
214
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700215 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
Shaohua Lid75586a2008-08-21 10:46:06 +0800216
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700217 if (!cache || do_wbinvd)
Shaohua Lid75586a2008-08-21 10:46:06 +0800218 return;
219
Shaohua Lid75586a2008-08-21 10:46:06 +0800220 /*
221 * We only need to flush on one CPU,
222 * clflush is a MESI-coherent instruction that
223 * will cause all other CPUs to flush the same
224 * cachelines:
225 */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700226 for (i = 0; i < numpages; i++) {
227 unsigned long addr;
228 pte_t *pte;
229
230 if (in_flags & CPA_PAGES_ARRAY)
231 addr = (unsigned long)page_address(pages[i]);
232 else
233 addr = start[i];
234
235 pte = lookup_address(addr, &level);
Shaohua Lid75586a2008-08-21 10:46:06 +0800236
237 /*
238 * Only flush present addresses:
239 */
240 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700241 clflush_cache_range((void *)addr, PAGE_SIZE);
Shaohua Lid75586a2008-08-21 10:46:06 +0800242 }
243}
244
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100245/*
Arjan van de Vened724be2008-01-30 13:34:04 +0100246 * Certain areas of memory on x86 require very specific protection flags,
247 * for example the BIOS area or kernel text. Callers don't always get this
248 * right (again, ioremap() on BIOS memory is not uncommon) so this function
249 * checks and fixes these known static required protection bits.
250 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100251static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
252 unsigned long pfn)
Arjan van de Vened724be2008-01-30 13:34:04 +0100253{
254 pgprot_t forbidden = __pgprot(0);
255
Ingo Molnar687c4822008-01-30 13:34:04 +0100256 /*
Arjan van de Vened724be2008-01-30 13:34:04 +0100257 * The BIOS area between 640k and 1Mb needs to be executable for
258 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
Ingo Molnar687c4822008-01-30 13:34:04 +0100259 */
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100260#ifdef CONFIG_PCI_BIOS
261 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
Arjan van de Vened724be2008-01-30 13:34:04 +0100262 pgprot_val(forbidden) |= _PAGE_NX;
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100263#endif
Arjan van de Vened724be2008-01-30 13:34:04 +0100264
265 /*
266 * The kernel text needs to be executable for obvious reasons
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100267 * Does not cover __inittext since that is gone later on. On
268 * 64bit we do not enforce !NX on the low mapping
Arjan van de Vened724be2008-01-30 13:34:04 +0100269 */
270 if (within(address, (unsigned long)_text, (unsigned long)_etext))
271 pgprot_val(forbidden) |= _PAGE_NX;
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100272
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100273 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100274 * The .rodata section needs to be read-only. Using the pfn
275 * catches all aliases.
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100276 */
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800277 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
278 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100279 pgprot_val(forbidden) |= _PAGE_RW;
Arjan van de Vened724be2008-01-30 13:34:04 +0100280
Suresh Siddha55ca3cc2009-10-28 18:46:57 -0800281#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
Suresh Siddha74e08172009-10-14 14:46:56 -0700282 /*
Suresh Siddha502f6602009-10-28 18:46:56 -0800283 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
284 * kernel text mappings for the large page aligned text, rodata sections
285 * will be always read-only. For the kernel identity mappings covering
286 * the holes caused by this alignment can be anything that user asks.
Suresh Siddha74e08172009-10-14 14:46:56 -0700287 *
288 * This will preserve the large page mappings for kernel text/data
289 * at no extra cost.
290 */
Suresh Siddha502f6602009-10-28 18:46:56 -0800291 if (kernel_set_to_readonly &&
292 within(address, (unsigned long)_text,
Suresh Siddha281ff332010-02-18 11:51:40 -0800293 (unsigned long)__end_rodata_hpage_align)) {
294 unsigned int level;
295
296 /*
297 * Don't enforce the !RW mapping for the kernel text mapping,
298 * if the current mapping is already using small page mapping.
299 * No need to work hard to preserve large page mappings in this
300 * case.
301 *
302 * This also fixes the Linux Xen paravirt guest boot failure
303 * (because of unexpected read-only mappings for kernel identity
304 * mappings). In this paravirt guest case, the kernel text
305 * mapping and the kernel identity mapping share the same
306 * page-table pages. Thus we can't really use different
307 * protections for the kernel text and identity mappings. Also,
308 * these shared mappings are made of small page mappings.
309 * Thus this don't enforce !RW mapping for small page kernel
310 * text mapping logic will help Linux Xen parvirt guest boot
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300311 * as well.
Suresh Siddha281ff332010-02-18 11:51:40 -0800312 */
313 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
314 pgprot_val(forbidden) |= _PAGE_RW;
315 }
Suresh Siddha74e08172009-10-14 14:46:56 -0700316#endif
317
Arjan van de Vened724be2008-01-30 13:34:04 +0100318 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
Ingo Molnar687c4822008-01-30 13:34:04 +0100319
320 return prot;
321}
322
Matt Fleming426e34c2013-12-06 21:13:04 +0000323/*
324 * Lookup the page table entry for a virtual address in a specific pgd.
325 * Return a pointer to the entry and the level of the mapping.
326 */
327pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
328 unsigned int *level)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100329{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 pud_t *pud;
331 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100332
Thomas Gleixner30551bb32008-01-30 13:34:04 +0100333 *level = PG_LEVEL_NONE;
334
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 if (pgd_none(*pgd))
336 return NULL;
Ingo Molnar9df84992008-02-04 16:48:09 +0100337
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 pud = pud_offset(pgd, address);
339 if (pud_none(*pud))
340 return NULL;
Andi Kleenc2f71ee2008-02-04 16:48:09 +0100341
342 *level = PG_LEVEL_1G;
343 if (pud_large(*pud) || !pud_present(*pud))
344 return (pte_t *)pud;
345
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346 pmd = pmd_offset(pud, address);
347 if (pmd_none(*pmd))
348 return NULL;
Thomas Gleixner30551bb32008-01-30 13:34:04 +0100349
350 *level = PG_LEVEL_2M;
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100351 if (pmd_large(*pmd) || !pmd_present(*pmd))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352 return (pte_t *)pmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
Thomas Gleixner30551bb32008-01-30 13:34:04 +0100354 *level = PG_LEVEL_4K;
Ingo Molnar9df84992008-02-04 16:48:09 +0100355
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100356 return pte_offset_kernel(pmd, address);
357}
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100358
359/*
360 * Lookup the page table entry for a virtual address. Return a pointer
361 * to the entry and the level of the mapping.
362 *
363 * Note: We return pud and pmd either when the entry is marked large
364 * or when the present bit is not set. Otherwise we would return a
365 * pointer to a nonexisting mapping.
366 */
367pte_t *lookup_address(unsigned long address, unsigned int *level)
368{
Matt Fleming426e34c2013-12-06 21:13:04 +0000369 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100370}
Pekka Paalanen75bb8832008-05-12 21:20:56 +0200371EXPORT_SYMBOL_GPL(lookup_address);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100372
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100373static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
374 unsigned int *level)
375{
376 if (cpa->pgd)
Matt Fleming426e34c2013-12-06 21:13:04 +0000377 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100378 address, level);
379
380 return lookup_address(address, level);
381}
382
Ingo Molnar9df84992008-02-04 16:48:09 +0100383/*
Juergen Gross792230c2014-11-28 11:53:56 +0100384 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
385 * or NULL if not present.
386 */
387pmd_t *lookup_pmd_address(unsigned long address)
388{
389 pgd_t *pgd;
390 pud_t *pud;
391
392 pgd = pgd_offset_k(address);
393 if (pgd_none(*pgd))
394 return NULL;
395
396 pud = pud_offset(pgd, address);
397 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
398 return NULL;
399
400 return pmd_offset(pud, address);
401}
402
403/*
Dave Hansend7656532013-01-22 13:24:33 -0800404 * This is necessary because __pa() does not work on some
405 * kinds of memory, like vmalloc() or the alloc_remap()
406 * areas on 32-bit NUMA systems. The percpu areas can
407 * end up in this kind of memory, for instance.
408 *
409 * This could be optimized, but it is only intended to be
410 * used at inititalization time, and keeping it
411 * unoptimized should increase the testing coverage for
412 * the more obscure platforms.
413 */
414phys_addr_t slow_virt_to_phys(void *__virt_addr)
415{
416 unsigned long virt_addr = (unsigned long)__virt_addr;
417 phys_addr_t phys_addr;
418 unsigned long offset;
419 enum pg_level level;
Dave Hansend7656532013-01-22 13:24:33 -0800420 unsigned long pmask;
421 pte_t *pte;
422
423 pte = lookup_address(virt_addr, &level);
424 BUG_ON(!pte);
Dave Hansend7656532013-01-22 13:24:33 -0800425 pmask = page_level_mask(level);
426 offset = virt_addr & ~pmask;
Dexuan Cuid1cd1212014-10-29 03:53:37 -0700427 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
Dave Hansend7656532013-01-22 13:24:33 -0800428 return (phys_addr | offset);
429}
430EXPORT_SYMBOL_GPL(slow_virt_to_phys);
431
432/*
Ingo Molnar9df84992008-02-04 16:48:09 +0100433 * Set the new pmd in all the pgds we know about:
434 */
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100435static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100436{
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100437 /* change init_mm */
438 set_pte_atomic(kpte, pte);
Ingo Molnar44af6c42008-01-30 13:34:03 +0100439#ifdef CONFIG_X86_32
Ingo Molnare4b71dc2008-01-30 13:34:04 +0100440 if (!SHARED_KERNEL_PMD) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100441 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442
Jeremy Fitzhardingee3ed9102008-01-30 13:34:11 +0100443 list_for_each_entry(page, &pgd_list, lru) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100444 pgd_t *pgd;
445 pud_t *pud;
446 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100447
Ingo Molnar44af6c42008-01-30 13:34:03 +0100448 pgd = (pgd_t *)page_address(page) + pgd_index(address);
449 pud = pud_offset(pgd, address);
450 pmd = pmd_offset(pud, address);
451 set_pte_atomic((pte_t *)pmd, pte);
452 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100454#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455}
456
Ingo Molnar9df84992008-02-04 16:48:09 +0100457static int
458try_preserve_large_page(pte_t *kpte, unsigned long address,
459 struct cpa_data *cpa)
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100460{
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800461 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100462 pte_t new_pte, old_pte, *tmp;
matthieu castet64edc8e2010-11-16 22:30:27 +0100463 pgprot_t old_prot, new_prot, req_prot;
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100464 int i, do_split = 1;
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800465 enum pg_level level;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100466
Andi Kleenc9caa022008-03-12 03:53:29 +0100467 if (cpa->force_split)
468 return 1;
469
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800470 spin_lock(&pgd_lock);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100471 /*
472 * Check for races, another CPU might have split this page
473 * up already:
474 */
Borislav Petkov82f07122013-10-31 17:25:07 +0100475 tmp = _lookup_address_cpa(cpa, address, &level);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100476 if (tmp != kpte)
477 goto out_unlock;
478
479 switch (level) {
480 case PG_LEVEL_2M:
Andi Kleenf07333f2008-02-04 16:48:09 +0100481#ifdef CONFIG_X86_64
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100482 case PG_LEVEL_1G:
Andi Kleenf07333f2008-02-04 16:48:09 +0100483#endif
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800484 psize = page_level_size(level);
485 pmask = page_level_mask(level);
486 break;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100487 default:
Ingo Molnarbeaff632008-02-04 16:48:09 +0100488 do_split = -EINVAL;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100489 goto out_unlock;
490 }
491
492 /*
493 * Calculate the number of pages, which fit into this large
494 * page starting at address:
495 */
496 nextpage_addr = (address + psize) & pmask;
497 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100498 if (numpages < cpa->numpages)
499 cpa->numpages = numpages;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100500
501 /*
502 * We are safe now. Check whether the new pgprot is the same:
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100503 * Convert protection attributes to 4k-format, as cpa->mask* are set
504 * up accordingly.
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100505 */
506 old_pte = *kpte;
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100507 old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte));
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100508
matthieu castet64edc8e2010-11-16 22:30:27 +0100509 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
510 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100511
512 /*
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100513 * req_prot is in format of 4k pages. It must be converted to large
514 * page format: the caching mode includes the PAT bit located at
515 * different bit positions in the two formats.
516 */
517 req_prot = pgprot_4k_2_large(req_prot);
518
519 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800520 * Set the PSE and GLOBAL flags only if the PRESENT flag is
521 * set otherwise pmd_present/pmd_huge will return true even on
522 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
523 * for the ancient hardware that doesn't support it.
524 */
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200525 if (pgprot_val(req_prot) & _PAGE_PRESENT)
526 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800527 else
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200528 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800529
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200530 req_prot = canon_pgprot(req_prot);
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800531
532 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100533 * old_pte points to the large page base address. So we need
534 * to add the offset of the virtual address:
535 */
536 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
537 cpa->pfn = pfn;
538
matthieu castet64edc8e2010-11-16 22:30:27 +0100539 new_prot = static_protections(req_prot, address, pfn);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100540
541 /*
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100542 * We need to check the full range, whether
543 * static_protection() requires a different pgprot for one of
544 * the pages in the range we try to preserve:
545 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100546 addr = address & pmask;
547 pfn = pte_pfn(old_pte);
548 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
549 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100550
551 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
552 goto out_unlock;
553 }
554
555 /*
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100556 * If there are no changes, return. maxpages has been updated
557 * above:
558 */
559 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
Ingo Molnarbeaff632008-02-04 16:48:09 +0100560 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100561 goto out_unlock;
562 }
563
564 /*
565 * We need to change the attributes. Check, whether we can
566 * change the large page in one go. We request a split, when
567 * the address is not aligned and the number of pages is
568 * smaller than the number of pages in the large page. Note
569 * that we limited the number of possible pages already to
570 * the number of pages in the large page.
571 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100572 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100573 /*
574 * The address is aligned and the number of pages
575 * covers the full page.
576 */
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800577 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100578 __set_pmd_pte(kpte, address, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +0800579 cpa->flags |= CPA_FLUSHTLB;
Ingo Molnarbeaff632008-02-04 16:48:09 +0100580 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100581 }
582
583out_unlock:
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800584 spin_unlock(&pgd_lock);
Ingo Molnar9df84992008-02-04 16:48:09 +0100585
Ingo Molnarbeaff632008-02-04 16:48:09 +0100586 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100587}
588
Borislav Petkov59528862013-03-21 18:16:57 +0100589static int
Borislav Petkov82f07122013-10-31 17:25:07 +0100590__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
591 struct page *base)
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100592{
Borislav Petkov59528862013-03-21 18:16:57 +0100593 pte_t *pbase = (pte_t *)page_address(base);
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800594 unsigned long pfn, pfninc = 1;
Ingo Molnar86f03982008-01-30 13:34:09 +0100595 unsigned int i, level;
Wen Congyangae9aae92013-02-22 16:33:04 -0800596 pte_t *tmp;
Ingo Molnar9df84992008-02-04 16:48:09 +0100597 pgprot_t ref_prot;
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100598
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800599 spin_lock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100600 /*
601 * Check for races, another CPU might have split this page
602 * up for us already:
603 */
Borislav Petkov82f07122013-10-31 17:25:07 +0100604 tmp = _lookup_address_cpa(cpa, address, &level);
Wen Congyangae9aae92013-02-22 16:33:04 -0800605 if (tmp != kpte) {
606 spin_unlock(&pgd_lock);
607 return 1;
608 }
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100609
Jeremy Fitzhardinge6944a9c2008-03-17 16:37:01 -0700610 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100611 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100612
613 /* promote PAT bit to correct position */
614 if (level == PG_LEVEL_2M)
615 ref_prot = pgprot_large_2_4k(ref_prot);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100616
Andi Kleenf07333f2008-02-04 16:48:09 +0100617#ifdef CONFIG_X86_64
618 if (level == PG_LEVEL_1G) {
619 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800620 /*
621 * Set the PSE flags only if the PRESENT flag is set
622 * otherwise pmd_present/pmd_huge will return true
623 * even on a non present pmd.
624 */
625 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
626 pgprot_val(ref_prot) |= _PAGE_PSE;
627 else
628 pgprot_val(ref_prot) &= ~_PAGE_PSE;
Andi Kleenf07333f2008-02-04 16:48:09 +0100629 }
630#endif
631
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100632 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800633 * Set the GLOBAL flags only if the PRESENT flag is set
634 * otherwise pmd/pte_present will return true even on a non
635 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
636 * for the ancient hardware that doesn't support it.
637 */
638 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
639 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
640 else
641 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
642
643 /*
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100644 * Get the target pfn from the original entry:
645 */
646 pfn = pte_pfn(*kpte);
Andi Kleenf07333f2008-02-04 16:48:09 +0100647 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800648 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100649
Yinghai Lu8eb57792012-11-16 19:38:49 -0800650 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
651 PFN_DOWN(__pa(address)) + 1))
Yinghai Luf361a452008-07-10 20:38:26 -0700652 split_page_count(level);
653
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100654 /*
Ingo Molnar07a66d72009-02-20 08:04:13 +0100655 * Install the new, split up pagetable.
Huang, Ying4c881ca2008-01-30 13:34:04 +0100656 *
Ingo Molnar07a66d72009-02-20 08:04:13 +0100657 * We use the standard kernel pagetable protections for the new
658 * pagetable protections, the actual ptes set above control the
659 * primary protection behavior:
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100660 */
Ingo Molnar07a66d72009-02-20 08:04:13 +0100661 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
Ingo Molnar211b3d02009-03-10 22:31:03 +0100662
663 /*
664 * Intel Atom errata AAH41 workaround.
665 *
666 * The real fix should be in hw or in a microcode update, but
667 * we also probabilistically try to reduce the window of having
668 * a large TLB mixed with 4K TLBs while instruction fetches are
669 * going on.
670 */
671 __flush_tlb_all();
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800672 spin_unlock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100673
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100674 return 0;
675}
676
Borislav Petkov82f07122013-10-31 17:25:07 +0100677static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
678 unsigned long address)
Wen Congyangae9aae92013-02-22 16:33:04 -0800679{
Wen Congyangae9aae92013-02-22 16:33:04 -0800680 struct page *base;
681
682 if (!debug_pagealloc)
683 spin_unlock(&cpa_lock);
684 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
685 if (!debug_pagealloc)
686 spin_lock(&cpa_lock);
687 if (!base)
688 return -ENOMEM;
689
Borislav Petkov82f07122013-10-31 17:25:07 +0100690 if (__split_large_page(cpa, kpte, address, base))
Wen Congyangae9aae92013-02-22 16:33:04 -0800691 __free_page(base);
692
693 return 0;
694}
695
Borislav Petkov52a628f2013-10-31 17:25:06 +0100696static bool try_to_free_pte_page(pte_t *pte)
697{
698 int i;
699
700 for (i = 0; i < PTRS_PER_PTE; i++)
701 if (!pte_none(pte[i]))
702 return false;
703
704 free_page((unsigned long)pte);
705 return true;
706}
707
708static bool try_to_free_pmd_page(pmd_t *pmd)
709{
710 int i;
711
712 for (i = 0; i < PTRS_PER_PMD; i++)
713 if (!pmd_none(pmd[i]))
714 return false;
715
716 free_page((unsigned long)pmd);
717 return true;
718}
719
Borislav Petkov42a54772014-01-18 12:48:16 +0100720static bool try_to_free_pud_page(pud_t *pud)
721{
722 int i;
723
724 for (i = 0; i < PTRS_PER_PUD; i++)
725 if (!pud_none(pud[i]))
726 return false;
727
728 free_page((unsigned long)pud);
729 return true;
730}
731
Borislav Petkov52a628f2013-10-31 17:25:06 +0100732static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
733{
734 pte_t *pte = pte_offset_kernel(pmd, start);
735
736 while (start < end) {
737 set_pte(pte, __pte(0));
738
739 start += PAGE_SIZE;
740 pte++;
741 }
742
743 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
744 pmd_clear(pmd);
745 return true;
746 }
747 return false;
748}
749
750static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
751 unsigned long start, unsigned long end)
752{
753 if (unmap_pte_range(pmd, start, end))
754 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
755 pud_clear(pud);
756}
757
758static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
759{
760 pmd_t *pmd = pmd_offset(pud, start);
761
762 /*
763 * Not on a 2MB page boundary?
764 */
765 if (start & (PMD_SIZE - 1)) {
766 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
767 unsigned long pre_end = min_t(unsigned long, end, next_page);
768
769 __unmap_pmd_range(pud, pmd, start, pre_end);
770
771 start = pre_end;
772 pmd++;
773 }
774
775 /*
776 * Try to unmap in 2M chunks.
777 */
778 while (end - start >= PMD_SIZE) {
779 if (pmd_large(*pmd))
780 pmd_clear(pmd);
781 else
782 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
783
784 start += PMD_SIZE;
785 pmd++;
786 }
787
788 /*
789 * 4K leftovers?
790 */
791 if (start < end)
792 return __unmap_pmd_range(pud, pmd, start, end);
793
794 /*
795 * Try again to free the PMD page if haven't succeeded above.
796 */
797 if (!pud_none(*pud))
798 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
799 pud_clear(pud);
800}
Borislav Petkov0bb8aee2013-10-31 17:25:05 +0100801
802static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
803{
804 pud_t *pud = pud_offset(pgd, start);
805
806 /*
807 * Not on a GB page boundary?
808 */
809 if (start & (PUD_SIZE - 1)) {
810 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
811 unsigned long pre_end = min_t(unsigned long, end, next_page);
812
813 unmap_pmd_range(pud, start, pre_end);
814
815 start = pre_end;
816 pud++;
817 }
818
819 /*
820 * Try to unmap in 1G chunks?
821 */
822 while (end - start >= PUD_SIZE) {
823
824 if (pud_large(*pud))
825 pud_clear(pud);
826 else
827 unmap_pmd_range(pud, start, start + PUD_SIZE);
828
829 start += PUD_SIZE;
830 pud++;
831 }
832
833 /*
834 * 2M leftovers?
835 */
836 if (start < end)
837 unmap_pmd_range(pud, start, end);
838
839 /*
840 * No need to try to free the PUD page because we'll free it in
841 * populate_pgd's error path
842 */
843}
844
Borislav Petkov42a54772014-01-18 12:48:16 +0100845static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
846{
847 pgd_t *pgd_entry = root + pgd_index(addr);
848
849 unmap_pud_range(pgd_entry, addr, end);
850
851 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
852 pgd_clear(pgd_entry);
853}
854
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100855static int alloc_pte_page(pmd_t *pmd)
856{
857 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
858 if (!pte)
859 return -1;
860
861 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
862 return 0;
863}
864
Borislav Petkov4b235382013-10-31 17:25:02 +0100865static int alloc_pmd_page(pud_t *pud)
866{
867 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
868 if (!pmd)
869 return -1;
870
871 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
872 return 0;
873}
874
Borislav Petkovc6b6f362013-10-31 17:25:04 +0100875static void populate_pte(struct cpa_data *cpa,
876 unsigned long start, unsigned long end,
877 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
878{
879 pte_t *pte;
880
881 pte = pte_offset_kernel(pmd, start);
882
883 while (num_pages-- && start < end) {
884
885 /* deal with the NX bit */
886 if (!(pgprot_val(pgprot) & _PAGE_NX))
887 cpa->pfn &= ~_PAGE_NX;
888
889 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
890
891 start += PAGE_SIZE;
892 cpa->pfn += PAGE_SIZE;
893 pte++;
894 }
895}
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100896
897static int populate_pmd(struct cpa_data *cpa,
898 unsigned long start, unsigned long end,
899 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
900{
901 unsigned int cur_pages = 0;
902 pmd_t *pmd;
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100903 pgprot_t pmd_pgprot;
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100904
905 /*
906 * Not on a 2M boundary?
907 */
908 if (start & (PMD_SIZE - 1)) {
909 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
910 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
911
912 pre_end = min_t(unsigned long, pre_end, next_page);
913 cur_pages = (pre_end - start) >> PAGE_SHIFT;
914 cur_pages = min_t(unsigned int, num_pages, cur_pages);
915
916 /*
917 * Need a PTE page?
918 */
919 pmd = pmd_offset(pud, start);
920 if (pmd_none(*pmd))
921 if (alloc_pte_page(pmd))
922 return -1;
923
924 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
925
926 start = pre_end;
927 }
928
929 /*
930 * We mapped them all?
931 */
932 if (num_pages == cur_pages)
933 return cur_pages;
934
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100935 pmd_pgprot = pgprot_4k_2_large(pgprot);
936
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100937 while (end - start >= PMD_SIZE) {
938
939 /*
940 * We cannot use a 1G page so allocate a PMD page if needed.
941 */
942 if (pud_none(*pud))
943 if (alloc_pmd_page(pud))
944 return -1;
945
946 pmd = pmd_offset(pud, start);
947
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100948 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
949 massage_pgprot(pmd_pgprot)));
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100950
951 start += PMD_SIZE;
952 cpa->pfn += PMD_SIZE;
953 cur_pages += PMD_SIZE >> PAGE_SHIFT;
954 }
955
956 /*
957 * Map trailing 4K pages.
958 */
959 if (start < end) {
960 pmd = pmd_offset(pud, start);
961 if (pmd_none(*pmd))
962 if (alloc_pte_page(pmd))
963 return -1;
964
965 populate_pte(cpa, start, end, num_pages - cur_pages,
966 pmd, pgprot);
967 }
968 return num_pages;
969}
Borislav Petkov4b235382013-10-31 17:25:02 +0100970
971static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
972 pgprot_t pgprot)
973{
974 pud_t *pud;
975 unsigned long end;
976 int cur_pages = 0;
Juergen Grossf5b2831d2014-11-03 14:02:02 +0100977 pgprot_t pud_pgprot;
Borislav Petkov4b235382013-10-31 17:25:02 +0100978
979 end = start + (cpa->numpages << PAGE_SHIFT);
980
981 /*
982 * Not on a Gb page boundary? => map everything up to it with
983 * smaller pages.
984 */
985 if (start & (PUD_SIZE - 1)) {
986 unsigned long pre_end;
987 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
988
989 pre_end = min_t(unsigned long, end, next_page);
990 cur_pages = (pre_end - start) >> PAGE_SHIFT;
991 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
992
993 pud = pud_offset(pgd, start);
994
995 /*
996 * Need a PMD page?
997 */
998 if (pud_none(*pud))
999 if (alloc_pmd_page(pud))
1000 return -1;
1001
1002 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1003 pud, pgprot);
1004 if (cur_pages < 0)
1005 return cur_pages;
1006
1007 start = pre_end;
1008 }
1009
1010 /* We mapped them all? */
1011 if (cpa->numpages == cur_pages)
1012 return cur_pages;
1013
1014 pud = pud_offset(pgd, start);
Juergen Grossf5b2831d2014-11-03 14:02:02 +01001015 pud_pgprot = pgprot_4k_2_large(pgprot);
Borislav Petkov4b235382013-10-31 17:25:02 +01001016
1017 /*
1018 * Map everything starting from the Gb boundary, possibly with 1G pages
1019 */
1020 while (end - start >= PUD_SIZE) {
Juergen Grossf5b2831d2014-11-03 14:02:02 +01001021 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1022 massage_pgprot(pud_pgprot)));
Borislav Petkov4b235382013-10-31 17:25:02 +01001023
1024 start += PUD_SIZE;
1025 cpa->pfn += PUD_SIZE;
1026 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1027 pud++;
1028 }
1029
1030 /* Map trailing leftover */
1031 if (start < end) {
1032 int tmp;
1033
1034 pud = pud_offset(pgd, start);
1035 if (pud_none(*pud))
1036 if (alloc_pmd_page(pud))
1037 return -1;
1038
1039 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1040 pud, pgprot);
1041 if (tmp < 0)
1042 return cur_pages;
1043
1044 cur_pages += tmp;
1045 }
1046 return cur_pages;
1047}
Borislav Petkovf3f72962013-10-31 17:25:01 +01001048
1049/*
1050 * Restrictions for kernel page table do not necessarily apply when mapping in
1051 * an alternate PGD.
1052 */
1053static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1054{
1055 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
Borislav Petkovf3f72962013-10-31 17:25:01 +01001056 pud_t *pud = NULL; /* shut up gcc */
Borislav Petkov42a54772014-01-18 12:48:16 +01001057 pgd_t *pgd_entry;
Borislav Petkovf3f72962013-10-31 17:25:01 +01001058 int ret;
1059
1060 pgd_entry = cpa->pgd + pgd_index(addr);
1061
1062 /*
1063 * Allocate a PUD page and hand it down for mapping.
1064 */
1065 if (pgd_none(*pgd_entry)) {
1066 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1067 if (!pud)
1068 return -1;
1069
1070 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
Borislav Petkovf3f72962013-10-31 17:25:01 +01001071 }
1072
1073 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1074 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1075
1076 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001077 if (ret < 0) {
Borislav Petkov42a54772014-01-18 12:48:16 +01001078 unmap_pgd_range(cpa->pgd, addr,
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001079 addr + (cpa->numpages << PAGE_SHIFT));
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001080 return ret;
1081 }
Borislav Petkov42a54772014-01-18 12:48:16 +01001082
Borislav Petkovf3f72962013-10-31 17:25:01 +01001083 cpa->numpages = ret;
1084 return 0;
1085}
1086
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001087static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1088 int primary)
1089{
Borislav Petkov82f07122013-10-31 17:25:07 +01001090 if (cpa->pgd)
1091 return populate_pgd(cpa, vaddr);
1092
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001093 /*
1094 * Ignore all non primary paths.
1095 */
1096 if (!primary)
1097 return 0;
1098
1099 /*
1100 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1101 * to have holes.
1102 * Also set numpages to '1' indicating that we processed cpa req for
1103 * one virtual address page and its pfn. TBD: numpages can be set based
1104 * on the initial value and the level returned by lookup_address().
1105 */
1106 if (within(vaddr, PAGE_OFFSET,
1107 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1108 cpa->numpages = 1;
1109 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1110 return 0;
1111 } else {
1112 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1113 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1114 *cpa->vaddr);
1115
1116 return -EFAULT;
1117 }
1118}
1119
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001120static int __change_page_attr(struct cpa_data *cpa, int primary)
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001121{
Shaohua Lid75586a2008-08-21 10:46:06 +08001122 unsigned long address;
Harvey Harrisonda7bfc52008-02-09 23:24:08 +01001123 int do_split, err;
1124 unsigned int level;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001125 pte_t *kpte, old_pte;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001126
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001127 if (cpa->flags & CPA_PAGES_ARRAY) {
1128 struct page *page = cpa->pages[cpa->curpage];
1129 if (unlikely(PageHighMem(page)))
1130 return 0;
1131 address = (unsigned long)page_address(page);
1132 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +08001133 address = cpa->vaddr[cpa->curpage];
1134 else
1135 address = *cpa->vaddr;
Ingo Molnar97f99fe2008-01-30 13:33:55 +01001136repeat:
Borislav Petkov82f07122013-10-31 17:25:07 +01001137 kpte = _lookup_address_cpa(cpa, address, &level);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001138 if (!kpte)
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001139 return __cpa_process_fault(cpa, address, primary);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001140
1141 old_pte = *kpte;
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001142 if (!pte_val(old_pte))
1143 return __cpa_process_fault(cpa, address, primary);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001144
Thomas Gleixner30551bb32008-01-30 13:34:04 +01001145 if (level == PG_LEVEL_4K) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001146 pte_t new_pte;
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001147 pgprot_t new_prot = pte_pgprot(old_pte);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001148 unsigned long pfn = pte_pfn(old_pte);
Thomas Gleixnera72a08a2008-01-30 13:34:07 +01001149
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001150 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1151 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
Ingo Molnar86f03982008-01-30 13:34:09 +01001152
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001153 new_prot = static_protections(new_prot, address, pfn);
Ingo Molnar86f03982008-01-30 13:34:09 +01001154
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001155 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -08001156 * Set the GLOBAL flags only if the PRESENT flag is
1157 * set otherwise pte_present will return true even on
1158 * a non present pte. The canon_pgprot will clear
1159 * _PAGE_GLOBAL for the ancient hardware that doesn't
1160 * support it.
1161 */
1162 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1163 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1164 else
1165 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1166
1167 /*
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001168 * We need to keep the pfn from the existing PTE,
1169 * after all we're only going to change it's attributes
1170 * not the memory it points to
1171 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001172 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1173 cpa->pfn = pfn;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001174 /*
1175 * Do we really change anything ?
1176 */
1177 if (pte_val(old_pte) != pte_val(new_pte)) {
1178 set_pte_atomic(kpte, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +08001179 cpa->flags |= CPA_FLUSHTLB;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001180 }
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001181 cpa->numpages = 1;
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001182 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183 }
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001184
1185 /*
1186 * Check, whether we can keep the large page intact
1187 * and just change the pte:
1188 */
Ingo Molnarbeaff632008-02-04 16:48:09 +01001189 do_split = try_preserve_large_page(kpte, address, cpa);
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001190 /*
1191 * When the range fits into the existing large page,
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001192 * return. cp->numpages and cpa->tlbflush have been updated in
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001193 * try_large_page:
1194 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001195 if (do_split <= 0)
1196 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001197
1198 /*
1199 * We have to split the large page:
1200 */
Borislav Petkov82f07122013-10-31 17:25:07 +01001201 err = split_large_page(cpa, kpte, address);
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001202 if (!err) {
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001203 /*
1204 * Do a global flush tlb after splitting the large page
1205 * and before we do the actual change page attribute in the PTE.
1206 *
1207 * With out this, we violate the TLB application note, that says
1208 * "The TLBs may contain both ordinary and large-page
1209 * translations for a 4-KByte range of linear addresses. This
1210 * may occur if software modifies the paging structures so that
1211 * the page size used for the address range changes. If the two
1212 * translations differ with respect to page frame or attributes
1213 * (e.g., permissions), processor behavior is undefined and may
1214 * be implementation-specific."
1215 *
1216 * We do this global tlb flush inside the cpa_lock, so that we
1217 * don't allow any other cpu, with stale tlb entries change the
1218 * page attribute in parallel, that also falls into the
1219 * just split large page entry.
1220 */
1221 flush_tlb_all();
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001222 goto repeat;
1223 }
Ingo Molnarbeaff632008-02-04 16:48:09 +01001224
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001225 return err;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001226}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001227
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001228static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1229
1230static int cpa_process_alias(struct cpa_data *cpa)
Ingo Molnar44af6c42008-01-30 13:34:03 +01001231{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001232 struct cpa_data alias_cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +09001233 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
Tejun Heoe933a732009-08-14 15:00:53 +09001234 unsigned long vaddr;
Tejun Heo992f4c12009-06-22 11:56:24 +09001235 int ret;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001236
Yinghai Lu8eb57792012-11-16 19:38:49 -08001237 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001238 return 0;
1239
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001240 /*
1241 * No need to redo, when the primary call touched the direct
1242 * mapping already:
1243 */
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001244 if (cpa->flags & CPA_PAGES_ARRAY) {
1245 struct page *page = cpa->pages[cpa->curpage];
1246 if (unlikely(PageHighMem(page)))
1247 return 0;
1248 vaddr = (unsigned long)page_address(page);
1249 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +08001250 vaddr = cpa->vaddr[cpa->curpage];
1251 else
1252 vaddr = *cpa->vaddr;
1253
1254 if (!(within(vaddr, PAGE_OFFSET,
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001255 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001256
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001257 alias_cpa = *cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +09001258 alias_cpa.vaddr = &laddr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001259 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Shaohua Lid75586a2008-08-21 10:46:06 +08001260
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001261 ret = __change_page_attr_set_clr(&alias_cpa, 0);
Tejun Heo992f4c12009-06-22 11:56:24 +09001262 if (ret)
1263 return ret;
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001264 }
Ingo Molnar44af6c42008-01-30 13:34:03 +01001265
Arjan van de Ven488fd992008-01-30 13:34:07 +01001266#ifdef CONFIG_X86_64
Thomas Gleixner08797502008-01-30 13:34:09 +01001267 /*
Tejun Heo992f4c12009-06-22 11:56:24 +09001268 * If the primary call didn't touch the high mapping already
1269 * and the physical address is inside the kernel map, we need
Thomas Gleixner08797502008-01-30 13:34:09 +01001270 * to touch the high mapped kernel as well:
1271 */
Tejun Heo992f4c12009-06-22 11:56:24 +09001272 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1273 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1274 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1275 __START_KERNEL_map - phys_base;
1276 alias_cpa = *cpa;
1277 alias_cpa.vaddr = &temp_cpa_vaddr;
1278 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Thomas Gleixner08797502008-01-30 13:34:09 +01001279
Tejun Heo992f4c12009-06-22 11:56:24 +09001280 /*
1281 * The high mapping range is imprecise, so ignore the
1282 * return value.
1283 */
1284 __change_page_attr_set_clr(&alias_cpa, 0);
1285 }
Thomas Gleixner08797502008-01-30 13:34:09 +01001286#endif
Tejun Heo992f4c12009-06-22 11:56:24 +09001287
1288 return 0;
Ingo Molnar44af6c42008-01-30 13:34:03 +01001289}
1290
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001291static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
Thomas Gleixnerff314522008-01-30 13:34:08 +01001292{
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001293 int ret, numpages = cpa->numpages;
Thomas Gleixnerff314522008-01-30 13:34:08 +01001294
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001295 while (numpages) {
1296 /*
1297 * Store the remaining nr of pages for the large page
1298 * preservation check.
1299 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001300 cpa->numpages = numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +08001301 /* for array changes, we can't use large page */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001302 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +08001303 cpa->numpages = 1;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001304
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001305 if (!debug_pagealloc)
1306 spin_lock(&cpa_lock);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001307 ret = __change_page_attr(cpa, checkalias);
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001308 if (!debug_pagealloc)
1309 spin_unlock(&cpa_lock);
Thomas Gleixnerff314522008-01-30 13:34:08 +01001310 if (ret)
1311 return ret;
Thomas Gleixnerff314522008-01-30 13:34:08 +01001312
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001313 if (checkalias) {
1314 ret = cpa_process_alias(cpa);
1315 if (ret)
1316 return ret;
1317 }
1318
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001319 /*
1320 * Adjust the number of pages with the result of the
1321 * CPA operation. Either a large page has been
1322 * preserved or a single page update happened.
1323 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001324 BUG_ON(cpa->numpages > numpages);
1325 numpages -= cpa->numpages;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001326 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +08001327 cpa->curpage++;
1328 else
1329 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1330
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001331 }
Thomas Gleixnerff314522008-01-30 13:34:08 +01001332 return 0;
1333}
1334
Shaohua Lid75586a2008-08-21 10:46:06 +08001335static int change_page_attr_set_clr(unsigned long *addr, int numpages,
Andi Kleenc9caa022008-03-12 03:53:29 +01001336 pgprot_t mask_set, pgprot_t mask_clr,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001337 int force_split, int in_flag,
1338 struct page **pages)
Thomas Gleixnerff314522008-01-30 13:34:08 +01001339{
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001340 struct cpa_data cpa;
Ingo Molnarcacf8902008-08-21 13:46:33 +02001341 int ret, cache, checkalias;
Jack Steinerfa526d02009-09-03 12:56:02 -05001342 unsigned long baddr = 0;
Thomas Gleixner331e4062008-02-04 16:48:06 +01001343
Borislav Petkov82f07122013-10-31 17:25:07 +01001344 memset(&cpa, 0, sizeof(cpa));
1345
Thomas Gleixner331e4062008-02-04 16:48:06 +01001346 /*
1347 * Check, if we are requested to change a not supported
1348 * feature:
1349 */
1350 mask_set = canon_pgprot(mask_set);
1351 mask_clr = canon_pgprot(mask_clr);
Andi Kleenc9caa022008-03-12 03:53:29 +01001352 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
Thomas Gleixner331e4062008-02-04 16:48:06 +01001353 return 0;
1354
Thomas Gleixner69b14152008-02-13 11:04:50 +01001355 /* Ensure we are PAGE_SIZE aligned */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001356 if (in_flag & CPA_ARRAY) {
Shaohua Lid75586a2008-08-21 10:46:06 +08001357 int i;
1358 for (i = 0; i < numpages; i++) {
1359 if (addr[i] & ~PAGE_MASK) {
1360 addr[i] &= PAGE_MASK;
1361 WARN_ON_ONCE(1);
1362 }
1363 }
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001364 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1365 /*
1366 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1367 * No need to cehck in that case
1368 */
1369 if (*addr & ~PAGE_MASK) {
1370 *addr &= PAGE_MASK;
1371 /*
1372 * People should not be passing in unaligned addresses:
1373 */
1374 WARN_ON_ONCE(1);
1375 }
Jack Steinerfa526d02009-09-03 12:56:02 -05001376 /*
1377 * Save address for cache flush. *addr is modified in the call
1378 * to __change_page_attr_set_clr() below.
1379 */
1380 baddr = *addr;
Thomas Gleixner69b14152008-02-13 11:04:50 +01001381 }
1382
Nick Piggin5843d9a2008-08-01 03:15:21 +02001383 /* Must avoid aliasing mappings in the highmem code */
1384 kmap_flush_unused();
1385
Nick Piggindb64fe02008-10-18 20:27:03 -07001386 vm_unmap_aliases();
1387
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001388 cpa.vaddr = addr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001389 cpa.pages = pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001390 cpa.numpages = numpages;
1391 cpa.mask_set = mask_set;
1392 cpa.mask_clr = mask_clr;
Shaohua Lid75586a2008-08-21 10:46:06 +08001393 cpa.flags = 0;
1394 cpa.curpage = 0;
Andi Kleenc9caa022008-03-12 03:53:29 +01001395 cpa.force_split = force_split;
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001396
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001397 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1398 cpa.flags |= in_flag;
Shaohua Lid75586a2008-08-21 10:46:06 +08001399
Thomas Gleixneraf96e442008-02-15 21:49:46 +01001400 /* No alias checking for _NX bit modifications */
1401 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1402
1403 ret = __change_page_attr_set_clr(&cpa, checkalias);
Thomas Gleixnerff314522008-01-30 13:34:08 +01001404
Thomas Gleixner57a6a462008-01-30 13:34:08 +01001405 /*
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001406 * Check whether we really changed something:
1407 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001408 if (!(cpa.flags & CPA_FLUSHTLB))
Shaohua Li1ac2f7d2008-08-04 14:51:24 +08001409 goto out;
Ingo Molnarcacf8902008-08-21 13:46:33 +02001410
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001411 /*
Andi Kleen6bb83832008-02-04 16:48:06 +01001412 * No need to flush, when we did not set any of the caching
1413 * attributes:
1414 */
Juergen Grossc06814d2014-11-03 14:01:57 +01001415 cache = !!pgprot2cachemode(mask_set);
Andi Kleen6bb83832008-02-04 16:48:06 +01001416
1417 /*
Borislav Petkovb82ad3d2014-03-12 15:13:04 +01001418 * On success we use CLFLUSH, when the CPU supports it to
1419 * avoid the WBINVD. If the CPU does not support it and in the
H. Peter Anvinf026cfa2012-08-14 09:53:38 -07001420 * error case we fall back to cpa_flush_all (which uses
Borislav Petkovb82ad3d2014-03-12 15:13:04 +01001421 * WBINVD):
Thomas Gleixner57a6a462008-01-30 13:34:08 +01001422 */
H. Peter Anvinf026cfa2012-08-14 09:53:38 -07001423 if (!ret && cpu_has_clflush) {
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001424 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1425 cpa_flush_array(addr, numpages, cache,
1426 cpa.flags, pages);
1427 } else
Jack Steinerfa526d02009-09-03 12:56:02 -05001428 cpa_flush_range(baddr, numpages, cache);
Shaohua Lid75586a2008-08-21 10:46:06 +08001429 } else
Andi Kleen6bb83832008-02-04 16:48:06 +01001430 cpa_flush_all(cache);
Ingo Molnarcacf8902008-08-21 13:46:33 +02001431
Thomas Gleixner76ebd052008-02-09 23:24:09 +01001432out:
Thomas Gleixnerff314522008-01-30 13:34:08 +01001433 return ret;
1434}
1435
Shaohua Lid75586a2008-08-21 10:46:06 +08001436static inline int change_page_attr_set(unsigned long *addr, int numpages,
1437 pgprot_t mask, int array)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001438{
Shaohua Lid75586a2008-08-21 10:46:06 +08001439 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001440 (array ? CPA_ARRAY : 0), NULL);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001441}
1442
Shaohua Lid75586a2008-08-21 10:46:06 +08001443static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1444 pgprot_t mask, int array)
Thomas Gleixner72932c72008-01-30 13:34:08 +01001445{
Shaohua Lid75586a2008-08-21 10:46:06 +08001446 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001447 (array ? CPA_ARRAY : 0), NULL);
Thomas Gleixner72932c72008-01-30 13:34:08 +01001448}
1449
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001450static inline int cpa_set_pages_array(struct page **pages, int numpages,
1451 pgprot_t mask)
1452{
1453 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1454 CPA_PAGES_ARRAY, pages);
1455}
1456
1457static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1458 pgprot_t mask)
1459{
1460 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1461 CPA_PAGES_ARRAY, pages);
1462}
1463
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001464int _set_memory_uc(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001465{
Suresh Siddhade33c442008-04-25 17:07:22 -07001466 /*
1467 * for now UC MINUS. see comments in ioremap_nocache()
Luis R. Rodrigueze4b6be332015-05-11 10:15:53 +02001468 * If you really need strong UC use ioremap_uc(), but note
1469 * that you cannot override IO areas with set_memory_*() as
1470 * these helpers cannot work with IO memory.
Suresh Siddhade33c442008-04-25 17:07:22 -07001471 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001472 return change_page_attr_set(&addr, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001473 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1474 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001475}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001476
1477int set_memory_uc(unsigned long addr, int numpages)
1478{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001479 int ret;
1480
Suresh Siddhade33c442008-04-25 17:07:22 -07001481 /*
1482 * for now UC MINUS. see comments in ioremap_nocache()
1483 */
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001484 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
Juergen Grosse00c8cc2014-11-03 14:01:59 +01001485 _PAGE_CACHE_MODE_UC_MINUS, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001486 if (ret)
1487 goto out_err;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001488
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001489 ret = _set_memory_uc(addr, numpages);
1490 if (ret)
1491 goto out_free;
1492
1493 return 0;
1494
1495out_free:
1496 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1497out_err:
1498 return ret;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001499}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001500EXPORT_SYMBOL(set_memory_uc);
1501
H Hartley Sweeten2d070ef2011-11-15 14:49:00 -08001502static int _set_memory_array(unsigned long *addr, int addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001503 enum page_cache_mode new_type)
Shaohua Lid75586a2008-08-21 10:46:06 +08001504{
Toshi Kani623dffb2015-06-04 18:55:20 +02001505 enum page_cache_mode set_type;
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001506 int i, j;
1507 int ret;
1508
Shaohua Lid75586a2008-08-21 10:46:06 +08001509 for (i = 0; i < addrinarray; i++) {
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001510 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
Pauli Nieminen4f646252010-04-01 12:45:01 +00001511 new_type, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001512 if (ret)
1513 goto out_free;
Shaohua Lid75586a2008-08-21 10:46:06 +08001514 }
1515
Toshi Kani623dffb2015-06-04 18:55:20 +02001516 /* If WC, set to UC- first and then WC */
1517 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1518 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1519
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001520 ret = change_page_attr_set(addr, addrinarray,
Toshi Kani623dffb2015-06-04 18:55:20 +02001521 cachemode2pgprot(set_type), 1);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001522
Juergen Grossc06814d2014-11-03 14:01:57 +01001523 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
Pauli Nieminen4f646252010-04-01 12:45:01 +00001524 ret = change_page_attr_set_clr(addr, addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001525 cachemode2pgprot(
1526 _PAGE_CACHE_MODE_WC),
Pauli Nieminen4f646252010-04-01 12:45:01 +00001527 __pgprot(_PAGE_CACHE_MASK),
1528 0, CPA_ARRAY, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001529 if (ret)
1530 goto out_free;
Rene Hermanc5e147c2008-08-22 01:02:20 +02001531
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001532 return 0;
1533
1534out_free:
1535 for (j = 0; j < i; j++)
1536 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1537
1538 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001539}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001540
1541int set_memory_array_uc(unsigned long *addr, int addrinarray)
1542{
Juergen Grossc06814d2014-11-03 14:01:57 +01001543 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001544}
Shaohua Lid75586a2008-08-21 10:46:06 +08001545EXPORT_SYMBOL(set_memory_array_uc);
1546
Pauli Nieminen4f646252010-04-01 12:45:01 +00001547int set_memory_array_wc(unsigned long *addr, int addrinarray)
1548{
Juergen Grossc06814d2014-11-03 14:01:57 +01001549 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001550}
1551EXPORT_SYMBOL(set_memory_array_wc);
1552
Toshi Kani623dffb2015-06-04 18:55:20 +02001553int set_memory_array_wt(unsigned long *addr, int addrinarray)
1554{
1555 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1556}
1557EXPORT_SYMBOL_GPL(set_memory_array_wt);
1558
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001559int _set_memory_wc(unsigned long addr, int numpages)
1560{
venkatesh.pallipadi@intel.com3869c4aa2009-04-09 14:26:50 -07001561 int ret;
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001562 unsigned long addr_copy = addr;
1563
venkatesh.pallipadi@intel.com3869c4aa2009-04-09 14:26:50 -07001564 ret = change_page_attr_set(&addr, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001565 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1566 0);
venkatesh.pallipadi@intel.com3869c4aa2009-04-09 14:26:50 -07001567 if (!ret) {
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001568 ret = change_page_attr_set_clr(&addr_copy, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001569 cachemode2pgprot(
1570 _PAGE_CACHE_MODE_WC),
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001571 __pgprot(_PAGE_CACHE_MASK),
1572 0, 0, NULL);
venkatesh.pallipadi@intel.com3869c4aa2009-04-09 14:26:50 -07001573 }
1574 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001575}
1576
1577int set_memory_wc(unsigned long addr, int numpages)
1578{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001579 int ret;
1580
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001581 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
Juergen Grosse00c8cc2014-11-03 14:01:59 +01001582 _PAGE_CACHE_MODE_WC, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001583 if (ret)
Toshi Kani623dffb2015-06-04 18:55:20 +02001584 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001585
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001586 ret = _set_memory_wc(addr, numpages);
1587 if (ret)
Toshi Kani623dffb2015-06-04 18:55:20 +02001588 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001589
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001590 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001591}
1592EXPORT_SYMBOL(set_memory_wc);
1593
Toshi Kani623dffb2015-06-04 18:55:20 +02001594int _set_memory_wt(unsigned long addr, int numpages)
1595{
1596 return change_page_attr_set(&addr, numpages,
1597 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1598}
1599
1600int set_memory_wt(unsigned long addr, int numpages)
1601{
1602 int ret;
1603
1604 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1605 _PAGE_CACHE_MODE_WT, NULL);
1606 if (ret)
1607 return ret;
1608
1609 ret = _set_memory_wt(addr, numpages);
1610 if (ret)
1611 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1612
1613 return ret;
1614}
1615EXPORT_SYMBOL_GPL(set_memory_wt);
1616
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001617int _set_memory_wb(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001618{
Juergen Grossc06814d2014-11-03 14:01:57 +01001619 /* WB cache mode is hard wired to all cache attribute bits being 0 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001620 return change_page_attr_clear(&addr, numpages,
1621 __pgprot(_PAGE_CACHE_MASK), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001622}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001623
1624int set_memory_wb(unsigned long addr, int numpages)
1625{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001626 int ret;
1627
1628 ret = _set_memory_wb(addr, numpages);
1629 if (ret)
1630 return ret;
1631
venkatesh.pallipadi@intel.comc15238d2008-08-20 16:45:51 -07001632 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001633 return 0;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001634}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001635EXPORT_SYMBOL(set_memory_wb);
1636
Shaohua Lid75586a2008-08-21 10:46:06 +08001637int set_memory_array_wb(unsigned long *addr, int addrinarray)
1638{
1639 int i;
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001640 int ret;
1641
Juergen Grossc06814d2014-11-03 14:01:57 +01001642 /* WB cache mode is hard wired to all cache attribute bits being 0 */
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001643 ret = change_page_attr_clear(addr, addrinarray,
1644 __pgprot(_PAGE_CACHE_MASK), 1);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001645 if (ret)
1646 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001647
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001648 for (i = 0; i < addrinarray; i++)
1649 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
Rene Hermanc5e147c2008-08-22 01:02:20 +02001650
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001651 return 0;
Shaohua Lid75586a2008-08-21 10:46:06 +08001652}
1653EXPORT_SYMBOL(set_memory_array_wb);
1654
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001655int set_memory_x(unsigned long addr, int numpages)
1656{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001657 if (!(__supported_pte_mask & _PAGE_NX))
1658 return 0;
1659
Shaohua Lid75586a2008-08-21 10:46:06 +08001660 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001661}
1662EXPORT_SYMBOL(set_memory_x);
1663
1664int set_memory_nx(unsigned long addr, int numpages)
1665{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001666 if (!(__supported_pte_mask & _PAGE_NX))
1667 return 0;
1668
Shaohua Lid75586a2008-08-21 10:46:06 +08001669 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001670}
1671EXPORT_SYMBOL(set_memory_nx);
1672
1673int set_memory_ro(unsigned long addr, int numpages)
1674{
Shaohua Lid75586a2008-08-21 10:46:06 +08001675 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001676}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001677
1678int set_memory_rw(unsigned long addr, int numpages)
1679{
Shaohua Lid75586a2008-08-21 10:46:06 +08001680 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001681}
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001682
1683int set_memory_np(unsigned long addr, int numpages)
1684{
Shaohua Lid75586a2008-08-21 10:46:06 +08001685 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001686}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001687
Andi Kleenc9caa022008-03-12 03:53:29 +01001688int set_memory_4k(unsigned long addr, int numpages)
1689{
Shaohua Lid75586a2008-08-21 10:46:06 +08001690 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001691 __pgprot(0), 1, 0, NULL);
Andi Kleenc9caa022008-03-12 03:53:29 +01001692}
1693
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001694int set_pages_uc(struct page *page, int numpages)
1695{
1696 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001697
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001698 return set_memory_uc(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001699}
1700EXPORT_SYMBOL(set_pages_uc);
1701
Pauli Nieminen4f646252010-04-01 12:45:01 +00001702static int _set_pages_array(struct page **pages, int addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001703 enum page_cache_mode new_type)
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001704{
1705 unsigned long start;
1706 unsigned long end;
Toshi Kani623dffb2015-06-04 18:55:20 +02001707 enum page_cache_mode set_type;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001708 int i;
1709 int free_idx;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001710 int ret;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001711
1712 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001713 if (PageHighMem(pages[i]))
1714 continue;
1715 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001716 end = start + PAGE_SIZE;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001717 if (reserve_memtype(start, end, new_type, NULL))
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001718 goto err_out;
1719 }
1720
Toshi Kani623dffb2015-06-04 18:55:20 +02001721 /* If WC, set to UC- first and then WC */
1722 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1723 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1724
Pauli Nieminen4f646252010-04-01 12:45:01 +00001725 ret = cpa_set_pages_array(pages, addrinarray,
Toshi Kani623dffb2015-06-04 18:55:20 +02001726 cachemode2pgprot(set_type));
Juergen Grossc06814d2014-11-03 14:01:57 +01001727 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
Pauli Nieminen4f646252010-04-01 12:45:01 +00001728 ret = change_page_attr_set_clr(NULL, addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001729 cachemode2pgprot(
1730 _PAGE_CACHE_MODE_WC),
Pauli Nieminen4f646252010-04-01 12:45:01 +00001731 __pgprot(_PAGE_CACHE_MASK),
1732 0, CPA_PAGES_ARRAY, pages);
1733 if (ret)
1734 goto err_out;
1735 return 0; /* Success */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001736err_out:
1737 free_idx = i;
1738 for (i = 0; i < free_idx; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001739 if (PageHighMem(pages[i]))
1740 continue;
1741 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001742 end = start + PAGE_SIZE;
1743 free_memtype(start, end);
1744 }
1745 return -EINVAL;
1746}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001747
1748int set_pages_array_uc(struct page **pages, int addrinarray)
1749{
Juergen Grossc06814d2014-11-03 14:01:57 +01001750 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001751}
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001752EXPORT_SYMBOL(set_pages_array_uc);
1753
Pauli Nieminen4f646252010-04-01 12:45:01 +00001754int set_pages_array_wc(struct page **pages, int addrinarray)
1755{
Juergen Grossc06814d2014-11-03 14:01:57 +01001756 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001757}
1758EXPORT_SYMBOL(set_pages_array_wc);
1759
Toshi Kani623dffb2015-06-04 18:55:20 +02001760int set_pages_array_wt(struct page **pages, int addrinarray)
1761{
1762 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1763}
1764EXPORT_SYMBOL_GPL(set_pages_array_wt);
1765
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001766int set_pages_wb(struct page *page, int numpages)
1767{
1768 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001769
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001770 return set_memory_wb(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001771}
1772EXPORT_SYMBOL(set_pages_wb);
1773
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001774int set_pages_array_wb(struct page **pages, int addrinarray)
1775{
1776 int retval;
1777 unsigned long start;
1778 unsigned long end;
1779 int i;
1780
Juergen Grossc06814d2014-11-03 14:01:57 +01001781 /* WB cache mode is hard wired to all cache attribute bits being 0 */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001782 retval = cpa_clear_pages_array(pages, addrinarray,
1783 __pgprot(_PAGE_CACHE_MASK));
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001784 if (retval)
1785 return retval;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001786
1787 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001788 if (PageHighMem(pages[i]))
1789 continue;
1790 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001791 end = start + PAGE_SIZE;
1792 free_memtype(start, end);
1793 }
1794
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001795 return 0;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001796}
1797EXPORT_SYMBOL(set_pages_array_wb);
1798
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001799int set_pages_x(struct page *page, int numpages)
1800{
1801 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001802
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001803 return set_memory_x(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001804}
1805EXPORT_SYMBOL(set_pages_x);
1806
1807int set_pages_nx(struct page *page, int numpages)
1808{
1809 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001810
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001811 return set_memory_nx(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001812}
1813EXPORT_SYMBOL(set_pages_nx);
1814
1815int set_pages_ro(struct page *page, int numpages)
1816{
1817 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001818
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001819 return set_memory_ro(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001820}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001821
1822int set_pages_rw(struct page *page, int numpages)
1823{
1824 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001825
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001826 return set_memory_rw(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001827}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001828
Linus Torvalds1da177e2005-04-16 15:20:36 -07001829#ifdef CONFIG_DEBUG_PAGEALLOC
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001830
1831static int __set_pages_p(struct page *page, int numpages)
1832{
Shaohua Lid75586a2008-08-21 10:46:06 +08001833 unsigned long tempaddr = (unsigned long) page_address(page);
1834 struct cpa_data cpa = { .vaddr = &tempaddr,
Borislav Petkov82f07122013-10-31 17:25:07 +01001835 .pgd = NULL,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001836 .numpages = numpages,
1837 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
Shaohua Lid75586a2008-08-21 10:46:06 +08001838 .mask_clr = __pgprot(0),
1839 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001840
Suresh Siddha55121b42008-09-23 14:00:40 -07001841 /*
1842 * No alias checking needed for setting present flag. otherwise,
1843 * we may need to break large pages for 64-bit kernel text
1844 * mappings (this adds to complexity if we want to do this from
1845 * atomic context especially). Let's keep it simple!
1846 */
1847 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001848}
1849
1850static int __set_pages_np(struct page *page, int numpages)
1851{
Shaohua Lid75586a2008-08-21 10:46:06 +08001852 unsigned long tempaddr = (unsigned long) page_address(page);
1853 struct cpa_data cpa = { .vaddr = &tempaddr,
Borislav Petkov82f07122013-10-31 17:25:07 +01001854 .pgd = NULL,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001855 .numpages = numpages,
1856 .mask_set = __pgprot(0),
Shaohua Lid75586a2008-08-21 10:46:06 +08001857 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1858 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001859
Suresh Siddha55121b42008-09-23 14:00:40 -07001860 /*
1861 * No alias checking needed for setting not present flag. otherwise,
1862 * we may need to break large pages for 64-bit kernel text
1863 * mappings (this adds to complexity if we want to do this from
1864 * atomic context especially). Let's keep it simple!
1865 */
1866 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001867}
1868
Joonsoo Kim031bc572014-12-12 16:55:52 -08001869void __kernel_map_pages(struct page *page, int numpages, int enable)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001870{
1871 if (PageHighMem(page))
1872 return;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001873 if (!enable) {
Ingo Molnarf9b84042006-06-27 02:54:49 -07001874 debug_check_no_locks_freed(page_address(page),
1875 numpages * PAGE_SIZE);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001876 }
Ingo Molnarde5097c2006-01-09 15:59:21 -08001877
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001878 /*
Ingo Molnarf8d84062008-02-13 14:09:53 +01001879 * The return value is ignored as the calls cannot fail.
Suresh Siddha55121b42008-09-23 14:00:40 -07001880 * Large pages for identity mappings are not used at boot time
1881 * and hence no memory allocations during large page split.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001882 */
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001883 if (enable)
1884 __set_pages_p(page, numpages);
1885 else
1886 __set_pages_np(page, numpages);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001887
1888 /*
Ingo Molnare4b71dc2008-01-30 13:34:04 +01001889 * We should perform an IPI and flush all tlbs,
1890 * but that can deadlock->flush only current cpu:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001891 */
1892 __flush_tlb_all();
Boris Ostrovsky26564602013-04-11 13:59:52 -04001893
1894 arch_flush_lazy_mmu_mode();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001895}
Rafael J. Wysocki8a235ef2008-02-20 01:47:44 +01001896
1897#ifdef CONFIG_HIBERNATION
1898
1899bool kernel_page_present(struct page *page)
1900{
1901 unsigned int level;
1902 pte_t *pte;
1903
1904 if (PageHighMem(page))
1905 return false;
1906
1907 pte = lookup_address((unsigned long)page_address(page), &level);
1908 return (pte_val(*pte) & _PAGE_PRESENT);
1909}
1910
1911#endif /* CONFIG_HIBERNATION */
1912
1913#endif /* CONFIG_DEBUG_PAGEALLOC */
Arjan van de Vend1028a12008-01-30 13:34:07 +01001914
Borislav Petkov82f07122013-10-31 17:25:07 +01001915int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1916 unsigned numpages, unsigned long page_flags)
1917{
1918 int retval = -EINVAL;
1919
1920 struct cpa_data cpa = {
1921 .vaddr = &address,
1922 .pfn = pfn,
1923 .pgd = pgd,
1924 .numpages = numpages,
1925 .mask_set = __pgprot(0),
1926 .mask_clr = __pgprot(0),
1927 .flags = 0,
1928 };
1929
1930 if (!(__supported_pte_mask & _PAGE_NX))
1931 goto out;
1932
1933 if (!(page_flags & _PAGE_NX))
1934 cpa.mask_clr = __pgprot(_PAGE_NX);
1935
1936 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1937
1938 retval = __change_page_attr_set_clr(&cpa, 0);
1939 __flush_tlb_all();
1940
1941out:
1942 return retval;
1943}
1944
Borislav Petkov42a54772014-01-18 12:48:16 +01001945void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1946 unsigned numpages)
1947{
1948 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1949}
1950
Arjan van de Vend1028a12008-01-30 13:34:07 +01001951/*
1952 * The testcases use internal knowledge of the implementation that shouldn't
1953 * be exposed to the rest of the kernel. Include these directly here.
1954 */
1955#ifdef CONFIG_CPA_DEBUG
1956#include "pageattr-test.c"
1957#endif