Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2002 Andi Kleen, SuSE Labs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Thanks to Ben LaHaise for precious feedback. |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 4 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/highmem.h> |
Ingo Molnar | 8192206 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 6 | #include <linux/bootmem.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 7 | #include <linux/sched.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 8 | #include <linux/mm.h> |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 9 | #include <linux/interrupt.h> |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 10 | #include <linux/seq_file.h> |
| 11 | #include <linux/debugfs.h> |
Tejun Heo | e59a1bb | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 12 | #include <linux/pfn.h> |
Tejun Heo | 8c4bfc6 | 2009-07-04 08:10:59 +0900 | [diff] [blame] | 13 | #include <linux/percpu.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 14 | #include <linux/gfp.h> |
Matthieu Castet | 5bd5a45 | 2010-11-16 22:31:26 +0100 | [diff] [blame] | 15 | #include <linux/pci.h> |
Stephen Rothwell | d647230 | 2015-06-02 19:01:38 +1000 | [diff] [blame] | 16 | #include <linux/vmalloc.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 17 | |
Thomas Gleixner | 950f9d9 | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 18 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <asm/processor.h> |
| 20 | #include <asm/tlbflush.h> |
Dave Jones | f8af095 | 2006-01-06 00:12:10 -0800 | [diff] [blame] | 21 | #include <asm/sections.h> |
Jeremy Fitzhardinge | 93dbda7 | 2009-02-26 17:35:44 -0800 | [diff] [blame] | 22 | #include <asm/setup.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 23 | #include <asm/uaccess.h> |
| 24 | #include <asm/pgalloc.h> |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 25 | #include <asm/proto.h> |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 26 | #include <asm/pat.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 28 | /* |
| 29 | * The current flushing context - we pass it instead of 5 arguments: |
| 30 | */ |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 31 | struct cpa_data { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 32 | unsigned long *vaddr; |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 33 | pgd_t *pgd; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 34 | pgprot_t mask_set; |
| 35 | pgprot_t mask_clr; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 36 | int numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 37 | int flags; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 38 | unsigned long pfn; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 39 | unsigned force_split : 1; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 40 | int curpage; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 41 | struct page **pages; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 42 | }; |
| 43 | |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 44 | /* |
| 45 | * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings) |
| 46 | * using cpa_lock. So that we don't allow any other cpu, with stale large tlb |
| 47 | * entries change the page attribute in parallel to some other cpu |
| 48 | * splitting a large page entry along with changing the attribute. |
| 49 | */ |
| 50 | static DEFINE_SPINLOCK(cpa_lock); |
| 51 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 52 | #define CPA_FLUSHTLB 1 |
| 53 | #define CPA_ARRAY 2 |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 54 | #define CPA_PAGES_ARRAY 4 |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 55 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 56 | #ifdef CONFIG_PROC_FS |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 57 | static unsigned long direct_pages_count[PG_LEVEL_NUM]; |
| 58 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 59 | void update_page_count(int level, unsigned long pages) |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 60 | { |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 61 | /* Protect against CPA */ |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 62 | spin_lock(&pgd_lock); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 63 | direct_pages_count[level] += pages; |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 64 | spin_unlock(&pgd_lock); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 65 | } |
| 66 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 67 | static void split_page_count(int level) |
| 68 | { |
| 69 | direct_pages_count[level]--; |
| 70 | direct_pages_count[level - 1] += PTRS_PER_PTE; |
| 71 | } |
| 72 | |
Alexey Dobriyan | e1759c2 | 2008-10-15 23:50:22 +0400 | [diff] [blame] | 73 | void arch_report_meminfo(struct seq_file *m) |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 74 | { |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 75 | seq_printf(m, "DirectMap4k: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 76 | direct_pages_count[PG_LEVEL_4K] << 2); |
| 77 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 78 | seq_printf(m, "DirectMap2M: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 79 | direct_pages_count[PG_LEVEL_2M] << 11); |
| 80 | #else |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 81 | seq_printf(m, "DirectMap4M: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 82 | direct_pages_count[PG_LEVEL_2M] << 12); |
| 83 | #endif |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 84 | if (direct_gbpages) |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 85 | seq_printf(m, "DirectMap1G: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 86 | direct_pages_count[PG_LEVEL_1G] << 20); |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 87 | } |
| 88 | #else |
| 89 | static inline void split_page_count(int level) { } |
| 90 | #endif |
| 91 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 92 | #ifdef CONFIG_X86_64 |
| 93 | |
| 94 | static inline unsigned long highmap_start_pfn(void) |
| 95 | { |
Alexander Duyck | fc8d782 | 2012-11-16 13:57:13 -0800 | [diff] [blame] | 96 | return __pa_symbol(_text) >> PAGE_SHIFT; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | static inline unsigned long highmap_end_pfn(void) |
| 100 | { |
Alexander Duyck | fc8d782 | 2012-11-16 13:57:13 -0800 | [diff] [blame] | 101 | return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 102 | } |
| 103 | |
| 104 | #endif |
| 105 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 106 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 107 | # define debug_pagealloc 1 |
| 108 | #else |
| 109 | # define debug_pagealloc 0 |
| 110 | #endif |
| 111 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 112 | static inline int |
| 113 | within(unsigned long addr, unsigned long start, unsigned long end) |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 114 | { |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 115 | return addr >= start && addr < end; |
| 116 | } |
| 117 | |
| 118 | /* |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 119 | * Flushing functions |
| 120 | */ |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 121 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 122 | /** |
| 123 | * clflush_cache_range - flush a cache range with clflush |
Wanpeng Li | 9efc31b | 2012-06-10 10:50:52 +0800 | [diff] [blame] | 124 | * @vaddr: virtual start address |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 125 | * @size: number of bytes to flush |
| 126 | * |
Ross Zwisler | 8b80fd8 | 2014-02-26 12:06:50 -0700 | [diff] [blame] | 127 | * clflushopt is an unordered instruction which needs fencing with mfence or |
| 128 | * sfence to avoid ordering issues. |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 129 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 130 | void clflush_cache_range(void *vaddr, unsigned int size) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 131 | { |
Ross Zwisler | 6c434d6 | 2015-05-11 10:15:49 +0200 | [diff] [blame] | 132 | unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1; |
| 133 | void *vend = vaddr + size; |
| 134 | void *p; |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 135 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 136 | mb(); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 137 | |
Ross Zwisler | 6c434d6 | 2015-05-11 10:15:49 +0200 | [diff] [blame] | 138 | for (p = (void *)((unsigned long)vaddr & ~clflush_mask); |
| 139 | p < vend; p += boot_cpu_data.x86_clflush_size) |
| 140 | clflushopt(p); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 141 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 142 | mb(); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 143 | } |
Eric Anholt | e517a5e | 2009-09-10 17:48:48 -0700 | [diff] [blame] | 144 | EXPORT_SYMBOL_GPL(clflush_cache_range); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 145 | |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 146 | static void __cpa_flush_all(void *arg) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 147 | { |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 148 | unsigned long cache = (unsigned long)arg; |
| 149 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 150 | /* |
| 151 | * Flush all to work around Errata in early athlons regarding |
| 152 | * large page flushing. |
| 153 | */ |
| 154 | __flush_tlb_all(); |
| 155 | |
venkatesh.pallipadi@intel.com | 0b82753 | 2009-05-22 13:23:37 -0700 | [diff] [blame] | 156 | if (cache && boot_cpu_data.x86 >= 4) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 157 | wbinvd(); |
| 158 | } |
| 159 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 160 | static void cpa_flush_all(unsigned long cache) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 161 | { |
| 162 | BUG_ON(irqs_disabled()); |
| 163 | |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 164 | on_each_cpu(__cpa_flush_all, (void *) cache, 1); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 165 | } |
| 166 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 167 | static void __cpa_flush_range(void *arg) |
| 168 | { |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 169 | /* |
| 170 | * We could optimize that further and do individual per page |
| 171 | * tlb invalidates for a low number of pages. Caveat: we must |
| 172 | * flush the high aliases on 64bit as well. |
| 173 | */ |
| 174 | __flush_tlb_all(); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 175 | } |
| 176 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 177 | static void cpa_flush_range(unsigned long start, int numpages, int cache) |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 178 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 179 | unsigned int i, level; |
| 180 | unsigned long addr; |
| 181 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 182 | BUG_ON(irqs_disabled()); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 183 | WARN_ON(PAGE_ALIGN(start) != start); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 184 | |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 185 | on_each_cpu(__cpa_flush_range, NULL, 1); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 186 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 187 | if (!cache) |
| 188 | return; |
| 189 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 190 | /* |
| 191 | * We only need to flush on one CPU, |
| 192 | * clflush is a MESI-coherent instruction that |
| 193 | * will cause all other CPUs to flush the same |
| 194 | * cachelines: |
| 195 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 196 | for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) { |
| 197 | pte_t *pte = lookup_address(addr, &level); |
| 198 | |
| 199 | /* |
| 200 | * Only flush present addresses: |
| 201 | */ |
Thomas Gleixner | 7bfb72e | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 202 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 203 | clflush_cache_range((void *) addr, PAGE_SIZE); |
| 204 | } |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 205 | } |
| 206 | |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 207 | static void cpa_flush_array(unsigned long *start, int numpages, int cache, |
| 208 | int in_flags, struct page **pages) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 209 | { |
| 210 | unsigned int i, level; |
Pallipadi, Venkatesh | 2171787 | 2009-05-26 10:33:35 -0700 | [diff] [blame] | 211 | unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 212 | |
| 213 | BUG_ON(irqs_disabled()); |
| 214 | |
Pallipadi, Venkatesh | 2171787 | 2009-05-26 10:33:35 -0700 | [diff] [blame] | 215 | on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 216 | |
Pallipadi, Venkatesh | 2171787 | 2009-05-26 10:33:35 -0700 | [diff] [blame] | 217 | if (!cache || do_wbinvd) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 218 | return; |
| 219 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 220 | /* |
| 221 | * We only need to flush on one CPU, |
| 222 | * clflush is a MESI-coherent instruction that |
| 223 | * will cause all other CPUs to flush the same |
| 224 | * cachelines: |
| 225 | */ |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 226 | for (i = 0; i < numpages; i++) { |
| 227 | unsigned long addr; |
| 228 | pte_t *pte; |
| 229 | |
| 230 | if (in_flags & CPA_PAGES_ARRAY) |
| 231 | addr = (unsigned long)page_address(pages[i]); |
| 232 | else |
| 233 | addr = start[i]; |
| 234 | |
| 235 | pte = lookup_address(addr, &level); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 236 | |
| 237 | /* |
| 238 | * Only flush present addresses: |
| 239 | */ |
| 240 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 241 | clflush_cache_range((void *)addr, PAGE_SIZE); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 242 | } |
| 243 | } |
| 244 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 245 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 246 | * Certain areas of memory on x86 require very specific protection flags, |
| 247 | * for example the BIOS area or kernel text. Callers don't always get this |
| 248 | * right (again, ioremap() on BIOS memory is not uncommon) so this function |
| 249 | * checks and fixes these known static required protection bits. |
| 250 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 251 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, |
| 252 | unsigned long pfn) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 253 | { |
| 254 | pgprot_t forbidden = __pgprot(0); |
| 255 | |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 256 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 257 | * The BIOS area between 640k and 1Mb needs to be executable for |
| 258 | * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support. |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 259 | */ |
Matthieu Castet | 5bd5a45 | 2010-11-16 22:31:26 +0100 | [diff] [blame] | 260 | #ifdef CONFIG_PCI_BIOS |
| 261 | if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT)) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 262 | pgprot_val(forbidden) |= _PAGE_NX; |
Matthieu Castet | 5bd5a45 | 2010-11-16 22:31:26 +0100 | [diff] [blame] | 263 | #endif |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 264 | |
| 265 | /* |
| 266 | * The kernel text needs to be executable for obvious reasons |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 267 | * Does not cover __inittext since that is gone later on. On |
| 268 | * 64bit we do not enforce !NX on the low mapping |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 269 | */ |
| 270 | if (within(address, (unsigned long)_text, (unsigned long)_etext)) |
| 271 | pgprot_val(forbidden) |= _PAGE_NX; |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 272 | |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 273 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 274 | * The .rodata section needs to be read-only. Using the pfn |
| 275 | * catches all aliases. |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 276 | */ |
Alexander Duyck | fc8d782 | 2012-11-16 13:57:13 -0800 | [diff] [blame] | 277 | if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT, |
| 278 | __pa_symbol(__end_rodata) >> PAGE_SHIFT)) |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 279 | pgprot_val(forbidden) |= _PAGE_RW; |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 280 | |
Suresh Siddha | 55ca3cc | 2009-10-28 18:46:57 -0800 | [diff] [blame] | 281 | #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA) |
Suresh Siddha | 74e0817 | 2009-10-14 14:46:56 -0700 | [diff] [blame] | 282 | /* |
Suresh Siddha | 502f660 | 2009-10-28 18:46:56 -0800 | [diff] [blame] | 283 | * Once the kernel maps the text as RO (kernel_set_to_readonly is set), |
| 284 | * kernel text mappings for the large page aligned text, rodata sections |
| 285 | * will be always read-only. For the kernel identity mappings covering |
| 286 | * the holes caused by this alignment can be anything that user asks. |
Suresh Siddha | 74e0817 | 2009-10-14 14:46:56 -0700 | [diff] [blame] | 287 | * |
| 288 | * This will preserve the large page mappings for kernel text/data |
| 289 | * at no extra cost. |
| 290 | */ |
Suresh Siddha | 502f660 | 2009-10-28 18:46:56 -0800 | [diff] [blame] | 291 | if (kernel_set_to_readonly && |
| 292 | within(address, (unsigned long)_text, |
Suresh Siddha | 281ff33 | 2010-02-18 11:51:40 -0800 | [diff] [blame] | 293 | (unsigned long)__end_rodata_hpage_align)) { |
| 294 | unsigned int level; |
| 295 | |
| 296 | /* |
| 297 | * Don't enforce the !RW mapping for the kernel text mapping, |
| 298 | * if the current mapping is already using small page mapping. |
| 299 | * No need to work hard to preserve large page mappings in this |
| 300 | * case. |
| 301 | * |
| 302 | * This also fixes the Linux Xen paravirt guest boot failure |
| 303 | * (because of unexpected read-only mappings for kernel identity |
| 304 | * mappings). In this paravirt guest case, the kernel text |
| 305 | * mapping and the kernel identity mapping share the same |
| 306 | * page-table pages. Thus we can't really use different |
| 307 | * protections for the kernel text and identity mappings. Also, |
| 308 | * these shared mappings are made of small page mappings. |
| 309 | * Thus this don't enforce !RW mapping for small page kernel |
| 310 | * text mapping logic will help Linux Xen parvirt guest boot |
Lucas De Marchi | 0d2eb44 | 2011-03-17 16:24:16 -0300 | [diff] [blame] | 311 | * as well. |
Suresh Siddha | 281ff33 | 2010-02-18 11:51:40 -0800 | [diff] [blame] | 312 | */ |
| 313 | if (lookup_address(address, &level) && (level != PG_LEVEL_4K)) |
| 314 | pgprot_val(forbidden) |= _PAGE_RW; |
| 315 | } |
Suresh Siddha | 74e0817 | 2009-10-14 14:46:56 -0700 | [diff] [blame] | 316 | #endif |
| 317 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 318 | prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 319 | |
| 320 | return prot; |
| 321 | } |
| 322 | |
Matt Fleming | 426e34c | 2013-12-06 21:13:04 +0000 | [diff] [blame] | 323 | /* |
| 324 | * Lookup the page table entry for a virtual address in a specific pgd. |
| 325 | * Return a pointer to the entry and the level of the mapping. |
| 326 | */ |
| 327 | pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, |
| 328 | unsigned int *level) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 329 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | pud_t *pud; |
| 331 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 332 | |
Thomas Gleixner | 30551bb3 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 333 | *level = PG_LEVEL_NONE; |
| 334 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | if (pgd_none(*pgd)) |
| 336 | return NULL; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 337 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | pud = pud_offset(pgd, address); |
| 339 | if (pud_none(*pud)) |
| 340 | return NULL; |
Andi Kleen | c2f71ee | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 341 | |
| 342 | *level = PG_LEVEL_1G; |
| 343 | if (pud_large(*pud) || !pud_present(*pud)) |
| 344 | return (pte_t *)pud; |
| 345 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | pmd = pmd_offset(pud, address); |
| 347 | if (pmd_none(*pmd)) |
| 348 | return NULL; |
Thomas Gleixner | 30551bb3 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 349 | |
| 350 | *level = PG_LEVEL_2M; |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 351 | if (pmd_large(*pmd) || !pmd_present(*pmd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | return (pte_t *)pmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | |
Thomas Gleixner | 30551bb3 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 354 | *level = PG_LEVEL_4K; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 355 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 356 | return pte_offset_kernel(pmd, address); |
| 357 | } |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 358 | |
| 359 | /* |
| 360 | * Lookup the page table entry for a virtual address. Return a pointer |
| 361 | * to the entry and the level of the mapping. |
| 362 | * |
| 363 | * Note: We return pud and pmd either when the entry is marked large |
| 364 | * or when the present bit is not set. Otherwise we would return a |
| 365 | * pointer to a nonexisting mapping. |
| 366 | */ |
| 367 | pte_t *lookup_address(unsigned long address, unsigned int *level) |
| 368 | { |
Matt Fleming | 426e34c | 2013-12-06 21:13:04 +0000 | [diff] [blame] | 369 | return lookup_address_in_pgd(pgd_offset_k(address), address, level); |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 370 | } |
Pekka Paalanen | 75bb883 | 2008-05-12 21:20:56 +0200 | [diff] [blame] | 371 | EXPORT_SYMBOL_GPL(lookup_address); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 372 | |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 373 | static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address, |
| 374 | unsigned int *level) |
| 375 | { |
| 376 | if (cpa->pgd) |
Matt Fleming | 426e34c | 2013-12-06 21:13:04 +0000 | [diff] [blame] | 377 | return lookup_address_in_pgd(cpa->pgd + pgd_index(address), |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 378 | address, level); |
| 379 | |
| 380 | return lookup_address(address, level); |
| 381 | } |
| 382 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 383 | /* |
Juergen Gross | 792230c | 2014-11-28 11:53:56 +0100 | [diff] [blame] | 384 | * Lookup the PMD entry for a virtual address. Return a pointer to the entry |
| 385 | * or NULL if not present. |
| 386 | */ |
| 387 | pmd_t *lookup_pmd_address(unsigned long address) |
| 388 | { |
| 389 | pgd_t *pgd; |
| 390 | pud_t *pud; |
| 391 | |
| 392 | pgd = pgd_offset_k(address); |
| 393 | if (pgd_none(*pgd)) |
| 394 | return NULL; |
| 395 | |
| 396 | pud = pud_offset(pgd, address); |
| 397 | if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud)) |
| 398 | return NULL; |
| 399 | |
| 400 | return pmd_offset(pud, address); |
| 401 | } |
| 402 | |
| 403 | /* |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 404 | * This is necessary because __pa() does not work on some |
| 405 | * kinds of memory, like vmalloc() or the alloc_remap() |
| 406 | * areas on 32-bit NUMA systems. The percpu areas can |
| 407 | * end up in this kind of memory, for instance. |
| 408 | * |
| 409 | * This could be optimized, but it is only intended to be |
| 410 | * used at inititalization time, and keeping it |
| 411 | * unoptimized should increase the testing coverage for |
| 412 | * the more obscure platforms. |
| 413 | */ |
| 414 | phys_addr_t slow_virt_to_phys(void *__virt_addr) |
| 415 | { |
| 416 | unsigned long virt_addr = (unsigned long)__virt_addr; |
| 417 | phys_addr_t phys_addr; |
| 418 | unsigned long offset; |
| 419 | enum pg_level level; |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 420 | unsigned long pmask; |
| 421 | pte_t *pte; |
| 422 | |
| 423 | pte = lookup_address(virt_addr, &level); |
| 424 | BUG_ON(!pte); |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 425 | pmask = page_level_mask(level); |
| 426 | offset = virt_addr & ~pmask; |
Dexuan Cui | d1cd121 | 2014-10-29 03:53:37 -0700 | [diff] [blame] | 427 | phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 428 | return (phys_addr | offset); |
| 429 | } |
| 430 | EXPORT_SYMBOL_GPL(slow_virt_to_phys); |
| 431 | |
| 432 | /* |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 433 | * Set the new pmd in all the pgds we know about: |
| 434 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 435 | static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 436 | { |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 437 | /* change init_mm */ |
| 438 | set_pte_atomic(kpte, pte); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 439 | #ifdef CONFIG_X86_32 |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 440 | if (!SHARED_KERNEL_PMD) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 441 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
Jeremy Fitzhardinge | e3ed910 | 2008-01-30 13:34:11 +0100 | [diff] [blame] | 443 | list_for_each_entry(page, &pgd_list, lru) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 444 | pgd_t *pgd; |
| 445 | pud_t *pud; |
| 446 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 447 | |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 448 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
| 449 | pud = pud_offset(pgd, address); |
| 450 | pmd = pmd_offset(pud, address); |
| 451 | set_pte_atomic((pte_t *)pmd, pte); |
| 452 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 454 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | } |
| 456 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 457 | static int |
| 458 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
| 459 | struct cpa_data *cpa) |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 460 | { |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 461 | unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 462 | pte_t new_pte, old_pte, *tmp; |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 463 | pgprot_t old_prot, new_prot, req_prot; |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 464 | int i, do_split = 1; |
Dave Hansen | f3c4fbb | 2013-01-22 13:24:32 -0800 | [diff] [blame] | 465 | enum pg_level level; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 466 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 467 | if (cpa->force_split) |
| 468 | return 1; |
| 469 | |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 470 | spin_lock(&pgd_lock); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 471 | /* |
| 472 | * Check for races, another CPU might have split this page |
| 473 | * up already: |
| 474 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 475 | tmp = _lookup_address_cpa(cpa, address, &level); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 476 | if (tmp != kpte) |
| 477 | goto out_unlock; |
| 478 | |
| 479 | switch (level) { |
| 480 | case PG_LEVEL_2M: |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 481 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 482 | case PG_LEVEL_1G: |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 483 | #endif |
Dave Hansen | f3c4fbb | 2013-01-22 13:24:32 -0800 | [diff] [blame] | 484 | psize = page_level_size(level); |
| 485 | pmask = page_level_mask(level); |
| 486 | break; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 487 | default: |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 488 | do_split = -EINVAL; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 489 | goto out_unlock; |
| 490 | } |
| 491 | |
| 492 | /* |
| 493 | * Calculate the number of pages, which fit into this large |
| 494 | * page starting at address: |
| 495 | */ |
| 496 | nextpage_addr = (address + psize) & pmask; |
| 497 | numpages = (nextpage_addr - address) >> PAGE_SHIFT; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 498 | if (numpages < cpa->numpages) |
| 499 | cpa->numpages = numpages; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 500 | |
| 501 | /* |
| 502 | * We are safe now. Check whether the new pgprot is the same: |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 503 | * Convert protection attributes to 4k-format, as cpa->mask* are set |
| 504 | * up accordingly. |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 505 | */ |
| 506 | old_pte = *kpte; |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 507 | old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte)); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 508 | |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 509 | pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr); |
| 510 | pgprot_val(req_prot) |= pgprot_val(cpa->mask_set); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 511 | |
| 512 | /* |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 513 | * req_prot is in format of 4k pages. It must be converted to large |
| 514 | * page format: the caching mode includes the PAT bit located at |
| 515 | * different bit positions in the two formats. |
| 516 | */ |
| 517 | req_prot = pgprot_4k_2_large(req_prot); |
| 518 | |
| 519 | /* |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 520 | * Set the PSE and GLOBAL flags only if the PRESENT flag is |
| 521 | * set otherwise pmd_present/pmd_huge will return true even on |
| 522 | * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL |
| 523 | * for the ancient hardware that doesn't support it. |
| 524 | */ |
Andrea Arcangeli | f76cfa3 | 2013-04-10 15:28:25 +0200 | [diff] [blame] | 525 | if (pgprot_val(req_prot) & _PAGE_PRESENT) |
| 526 | pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL; |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 527 | else |
Andrea Arcangeli | f76cfa3 | 2013-04-10 15:28:25 +0200 | [diff] [blame] | 528 | pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL); |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 529 | |
Andrea Arcangeli | f76cfa3 | 2013-04-10 15:28:25 +0200 | [diff] [blame] | 530 | req_prot = canon_pgprot(req_prot); |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 531 | |
| 532 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 533 | * old_pte points to the large page base address. So we need |
| 534 | * to add the offset of the virtual address: |
| 535 | */ |
| 536 | pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT); |
| 537 | cpa->pfn = pfn; |
| 538 | |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 539 | new_prot = static_protections(req_prot, address, pfn); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 540 | |
| 541 | /* |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 542 | * We need to check the full range, whether |
| 543 | * static_protection() requires a different pgprot for one of |
| 544 | * the pages in the range we try to preserve: |
| 545 | */ |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 546 | addr = address & pmask; |
| 547 | pfn = pte_pfn(old_pte); |
| 548 | for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) { |
| 549 | pgprot_t chk_prot = static_protections(req_prot, addr, pfn); |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 550 | |
| 551 | if (pgprot_val(chk_prot) != pgprot_val(new_prot)) |
| 552 | goto out_unlock; |
| 553 | } |
| 554 | |
| 555 | /* |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 556 | * If there are no changes, return. maxpages has been updated |
| 557 | * above: |
| 558 | */ |
| 559 | if (pgprot_val(new_prot) == pgprot_val(old_prot)) { |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 560 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 561 | goto out_unlock; |
| 562 | } |
| 563 | |
| 564 | /* |
| 565 | * We need to change the attributes. Check, whether we can |
| 566 | * change the large page in one go. We request a split, when |
| 567 | * the address is not aligned and the number of pages is |
| 568 | * smaller than the number of pages in the large page. Note |
| 569 | * that we limited the number of possible pages already to |
| 570 | * the number of pages in the large page. |
| 571 | */ |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 572 | if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 573 | /* |
| 574 | * The address is aligned and the number of pages |
| 575 | * covers the full page. |
| 576 | */ |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 577 | new_pte = pfn_pte(pte_pfn(old_pte), new_prot); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 578 | __set_pmd_pte(kpte, address, new_pte); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 579 | cpa->flags |= CPA_FLUSHTLB; |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 580 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 581 | } |
| 582 | |
| 583 | out_unlock: |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 584 | spin_unlock(&pgd_lock); |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 585 | |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 586 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 587 | } |
| 588 | |
Borislav Petkov | 5952886 | 2013-03-21 18:16:57 +0100 | [diff] [blame] | 589 | static int |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 590 | __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address, |
| 591 | struct page *base) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 592 | { |
Borislav Petkov | 5952886 | 2013-03-21 18:16:57 +0100 | [diff] [blame] | 593 | pte_t *pbase = (pte_t *)page_address(base); |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 594 | unsigned long pfn, pfninc = 1; |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 595 | unsigned int i, level; |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 596 | pte_t *tmp; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 597 | pgprot_t ref_prot; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 598 | |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 599 | spin_lock(&pgd_lock); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 600 | /* |
| 601 | * Check for races, another CPU might have split this page |
| 602 | * up for us already: |
| 603 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 604 | tmp = _lookup_address_cpa(cpa, address, &level); |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 605 | if (tmp != kpte) { |
| 606 | spin_unlock(&pgd_lock); |
| 607 | return 1; |
| 608 | } |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 609 | |
Jeremy Fitzhardinge | 6944a9c | 2008-03-17 16:37:01 -0700 | [diff] [blame] | 610 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 611 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 612 | |
| 613 | /* promote PAT bit to correct position */ |
| 614 | if (level == PG_LEVEL_2M) |
| 615 | ref_prot = pgprot_large_2_4k(ref_prot); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 616 | |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 617 | #ifdef CONFIG_X86_64 |
| 618 | if (level == PG_LEVEL_1G) { |
| 619 | pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 620 | /* |
| 621 | * Set the PSE flags only if the PRESENT flag is set |
| 622 | * otherwise pmd_present/pmd_huge will return true |
| 623 | * even on a non present pmd. |
| 624 | */ |
| 625 | if (pgprot_val(ref_prot) & _PAGE_PRESENT) |
| 626 | pgprot_val(ref_prot) |= _PAGE_PSE; |
| 627 | else |
| 628 | pgprot_val(ref_prot) &= ~_PAGE_PSE; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 629 | } |
| 630 | #endif |
| 631 | |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 632 | /* |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 633 | * Set the GLOBAL flags only if the PRESENT flag is set |
| 634 | * otherwise pmd/pte_present will return true even on a non |
| 635 | * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL |
| 636 | * for the ancient hardware that doesn't support it. |
| 637 | */ |
| 638 | if (pgprot_val(ref_prot) & _PAGE_PRESENT) |
| 639 | pgprot_val(ref_prot) |= _PAGE_GLOBAL; |
| 640 | else |
| 641 | pgprot_val(ref_prot) &= ~_PAGE_GLOBAL; |
| 642 | |
| 643 | /* |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 644 | * Get the target pfn from the original entry: |
| 645 | */ |
| 646 | pfn = pte_pfn(*kpte); |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 647 | for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 648 | set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot))); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 649 | |
Yinghai Lu | 8eb5779 | 2012-11-16 19:38:49 -0800 | [diff] [blame] | 650 | if (pfn_range_is_mapped(PFN_DOWN(__pa(address)), |
| 651 | PFN_DOWN(__pa(address)) + 1)) |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 652 | split_page_count(level); |
| 653 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 654 | /* |
Ingo Molnar | 07a66d7 | 2009-02-20 08:04:13 +0100 | [diff] [blame] | 655 | * Install the new, split up pagetable. |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 656 | * |
Ingo Molnar | 07a66d7 | 2009-02-20 08:04:13 +0100 | [diff] [blame] | 657 | * We use the standard kernel pagetable protections for the new |
| 658 | * pagetable protections, the actual ptes set above control the |
| 659 | * primary protection behavior: |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 660 | */ |
Ingo Molnar | 07a66d7 | 2009-02-20 08:04:13 +0100 | [diff] [blame] | 661 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); |
Ingo Molnar | 211b3d0 | 2009-03-10 22:31:03 +0100 | [diff] [blame] | 662 | |
| 663 | /* |
| 664 | * Intel Atom errata AAH41 workaround. |
| 665 | * |
| 666 | * The real fix should be in hw or in a microcode update, but |
| 667 | * we also probabilistically try to reduce the window of having |
| 668 | * a large TLB mixed with 4K TLBs while instruction fetches are |
| 669 | * going on. |
| 670 | */ |
| 671 | __flush_tlb_all(); |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 672 | spin_unlock(&pgd_lock); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 673 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 674 | return 0; |
| 675 | } |
| 676 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 677 | static int split_large_page(struct cpa_data *cpa, pte_t *kpte, |
| 678 | unsigned long address) |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 679 | { |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 680 | struct page *base; |
| 681 | |
| 682 | if (!debug_pagealloc) |
| 683 | spin_unlock(&cpa_lock); |
| 684 | base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0); |
| 685 | if (!debug_pagealloc) |
| 686 | spin_lock(&cpa_lock); |
| 687 | if (!base) |
| 688 | return -ENOMEM; |
| 689 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 690 | if (__split_large_page(cpa, kpte, address, base)) |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 691 | __free_page(base); |
| 692 | |
| 693 | return 0; |
| 694 | } |
| 695 | |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 696 | static bool try_to_free_pte_page(pte_t *pte) |
| 697 | { |
| 698 | int i; |
| 699 | |
| 700 | for (i = 0; i < PTRS_PER_PTE; i++) |
| 701 | if (!pte_none(pte[i])) |
| 702 | return false; |
| 703 | |
| 704 | free_page((unsigned long)pte); |
| 705 | return true; |
| 706 | } |
| 707 | |
| 708 | static bool try_to_free_pmd_page(pmd_t *pmd) |
| 709 | { |
| 710 | int i; |
| 711 | |
| 712 | for (i = 0; i < PTRS_PER_PMD; i++) |
| 713 | if (!pmd_none(pmd[i])) |
| 714 | return false; |
| 715 | |
| 716 | free_page((unsigned long)pmd); |
| 717 | return true; |
| 718 | } |
| 719 | |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 720 | static bool try_to_free_pud_page(pud_t *pud) |
| 721 | { |
| 722 | int i; |
| 723 | |
| 724 | for (i = 0; i < PTRS_PER_PUD; i++) |
| 725 | if (!pud_none(pud[i])) |
| 726 | return false; |
| 727 | |
| 728 | free_page((unsigned long)pud); |
| 729 | return true; |
| 730 | } |
| 731 | |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 732 | static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end) |
| 733 | { |
| 734 | pte_t *pte = pte_offset_kernel(pmd, start); |
| 735 | |
| 736 | while (start < end) { |
| 737 | set_pte(pte, __pte(0)); |
| 738 | |
| 739 | start += PAGE_SIZE; |
| 740 | pte++; |
| 741 | } |
| 742 | |
| 743 | if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) { |
| 744 | pmd_clear(pmd); |
| 745 | return true; |
| 746 | } |
| 747 | return false; |
| 748 | } |
| 749 | |
| 750 | static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd, |
| 751 | unsigned long start, unsigned long end) |
| 752 | { |
| 753 | if (unmap_pte_range(pmd, start, end)) |
| 754 | if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud))) |
| 755 | pud_clear(pud); |
| 756 | } |
| 757 | |
| 758 | static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end) |
| 759 | { |
| 760 | pmd_t *pmd = pmd_offset(pud, start); |
| 761 | |
| 762 | /* |
| 763 | * Not on a 2MB page boundary? |
| 764 | */ |
| 765 | if (start & (PMD_SIZE - 1)) { |
| 766 | unsigned long next_page = (start + PMD_SIZE) & PMD_MASK; |
| 767 | unsigned long pre_end = min_t(unsigned long, end, next_page); |
| 768 | |
| 769 | __unmap_pmd_range(pud, pmd, start, pre_end); |
| 770 | |
| 771 | start = pre_end; |
| 772 | pmd++; |
| 773 | } |
| 774 | |
| 775 | /* |
| 776 | * Try to unmap in 2M chunks. |
| 777 | */ |
| 778 | while (end - start >= PMD_SIZE) { |
| 779 | if (pmd_large(*pmd)) |
| 780 | pmd_clear(pmd); |
| 781 | else |
| 782 | __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE); |
| 783 | |
| 784 | start += PMD_SIZE; |
| 785 | pmd++; |
| 786 | } |
| 787 | |
| 788 | /* |
| 789 | * 4K leftovers? |
| 790 | */ |
| 791 | if (start < end) |
| 792 | return __unmap_pmd_range(pud, pmd, start, end); |
| 793 | |
| 794 | /* |
| 795 | * Try again to free the PMD page if haven't succeeded above. |
| 796 | */ |
| 797 | if (!pud_none(*pud)) |
| 798 | if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud))) |
| 799 | pud_clear(pud); |
| 800 | } |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 801 | |
| 802 | static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end) |
| 803 | { |
| 804 | pud_t *pud = pud_offset(pgd, start); |
| 805 | |
| 806 | /* |
| 807 | * Not on a GB page boundary? |
| 808 | */ |
| 809 | if (start & (PUD_SIZE - 1)) { |
| 810 | unsigned long next_page = (start + PUD_SIZE) & PUD_MASK; |
| 811 | unsigned long pre_end = min_t(unsigned long, end, next_page); |
| 812 | |
| 813 | unmap_pmd_range(pud, start, pre_end); |
| 814 | |
| 815 | start = pre_end; |
| 816 | pud++; |
| 817 | } |
| 818 | |
| 819 | /* |
| 820 | * Try to unmap in 1G chunks? |
| 821 | */ |
| 822 | while (end - start >= PUD_SIZE) { |
| 823 | |
| 824 | if (pud_large(*pud)) |
| 825 | pud_clear(pud); |
| 826 | else |
| 827 | unmap_pmd_range(pud, start, start + PUD_SIZE); |
| 828 | |
| 829 | start += PUD_SIZE; |
| 830 | pud++; |
| 831 | } |
| 832 | |
| 833 | /* |
| 834 | * 2M leftovers? |
| 835 | */ |
| 836 | if (start < end) |
| 837 | unmap_pmd_range(pud, start, end); |
| 838 | |
| 839 | /* |
| 840 | * No need to try to free the PUD page because we'll free it in |
| 841 | * populate_pgd's error path |
| 842 | */ |
| 843 | } |
| 844 | |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 845 | static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end) |
| 846 | { |
| 847 | pgd_t *pgd_entry = root + pgd_index(addr); |
| 848 | |
| 849 | unmap_pud_range(pgd_entry, addr, end); |
| 850 | |
| 851 | if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry))) |
| 852 | pgd_clear(pgd_entry); |
| 853 | } |
| 854 | |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 855 | static int alloc_pte_page(pmd_t *pmd) |
| 856 | { |
| 857 | pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK); |
| 858 | if (!pte) |
| 859 | return -1; |
| 860 | |
| 861 | set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE)); |
| 862 | return 0; |
| 863 | } |
| 864 | |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 865 | static int alloc_pmd_page(pud_t *pud) |
| 866 | { |
| 867 | pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK); |
| 868 | if (!pmd) |
| 869 | return -1; |
| 870 | |
| 871 | set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE)); |
| 872 | return 0; |
| 873 | } |
| 874 | |
Borislav Petkov | c6b6f36 | 2013-10-31 17:25:04 +0100 | [diff] [blame] | 875 | static void populate_pte(struct cpa_data *cpa, |
| 876 | unsigned long start, unsigned long end, |
| 877 | unsigned num_pages, pmd_t *pmd, pgprot_t pgprot) |
| 878 | { |
| 879 | pte_t *pte; |
| 880 | |
| 881 | pte = pte_offset_kernel(pmd, start); |
| 882 | |
| 883 | while (num_pages-- && start < end) { |
| 884 | |
| 885 | /* deal with the NX bit */ |
| 886 | if (!(pgprot_val(pgprot) & _PAGE_NX)) |
| 887 | cpa->pfn &= ~_PAGE_NX; |
| 888 | |
| 889 | set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot)); |
| 890 | |
| 891 | start += PAGE_SIZE; |
| 892 | cpa->pfn += PAGE_SIZE; |
| 893 | pte++; |
| 894 | } |
| 895 | } |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 896 | |
| 897 | static int populate_pmd(struct cpa_data *cpa, |
| 898 | unsigned long start, unsigned long end, |
| 899 | unsigned num_pages, pud_t *pud, pgprot_t pgprot) |
| 900 | { |
| 901 | unsigned int cur_pages = 0; |
| 902 | pmd_t *pmd; |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 903 | pgprot_t pmd_pgprot; |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 904 | |
| 905 | /* |
| 906 | * Not on a 2M boundary? |
| 907 | */ |
| 908 | if (start & (PMD_SIZE - 1)) { |
| 909 | unsigned long pre_end = start + (num_pages << PAGE_SHIFT); |
| 910 | unsigned long next_page = (start + PMD_SIZE) & PMD_MASK; |
| 911 | |
| 912 | pre_end = min_t(unsigned long, pre_end, next_page); |
| 913 | cur_pages = (pre_end - start) >> PAGE_SHIFT; |
| 914 | cur_pages = min_t(unsigned int, num_pages, cur_pages); |
| 915 | |
| 916 | /* |
| 917 | * Need a PTE page? |
| 918 | */ |
| 919 | pmd = pmd_offset(pud, start); |
| 920 | if (pmd_none(*pmd)) |
| 921 | if (alloc_pte_page(pmd)) |
| 922 | return -1; |
| 923 | |
| 924 | populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot); |
| 925 | |
| 926 | start = pre_end; |
| 927 | } |
| 928 | |
| 929 | /* |
| 930 | * We mapped them all? |
| 931 | */ |
| 932 | if (num_pages == cur_pages) |
| 933 | return cur_pages; |
| 934 | |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 935 | pmd_pgprot = pgprot_4k_2_large(pgprot); |
| 936 | |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 937 | while (end - start >= PMD_SIZE) { |
| 938 | |
| 939 | /* |
| 940 | * We cannot use a 1G page so allocate a PMD page if needed. |
| 941 | */ |
| 942 | if (pud_none(*pud)) |
| 943 | if (alloc_pmd_page(pud)) |
| 944 | return -1; |
| 945 | |
| 946 | pmd = pmd_offset(pud, start); |
| 947 | |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 948 | set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE | |
| 949 | massage_pgprot(pmd_pgprot))); |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 950 | |
| 951 | start += PMD_SIZE; |
| 952 | cpa->pfn += PMD_SIZE; |
| 953 | cur_pages += PMD_SIZE >> PAGE_SHIFT; |
| 954 | } |
| 955 | |
| 956 | /* |
| 957 | * Map trailing 4K pages. |
| 958 | */ |
| 959 | if (start < end) { |
| 960 | pmd = pmd_offset(pud, start); |
| 961 | if (pmd_none(*pmd)) |
| 962 | if (alloc_pte_page(pmd)) |
| 963 | return -1; |
| 964 | |
| 965 | populate_pte(cpa, start, end, num_pages - cur_pages, |
| 966 | pmd, pgprot); |
| 967 | } |
| 968 | return num_pages; |
| 969 | } |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 970 | |
| 971 | static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd, |
| 972 | pgprot_t pgprot) |
| 973 | { |
| 974 | pud_t *pud; |
| 975 | unsigned long end; |
| 976 | int cur_pages = 0; |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 977 | pgprot_t pud_pgprot; |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 978 | |
| 979 | end = start + (cpa->numpages << PAGE_SHIFT); |
| 980 | |
| 981 | /* |
| 982 | * Not on a Gb page boundary? => map everything up to it with |
| 983 | * smaller pages. |
| 984 | */ |
| 985 | if (start & (PUD_SIZE - 1)) { |
| 986 | unsigned long pre_end; |
| 987 | unsigned long next_page = (start + PUD_SIZE) & PUD_MASK; |
| 988 | |
| 989 | pre_end = min_t(unsigned long, end, next_page); |
| 990 | cur_pages = (pre_end - start) >> PAGE_SHIFT; |
| 991 | cur_pages = min_t(int, (int)cpa->numpages, cur_pages); |
| 992 | |
| 993 | pud = pud_offset(pgd, start); |
| 994 | |
| 995 | /* |
| 996 | * Need a PMD page? |
| 997 | */ |
| 998 | if (pud_none(*pud)) |
| 999 | if (alloc_pmd_page(pud)) |
| 1000 | return -1; |
| 1001 | |
| 1002 | cur_pages = populate_pmd(cpa, start, pre_end, cur_pages, |
| 1003 | pud, pgprot); |
| 1004 | if (cur_pages < 0) |
| 1005 | return cur_pages; |
| 1006 | |
| 1007 | start = pre_end; |
| 1008 | } |
| 1009 | |
| 1010 | /* We mapped them all? */ |
| 1011 | if (cpa->numpages == cur_pages) |
| 1012 | return cur_pages; |
| 1013 | |
| 1014 | pud = pud_offset(pgd, start); |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 1015 | pud_pgprot = pgprot_4k_2_large(pgprot); |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1016 | |
| 1017 | /* |
| 1018 | * Map everything starting from the Gb boundary, possibly with 1G pages |
| 1019 | */ |
| 1020 | while (end - start >= PUD_SIZE) { |
Juergen Gross | f5b2831d | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 1021 | set_pud(pud, __pud(cpa->pfn | _PAGE_PSE | |
| 1022 | massage_pgprot(pud_pgprot))); |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1023 | |
| 1024 | start += PUD_SIZE; |
| 1025 | cpa->pfn += PUD_SIZE; |
| 1026 | cur_pages += PUD_SIZE >> PAGE_SHIFT; |
| 1027 | pud++; |
| 1028 | } |
| 1029 | |
| 1030 | /* Map trailing leftover */ |
| 1031 | if (start < end) { |
| 1032 | int tmp; |
| 1033 | |
| 1034 | pud = pud_offset(pgd, start); |
| 1035 | if (pud_none(*pud)) |
| 1036 | if (alloc_pmd_page(pud)) |
| 1037 | return -1; |
| 1038 | |
| 1039 | tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages, |
| 1040 | pud, pgprot); |
| 1041 | if (tmp < 0) |
| 1042 | return cur_pages; |
| 1043 | |
| 1044 | cur_pages += tmp; |
| 1045 | } |
| 1046 | return cur_pages; |
| 1047 | } |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1048 | |
| 1049 | /* |
| 1050 | * Restrictions for kernel page table do not necessarily apply when mapping in |
| 1051 | * an alternate PGD. |
| 1052 | */ |
| 1053 | static int populate_pgd(struct cpa_data *cpa, unsigned long addr) |
| 1054 | { |
| 1055 | pgprot_t pgprot = __pgprot(_KERNPG_TABLE); |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1056 | pud_t *pud = NULL; /* shut up gcc */ |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 1057 | pgd_t *pgd_entry; |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1058 | int ret; |
| 1059 | |
| 1060 | pgd_entry = cpa->pgd + pgd_index(addr); |
| 1061 | |
| 1062 | /* |
| 1063 | * Allocate a PUD page and hand it down for mapping. |
| 1064 | */ |
| 1065 | if (pgd_none(*pgd_entry)) { |
| 1066 | pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK); |
| 1067 | if (!pud) |
| 1068 | return -1; |
| 1069 | |
| 1070 | set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE)); |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1071 | } |
| 1072 | |
| 1073 | pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr); |
| 1074 | pgprot_val(pgprot) |= pgprot_val(cpa->mask_set); |
| 1075 | |
| 1076 | ret = populate_pud(cpa, addr, pgd_entry, pgprot); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 1077 | if (ret < 0) { |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 1078 | unmap_pgd_range(cpa->pgd, addr, |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 1079 | addr + (cpa->numpages << PAGE_SHIFT)); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 1080 | return ret; |
| 1081 | } |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 1082 | |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1083 | cpa->numpages = ret; |
| 1084 | return 0; |
| 1085 | } |
| 1086 | |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1087 | static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr, |
| 1088 | int primary) |
| 1089 | { |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1090 | if (cpa->pgd) |
| 1091 | return populate_pgd(cpa, vaddr); |
| 1092 | |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1093 | /* |
| 1094 | * Ignore all non primary paths. |
| 1095 | */ |
| 1096 | if (!primary) |
| 1097 | return 0; |
| 1098 | |
| 1099 | /* |
| 1100 | * Ignore the NULL PTE for kernel identity mapping, as it is expected |
| 1101 | * to have holes. |
| 1102 | * Also set numpages to '1' indicating that we processed cpa req for |
| 1103 | * one virtual address page and its pfn. TBD: numpages can be set based |
| 1104 | * on the initial value and the level returned by lookup_address(). |
| 1105 | */ |
| 1106 | if (within(vaddr, PAGE_OFFSET, |
| 1107 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) { |
| 1108 | cpa->numpages = 1; |
| 1109 | cpa->pfn = __pa(vaddr) >> PAGE_SHIFT; |
| 1110 | return 0; |
| 1111 | } else { |
| 1112 | WARN(1, KERN_WARNING "CPA: called for zero pte. " |
| 1113 | "vaddr = %lx cpa->vaddr = %lx\n", vaddr, |
| 1114 | *cpa->vaddr); |
| 1115 | |
| 1116 | return -EFAULT; |
| 1117 | } |
| 1118 | } |
| 1119 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1120 | static int __change_page_attr(struct cpa_data *cpa, int primary) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1121 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1122 | unsigned long address; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 1123 | int do_split, err; |
| 1124 | unsigned int level; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1125 | pte_t *kpte, old_pte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1126 | |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1127 | if (cpa->flags & CPA_PAGES_ARRAY) { |
| 1128 | struct page *page = cpa->pages[cpa->curpage]; |
| 1129 | if (unlikely(PageHighMem(page))) |
| 1130 | return 0; |
| 1131 | address = (unsigned long)page_address(page); |
| 1132 | } else if (cpa->flags & CPA_ARRAY) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1133 | address = cpa->vaddr[cpa->curpage]; |
| 1134 | else |
| 1135 | address = *cpa->vaddr; |
Ingo Molnar | 97f99fe | 2008-01-30 13:33:55 +0100 | [diff] [blame] | 1136 | repeat: |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1137 | kpte = _lookup_address_cpa(cpa, address, &level); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1138 | if (!kpte) |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1139 | return __cpa_process_fault(cpa, address, primary); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1140 | |
| 1141 | old_pte = *kpte; |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1142 | if (!pte_val(old_pte)) |
| 1143 | return __cpa_process_fault(cpa, address, primary); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1144 | |
Thomas Gleixner | 30551bb3 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 1145 | if (level == PG_LEVEL_4K) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1146 | pte_t new_pte; |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 1147 | pgprot_t new_prot = pte_pgprot(old_pte); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1148 | unsigned long pfn = pte_pfn(old_pte); |
Thomas Gleixner | a72a08a | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1149 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1150 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 1151 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1152 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1153 | new_prot = static_protections(new_prot, address, pfn); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1154 | |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 1155 | /* |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 1156 | * Set the GLOBAL flags only if the PRESENT flag is |
| 1157 | * set otherwise pte_present will return true even on |
| 1158 | * a non present pte. The canon_pgprot will clear |
| 1159 | * _PAGE_GLOBAL for the ancient hardware that doesn't |
| 1160 | * support it. |
| 1161 | */ |
| 1162 | if (pgprot_val(new_prot) & _PAGE_PRESENT) |
| 1163 | pgprot_val(new_prot) |= _PAGE_GLOBAL; |
| 1164 | else |
| 1165 | pgprot_val(new_prot) &= ~_PAGE_GLOBAL; |
| 1166 | |
| 1167 | /* |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 1168 | * We need to keep the pfn from the existing PTE, |
| 1169 | * after all we're only going to change it's attributes |
| 1170 | * not the memory it points to |
| 1171 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1172 | new_pte = pfn_pte(pfn, canon_pgprot(new_prot)); |
| 1173 | cpa->pfn = pfn; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1174 | /* |
| 1175 | * Do we really change anything ? |
| 1176 | */ |
| 1177 | if (pte_val(old_pte) != pte_val(new_pte)) { |
| 1178 | set_pte_atomic(kpte, new_pte); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1179 | cpa->flags |= CPA_FLUSHTLB; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1180 | } |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1181 | cpa->numpages = 1; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1182 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1183 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1184 | |
| 1185 | /* |
| 1186 | * Check, whether we can keep the large page intact |
| 1187 | * and just change the pte: |
| 1188 | */ |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 1189 | do_split = try_preserve_large_page(kpte, address, cpa); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1190 | /* |
| 1191 | * When the range fits into the existing large page, |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1192 | * return. cp->numpages and cpa->tlbflush have been updated in |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1193 | * try_large_page: |
| 1194 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1195 | if (do_split <= 0) |
| 1196 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1197 | |
| 1198 | /* |
| 1199 | * We have to split the large page: |
| 1200 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1201 | err = split_large_page(cpa, kpte, address); |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1202 | if (!err) { |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 1203 | /* |
| 1204 | * Do a global flush tlb after splitting the large page |
| 1205 | * and before we do the actual change page attribute in the PTE. |
| 1206 | * |
| 1207 | * With out this, we violate the TLB application note, that says |
| 1208 | * "The TLBs may contain both ordinary and large-page |
| 1209 | * translations for a 4-KByte range of linear addresses. This |
| 1210 | * may occur if software modifies the paging structures so that |
| 1211 | * the page size used for the address range changes. If the two |
| 1212 | * translations differ with respect to page frame or attributes |
| 1213 | * (e.g., permissions), processor behavior is undefined and may |
| 1214 | * be implementation-specific." |
| 1215 | * |
| 1216 | * We do this global tlb flush inside the cpa_lock, so that we |
| 1217 | * don't allow any other cpu, with stale tlb entries change the |
| 1218 | * page attribute in parallel, that also falls into the |
| 1219 | * just split large page entry. |
| 1220 | */ |
| 1221 | flush_tlb_all(); |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1222 | goto repeat; |
| 1223 | } |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 1224 | |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1225 | return err; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1226 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1227 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1228 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias); |
| 1229 | |
| 1230 | static int cpa_process_alias(struct cpa_data *cpa) |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 1231 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1232 | struct cpa_data alias_cpa; |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1233 | unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT); |
Tejun Heo | e933a73 | 2009-08-14 15:00:53 +0900 | [diff] [blame] | 1234 | unsigned long vaddr; |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1235 | int ret; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1236 | |
Yinghai Lu | 8eb5779 | 2012-11-16 19:38:49 -0800 | [diff] [blame] | 1237 | if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1)) |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1238 | return 0; |
| 1239 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1240 | /* |
| 1241 | * No need to redo, when the primary call touched the direct |
| 1242 | * mapping already: |
| 1243 | */ |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1244 | if (cpa->flags & CPA_PAGES_ARRAY) { |
| 1245 | struct page *page = cpa->pages[cpa->curpage]; |
| 1246 | if (unlikely(PageHighMem(page))) |
| 1247 | return 0; |
| 1248 | vaddr = (unsigned long)page_address(page); |
| 1249 | } else if (cpa->flags & CPA_ARRAY) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1250 | vaddr = cpa->vaddr[cpa->curpage]; |
| 1251 | else |
| 1252 | vaddr = *cpa->vaddr; |
| 1253 | |
| 1254 | if (!(within(vaddr, PAGE_OFFSET, |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1255 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1256 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1257 | alias_cpa = *cpa; |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1258 | alias_cpa.vaddr = &laddr; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1259 | alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1260 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1261 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1262 | if (ret) |
| 1263 | return ret; |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1264 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 1265 | |
Arjan van de Ven | 488fd99 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1266 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1267 | /* |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1268 | * If the primary call didn't touch the high mapping already |
| 1269 | * and the physical address is inside the kernel map, we need |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1270 | * to touch the high mapped kernel as well: |
| 1271 | */ |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1272 | if (!within(vaddr, (unsigned long)_text, _brk_end) && |
| 1273 | within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) { |
| 1274 | unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + |
| 1275 | __START_KERNEL_map - phys_base; |
| 1276 | alias_cpa = *cpa; |
| 1277 | alias_cpa.vaddr = &temp_cpa_vaddr; |
| 1278 | alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY); |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1279 | |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1280 | /* |
| 1281 | * The high mapping range is imprecise, so ignore the |
| 1282 | * return value. |
| 1283 | */ |
| 1284 | __change_page_attr_set_clr(&alias_cpa, 0); |
| 1285 | } |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1286 | #endif |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1287 | |
| 1288 | return 0; |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 1289 | } |
| 1290 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1291 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1292 | { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1293 | int ret, numpages = cpa->numpages; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1294 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1295 | while (numpages) { |
| 1296 | /* |
| 1297 | * Store the remaining nr of pages for the large page |
| 1298 | * preservation check. |
| 1299 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1300 | cpa->numpages = numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1301 | /* for array changes, we can't use large page */ |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1302 | if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY)) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1303 | cpa->numpages = 1; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1304 | |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 1305 | if (!debug_pagealloc) |
| 1306 | spin_lock(&cpa_lock); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1307 | ret = __change_page_attr(cpa, checkalias); |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 1308 | if (!debug_pagealloc) |
| 1309 | spin_unlock(&cpa_lock); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1310 | if (ret) |
| 1311 | return ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1312 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1313 | if (checkalias) { |
| 1314 | ret = cpa_process_alias(cpa); |
| 1315 | if (ret) |
| 1316 | return ret; |
| 1317 | } |
| 1318 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1319 | /* |
| 1320 | * Adjust the number of pages with the result of the |
| 1321 | * CPA operation. Either a large page has been |
| 1322 | * preserved or a single page update happened. |
| 1323 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1324 | BUG_ON(cpa->numpages > numpages); |
| 1325 | numpages -= cpa->numpages; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1326 | if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1327 | cpa->curpage++; |
| 1328 | else |
| 1329 | *cpa->vaddr += cpa->numpages * PAGE_SIZE; |
| 1330 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1331 | } |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1332 | return 0; |
| 1333 | } |
| 1334 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1335 | static int change_page_attr_set_clr(unsigned long *addr, int numpages, |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1336 | pgprot_t mask_set, pgprot_t mask_clr, |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1337 | int force_split, int in_flag, |
| 1338 | struct page **pages) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1339 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1340 | struct cpa_data cpa; |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 1341 | int ret, cache, checkalias; |
Jack Steiner | fa526d0 | 2009-09-03 12:56:02 -0500 | [diff] [blame] | 1342 | unsigned long baddr = 0; |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1343 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1344 | memset(&cpa, 0, sizeof(cpa)); |
| 1345 | |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1346 | /* |
| 1347 | * Check, if we are requested to change a not supported |
| 1348 | * feature: |
| 1349 | */ |
| 1350 | mask_set = canon_pgprot(mask_set); |
| 1351 | mask_clr = canon_pgprot(mask_clr); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1352 | if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split) |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1353 | return 0; |
| 1354 | |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 1355 | /* Ensure we are PAGE_SIZE aligned */ |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1356 | if (in_flag & CPA_ARRAY) { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1357 | int i; |
| 1358 | for (i = 0; i < numpages; i++) { |
| 1359 | if (addr[i] & ~PAGE_MASK) { |
| 1360 | addr[i] &= PAGE_MASK; |
| 1361 | WARN_ON_ONCE(1); |
| 1362 | } |
| 1363 | } |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1364 | } else if (!(in_flag & CPA_PAGES_ARRAY)) { |
| 1365 | /* |
| 1366 | * in_flag of CPA_PAGES_ARRAY implies it is aligned. |
| 1367 | * No need to cehck in that case |
| 1368 | */ |
| 1369 | if (*addr & ~PAGE_MASK) { |
| 1370 | *addr &= PAGE_MASK; |
| 1371 | /* |
| 1372 | * People should not be passing in unaligned addresses: |
| 1373 | */ |
| 1374 | WARN_ON_ONCE(1); |
| 1375 | } |
Jack Steiner | fa526d0 | 2009-09-03 12:56:02 -0500 | [diff] [blame] | 1376 | /* |
| 1377 | * Save address for cache flush. *addr is modified in the call |
| 1378 | * to __change_page_attr_set_clr() below. |
| 1379 | */ |
| 1380 | baddr = *addr; |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 1381 | } |
| 1382 | |
Nick Piggin | 5843d9a | 2008-08-01 03:15:21 +0200 | [diff] [blame] | 1383 | /* Must avoid aliasing mappings in the highmem code */ |
| 1384 | kmap_flush_unused(); |
| 1385 | |
Nick Piggin | db64fe0 | 2008-10-18 20:27:03 -0700 | [diff] [blame] | 1386 | vm_unmap_aliases(); |
| 1387 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1388 | cpa.vaddr = addr; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1389 | cpa.pages = pages; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1390 | cpa.numpages = numpages; |
| 1391 | cpa.mask_set = mask_set; |
| 1392 | cpa.mask_clr = mask_clr; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1393 | cpa.flags = 0; |
| 1394 | cpa.curpage = 0; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1395 | cpa.force_split = force_split; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1396 | |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1397 | if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY)) |
| 1398 | cpa.flags |= in_flag; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1399 | |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 1400 | /* No alias checking for _NX bit modifications */ |
| 1401 | checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX; |
| 1402 | |
| 1403 | ret = __change_page_attr_set_clr(&cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1404 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1405 | /* |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1406 | * Check whether we really changed something: |
| 1407 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1408 | if (!(cpa.flags & CPA_FLUSHTLB)) |
Shaohua Li | 1ac2f7d | 2008-08-04 14:51:24 +0800 | [diff] [blame] | 1409 | goto out; |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 1410 | |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1411 | /* |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1412 | * No need to flush, when we did not set any of the caching |
| 1413 | * attributes: |
| 1414 | */ |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1415 | cache = !!pgprot2cachemode(mask_set); |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1416 | |
| 1417 | /* |
Borislav Petkov | b82ad3d | 2014-03-12 15:13:04 +0100 | [diff] [blame] | 1418 | * On success we use CLFLUSH, when the CPU supports it to |
| 1419 | * avoid the WBINVD. If the CPU does not support it and in the |
H. Peter Anvin | f026cfa | 2012-08-14 09:53:38 -0700 | [diff] [blame] | 1420 | * error case we fall back to cpa_flush_all (which uses |
Borislav Petkov | b82ad3d | 2014-03-12 15:13:04 +0100 | [diff] [blame] | 1421 | * WBINVD): |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1422 | */ |
H. Peter Anvin | f026cfa | 2012-08-14 09:53:38 -0700 | [diff] [blame] | 1423 | if (!ret && cpu_has_clflush) { |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1424 | if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) { |
| 1425 | cpa_flush_array(addr, numpages, cache, |
| 1426 | cpa.flags, pages); |
| 1427 | } else |
Jack Steiner | fa526d0 | 2009-09-03 12:56:02 -0500 | [diff] [blame] | 1428 | cpa_flush_range(baddr, numpages, cache); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1429 | } else |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1430 | cpa_flush_all(cache); |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 1431 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 1432 | out: |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1433 | return ret; |
| 1434 | } |
| 1435 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1436 | static inline int change_page_attr_set(unsigned long *addr, int numpages, |
| 1437 | pgprot_t mask, int array) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1438 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1439 | return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0, |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1440 | (array ? CPA_ARRAY : 0), NULL); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1441 | } |
| 1442 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1443 | static inline int change_page_attr_clear(unsigned long *addr, int numpages, |
| 1444 | pgprot_t mask, int array) |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1445 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1446 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0, |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1447 | (array ? CPA_ARRAY : 0), NULL); |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1448 | } |
| 1449 | |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1450 | static inline int cpa_set_pages_array(struct page **pages, int numpages, |
| 1451 | pgprot_t mask) |
| 1452 | { |
| 1453 | return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0, |
| 1454 | CPA_PAGES_ARRAY, pages); |
| 1455 | } |
| 1456 | |
| 1457 | static inline int cpa_clear_pages_array(struct page **pages, int numpages, |
| 1458 | pgprot_t mask) |
| 1459 | { |
| 1460 | return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0, |
| 1461 | CPA_PAGES_ARRAY, pages); |
| 1462 | } |
| 1463 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1464 | int _set_memory_uc(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1465 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 1466 | /* |
| 1467 | * for now UC MINUS. see comments in ioremap_nocache() |
Luis R. Rodriguez | e4b6be33 | 2015-05-11 10:15:53 +0200 | [diff] [blame] | 1468 | * If you really need strong UC use ioremap_uc(), but note |
| 1469 | * that you cannot override IO areas with set_memory_*() as |
| 1470 | * these helpers cannot work with IO memory. |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 1471 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1472 | return change_page_attr_set(&addr, numpages, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1473 | cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS), |
| 1474 | 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1475 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1476 | |
| 1477 | int set_memory_uc(unsigned long addr, int numpages) |
| 1478 | { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1479 | int ret; |
| 1480 | |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 1481 | /* |
| 1482 | * for now UC MINUS. see comments in ioremap_nocache() |
| 1483 | */ |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1484 | ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 1485 | _PAGE_CACHE_MODE_UC_MINUS, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1486 | if (ret) |
| 1487 | goto out_err; |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1488 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1489 | ret = _set_memory_uc(addr, numpages); |
| 1490 | if (ret) |
| 1491 | goto out_free; |
| 1492 | |
| 1493 | return 0; |
| 1494 | |
| 1495 | out_free: |
| 1496 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
| 1497 | out_err: |
| 1498 | return ret; |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1499 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1500 | EXPORT_SYMBOL(set_memory_uc); |
| 1501 | |
H Hartley Sweeten | 2d070ef | 2011-11-15 14:49:00 -0800 | [diff] [blame] | 1502 | static int _set_memory_array(unsigned long *addr, int addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1503 | enum page_cache_mode new_type) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1504 | { |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1505 | enum page_cache_mode set_type; |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1506 | int i, j; |
| 1507 | int ret; |
| 1508 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1509 | for (i = 0; i < addrinarray; i++) { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1510 | ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE, |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1511 | new_type, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1512 | if (ret) |
| 1513 | goto out_free; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1514 | } |
| 1515 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1516 | /* If WC, set to UC- first and then WC */ |
| 1517 | set_type = (new_type == _PAGE_CACHE_MODE_WC) ? |
| 1518 | _PAGE_CACHE_MODE_UC_MINUS : new_type; |
| 1519 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1520 | ret = change_page_attr_set(addr, addrinarray, |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1521 | cachemode2pgprot(set_type), 1); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1522 | |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1523 | if (!ret && new_type == _PAGE_CACHE_MODE_WC) |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1524 | ret = change_page_attr_set_clr(addr, addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1525 | cachemode2pgprot( |
| 1526 | _PAGE_CACHE_MODE_WC), |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1527 | __pgprot(_PAGE_CACHE_MASK), |
| 1528 | 0, CPA_ARRAY, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1529 | if (ret) |
| 1530 | goto out_free; |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 1531 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1532 | return 0; |
| 1533 | |
| 1534 | out_free: |
| 1535 | for (j = 0; j < i; j++) |
| 1536 | free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE); |
| 1537 | |
| 1538 | return ret; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1539 | } |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1540 | |
| 1541 | int set_memory_array_uc(unsigned long *addr, int addrinarray) |
| 1542 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1543 | return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1544 | } |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1545 | EXPORT_SYMBOL(set_memory_array_uc); |
| 1546 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1547 | int set_memory_array_wc(unsigned long *addr, int addrinarray) |
| 1548 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1549 | return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1550 | } |
| 1551 | EXPORT_SYMBOL(set_memory_array_wc); |
| 1552 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1553 | int set_memory_array_wt(unsigned long *addr, int addrinarray) |
| 1554 | { |
| 1555 | return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT); |
| 1556 | } |
| 1557 | EXPORT_SYMBOL_GPL(set_memory_array_wt); |
| 1558 | |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1559 | int _set_memory_wc(unsigned long addr, int numpages) |
| 1560 | { |
venkatesh.pallipadi@intel.com | 3869c4aa | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1561 | int ret; |
Pallipadi, Venkatesh | bdc6340 | 2009-07-30 14:43:19 -0700 | [diff] [blame] | 1562 | unsigned long addr_copy = addr; |
| 1563 | |
venkatesh.pallipadi@intel.com | 3869c4aa | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1564 | ret = change_page_attr_set(&addr, numpages, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1565 | cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS), |
| 1566 | 0); |
venkatesh.pallipadi@intel.com | 3869c4aa | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1567 | if (!ret) { |
Pallipadi, Venkatesh | bdc6340 | 2009-07-30 14:43:19 -0700 | [diff] [blame] | 1568 | ret = change_page_attr_set_clr(&addr_copy, numpages, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1569 | cachemode2pgprot( |
| 1570 | _PAGE_CACHE_MODE_WC), |
Pallipadi, Venkatesh | bdc6340 | 2009-07-30 14:43:19 -0700 | [diff] [blame] | 1571 | __pgprot(_PAGE_CACHE_MASK), |
| 1572 | 0, 0, NULL); |
venkatesh.pallipadi@intel.com | 3869c4aa | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1573 | } |
| 1574 | return ret; |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1575 | } |
| 1576 | |
| 1577 | int set_memory_wc(unsigned long addr, int numpages) |
| 1578 | { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1579 | int ret; |
| 1580 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1581 | ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 1582 | _PAGE_CACHE_MODE_WC, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1583 | if (ret) |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1584 | return ret; |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1585 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1586 | ret = _set_memory_wc(addr, numpages); |
| 1587 | if (ret) |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1588 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1589 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1590 | return ret; |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1591 | } |
| 1592 | EXPORT_SYMBOL(set_memory_wc); |
| 1593 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1594 | int _set_memory_wt(unsigned long addr, int numpages) |
| 1595 | { |
| 1596 | return change_page_attr_set(&addr, numpages, |
| 1597 | cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0); |
| 1598 | } |
| 1599 | |
| 1600 | int set_memory_wt(unsigned long addr, int numpages) |
| 1601 | { |
| 1602 | int ret; |
| 1603 | |
| 1604 | ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
| 1605 | _PAGE_CACHE_MODE_WT, NULL); |
| 1606 | if (ret) |
| 1607 | return ret; |
| 1608 | |
| 1609 | ret = _set_memory_wt(addr, numpages); |
| 1610 | if (ret) |
| 1611 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
| 1612 | |
| 1613 | return ret; |
| 1614 | } |
| 1615 | EXPORT_SYMBOL_GPL(set_memory_wt); |
| 1616 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1617 | int _set_memory_wb(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1618 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1619 | /* WB cache mode is hard wired to all cache attribute bits being 0 */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1620 | return change_page_attr_clear(&addr, numpages, |
| 1621 | __pgprot(_PAGE_CACHE_MASK), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1622 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1623 | |
| 1624 | int set_memory_wb(unsigned long addr, int numpages) |
| 1625 | { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1626 | int ret; |
| 1627 | |
| 1628 | ret = _set_memory_wb(addr, numpages); |
| 1629 | if (ret) |
| 1630 | return ret; |
| 1631 | |
venkatesh.pallipadi@intel.com | c15238d | 2008-08-20 16:45:51 -0700 | [diff] [blame] | 1632 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1633 | return 0; |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1634 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1635 | EXPORT_SYMBOL(set_memory_wb); |
| 1636 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1637 | int set_memory_array_wb(unsigned long *addr, int addrinarray) |
| 1638 | { |
| 1639 | int i; |
venkatesh.pallipadi@intel.com | a5593e0 | 2009-04-09 14:26:48 -0700 | [diff] [blame] | 1640 | int ret; |
| 1641 | |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1642 | /* WB cache mode is hard wired to all cache attribute bits being 0 */ |
venkatesh.pallipadi@intel.com | a5593e0 | 2009-04-09 14:26:48 -0700 | [diff] [blame] | 1643 | ret = change_page_attr_clear(addr, addrinarray, |
| 1644 | __pgprot(_PAGE_CACHE_MASK), 1); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1645 | if (ret) |
| 1646 | return ret; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1647 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1648 | for (i = 0; i < addrinarray; i++) |
| 1649 | free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE); |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 1650 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1651 | return 0; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1652 | } |
| 1653 | EXPORT_SYMBOL(set_memory_array_wb); |
| 1654 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1655 | int set_memory_x(unsigned long addr, int numpages) |
| 1656 | { |
H. Peter Anvin | 583140a | 2009-11-13 15:28:15 -0800 | [diff] [blame] | 1657 | if (!(__supported_pte_mask & _PAGE_NX)) |
| 1658 | return 0; |
| 1659 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1660 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1661 | } |
| 1662 | EXPORT_SYMBOL(set_memory_x); |
| 1663 | |
| 1664 | int set_memory_nx(unsigned long addr, int numpages) |
| 1665 | { |
H. Peter Anvin | 583140a | 2009-11-13 15:28:15 -0800 | [diff] [blame] | 1666 | if (!(__supported_pte_mask & _PAGE_NX)) |
| 1667 | return 0; |
| 1668 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1669 | return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1670 | } |
| 1671 | EXPORT_SYMBOL(set_memory_nx); |
| 1672 | |
| 1673 | int set_memory_ro(unsigned long addr, int numpages) |
| 1674 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1675 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1676 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1677 | |
| 1678 | int set_memory_rw(unsigned long addr, int numpages) |
| 1679 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1680 | return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1681 | } |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1682 | |
| 1683 | int set_memory_np(unsigned long addr, int numpages) |
| 1684 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1685 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1686 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1687 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1688 | int set_memory_4k(unsigned long addr, int numpages) |
| 1689 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1690 | return change_page_attr_set_clr(&addr, numpages, __pgprot(0), |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1691 | __pgprot(0), 1, 0, NULL); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1692 | } |
| 1693 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1694 | int set_pages_uc(struct page *page, int numpages) |
| 1695 | { |
| 1696 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1697 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1698 | return set_memory_uc(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1699 | } |
| 1700 | EXPORT_SYMBOL(set_pages_uc); |
| 1701 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1702 | static int _set_pages_array(struct page **pages, int addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1703 | enum page_cache_mode new_type) |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1704 | { |
| 1705 | unsigned long start; |
| 1706 | unsigned long end; |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1707 | enum page_cache_mode set_type; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1708 | int i; |
| 1709 | int free_idx; |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1710 | int ret; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1711 | |
| 1712 | for (i = 0; i < addrinarray; i++) { |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1713 | if (PageHighMem(pages[i])) |
| 1714 | continue; |
| 1715 | start = page_to_pfn(pages[i]) << PAGE_SHIFT; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1716 | end = start + PAGE_SIZE; |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1717 | if (reserve_memtype(start, end, new_type, NULL)) |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1718 | goto err_out; |
| 1719 | } |
| 1720 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1721 | /* If WC, set to UC- first and then WC */ |
| 1722 | set_type = (new_type == _PAGE_CACHE_MODE_WC) ? |
| 1723 | _PAGE_CACHE_MODE_UC_MINUS : new_type; |
| 1724 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1725 | ret = cpa_set_pages_array(pages, addrinarray, |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1726 | cachemode2pgprot(set_type)); |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1727 | if (!ret && new_type == _PAGE_CACHE_MODE_WC) |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1728 | ret = change_page_attr_set_clr(NULL, addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1729 | cachemode2pgprot( |
| 1730 | _PAGE_CACHE_MODE_WC), |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1731 | __pgprot(_PAGE_CACHE_MASK), |
| 1732 | 0, CPA_PAGES_ARRAY, pages); |
| 1733 | if (ret) |
| 1734 | goto err_out; |
| 1735 | return 0; /* Success */ |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1736 | err_out: |
| 1737 | free_idx = i; |
| 1738 | for (i = 0; i < free_idx; i++) { |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1739 | if (PageHighMem(pages[i])) |
| 1740 | continue; |
| 1741 | start = page_to_pfn(pages[i]) << PAGE_SHIFT; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1742 | end = start + PAGE_SIZE; |
| 1743 | free_memtype(start, end); |
| 1744 | } |
| 1745 | return -EINVAL; |
| 1746 | } |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1747 | |
| 1748 | int set_pages_array_uc(struct page **pages, int addrinarray) |
| 1749 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1750 | return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1751 | } |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1752 | EXPORT_SYMBOL(set_pages_array_uc); |
| 1753 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1754 | int set_pages_array_wc(struct page **pages, int addrinarray) |
| 1755 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1756 | return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1757 | } |
| 1758 | EXPORT_SYMBOL(set_pages_array_wc); |
| 1759 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1760 | int set_pages_array_wt(struct page **pages, int addrinarray) |
| 1761 | { |
| 1762 | return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT); |
| 1763 | } |
| 1764 | EXPORT_SYMBOL_GPL(set_pages_array_wt); |
| 1765 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1766 | int set_pages_wb(struct page *page, int numpages) |
| 1767 | { |
| 1768 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1769 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1770 | return set_memory_wb(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1771 | } |
| 1772 | EXPORT_SYMBOL(set_pages_wb); |
| 1773 | |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1774 | int set_pages_array_wb(struct page **pages, int addrinarray) |
| 1775 | { |
| 1776 | int retval; |
| 1777 | unsigned long start; |
| 1778 | unsigned long end; |
| 1779 | int i; |
| 1780 | |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1781 | /* WB cache mode is hard wired to all cache attribute bits being 0 */ |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1782 | retval = cpa_clear_pages_array(pages, addrinarray, |
| 1783 | __pgprot(_PAGE_CACHE_MASK)); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1784 | if (retval) |
| 1785 | return retval; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1786 | |
| 1787 | for (i = 0; i < addrinarray; i++) { |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1788 | if (PageHighMem(pages[i])) |
| 1789 | continue; |
| 1790 | start = page_to_pfn(pages[i]) << PAGE_SHIFT; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1791 | end = start + PAGE_SIZE; |
| 1792 | free_memtype(start, end); |
| 1793 | } |
| 1794 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1795 | return 0; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1796 | } |
| 1797 | EXPORT_SYMBOL(set_pages_array_wb); |
| 1798 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1799 | int set_pages_x(struct page *page, int numpages) |
| 1800 | { |
| 1801 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1802 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1803 | return set_memory_x(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1804 | } |
| 1805 | EXPORT_SYMBOL(set_pages_x); |
| 1806 | |
| 1807 | int set_pages_nx(struct page *page, int numpages) |
| 1808 | { |
| 1809 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1810 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1811 | return set_memory_nx(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1812 | } |
| 1813 | EXPORT_SYMBOL(set_pages_nx); |
| 1814 | |
| 1815 | int set_pages_ro(struct page *page, int numpages) |
| 1816 | { |
| 1817 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1818 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1819 | return set_memory_ro(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1820 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1821 | |
| 1822 | int set_pages_rw(struct page *page, int numpages) |
| 1823 | { |
| 1824 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1825 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1826 | return set_memory_rw(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1827 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1828 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1829 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1830 | |
| 1831 | static int __set_pages_p(struct page *page, int numpages) |
| 1832 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1833 | unsigned long tempaddr = (unsigned long) page_address(page); |
| 1834 | struct cpa_data cpa = { .vaddr = &tempaddr, |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1835 | .pgd = NULL, |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1836 | .numpages = numpages, |
| 1837 | .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1838 | .mask_clr = __pgprot(0), |
| 1839 | .flags = 0}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1840 | |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame] | 1841 | /* |
| 1842 | * No alias checking needed for setting present flag. otherwise, |
| 1843 | * we may need to break large pages for 64-bit kernel text |
| 1844 | * mappings (this adds to complexity if we want to do this from |
| 1845 | * atomic context especially). Let's keep it simple! |
| 1846 | */ |
| 1847 | return __change_page_attr_set_clr(&cpa, 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1848 | } |
| 1849 | |
| 1850 | static int __set_pages_np(struct page *page, int numpages) |
| 1851 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1852 | unsigned long tempaddr = (unsigned long) page_address(page); |
| 1853 | struct cpa_data cpa = { .vaddr = &tempaddr, |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1854 | .pgd = NULL, |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1855 | .numpages = numpages, |
| 1856 | .mask_set = __pgprot(0), |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1857 | .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
| 1858 | .flags = 0}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1859 | |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame] | 1860 | /* |
| 1861 | * No alias checking needed for setting not present flag. otherwise, |
| 1862 | * we may need to break large pages for 64-bit kernel text |
| 1863 | * mappings (this adds to complexity if we want to do this from |
| 1864 | * atomic context especially). Let's keep it simple! |
| 1865 | */ |
| 1866 | return __change_page_attr_set_clr(&cpa, 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1867 | } |
| 1868 | |
Joonsoo Kim | 031bc57 | 2014-12-12 16:55:52 -0800 | [diff] [blame] | 1869 | void __kernel_map_pages(struct page *page, int numpages, int enable) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1870 | { |
| 1871 | if (PageHighMem(page)) |
| 1872 | return; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1873 | if (!enable) { |
Ingo Molnar | f9b8404 | 2006-06-27 02:54:49 -0700 | [diff] [blame] | 1874 | debug_check_no_locks_freed(page_address(page), |
| 1875 | numpages * PAGE_SIZE); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1876 | } |
Ingo Molnar | de5097c | 2006-01-09 15:59:21 -0800 | [diff] [blame] | 1877 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1878 | /* |
Ingo Molnar | f8d8406 | 2008-02-13 14:09:53 +0100 | [diff] [blame] | 1879 | * The return value is ignored as the calls cannot fail. |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame] | 1880 | * Large pages for identity mappings are not used at boot time |
| 1881 | * and hence no memory allocations during large page split. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1882 | */ |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1883 | if (enable) |
| 1884 | __set_pages_p(page, numpages); |
| 1885 | else |
| 1886 | __set_pages_np(page, numpages); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1887 | |
| 1888 | /* |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 1889 | * We should perform an IPI and flush all tlbs, |
| 1890 | * but that can deadlock->flush only current cpu: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1891 | */ |
| 1892 | __flush_tlb_all(); |
Boris Ostrovsky | 2656460 | 2013-04-11 13:59:52 -0400 | [diff] [blame] | 1893 | |
| 1894 | arch_flush_lazy_mmu_mode(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1895 | } |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1896 | |
| 1897 | #ifdef CONFIG_HIBERNATION |
| 1898 | |
| 1899 | bool kernel_page_present(struct page *page) |
| 1900 | { |
| 1901 | unsigned int level; |
| 1902 | pte_t *pte; |
| 1903 | |
| 1904 | if (PageHighMem(page)) |
| 1905 | return false; |
| 1906 | |
| 1907 | pte = lookup_address((unsigned long)page_address(page), &level); |
| 1908 | return (pte_val(*pte) & _PAGE_PRESENT); |
| 1909 | } |
| 1910 | |
| 1911 | #endif /* CONFIG_HIBERNATION */ |
| 1912 | |
| 1913 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1914 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1915 | int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address, |
| 1916 | unsigned numpages, unsigned long page_flags) |
| 1917 | { |
| 1918 | int retval = -EINVAL; |
| 1919 | |
| 1920 | struct cpa_data cpa = { |
| 1921 | .vaddr = &address, |
| 1922 | .pfn = pfn, |
| 1923 | .pgd = pgd, |
| 1924 | .numpages = numpages, |
| 1925 | .mask_set = __pgprot(0), |
| 1926 | .mask_clr = __pgprot(0), |
| 1927 | .flags = 0, |
| 1928 | }; |
| 1929 | |
| 1930 | if (!(__supported_pte_mask & _PAGE_NX)) |
| 1931 | goto out; |
| 1932 | |
| 1933 | if (!(page_flags & _PAGE_NX)) |
| 1934 | cpa.mask_clr = __pgprot(_PAGE_NX); |
| 1935 | |
| 1936 | cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags); |
| 1937 | |
| 1938 | retval = __change_page_attr_set_clr(&cpa, 0); |
| 1939 | __flush_tlb_all(); |
| 1940 | |
| 1941 | out: |
| 1942 | return retval; |
| 1943 | } |
| 1944 | |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 1945 | void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address, |
| 1946 | unsigned numpages) |
| 1947 | { |
| 1948 | unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT)); |
| 1949 | } |
| 1950 | |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1951 | /* |
| 1952 | * The testcases use internal knowledge of the implementation that shouldn't |
| 1953 | * be exposed to the rest of the kernel. Include these directly here. |
| 1954 | */ |
| 1955 | #ifdef CONFIG_CPA_DEBUG |
| 1956 | #include "pageattr-test.c" |
| 1957 | #endif |