| Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Alexander Shiyan | dd99eef | 2014-06-19 19:26:34 +0400 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> |
| Alexander Shiyan | dd99eef | 2014-06-19 19:26:34 +0400 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef CONFIG_DEBUG_CLPS711X_UART2 |
| 7 | #define CLPS711X_UART_PADDR (0x80000000 + 0x0000) |
| Alexander Shiyan | 32981ea | 2016-06-04 10:09:53 +0300 | [diff] [blame] | 8 | #define CLPS711X_UART_VADDR (0xfeff4000 + 0x0000) |
| Alexander Shiyan | dd99eef | 2014-06-19 19:26:34 +0400 | [diff] [blame] | 9 | #else |
| 10 | #define CLPS711X_UART_PADDR (0x80000000 + 0x1000) |
| Alexander Shiyan | 32981ea | 2016-06-04 10:09:53 +0300 | [diff] [blame] | 11 | #define CLPS711X_UART_VADDR (0xfeff4000 + 0x1000) |
| Alexander Shiyan | dd99eef | 2014-06-19 19:26:34 +0400 | [diff] [blame] | 12 | #endif |
| 13 | |
| 14 | #define SYSFLG (0x0140) |
| 15 | #define SYSFLG_UBUSY (1 << 11) |
| 16 | #define UARTDR (0x0480) |
| 17 | |
| 18 | .macro addruart, rp, rv, tmp |
| 19 | ldr \rv, =CLPS711X_UART_VADDR |
| 20 | ldr \rp, =CLPS711X_UART_PADDR |
| 21 | .endm |
| 22 | |
| 23 | .macro waituart,rd,rx |
| 24 | .endm |
| 25 | |
| 26 | .macro senduart,rd,rx |
| 27 | str \rd, [\rx, #UARTDR] |
| 28 | .endm |
| 29 | |
| 30 | .macro busyuart,rd,rx |
| 31 | 1001: ldr \rd, [\rx, #SYSFLG] |
| 32 | tst \rd, #SYSFLG_UBUSY |
| 33 | bne 1001b |
| 34 | .endm |
