Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2011 Jamie Iles |
| 4 | * |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 5 | * All enquiries to support@picochip.com |
| 6 | */ |
Jiang Qiu | e6cb348 | 2016-04-28 17:32:03 +0800 | [diff] [blame] | 7 | #include <linux/acpi.h> |
Phil Edworthy | e6bf377 | 2018-03-12 18:30:56 +0000 | [diff] [blame] | 8 | #include <linux/clk.h> |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 9 | #include <linux/err.h> |
Phil Edworthy | e6bf377 | 2018-03-12 18:30:56 +0000 | [diff] [blame] | 10 | #include <linux/gpio/driver.h> |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 11 | #include <linux/init.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/io.h> |
| 14 | #include <linux/ioport.h> |
| 15 | #include <linux/irq.h> |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 16 | #include <linux/module.h> |
| 17 | #include <linux/of.h> |
| 18 | #include <linux/of_address.h> |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 19 | #include <linux/of_device.h> |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 20 | #include <linux/of_irq.h> |
| 21 | #include <linux/platform_device.h> |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 22 | #include <linux/property.h> |
Alan Tull | 07901a9 | 2017-10-11 11:34:44 -0500 | [diff] [blame] | 23 | #include <linux/reset.h> |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 24 | #include <linux/spinlock.h> |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 25 | #include <linux/platform_data/gpio-dwapb.h> |
| 26 | #include <linux/slab.h> |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 27 | |
Jiang Qiu | e6cb348 | 2016-04-28 17:32:03 +0800 | [diff] [blame] | 28 | #include "gpiolib.h" |
Andy Shevchenko | 77cb907 | 2019-07-30 13:43:36 +0300 | [diff] [blame] | 29 | #include "gpiolib-acpi.h" |
Jiang Qiu | e6cb348 | 2016-04-28 17:32:03 +0800 | [diff] [blame] | 30 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 31 | #define GPIO_SWPORTA_DR 0x00 |
| 32 | #define GPIO_SWPORTA_DDR 0x04 |
| 33 | #define GPIO_SWPORTB_DR 0x0c |
| 34 | #define GPIO_SWPORTB_DDR 0x10 |
| 35 | #define GPIO_SWPORTC_DR 0x18 |
| 36 | #define GPIO_SWPORTC_DDR 0x1c |
| 37 | #define GPIO_SWPORTD_DR 0x24 |
| 38 | #define GPIO_SWPORTD_DDR 0x28 |
| 39 | #define GPIO_INTEN 0x30 |
| 40 | #define GPIO_INTMASK 0x34 |
| 41 | #define GPIO_INTTYPE_LEVEL 0x38 |
| 42 | #define GPIO_INT_POLARITY 0x3c |
| 43 | #define GPIO_INTSTATUS 0x40 |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 44 | #define GPIO_PORTA_DEBOUNCE 0x48 |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 45 | #define GPIO_PORTA_EOI 0x4c |
| 46 | #define GPIO_EXT_PORTA 0x50 |
| 47 | #define GPIO_EXT_PORTB 0x54 |
| 48 | #define GPIO_EXT_PORTC 0x58 |
| 49 | #define GPIO_EXT_PORTD 0x5c |
| 50 | |
Andy Shevchenko | c58220c | 2020-04-15 17:15:21 +0300 | [diff] [blame] | 51 | #define DWAPB_DRIVER_NAME "gpio-dwapb" |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 52 | #define DWAPB_MAX_PORTS 4 |
Andy Shevchenko | c58220c | 2020-04-15 17:15:21 +0300 | [diff] [blame] | 53 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 54 | #define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */ |
| 55 | #define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */ |
| 56 | #define GPIO_SWPORT_DDR_STRIDE 0x0c /* register stride 3*32 bits */ |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 57 | |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 58 | #define GPIO_REG_OFFSET_V2 1 |
| 59 | |
| 60 | #define GPIO_INTMASK_V2 0x44 |
| 61 | #define GPIO_INTTYPE_LEVEL_V2 0x34 |
| 62 | #define GPIO_INT_POLARITY_V2 0x38 |
| 63 | #define GPIO_INTSTATUS_V2 0x3c |
| 64 | #define GPIO_PORTA_EOI_V2 0x40 |
| 65 | |
Serge Semin | 5c544c9 | 2020-03-23 22:54:00 +0300 | [diff] [blame] | 66 | #define DWAPB_NR_CLOCKS 2 |
| 67 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 68 | struct dwapb_gpio; |
| 69 | |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 70 | #ifdef CONFIG_PM_SLEEP |
| 71 | /* Store GPIO context across system-wide suspend/resume transitions */ |
| 72 | struct dwapb_context { |
| 73 | u32 data; |
| 74 | u32 dir; |
| 75 | u32 ext; |
| 76 | u32 int_en; |
| 77 | u32 int_mask; |
| 78 | u32 int_type; |
| 79 | u32 int_pol; |
| 80 | u32 int_deb; |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 81 | u32 wake_en; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 82 | }; |
| 83 | #endif |
| 84 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 85 | struct dwapb_gpio_port_irqchip { |
| 86 | struct irq_chip irqchip; |
| 87 | unsigned int nr_irqs; |
| 88 | unsigned int irq[DWAPB_MAX_GPIOS]; |
| 89 | }; |
| 90 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 91 | struct dwapb_gpio_port { |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 92 | struct gpio_chip gc; |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 93 | struct dwapb_gpio_port_irqchip *pirq; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 94 | struct dwapb_gpio *gpio; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 95 | #ifdef CONFIG_PM_SLEEP |
| 96 | struct dwapb_context *ctx; |
| 97 | #endif |
| 98 | unsigned int idx; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 99 | }; |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 100 | #define to_dwapb_gpio(_gc) \ |
| 101 | (container_of(_gc, struct dwapb_gpio_port, gc)->gpio) |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 102 | |
| 103 | struct dwapb_gpio { |
| 104 | struct device *dev; |
| 105 | void __iomem *regs; |
| 106 | struct dwapb_gpio_port *ports; |
| 107 | unsigned int nr_ports; |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 108 | unsigned int flags; |
Alan Tull | 07901a9 | 2017-10-11 11:34:44 -0500 | [diff] [blame] | 109 | struct reset_control *rst; |
Serge Semin | 5c544c9 | 2020-03-23 22:54:00 +0300 | [diff] [blame] | 110 | struct clk_bulk_data clks[DWAPB_NR_CLOCKS]; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 111 | }; |
| 112 | |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 113 | static inline u32 gpio_reg_v2_convert(unsigned int offset) |
| 114 | { |
| 115 | switch (offset) { |
| 116 | case GPIO_INTMASK: |
| 117 | return GPIO_INTMASK_V2; |
| 118 | case GPIO_INTTYPE_LEVEL: |
| 119 | return GPIO_INTTYPE_LEVEL_V2; |
| 120 | case GPIO_INT_POLARITY: |
| 121 | return GPIO_INT_POLARITY_V2; |
| 122 | case GPIO_INTSTATUS: |
| 123 | return GPIO_INTSTATUS_V2; |
| 124 | case GPIO_PORTA_EOI: |
| 125 | return GPIO_PORTA_EOI_V2; |
| 126 | } |
| 127 | |
| 128 | return offset; |
| 129 | } |
| 130 | |
| 131 | static inline u32 gpio_reg_convert(struct dwapb_gpio *gpio, unsigned int offset) |
| 132 | { |
| 133 | if (gpio->flags & GPIO_REG_OFFSET_V2) |
| 134 | return gpio_reg_v2_convert(offset); |
| 135 | |
| 136 | return offset; |
| 137 | } |
| 138 | |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 139 | static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) |
| 140 | { |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 141 | struct gpio_chip *gc = &gpio->ports[0].gc; |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 142 | void __iomem *reg_base = gpio->regs; |
| 143 | |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 144 | return gc->read_reg(reg_base + gpio_reg_convert(gpio, offset)); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, |
| 148 | u32 val) |
| 149 | { |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 150 | struct gpio_chip *gc = &gpio->ports[0].gc; |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 151 | void __iomem *reg_base = gpio->regs; |
| 152 | |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 153 | gc->write_reg(reg_base + gpio_reg_convert(gpio, offset), val); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 154 | } |
| 155 | |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 156 | static struct dwapb_gpio_port *dwapb_offs_to_port(struct dwapb_gpio *gpio, unsigned int offs) |
| 157 | { |
| 158 | struct dwapb_gpio_port *port; |
| 159 | int i; |
| 160 | |
| 161 | for (i = 0; i < gpio->nr_ports; i++) { |
| 162 | port = &gpio->ports[i]; |
Serge Semin | f9f890b | 2020-07-30 18:28:01 +0300 | [diff] [blame] | 163 | if (port->idx == offs / DWAPB_MAX_GPIOS) |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 164 | return port; |
| 165 | } |
| 166 | |
| 167 | return NULL; |
| 168 | } |
| 169 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 170 | static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) |
| 171 | { |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 172 | struct dwapb_gpio_port *port = dwapb_offs_to_port(gpio, offs); |
| 173 | struct gpio_chip *gc; |
| 174 | u32 pol; |
| 175 | int val; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 176 | |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 177 | if (!port) |
| 178 | return; |
| 179 | gc = &port->gc; |
| 180 | |
| 181 | pol = dwapb_read(gpio, GPIO_INT_POLARITY); |
| 182 | /* Just read the current value right out of the data register */ |
Serge Semin | f9f890b | 2020-07-30 18:28:01 +0300 | [diff] [blame] | 183 | val = gc->get(gc, offs % DWAPB_MAX_GPIOS); |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 184 | if (val) |
| 185 | pol &= ~BIT(offs); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 186 | else |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 187 | pol |= BIT(offs); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 188 | |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 189 | dwapb_write(gpio, GPIO_INT_POLARITY, pol); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 190 | } |
| 191 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 192 | static u32 dwapb_do_irq(struct dwapb_gpio *gpio) |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 193 | { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 194 | struct gpio_chip *gc = &gpio->ports[0].gc; |
Andy Shevchenko | 038aa1f | 2020-04-15 17:15:22 +0300 | [diff] [blame] | 195 | unsigned long irq_status; |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 196 | irq_hw_number_t hwirq; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 197 | |
Andy Shevchenko | 038aa1f | 2020-04-15 17:15:22 +0300 | [diff] [blame] | 198 | irq_status = dwapb_read(gpio, GPIO_INTSTATUS); |
Serge Semin | f9f890b | 2020-07-30 18:28:01 +0300 | [diff] [blame] | 199 | for_each_set_bit(hwirq, &irq_status, DWAPB_MAX_GPIOS) { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 200 | int gpio_irq = irq_find_mapping(gc->irq.domain, hwirq); |
Andy Shevchenko | 038aa1f | 2020-04-15 17:15:22 +0300 | [diff] [blame] | 201 | u32 irq_type = irq_get_trigger_type(gpio_irq); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 202 | |
| 203 | generic_handle_irq(gpio_irq); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 204 | |
Andy Shevchenko | 038aa1f | 2020-04-15 17:15:22 +0300 | [diff] [blame] | 205 | if ((irq_type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 206 | dwapb_toggle_trigger(gpio, hwirq); |
| 207 | } |
| 208 | |
Andy Shevchenko | 038aa1f | 2020-04-15 17:15:22 +0300 | [diff] [blame] | 209 | return irq_status; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 210 | } |
| 211 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 212 | static void dwapb_irq_handler(struct irq_desc *desc) |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 213 | { |
Jiang Liu | 476f8b4 | 2015-06-04 12:13:15 +0800 | [diff] [blame] | 214 | struct dwapb_gpio *gpio = irq_desc_get_handler_data(desc); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 215 | struct irq_chip *chip = irq_desc_get_chip(desc); |
| 216 | |
Andy Shevchenko | 9b0aef3 | 2020-04-15 17:15:23 +0300 | [diff] [blame] | 217 | chained_irq_enter(chip, desc); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 218 | dwapb_do_irq(gpio); |
Andy Shevchenko | 9b0aef3 | 2020-04-15 17:15:23 +0300 | [diff] [blame] | 219 | chained_irq_exit(chip, desc); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 220 | } |
| 221 | |
Serge Semin | 75c1236 | 2020-07-30 18:28:00 +0300 | [diff] [blame] | 222 | static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id) |
| 223 | { |
| 224 | return IRQ_RETVAL(dwapb_do_irq(dev_id)); |
| 225 | } |
| 226 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 227 | static void dwapb_irq_ack(struct irq_data *d) |
| 228 | { |
| 229 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 230 | struct dwapb_gpio *gpio = to_dwapb_gpio(gc); |
| 231 | u32 val = BIT(irqd_to_hwirq(d)); |
| 232 | unsigned long flags; |
| 233 | |
| 234 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
| 235 | dwapb_write(gpio, GPIO_PORTA_EOI, val); |
| 236 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
| 237 | } |
| 238 | |
| 239 | static void dwapb_irq_mask(struct irq_data *d) |
| 240 | { |
| 241 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 242 | struct dwapb_gpio *gpio = to_dwapb_gpio(gc); |
| 243 | unsigned long flags; |
| 244 | u32 val; |
| 245 | |
| 246 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
| 247 | val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d)); |
| 248 | dwapb_write(gpio, GPIO_INTMASK, val); |
| 249 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
| 250 | } |
| 251 | |
| 252 | static void dwapb_irq_unmask(struct irq_data *d) |
| 253 | { |
| 254 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 255 | struct dwapb_gpio *gpio = to_dwapb_gpio(gc); |
| 256 | unsigned long flags; |
| 257 | u32 val; |
| 258 | |
| 259 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
| 260 | val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d)); |
| 261 | dwapb_write(gpio, GPIO_INTMASK, val); |
| 262 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
| 263 | } |
| 264 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 265 | static void dwapb_irq_enable(struct irq_data *d) |
| 266 | { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 267 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 268 | struct dwapb_gpio *gpio = to_dwapb_gpio(gc); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 269 | unsigned long flags; |
| 270 | u32 val; |
| 271 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 272 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 273 | val = dwapb_read(gpio, GPIO_INTEN); |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 274 | val |= BIT(irqd_to_hwirq(d)); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 275 | dwapb_write(gpio, GPIO_INTEN, val); |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 276 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | static void dwapb_irq_disable(struct irq_data *d) |
| 280 | { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 281 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 282 | struct dwapb_gpio *gpio = to_dwapb_gpio(gc); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 283 | unsigned long flags; |
| 284 | u32 val; |
| 285 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 286 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 287 | val = dwapb_read(gpio, GPIO_INTEN); |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 288 | val &= ~BIT(irqd_to_hwirq(d)); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 289 | dwapb_write(gpio, GPIO_INTEN, val); |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 290 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 291 | } |
| 292 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 293 | static int dwapb_irq_set_type(struct irq_data *d, u32 type) |
| 294 | { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 295 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 296 | struct dwapb_gpio *gpio = to_dwapb_gpio(gc); |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 297 | irq_hw_number_t bit = irqd_to_hwirq(d); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 298 | unsigned long level, polarity, flags; |
| 299 | |
Andy Shevchenko | d31275a | 2020-04-15 17:15:28 +0300 | [diff] [blame] | 300 | if (type & ~IRQ_TYPE_SENSE_MASK) |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 301 | return -EINVAL; |
| 302 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 303 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 304 | level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); |
| 305 | polarity = dwapb_read(gpio, GPIO_INT_POLARITY); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 306 | |
| 307 | switch (type) { |
| 308 | case IRQ_TYPE_EDGE_BOTH: |
| 309 | level |= BIT(bit); |
| 310 | dwapb_toggle_trigger(gpio, bit); |
| 311 | break; |
| 312 | case IRQ_TYPE_EDGE_RISING: |
| 313 | level |= BIT(bit); |
| 314 | polarity |= BIT(bit); |
| 315 | break; |
| 316 | case IRQ_TYPE_EDGE_FALLING: |
| 317 | level |= BIT(bit); |
| 318 | polarity &= ~BIT(bit); |
| 319 | break; |
| 320 | case IRQ_TYPE_LEVEL_HIGH: |
| 321 | level &= ~BIT(bit); |
| 322 | polarity |= BIT(bit); |
| 323 | break; |
| 324 | case IRQ_TYPE_LEVEL_LOW: |
| 325 | level &= ~BIT(bit); |
| 326 | polarity &= ~BIT(bit); |
| 327 | break; |
| 328 | } |
| 329 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 330 | if (type & IRQ_TYPE_LEVEL_MASK) |
| 331 | irq_set_handler_locked(d, handle_level_irq); |
| 332 | else if (type & IRQ_TYPE_EDGE_BOTH) |
| 333 | irq_set_handler_locked(d, handle_edge_irq); |
Sebastian Andrzej Siewior | 6a2f4b7 | 2014-05-26 22:58:14 +0200 | [diff] [blame] | 334 | |
Weike Chen | 67809b9 | 2014-09-17 09:18:40 -0700 | [diff] [blame] | 335 | dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); |
Xiaoguang Chen | edadced | 2017-06-02 07:27:15 +0800 | [diff] [blame] | 336 | if (type != IRQ_TYPE_EDGE_BOTH) |
| 337 | dwapb_write(gpio, GPIO_INT_POLARITY, polarity); |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 338 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 339 | |
| 340 | return 0; |
| 341 | } |
| 342 | |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 343 | #ifdef CONFIG_PM_SLEEP |
| 344 | static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable) |
| 345 | { |
| 346 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
| 347 | struct dwapb_gpio *gpio = igc->private; |
| 348 | struct dwapb_context *ctx = gpio->ports[0].ctx; |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 349 | irq_hw_number_t bit = irqd_to_hwirq(d); |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 350 | |
| 351 | if (enable) |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 352 | ctx->wake_en |= BIT(bit); |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 353 | else |
Andy Shevchenko | e092bc5 | 2020-04-15 17:15:26 +0300 | [diff] [blame] | 354 | ctx->wake_en &= ~BIT(bit); |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 355 | |
| 356 | return 0; |
| 357 | } |
| 358 | #endif |
| 359 | |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 360 | static int dwapb_gpio_set_debounce(struct gpio_chip *gc, |
| 361 | unsigned offset, unsigned debounce) |
| 362 | { |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 363 | struct dwapb_gpio_port *port = gpiochip_get_data(gc); |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 364 | struct dwapb_gpio *gpio = port->gpio; |
| 365 | unsigned long flags, val_deb; |
Linus Walleij | d97a1b5 | 2017-10-20 12:26:51 +0200 | [diff] [blame] | 366 | unsigned long mask = BIT(offset); |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 367 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 368 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 369 | |
| 370 | val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); |
| 371 | if (debounce) |
Andy Shevchenko | 48ce805 | 2020-04-15 17:15:29 +0300 | [diff] [blame] | 372 | val_deb |= mask; |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 373 | else |
Andy Shevchenko | 48ce805 | 2020-04-15 17:15:29 +0300 | [diff] [blame] | 374 | val_deb &= ~mask; |
| 375 | dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb); |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 376 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 377 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 378 | |
| 379 | return 0; |
| 380 | } |
| 381 | |
Mika Westerberg | 2956b5d | 2017-01-23 15:34:34 +0300 | [diff] [blame] | 382 | static int dwapb_gpio_set_config(struct gpio_chip *gc, unsigned offset, |
| 383 | unsigned long config) |
| 384 | { |
| 385 | u32 debounce; |
| 386 | |
| 387 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) |
| 388 | return -ENOTSUPP; |
| 389 | |
| 390 | debounce = pinconf_to_config_argument(config); |
| 391 | return dwapb_gpio_set_debounce(gc, offset, debounce); |
| 392 | } |
| 393 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 394 | static int dwapb_convert_irqs(struct dwapb_gpio_port_irqchip *pirq, |
| 395 | struct dwapb_port_property *pp) |
| 396 | { |
| 397 | int i; |
| 398 | |
| 399 | /* Group all available IRQs into an array of parental IRQs. */ |
| 400 | for (i = 0; i < pp->ngpio; ++i) { |
| 401 | if (!pp->irq[i]) |
| 402 | continue; |
| 403 | |
| 404 | pirq->irq[pirq->nr_irqs++] = pp->irq[i]; |
| 405 | } |
| 406 | |
| 407 | return pirq->nr_irqs ? 0 : -ENOENT; |
| 408 | } |
| 409 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 410 | static void dwapb_configure_irqs(struct dwapb_gpio *gpio, |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 411 | struct dwapb_gpio_port *port, |
| 412 | struct dwapb_port_property *pp) |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 413 | { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 414 | struct dwapb_gpio_port_irqchip *pirq; |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 415 | struct gpio_chip *gc = &port->gc; |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 416 | struct gpio_irq_chip *girq; |
| 417 | int err; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 418 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 419 | pirq = devm_kzalloc(gpio->dev, sizeof(*pirq), GFP_KERNEL); |
| 420 | if (!pirq) |
| 421 | return; |
| 422 | |
| 423 | if (dwapb_convert_irqs(pirq, pp)) { |
Andy Shevchenko | 551cb86 | 2020-05-19 16:12:33 +0300 | [diff] [blame] | 424 | dev_warn(gpio->dev, "no IRQ for port%d\n", pp->idx); |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 425 | goto err_kfree_pirq; |
Andy Shevchenko | 551cb86 | 2020-05-19 16:12:33 +0300 | [diff] [blame] | 426 | } |
| 427 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 428 | girq = &gc->irq; |
| 429 | girq->handler = handle_bad_irq; |
| 430 | girq->default_type = IRQ_TYPE_NONE; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 431 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 432 | port->pirq = pirq; |
| 433 | pirq->irqchip.name = DWAPB_DRIVER_NAME; |
| 434 | pirq->irqchip.irq_ack = dwapb_irq_ack; |
| 435 | pirq->irqchip.irq_mask = dwapb_irq_mask; |
| 436 | pirq->irqchip.irq_unmask = dwapb_irq_unmask; |
| 437 | pirq->irqchip.irq_set_type = dwapb_irq_set_type; |
| 438 | pirq->irqchip.irq_enable = dwapb_irq_enable; |
| 439 | pirq->irqchip.irq_disable = dwapb_irq_disable; |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 440 | #ifdef CONFIG_PM_SLEEP |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 441 | pirq->irqchip.irq_set_wake = dwapb_irq_set_wake; |
Hoan Tran | 6437c7b | 2017-09-08 15:41:15 -0700 | [diff] [blame] | 442 | #endif |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 443 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 444 | if (!pp->irq_shared) { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 445 | girq->num_parents = pirq->nr_irqs; |
| 446 | girq->parents = pirq->irq; |
| 447 | girq->parent_handler_data = gpio; |
| 448 | girq->parent_handler = dwapb_irq_handler; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 449 | } else { |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 450 | /* This will let us handle the parent IRQ in the driver */ |
| 451 | girq->num_parents = 0; |
| 452 | girq->parents = NULL; |
| 453 | girq->parent_handler = NULL; |
| 454 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 455 | /* |
| 456 | * Request a shared IRQ since where MFD would have devices |
| 457 | * using the same irq pin |
| 458 | */ |
Phil Edworthy | e6ca26a | 2018-04-26 17:19:47 +0100 | [diff] [blame] | 459 | err = devm_request_irq(gpio->dev, pp->irq[0], |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 460 | dwapb_irq_handler_mfd, |
Andy Shevchenko | c58220c | 2020-04-15 17:15:21 +0300 | [diff] [blame] | 461 | IRQF_SHARED, DWAPB_DRIVER_NAME, gpio); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 462 | if (err) { |
| 463 | dev_err(gpio->dev, "error requesting IRQ\n"); |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 464 | goto err_kfree_pirq; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 465 | } |
| 466 | } |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 467 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 468 | girq->chip = &pirq->irqchip; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 469 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 470 | return; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 471 | |
Serge Semin | 0ea6839 | 2020-07-30 18:28:02 +0300 | [diff] [blame] | 472 | err_kfree_pirq: |
| 473 | devm_kfree(gpio->dev, pirq); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 474 | } |
| 475 | |
| 476 | static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 477 | struct dwapb_port_property *pp, |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 478 | unsigned int offs) |
| 479 | { |
| 480 | struct dwapb_gpio_port *port; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 481 | void __iomem *dat, *set, *dirout; |
| 482 | int err; |
| 483 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 484 | port = &gpio->ports[offs]; |
| 485 | port->gpio = gpio; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 486 | port->idx = pp->idx; |
| 487 | |
| 488 | #ifdef CONFIG_PM_SLEEP |
| 489 | port->ctx = devm_kzalloc(gpio->dev, sizeof(*port->ctx), GFP_KERNEL); |
| 490 | if (!port->ctx) |
| 491 | return -ENOMEM; |
| 492 | #endif |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 493 | |
Andy Shevchenko | 1475b62 | 2020-04-22 14:06:54 +0300 | [diff] [blame] | 494 | dat = gpio->regs + GPIO_EXT_PORTA + pp->idx * GPIO_EXT_PORT_STRIDE; |
| 495 | set = gpio->regs + GPIO_SWPORTA_DR + pp->idx * GPIO_SWPORT_DR_STRIDE; |
| 496 | dirout = gpio->regs + GPIO_SWPORTA_DDR + pp->idx * GPIO_SWPORT_DDR_STRIDE; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 497 | |
Linus Walleij | 62c1623 | 2018-02-08 18:00:05 +0100 | [diff] [blame] | 498 | /* This registers 32 GPIO lines per port */ |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 499 | err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, |
Linus Walleij | d97a1b5 | 2017-10-20 12:26:51 +0200 | [diff] [blame] | 500 | NULL, 0); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 501 | if (err) { |
Jiang Qiu | e815918 | 2016-04-28 17:32:01 +0800 | [diff] [blame] | 502 | dev_err(gpio->dev, "failed to init gpio chip for port%d\n", |
| 503 | port->idx); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 504 | return err; |
| 505 | } |
| 506 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 507 | #ifdef CONFIG_OF_GPIO |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 508 | port->gc.of_node = to_of_node(pp->fwnode); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 509 | #endif |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 510 | port->gc.ngpio = pp->ngpio; |
| 511 | port->gc.base = pp->gpio_base; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 512 | |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 513 | /* Only port A support debounce */ |
| 514 | if (pp->idx == 0) |
Mika Westerberg | 2956b5d | 2017-01-23 15:34:34 +0300 | [diff] [blame] | 515 | port->gc.set_config = dwapb_gpio_set_config; |
Weike Chen | 5d60d9e | 2014-09-17 09:18:41 -0700 | [diff] [blame] | 516 | |
Andy Shevchenko | 551cb86 | 2020-05-19 16:12:33 +0300 | [diff] [blame] | 517 | /* Only port A can provide interrupts in all configurations of the IP */ |
| 518 | if (pp->idx == 0) |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 519 | dwapb_configure_irqs(gpio, port, pp); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 520 | |
Serge Semin | feeaefd | 2020-07-30 18:28:07 +0300 | [diff] [blame] | 521 | err = devm_gpiochip_add_data(gpio->dev, &port->gc, port); |
Andy Shevchenko | 494a94e3 | 2020-05-19 16:12:30 +0300 | [diff] [blame] | 522 | if (err) { |
Jiang Qiu | e815918 | 2016-04-28 17:32:01 +0800 | [diff] [blame] | 523 | dev_err(gpio->dev, "failed to register gpiochip for port%d\n", |
| 524 | port->idx); |
Andy Shevchenko | 494a94e3 | 2020-05-19 16:12:30 +0300 | [diff] [blame] | 525 | return err; |
| 526 | } |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 527 | |
Andy Shevchenko | 494a94e3 | 2020-05-19 16:12:30 +0300 | [diff] [blame] | 528 | return 0; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 529 | } |
| 530 | |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 531 | static void dwapb_get_irq(struct device *dev, struct fwnode_handle *fwnode, |
| 532 | struct dwapb_port_property *pp) |
| 533 | { |
| 534 | struct device_node *np = NULL; |
Andy Shevchenko | aa90939 | 2020-05-19 16:12:32 +0300 | [diff] [blame] | 535 | int irq = -ENXIO, j; |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 536 | |
| 537 | if (fwnode_property_read_bool(fwnode, "interrupt-controller")) |
| 538 | np = to_of_node(fwnode); |
| 539 | |
| 540 | for (j = 0; j < pp->ngpio; j++) { |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 541 | if (np) |
Andy Shevchenko | aa90939 | 2020-05-19 16:12:32 +0300 | [diff] [blame] | 542 | irq = of_irq_get(np, j); |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 543 | else if (has_acpi_companion(dev)) |
Andy Shevchenko | aa90939 | 2020-05-19 16:12:32 +0300 | [diff] [blame] | 544 | irq = platform_get_irq_optional(to_platform_device(dev), j); |
| 545 | if (irq > 0) |
| 546 | pp->irq[j] = irq; |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 547 | } |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 548 | } |
| 549 | |
| 550 | static struct dwapb_platform_data *dwapb_gpio_get_pdata(struct device *dev) |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 551 | { |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 552 | struct fwnode_handle *fwnode; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 553 | struct dwapb_platform_data *pdata; |
| 554 | struct dwapb_port_property *pp; |
| 555 | int nports; |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 556 | int i; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 557 | |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 558 | nports = device_get_child_node_count(dev); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 559 | if (nports == 0) |
| 560 | return ERR_PTR(-ENODEV); |
| 561 | |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 562 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 563 | if (!pdata) |
| 564 | return ERR_PTR(-ENOMEM); |
| 565 | |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 566 | pdata->properties = devm_kcalloc(dev, nports, sizeof(*pp), GFP_KERNEL); |
| 567 | if (!pdata->properties) |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 568 | return ERR_PTR(-ENOMEM); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 569 | |
| 570 | pdata->nports = nports; |
| 571 | |
| 572 | i = 0; |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 573 | device_for_each_child_node(dev, fwnode) { |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 574 | pp = &pdata->properties[i++]; |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 575 | pp->fwnode = fwnode; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 576 | |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 577 | if (fwnode_property_read_u32(fwnode, "reg", &pp->idx) || |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 578 | pp->idx >= DWAPB_MAX_PORTS) { |
Jiang Qiu | e815918 | 2016-04-28 17:32:01 +0800 | [diff] [blame] | 579 | dev_err(dev, |
| 580 | "missing/invalid port index for port%d\n", i); |
Wei Yongjun | bfab7c8 | 2016-07-10 02:17:36 +0000 | [diff] [blame] | 581 | fwnode_handle_put(fwnode); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 582 | return ERR_PTR(-EINVAL); |
| 583 | } |
| 584 | |
Serge Semin | 7569486 | 2020-07-30 18:27:59 +0300 | [diff] [blame] | 585 | if (fwnode_property_read_u32(fwnode, "ngpios", &pp->ngpio) && |
| 586 | fwnode_property_read_u32(fwnode, "snps,nr-gpios", &pp->ngpio)) { |
Jiang Qiu | e815918 | 2016-04-28 17:32:01 +0800 | [diff] [blame] | 587 | dev_info(dev, |
| 588 | "failed to get number of gpios for port%d\n", |
| 589 | i); |
Serge Semin | f9f890b | 2020-07-30 18:28:01 +0300 | [diff] [blame] | 590 | pp->ngpio = DWAPB_MAX_GPIOS; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 591 | } |
| 592 | |
Phil Edworthy | da069d5 | 2018-05-23 09:52:44 +0100 | [diff] [blame] | 593 | pp->irq_shared = false; |
| 594 | pp->gpio_base = -1; |
| 595 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 596 | /* |
| 597 | * Only port A can provide interrupts in all configurations of |
| 598 | * the IP. |
| 599 | */ |
Andy Shevchenko | 4c2b54f | 2020-04-15 17:15:32 +0300 | [diff] [blame] | 600 | if (pp->idx == 0) |
| 601 | dwapb_get_irq(dev, fwnode, pp); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 602 | } |
| 603 | |
| 604 | return pdata; |
| 605 | } |
| 606 | |
Serge Semin | 4731d80 | 2020-07-30 18:28:05 +0300 | [diff] [blame] | 607 | static void dwapb_assert_reset(void *data) |
| 608 | { |
| 609 | struct dwapb_gpio *gpio = data; |
| 610 | |
| 611 | reset_control_assert(gpio->rst); |
| 612 | } |
| 613 | |
| 614 | static int dwapb_get_reset(struct dwapb_gpio *gpio) |
| 615 | { |
| 616 | int err; |
| 617 | |
| 618 | gpio->rst = devm_reset_control_get_optional_shared(gpio->dev, NULL); |
| 619 | if (IS_ERR(gpio->rst)) { |
| 620 | dev_err(gpio->dev, "Cannot get reset descriptor\n"); |
| 621 | return PTR_ERR(gpio->rst); |
| 622 | } |
| 623 | |
| 624 | err = reset_control_deassert(gpio->rst); |
| 625 | if (err) { |
| 626 | dev_err(gpio->dev, "Cannot deassert reset lane\n"); |
| 627 | return err; |
| 628 | } |
| 629 | |
| 630 | return devm_add_action_or_reset(gpio->dev, dwapb_assert_reset, gpio); |
| 631 | } |
| 632 | |
Serge Semin | daa3f58 | 2020-07-30 18:28:06 +0300 | [diff] [blame] | 633 | static void dwapb_disable_clks(void *data) |
| 634 | { |
| 635 | struct dwapb_gpio *gpio = data; |
| 636 | |
| 637 | clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks); |
| 638 | } |
| 639 | |
| 640 | static int dwapb_get_clks(struct dwapb_gpio *gpio) |
| 641 | { |
| 642 | int err; |
| 643 | |
| 644 | /* Optional bus and debounce clocks */ |
| 645 | gpio->clks[0].id = "bus"; |
| 646 | gpio->clks[1].id = "db"; |
| 647 | err = devm_clk_bulk_get_optional(gpio->dev, DWAPB_NR_CLOCKS, |
| 648 | gpio->clks); |
| 649 | if (err) { |
| 650 | dev_err(gpio->dev, "Cannot get APB/Debounce clocks\n"); |
| 651 | return err; |
| 652 | } |
| 653 | |
| 654 | err = clk_bulk_prepare_enable(DWAPB_NR_CLOCKS, gpio->clks); |
| 655 | if (err) { |
| 656 | dev_err(gpio->dev, "Cannot enable APB/Debounce clocks\n"); |
| 657 | return err; |
| 658 | } |
| 659 | |
| 660 | return devm_add_action_or_reset(gpio->dev, dwapb_disable_clks, gpio); |
| 661 | } |
| 662 | |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 663 | static const struct of_device_id dwapb_of_match[] = { |
| 664 | { .compatible = "snps,dw-apb-gpio", .data = (void *)0}, |
| 665 | { .compatible = "apm,xgene-gpio-v2", .data = (void *)GPIO_REG_OFFSET_V2}, |
| 666 | { /* Sentinel */ } |
| 667 | }; |
| 668 | MODULE_DEVICE_TABLE(of, dwapb_of_match); |
| 669 | |
| 670 | static const struct acpi_device_id dwapb_acpi_match[] = { |
| 671 | {"HISI0181", 0}, |
| 672 | {"APMC0D07", 0}, |
| 673 | {"APMC0D81", GPIO_REG_OFFSET_V2}, |
| 674 | { } |
| 675 | }; |
| 676 | MODULE_DEVICE_TABLE(acpi, dwapb_acpi_match); |
| 677 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 678 | static int dwapb_gpio_probe(struct platform_device *pdev) |
| 679 | { |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 680 | unsigned int i; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 681 | struct dwapb_gpio *gpio; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 682 | int err; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 683 | struct device *dev = &pdev->dev; |
| 684 | struct dwapb_platform_data *pdata = dev_get_platdata(dev); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 685 | |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 686 | if (!pdata) { |
Jiang Qiu | 4ba8cfa | 2016-04-28 17:32:02 +0800 | [diff] [blame] | 687 | pdata = dwapb_gpio_get_pdata(dev); |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 688 | if (IS_ERR(pdata)) |
| 689 | return PTR_ERR(pdata); |
| 690 | } |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 691 | |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 692 | if (!pdata->nports) |
| 693 | return -ENODEV; |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 694 | |
| 695 | gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 696 | if (!gpio) |
| 697 | return -ENOMEM; |
| 698 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 699 | gpio->dev = &pdev->dev; |
| 700 | gpio->nr_ports = pdata->nports; |
| 701 | |
Serge Semin | 4731d80 | 2020-07-30 18:28:05 +0300 | [diff] [blame] | 702 | err = dwapb_get_reset(gpio); |
| 703 | if (err) |
| 704 | return err; |
Alan Tull | 07901a9 | 2017-10-11 11:34:44 -0500 | [diff] [blame] | 705 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 706 | gpio->ports = devm_kcalloc(&pdev->dev, gpio->nr_ports, |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 707 | sizeof(*gpio->ports), GFP_KERNEL); |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 708 | if (!gpio->ports) |
| 709 | return -ENOMEM; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 710 | |
Enrico Weigelt, metux IT consult | 2a7194e | 2019-03-11 19:54:47 +0100 | [diff] [blame] | 711 | gpio->regs = devm_platform_ioremap_resource(pdev, 0); |
Axel Lin | da9df93 | 2014-12-28 15:23:14 +0800 | [diff] [blame] | 712 | if (IS_ERR(gpio->regs)) |
| 713 | return PTR_ERR(gpio->regs); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 714 | |
Serge Semin | daa3f58 | 2020-07-30 18:28:06 +0300 | [diff] [blame] | 715 | err = dwapb_get_clks(gpio); |
| 716 | if (err) |
Serge Semin | 5c544c9 | 2020-03-23 22:54:00 +0300 | [diff] [blame] | 717 | return err; |
Phil Edworthy | e6bf377 | 2018-03-12 18:30:56 +0000 | [diff] [blame] | 718 | |
Andy Shevchenko | 9826bbe | 2020-04-15 17:15:27 +0300 | [diff] [blame] | 719 | gpio->flags = (uintptr_t)device_get_match_data(dev); |
Hoan Tran | a72b8c4 | 2017-02-21 11:32:43 -0800 | [diff] [blame] | 720 | |
Weike Chen | 3d2613c | 2014-09-17 09:18:39 -0700 | [diff] [blame] | 721 | for (i = 0; i < gpio->nr_ports; i++) { |
| 722 | err = dwapb_gpio_add_port(gpio, &pdata->properties[i], i); |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 723 | if (err) |
Serge Semin | feeaefd | 2020-07-30 18:28:07 +0300 | [diff] [blame] | 724 | return err; |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 725 | } |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 726 | |
| 727 | return 0; |
| 728 | } |
| 729 | |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 730 | #ifdef CONFIG_PM_SLEEP |
| 731 | static int dwapb_gpio_suspend(struct device *dev) |
| 732 | { |
Wolfram Sang | deb19ac | 2018-10-21 21:59:56 +0200 | [diff] [blame] | 733 | struct dwapb_gpio *gpio = dev_get_drvdata(dev); |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 734 | struct gpio_chip *gc = &gpio->ports[0].gc; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 735 | unsigned long flags; |
| 736 | int i; |
| 737 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 738 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 739 | for (i = 0; i < gpio->nr_ports; i++) { |
| 740 | unsigned int offset; |
| 741 | unsigned int idx = gpio->ports[i].idx; |
| 742 | struct dwapb_context *ctx = gpio->ports[i].ctx; |
| 743 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 744 | offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_STRIDE; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 745 | ctx->dir = dwapb_read(gpio, offset); |
| 746 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 747 | offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_STRIDE; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 748 | ctx->data = dwapb_read(gpio, offset); |
| 749 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 750 | offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_STRIDE; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 751 | ctx->ext = dwapb_read(gpio, offset); |
| 752 | |
| 753 | /* Only port A can provide interrupts */ |
| 754 | if (idx == 0) { |
| 755 | ctx->int_mask = dwapb_read(gpio, GPIO_INTMASK); |
| 756 | ctx->int_en = dwapb_read(gpio, GPIO_INTEN); |
| 757 | ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY); |
| 758 | ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); |
| 759 | ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); |
| 760 | |
| 761 | /* Mask out interrupts */ |
Andy Shevchenko | 1afbc80 | 2020-04-22 14:06:53 +0300 | [diff] [blame] | 762 | dwapb_write(gpio, GPIO_INTMASK, ~ctx->wake_en); |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 763 | } |
| 764 | } |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 765 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 766 | |
Serge Semin | 5c544c9 | 2020-03-23 22:54:00 +0300 | [diff] [blame] | 767 | clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks); |
Phil Edworthy | e6bf377 | 2018-03-12 18:30:56 +0000 | [diff] [blame] | 768 | |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 769 | return 0; |
| 770 | } |
| 771 | |
| 772 | static int dwapb_gpio_resume(struct device *dev) |
| 773 | { |
Wolfram Sang | deb19ac | 2018-10-21 21:59:56 +0200 | [diff] [blame] | 774 | struct dwapb_gpio *gpio = dev_get_drvdata(dev); |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 775 | struct gpio_chip *gc = &gpio->ports[0].gc; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 776 | unsigned long flags; |
Serge Semin | 5c544c9 | 2020-03-23 22:54:00 +0300 | [diff] [blame] | 777 | int i, err; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 778 | |
Serge Semin | 5c544c9 | 2020-03-23 22:54:00 +0300 | [diff] [blame] | 779 | err = clk_bulk_prepare_enable(DWAPB_NR_CLOCKS, gpio->clks); |
| 780 | if (err) { |
| 781 | dev_err(gpio->dev, "Cannot reenable APB/Debounce clocks\n"); |
| 782 | return err; |
| 783 | } |
Phil Edworthy | e6bf377 | 2018-03-12 18:30:56 +0000 | [diff] [blame] | 784 | |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 785 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 786 | for (i = 0; i < gpio->nr_ports; i++) { |
| 787 | unsigned int offset; |
| 788 | unsigned int idx = gpio->ports[i].idx; |
| 789 | struct dwapb_context *ctx = gpio->ports[i].ctx; |
| 790 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 791 | offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_STRIDE; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 792 | dwapb_write(gpio, offset, ctx->data); |
| 793 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 794 | offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_STRIDE; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 795 | dwapb_write(gpio, offset, ctx->dir); |
| 796 | |
Linus Walleij | 89f99fe | 2018-02-08 17:03:58 +0100 | [diff] [blame] | 797 | offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_STRIDE; |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 798 | dwapb_write(gpio, offset, ctx->ext); |
| 799 | |
| 800 | /* Only port A can provide interrupts */ |
| 801 | if (idx == 0) { |
| 802 | dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type); |
| 803 | dwapb_write(gpio, GPIO_INT_POLARITY, ctx->int_pol); |
| 804 | dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb); |
| 805 | dwapb_write(gpio, GPIO_INTEN, ctx->int_en); |
| 806 | dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask); |
| 807 | |
| 808 | /* Clear out spurious interrupts */ |
| 809 | dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); |
| 810 | } |
| 811 | } |
Linus Walleij | 0f4630f | 2015-12-04 14:02:58 +0100 | [diff] [blame] | 812 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 813 | |
| 814 | return 0; |
| 815 | } |
| 816 | #endif |
| 817 | |
| 818 | static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend, |
| 819 | dwapb_gpio_resume); |
| 820 | |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 821 | static struct platform_driver dwapb_gpio_driver = { |
| 822 | .driver = { |
Andy Shevchenko | c58220c | 2020-04-15 17:15:21 +0300 | [diff] [blame] | 823 | .name = DWAPB_DRIVER_NAME, |
Weike Chen | 1e960db | 2014-09-17 09:18:42 -0700 | [diff] [blame] | 824 | .pm = &dwapb_gpio_pm_ops, |
Andy Shevchenko | c59042e | 2020-04-15 17:15:31 +0300 | [diff] [blame] | 825 | .of_match_table = dwapb_of_match, |
| 826 | .acpi_match_table = dwapb_acpi_match, |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 827 | }, |
| 828 | .probe = dwapb_gpio_probe, |
Jamie Iles | 7779b345 | 2014-02-25 17:01:01 -0600 | [diff] [blame] | 829 | }; |
| 830 | |
| 831 | module_platform_driver(dwapb_gpio_driver); |
| 832 | |
| 833 | MODULE_LICENSE("GPL"); |
| 834 | MODULE_AUTHOR("Jamie Iles"); |
| 835 | MODULE_DESCRIPTION("Synopsys DesignWare APB GPIO driver"); |
Andy Shevchenko | c58220c | 2020-04-15 17:15:21 +0300 | [diff] [blame] | 836 | MODULE_ALIAS("platform:" DWAPB_DRIVER_NAME); |