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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Chris Zankel8e1a6dd2005-06-23 22:01:10 -07002config XTENSA
Johannes Weiner35f9cd082009-03-04 16:21:28 +01003 def_bool y
Yury Norov942fa982018-05-16 11:18:49 +03004 select ARCH_32BIT_OFF_T
Christoph Hellwigaef0f782019-06-13 09:08:57 +02005 select ARCH_HAS_BINFMT_FLAT if !MMU
Christoph Hellwig0f665b92019-10-29 10:53:30 +01006 select ARCH_HAS_DMA_PREP_COHERENT if MMU
7 select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08009 select ARCH_HAS_DMA_SET_UNCACHED if MMU
Max Filippov579afe862019-01-01 14:08:32 -080010 select ARCH_USE_QUEUED_RWLOCKS
11 select ARCH_USE_QUEUED_SPINLOCKS
Max Filippov8f371c72013-04-15 09:21:35 +040012 select ARCH_WANT_FRAME_POINTERS
Max Filippove9691612013-01-06 16:17:21 +040013 select ARCH_WANT_IPC_PARSE_VERSION
Shile Zhang10916702019-12-04 08:46:31 +080014 select BUILDTIME_TABLE_SORT
Al Viro3e41f9b2012-10-26 23:41:40 -040015 select CLONE_BACKWARDS
Max Filippovbda89322014-01-29 06:20:46 +040016 select COMMON_CLK
Christoph Hellwigf0edfea2018-08-24 10:31:08 +020017 select DMA_REMAP if MMU
Max Filippov920f8a392014-06-16 08:20:17 +040018 select GENERIC_ATOMIC64
19 select GENERIC_CLOCKEVENTS
20 select GENERIC_IRQ_SHOW
21 select GENERIC_PCI_IOMAP
22 select GENERIC_SCHED_CLOCK
Max Filippov57358ba92017-12-17 14:43:15 -080023 select GENERIC_STRNCPY_FROM_USER if KASAN
Max Filippovef1a9352017-05-01 06:17:47 -070024 select HAVE_ARCH_AUDITSYSCALL
Max Filippov7af710d2017-01-03 17:57:51 -080025 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
26 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
Max Filippovda94a402019-11-13 20:47:17 -080027 select HAVE_ARCH_SECCOMP_FILTER
Max Filippov9f24f3c2018-11-09 15:45:53 -080028 select HAVE_ARCH_TRACEHOOK
Max Filippov0e46c112016-04-25 22:08:20 +030029 select HAVE_DEBUG_KMEMLEAK
Max Filippov9d2ffe52016-04-25 22:08:52 +030030 select HAVE_DMA_CONTIGUOUS
Jiri Slaby5f56a5d2016-05-20 17:00:16 -070031 select HAVE_EXIT_THREAD
Max Filippov920f8a392014-06-16 08:20:17 +040032 select HAVE_FUNCTION_TRACER
Max Filippovd951ba22015-09-30 15:17:35 +030033 select HAVE_FUTEX_CMPXCHG if !MMU
Max Filippovc91e02b2016-01-24 10:32:10 +030034 select HAVE_HW_BREAKPOINT if PERF_EVENTS
Max Filippov920f8a392014-06-16 08:20:17 +040035 select HAVE_IRQ_TIME_ACCOUNTING
36 select HAVE_OPROFILE
Christoph Hellwigeb01d422018-11-15 20:05:32 +010037 select HAVE_PCI
Max Filippov920f8a392014-06-16 08:20:17 +040038 select HAVE_PERF_EVENTS
Masahiro Yamadad148eac2018-06-14 19:36:45 +090039 select HAVE_STACKPROTECTOR
Max Filippovaf5395c2018-11-11 21:51:49 -080040 select HAVE_SYSCALL_TRACEPOINTS
Max Filippov920f8a392014-06-16 08:20:17 +040041 select IRQ_DOMAIN
42 select MODULES_USE_ELF_RELA
Max Filippovdb8165f2015-06-04 13:41:27 +030043 select PERF_USE_VMALLOC
Max Filippov920f8a392014-06-16 08:20:17 +040044 select VIRT_TO_BUS
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070045 help
46 Xtensa processors are 32-bit RISC machines designed by Tensilica
47 primarily for embedded systems. These processors are both
48 configurable and extensible. The Linux port to the Xtensa
49 architecture supports all processor configurations and extensions,
50 with reasonable minimum requirements. The Xtensa Linux project has
Masanari Iida0ada4492013-01-04 17:29:18 +090051 a home page at <http://www.linux-xtensa.org/>.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070052
Akinobu Mitad4337aa2006-03-26 01:39:43 -080053config GENERIC_HWEIGHT
Johannes Weiner35f9cd082009-03-04 16:21:28 +010054 def_bool y
Akinobu Mitad4337aa2006-03-26 01:39:43 -080055
David Howellsf0d1b0b2006-12-08 02:37:49 -080056config ARCH_HAS_ILOG2_U32
Johannes Weiner35f9cd082009-03-04 16:21:28 +010057 def_bool n
David Howellsf0d1b0b2006-12-08 02:37:49 -080058
59config ARCH_HAS_ILOG2_U64
Johannes Weiner35f9cd082009-03-04 16:21:28 +010060 def_bool n
David Howellsf0d1b0b2006-12-08 02:37:49 -080061
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070062config NO_IOPORT_MAP
Max Filippovd046f772012-09-17 05:44:41 +040063 def_bool n
Al Viro5ea81762007-02-11 15:41:31 +000064
H. Peter Anvinbdc80782008-02-08 04:21:26 -080065config HZ
66 int
67 default 100
68
Max Filippov8f371c72013-04-15 09:21:35 +040069config LOCKDEP_SUPPORT
70 def_bool y
71
Max Filippov3e4196a2013-04-15 09:20:48 +040072config STACKTRACE_SUPPORT
73 def_bool y
74
Max Filippovc92931b2013-03-31 06:32:42 +040075config TRACE_IRQFLAGS_SUPPORT
76 def_bool y
77
Johannes Weiner35f9cd082009-03-04 16:21:28 +010078config MMU
Max Filippovde7c1c72015-06-27 07:31:12 +030079 def_bool n
Johannes Weiner35f9cd082009-03-04 16:21:28 +010080
Baruch Siacha1a2bde2013-12-18 09:10:29 +020081config HAVE_XTENSA_GPIO32
82 def_bool n
83
Max Filippovc6335442017-12-03 13:28:52 -080084config KASAN_SHADOW_OFFSET
85 hex
86 default 0x6e400000
87
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070088menu "Processor type and features"
89
90choice
91 prompt "Xtensa Processor Configuration"
Chris Zankel173d6682006-12-10 02:18:48 -080092 default XTENSA_VARIANT_FSF
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070093
Chris Zankel173d6682006-12-10 02:18:48 -080094config XTENSA_VARIANT_FSF
Chris Zankel00254272008-10-21 09:11:43 -070095 bool "fsf - default (not generic) configuration"
Johannes Weiner35f9cd082009-03-04 16:21:28 +010096 select MMU
Chris Zankel00254272008-10-21 09:11:43 -070097
98config XTENSA_VARIANT_DC232B
99 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100100 select MMU
Baruch Siacha1a2bde2013-12-18 09:10:29 +0200101 select HAVE_XTENSA_GPIO32
Chris Zankel00254272008-10-21 09:11:43 -0700102 help
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100103 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
Johannes Weiner000af2c2009-03-04 16:21:32 +0100104
Pete Delaneyd0b73b42013-01-05 04:57:16 +0400105config XTENSA_VARIANT_DC233C
106 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
107 select MMU
Baruch Siacha1a2bde2013-12-18 09:10:29 +0200108 select HAVE_XTENSA_GPIO32
Pete Delaneyd0b73b42013-01-05 04:57:16 +0400109 help
110 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
111
Max Filippov420ae952014-06-16 07:25:06 +0400112config XTENSA_VARIANT_CUSTOM
113 bool "Custom Xtensa processor configuration"
Max Filippov420ae952014-06-16 07:25:06 +0400114 select HAVE_XTENSA_GPIO32
115 help
116 Select this variant to use a custom Xtensa processor configuration.
117 You will be prompted for a processor variant CORENAME.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700118endchoice
119
Max Filippov420ae952014-06-16 07:25:06 +0400120config XTENSA_VARIANT_CUSTOM_NAME
121 string "Xtensa Processor Custom Core Variant Name"
122 depends on XTENSA_VARIANT_CUSTOM
123 help
124 Provide the name of a custom Xtensa processor variant.
125 This CORENAME selects arch/xtensa/variant/CORENAME.
Hu Haowen70cbddb2020-03-30 12:54:36 +0800126 Don't forget you have to select MMU if you have one.
Max Filippov420ae952014-06-16 07:25:06 +0400127
128config XTENSA_VARIANT_NAME
129 string
130 default "dc232b" if XTENSA_VARIANT_DC232B
131 default "dc233c" if XTENSA_VARIANT_DC233C
132 default "fsf" if XTENSA_VARIANT_FSF
Max Filippov420ae952014-06-16 07:25:06 +0400133 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
134
135config XTENSA_VARIANT_MMU
136 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
137 depends on XTENSA_VARIANT_CUSTOM
138 default y
Max Filippovde7c1c72015-06-27 07:31:12 +0300139 select MMU
Max Filippov420ae952014-06-16 07:25:06 +0400140 help
141 Build a Conventional Kernel with full MMU support,
142 ie: it supports a TLB with auto-loading, page protection.
143
Max Filippov9bd46da2015-06-14 01:41:25 +0300144config XTENSA_VARIANT_HAVE_PERF_EVENTS
145 bool "Core variant has Performance Monitor Module"
146 depends on XTENSA_VARIANT_CUSTOM
147 default n
148 help
149 Enable if core variant has Performance Monitor Module with
150 External Registers Interface.
151
152 If unsure, say N.
153
Max Filippove4629192015-11-27 16:26:41 +0300154config XTENSA_FAKE_NMI
155 bool "Treat PMM IRQ as NMI"
156 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
157 default n
158 help
159 If PMM IRQ is the only IRQ at EXCM level it is safe to
160 treat it as NMI, which improves accuracy of profiling.
161
162 If there are other interrupts at or above PMM IRQ priority level
163 but not above the EXCM level, PMM IRQ still may be treated as NMI,
164 but only if these IRQs are not used. There will be a build warning
165 saying that this is not safe, and a bugcheck if one of these IRQs
166 actually fire.
167
168 If unsure, say N.
169
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700170config XTENSA_UNALIGNED_USER
Corentin Labbead33cc82019-01-18 13:45:27 +0000171 bool "Unaligned memory access in user space"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100172 help
173 The Xtensa architecture currently does not handle unaligned
174 memory accesses in hardware but through an exception handler.
175 Per default, unaligned memory accesses are disabled in user space.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700176
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100177 Say Y here to enable unaligned memory access in user space.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700178
Max Filippovf6151362013-10-17 02:42:26 +0400179config HAVE_SMP
180 bool "System Supports SMP (MX)"
Max Filippovde7c1c72015-06-27 07:31:12 +0300181 depends on XTENSA_VARIANT_CUSTOM
Max Filippovf6151362013-10-17 02:42:26 +0400182 select XTENSA_MX
183 help
Randy Dunlap58bc6c62020-01-31 17:59:26 -0800184 This option is used to indicate that the system-on-a-chip (SOC)
Max Filippovf6151362013-10-17 02:42:26 +0400185 supports Multiprocessing. Multiprocessor support implemented above
186 the CPU core definition and currently needs to be selected manually.
187
Randy Dunlap58bc6c62020-01-31 17:59:26 -0800188 Multiprocessor support is implemented with external cache and
Masanari Iida769a12a2015-04-27 22:52:07 +0900189 interrupt controllers.
Max Filippovf6151362013-10-17 02:42:26 +0400190
191 The MX interrupt distributer adds Interprocessor Interrupts
192 and causes the IRQ numbers to be increased by 4 for devices
193 like the open cores ethernet driver and the serial interface.
194
195 You still have to select "Enable SMP" to enable SMP on this SOC.
196
197config SMP
198 bool "Enable Symmetric multi-processing support"
199 depends on HAVE_SMP
Max Filippovf6151362013-10-17 02:42:26 +0400200 select GENERIC_SMP_IDLE_THREAD
201 help
202 Enabled SMP Software; allows more than one CPU/CORE
203 to be activated during startup.
204
205config NR_CPUS
206 depends on SMP
207 int "Maximum number of CPUs (2-32)"
208 range 2 32
209 default "4"
210
Max Filippov49b424f2013-10-17 02:42:28 +0400211config HOTPLUG_CPU
212 bool "Enable CPU hotplug support"
213 depends on SMP
214 help
215 Say Y here to allow turning CPUs off and on. CPUs can be
216 controlled through /sys/devices/system/cpu.
217
218 Say N if you want to disable CPU hotplug.
219
Max Filippov91842892014-08-07 03:32:30 +0400220config FAST_SYSCALL_XTENSA
221 bool "Enable fast atomic syscalls"
222 default n
223 help
224 fast_syscall_xtensa is a syscall that can make atomic operations
225 on UP kernel when processor has no s32c1i support.
226
227 This syscall is deprecated. It may have issues when called with
228 invalid arguments. It is provided only for backwards compatibility.
229 Only enable it if your userspace software requires it.
230
231 If unsure, say N.
232
233config FAST_SYSCALL_SPILL_REGISTERS
234 bool "Enable spill registers syscall"
235 default n
236 help
237 fast_syscall_spill_registers is a syscall that spills all active
238 register windows of a calling userspace task onto its stack.
239
240 This syscall is deprecated. It may have issues when called with
241 invalid arguments. It is provided only for backwards compatibility.
242 Only enable it if your userspace software requires it.
243
244 If unsure, say N.
245
Max Filippov09f8a6d2015-01-12 09:44:44 +0300246config USER_ABI_CALL0
247 bool
248
249choice
250 prompt "Userspace ABI"
251 default USER_ABI_DEFAULT
252 help
253 Select supported userspace ABI.
254
255 If unsure, choose the default ABI.
256
257config USER_ABI_DEFAULT
258 bool "Default ABI only"
259 help
260 Assume default userspace ABI. For XEA2 cores it is windowed ABI.
261 call0 ABI binaries may be run on such kernel, but signal delivery
262 will not work correctly for them.
263
264config USER_ABI_CALL0_ONLY
265 bool "Call0 ABI only"
266 select USER_ABI_CALL0
267 help
268 Select this option to support only call0 ABI in userspace.
269 Windowed ABI binaries will crash with a segfault caused by
270 an illegal instruction exception on the first 'entry' opcode.
271
272 Choose this option if you're planning to run only user code
273 built with call0 ABI.
274
275config USER_ABI_CALL0_PROBE
276 bool "Support both windowed and call0 ABI by probing"
277 select USER_ABI_CALL0
278 help
279 Select this option to support both windowed and call0 userspace
280 ABIs. When enabled all processes are started with PS.WOE disabled
281 and a fast user exception handler for an illegal instruction is
282 used to turn on PS.WOE bit on the first 'entry' opcode executed by
283 the userspace.
284
285 This option should be enabled for the kernel that must support
286 both call0 and windowed ABIs in userspace at the same time.
287
288 Note that Xtensa ISA does not guarantee that entry opcode will
289 raise an illegal instruction exception on cores with XEA2 when
290 PS.WOE is disabled, check whether the target core supports it.
291
292endchoice
293
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700294endmenu
295
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100296config XTENSA_CALIBRATE_CCOUNT
297 def_bool n
298 help
299 On some platforms (XT2000, for example), the CPU clock rate can
300 vary. The frequency can be determined, however, by measuring
301 against a well known, fixed frequency, such as an UART oscillator.
302
303config SERIAL_CONSOLE
304 def_bool n
305
Max Filippov7af710d2017-01-03 17:57:51 -0800306config PLATFORM_HAVE_XIP
307 def_bool n
308
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700309menu "Platform options"
310
311choice
312 prompt "Xtensa System Type"
313 default XTENSA_PLATFORM_ISS
314
315config XTENSA_PLATFORM_ISS
316 bool "ISS"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100317 select XTENSA_CALIBRATE_CCOUNT
318 select SERIAL_CONSOLE
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700319 help
320 ISS is an acronym for Tensilica's Instruction Set Simulator.
321
322config XTENSA_PLATFORM_XT2000
323 bool "XT2000"
Max Filippov49645272014-06-16 08:25:43 +0400324 select HAVE_IDE
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700325 help
326 XT2000 is the name of Tensilica's feature-rich emulation platform.
327 This hardware is capable of running a full Linux distribution.
328
Max Filippov0d456bad2012-11-05 07:37:14 +0400329config XTENSA_PLATFORM_XTFPGA
330 bool "XTFPGA"
Max Filippov61e47e92014-10-04 04:44:04 +0400331 select ETHOC if ETHERNET
Max Filippov3de00482016-07-23 02:47:58 +0300332 select PLATFORM_WANT_DEFAULT_MEM if !MMU
Max Filippov0d456bad2012-11-05 07:37:14 +0400333 select SERIAL_CONSOLE
Max Filippov0d456bad2012-11-05 07:37:14 +0400334 select XTENSA_CALIBRATE_CCOUNT
Max Filippov7af710d2017-01-03 17:57:51 -0800335 select PLATFORM_HAVE_XIP
Max Filippov0d456bad2012-11-05 07:37:14 +0400336 help
337 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
338 This hardware is capable of running a full Linux distribution.
339
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700340endchoice
341
Max Filippov994fa1c2018-08-13 18:11:38 -0700342config PLATFORM_NR_IRQS
343 int
344 default 3 if XTENSA_PLATFORM_XT2000
345 default 0
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700346
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700347config XTENSA_CPU_CLOCK
348 int "CPU clock rate [MHz]"
349 depends on !XTENSA_CALIBRATE_CCOUNT
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100350 default 16
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700351
352config GENERIC_CALIBRATE_DELAY
353 bool "Auto calibration of the BogoMIPS value"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100354 help
Chris Zankel82300bf2005-06-30 02:58:58 -0700355 The BogoMIPS value can easily be derived from the CPU frequency.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700356
357config CMDLINE_BOOL
358 bool "Default bootloader kernel arguments"
359
360config CMDLINE
361 string "Initial kernel command string"
362 depends on CMDLINE_BOOL
363 default "console=ttyS0,38400 root=/dev/ram"
364 help
365 On some architectures (EBSA110 and CATS), there is currently no way
366 for the boot loader to pass arguments to the kernel. For these
367 architectures, you should supply some command-line options at build
368 time by entering them here. As a minimum, you should specify the
369 memory size and the root device (e.g., mem=64M root=/dev/nfs).
370
Max Filippovda844a82012-11-04 00:30:13 +0400371config USE_OF
372 bool "Flattened Device Tree support"
373 select OF
374 select OF_EARLY_FLATTREE
375 help
376 Include support for flattened device tree machine descriptions.
377
Corentin Labbe687cffd2019-01-23 09:49:18 +0000378config BUILTIN_DTB_SOURCE
Max Filippovda844a82012-11-04 00:30:13 +0400379 string "DTB to build into the kernel image"
380 depends on OF
381
Max Filippovbaac1d362018-08-13 18:56:37 -0700382config PARSE_BOOTPARAM
383 bool "Parse bootparam block"
384 default y
385 help
386 Parse parameters passed to the kernel from the bootloader. It may
387 be disabled if the kernel is known to run without the bootloader.
388
389 If unsure, say Y.
390
Victor Prupisb6c7e872008-05-19 14:50:38 -0700391config BLK_DEV_SIMDISK
392 tristate "Host file-based simulated block device support"
393 default n
Max Filippov7a0684c2014-08-27 14:54:48 +0400394 depends on XTENSA_PLATFORM_ISS && BLOCK
Victor Prupisb6c7e872008-05-19 14:50:38 -0700395 help
396 Create block devices that map to files in the host file system.
397 Device binding to host file may be changed at runtime via proc
398 interface provided the device is not in use.
399
400config BLK_DEV_SIMDISK_COUNT
401 int "Number of host file-based simulated block devices"
402 range 1 10
403 depends on BLK_DEV_SIMDISK
404 default 2
405 help
406 This is the default minimal number of created block devices.
407 Kernel/module parameter 'simdisk_count' may be used to change this
408 value at runtime. More file names (but no more than 10) may be
409 specified as parameters, simdisk_count grows accordingly.
410
411config SIMDISK0_FILENAME
412 string "Host filename for the first simulated device"
413 depends on BLK_DEV_SIMDISK = y
414 default ""
415 help
416 Attach a first simdisk to a host file. Conventionally, this file
417 contains a root file system.
418
419config SIMDISK1_FILENAME
420 string "Host filename for the second simulated device"
421 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
422 default ""
423 help
424 Another simulated disk in a host file for a buildroot-independent
425 storage.
426
Max Filippov49490092015-02-27 06:28:00 +0300427config XTFPGA_LCD
428 bool "Enable XTFPGA LCD driver"
429 depends on XTENSA_PLATFORM_XTFPGA
430 default n
431 help
432 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
433 progress messages there during bootup/shutdown. It may be useful
434 during board bringup.
435
436 If unsure, say N.
437
438config XTFPGA_LCD_BASE_ADDR
439 hex "XTFPGA LCD base address"
440 depends on XTFPGA_LCD
441 default "0x0d0c0000"
442 help
443 Base address of the LCD controller inside KIO region.
444 Different boards from XTFPGA family have LCD controller at different
445 addresses. Please consult prototyping user guide for your board for
446 the correct address. Wrong address here may lead to hardware lockup.
447
448config XTFPGA_LCD_8BIT_ACCESS
449 bool "Use 8-bit access to XTFPGA LCD"
450 depends on XTFPGA_LCD
451 default n
452 help
453 LCD may be connected with 4- or 8-bit interface, 8-bit access may
454 only be used with 8-bit interface. Please consult prototyping user
455 guide for your board for the correct interface width.
456
Max Filippov76743c02019-10-01 00:25:30 -0700457comment "Kernel memory layout"
458
459config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
460 bool "Initialize Xtensa MMU inside the Linux kernel code"
461 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
462 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
463 help
464 Earlier version initialized the MMU in the exception vector
465 before jumping to _startup in head.S and had an advantage that
466 it was possible to place a software breakpoint at 'reset' and
467 then enter your normal kernel breakpoints once the MMU was mapped
468 to the kernel mappings (0XC0000000).
469
470 This unfortunately won't work for U-Boot and likely also wont
471 work for using KEXEC to have a hot kernel ready for doing a
472 KDUMP.
473
474 So now the MMU is initialized in head.S but it's necessary to
475 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
476 xt-gdb can't place a Software Breakpoint in the 0XD region prior
477 to mapping the MMU and after mapping even if the area of low memory
478 was mapped gdb wouldn't remove the breakpoint on hitting it as the
479 PC wouldn't match. Since Hardware Breakpoints are recommended for
480 Linux configurations it seems reasonable to just assume they exist
481 and leave this older mechanism for unfortunate souls that choose
482 not to follow Tensilica's recommendation.
483
484 Selecting this will cause U-Boot to set the KERNEL Load and Entry
485 address at 0x00003000 instead of the mapped std of 0xD0003000.
486
487 If in doubt, say Y.
488
Max Filippov7af710d2017-01-03 17:57:51 -0800489config XIP_KERNEL
490 bool "Kernel Execute-In-Place from ROM"
491 depends on PLATFORM_HAVE_XIP
492 help
493 Execute-In-Place allows the kernel to run from non-volatile storage
494 directly addressable by the CPU, such as NOR flash. This saves RAM
495 space since the text section of the kernel is not loaded from flash
496 to RAM. Read-write sections, such as the data section and stack,
497 are still copied to RAM. The XIP kernel is not compressed since
498 it has to run directly from flash, so it will take more space to
499 store it. The flash address used to link the kernel object files,
500 and for storing it, is configuration dependent. Therefore, if you
501 say Y here, you must know the proper physical address where to
502 store the kernel image depending on your own flash memory usage.
503
504 Also note that the make target becomes "make xipImage" rather than
505 "make Image" or "make uImage". The final kernel binary to put in
506 ROM memory will be arch/xtensa/boot/xipImage.
507
508 If unsure, say N.
509
Max Filippov76743c02019-10-01 00:25:30 -0700510config MEMMAP_CACHEATTR
511 hex "Cache attributes for the memory address space"
512 depends on !MMU
513 default 0x22222222
514 help
515 These cache attributes are set up for noMMU systems. Each hex digit
516 specifies cache attributes for the corresponding 512MB memory
517 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
518 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
519
520 Cache attribute values are specific for the MMU type.
521 For region protection MMUs:
522 1: WT cached,
523 2: cache bypass,
524 4: WB cached,
525 f: illegal.
Randy Dunlap2a9b29b2020-08-29 22:57:51 -0700526 For full MMU:
Max Filippov76743c02019-10-01 00:25:30 -0700527 bit 0: executable,
528 bit 1: writable,
529 bits 2..3:
530 0: cache bypass,
531 1: WB cache,
532 2: WT cache,
533 3: special (c and e are illegal, f is reserved).
534 For MPU:
535 0: illegal,
536 1: WB cache,
537 2: WB, no-write-allocate cache,
538 3: WT cache,
539 4: cache bypass.
540
541config KSEG_PADDR
542 hex "Physical address of the KSEG mapping"
543 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
544 default 0x00000000
545 help
546 This is the physical address where KSEG is mapped. Please refer to
547 the chosen KSEG layout help for the required address alignment.
548 Unpacked kernel image (including vectors) must be located completely
549 within KSEG.
550 Physical memory below this address is not available to linux.
551
552 If unsure, leave the default value here.
553
Max Filippov7af710d2017-01-03 17:57:51 -0800554config KERNEL_VIRTUAL_ADDRESS
555 hex "Kernel virtual address"
556 depends on MMU && XIP_KERNEL
557 default 0xd0003000
558 help
559 This is the virtual address where the XIP kernel is mapped.
560 XIP kernel may be mapped into KSEG or KIO region, virtual address
561 provided here must match kernel load address provided in
562 KERNEL_LOAD_ADDRESS.
563
Max Filippov76743c02019-10-01 00:25:30 -0700564config KERNEL_LOAD_ADDRESS
565 hex "Kernel load address"
566 default 0x60003000 if !MMU
567 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
568 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
569 help
570 This is the address where the kernel is loaded.
571 It is virtual address for MMUv2 configurations and physical address
572 for all other configurations.
573
574 If unsure, leave the default value here.
575
Max Filippov5e4417f2020-01-31 20:11:24 -0800576choice
577 prompt "Relocatable vectors location"
578 default XTENSA_VECTORS_IN_TEXT
Max Filippov76743c02019-10-01 00:25:30 -0700579 help
Max Filippov5e4417f2020-01-31 20:11:24 -0800580 Choose whether relocatable vectors are merged into the kernel .text
581 or placed separately at runtime. This option does not affect
582 configurations without VECBASE register where vectors are always
583 placed at their hardware-defined locations.
Max Filippov76743c02019-10-01 00:25:30 -0700584
Max Filippov5e4417f2020-01-31 20:11:24 -0800585config XTENSA_VECTORS_IN_TEXT
586 bool "Merge relocatable vectors into kernel text"
587 depends on !MTD_XIP
588 help
589 This option puts relocatable vectors into the kernel .text section
590 with proper alignment.
591 This is a safe choice for most configurations.
592
593config XTENSA_VECTORS_SEPARATE
594 bool "Put relocatable vectors at fixed address"
595 help
596 This option puts relocatable vectors at specific virtual address.
597 Vectors are merged with the .init data in the kernel image and
598 are copied into their designated location during kernel startup.
599 Use it to put vectors into IRAM or out of FLASH on kernels with
600 XIP-aware MTD support.
601
602endchoice
603
604config VECTORS_ADDR
605 hex "Kernel vectors virtual address"
606 default 0x00000000
607 depends on XTENSA_VECTORS_SEPARATE
608 help
609 This is the virtual address of the (relocatable) vectors base.
610 It must be within KSEG if MMU is used.
Max Filippov76743c02019-10-01 00:25:30 -0700611
Max Filippov7af710d2017-01-03 17:57:51 -0800612config XIP_DATA_ADDR
613 hex "XIP kernel data virtual address"
614 depends on XIP_KERNEL
615 default 0x00000000
616 help
617 This is the virtual address where XIP kernel data is copied.
618 It must be within KSEG if MMU is used.
619
Max Filippov76743c02019-10-01 00:25:30 -0700620config PLATFORM_WANT_DEFAULT_MEM
621 def_bool n
622
623config DEFAULT_MEM_START
624 hex
625 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
626 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
627 default 0x00000000
628 help
629 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
630 in noMMU configurations.
631
632 If unsure, leave the default value here.
633
634choice
635 prompt "KSEG layout"
636 depends on MMU
637 default XTENSA_KSEG_MMU_V2
638
639config XTENSA_KSEG_MMU_V2
640 bool "MMUv2: 128MB cached + 128MB uncached"
641 help
642 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
643 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
644 without cache.
645 KSEG_PADDR must be aligned to 128MB.
646
647config XTENSA_KSEG_256M
648 bool "256MB cached + 256MB uncached"
649 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
650 help
651 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
652 with cache and to 0xc0000000 without cache.
653 KSEG_PADDR must be aligned to 256MB.
654
655config XTENSA_KSEG_512M
656 bool "512MB cached + 512MB uncached"
657 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
658 help
659 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
660 with cache and to 0xc0000000 without cache.
661 KSEG_PADDR must be aligned to 256MB.
662
663endchoice
664
665config HIGHMEM
666 bool "High Memory Support"
667 depends on MMU
668 help
669 Linux can use the full amount of RAM in the system by
670 default. However, the default MMUv2 setup only maps the
671 lowermost 128 MB of memory linearly to the areas starting
672 at 0xd0000000 (cached) and 0xd8000000 (uncached).
673 When there are more than 128 MB memory in the system not
674 all of it can be "permanently mapped" by the kernel.
675 The physical memory that's not permanently mapped is called
676 "high memory".
677
678 If you are compiling a kernel which will never run on a
679 machine with more than 128 MB total physical RAM, answer
680 N here.
681
682 If unsure, say Y.
683
684config FORCE_MAX_ZONEORDER
685 int "Maximum zone order"
686 default "11"
687 help
688 The kernel memory allocator divides physically contiguous memory
689 blocks into "zones", where each zone is a power of two number of
690 pages. This option selects the largest power of two that the kernel
691 keeps in the memory allocator. If you need to allocate very large
692 blocks of physically contiguous memory, then you may need to
693 increase this value.
694
695 This config option is actually maximum order plus one. For example,
696 a value of 11 means that the largest free memory block is 2^10 pages.
697
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700698endmenu
699
Max Filippove00d8b22014-10-29 01:42:01 +0300700menu "Power management options"
701
702source "kernel/power/Kconfig"
703
704endmenu