Dinh Nguyen | 8972794 | 2018-03-21 09:20:10 -0500 | [diff] [blame] | 1 | Device Tree Clock bindings for Intel's SoCFPGA Stratix10 platform |
| 2 | |
| 3 | This binding uses the common clock binding[1]. |
| 4 | |
| 5 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 6 | |
| 7 | Required properties: |
| 8 | - compatible : shall be |
| 9 | "intel,stratix10-clkmgr" |
| 10 | |
| 11 | - reg : shall be the control register offset from CLOCK_MANAGER's base for the clock. |
| 12 | |
| 13 | - #clock-cells : from common clock binding, shall be set to 1. |
| 14 | |
| 15 | Example: |
| 16 | clkmgr: clock-controller@ffd10000 { |
| 17 | compatible = "intel,stratix10-clkmgr"; |
| 18 | reg = <0xffd10000 0x1000>; |
| 19 | #clock-cells = <1>; |
| 20 | }; |