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Mark Browncf763c22011-11-22 18:22:29 +00001WM1811/WM8994/WM8958 audio CODEC
2
3These devices support both I2C and SPI (configured with pin strapping
4on the board).
5
6Required properties:
7
Mark Brown20fb2772013-04-11 18:11:51 +01008 - compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958".
Mark Browncf763c22011-11-22 18:22:29 +00009
10 - reg : the I2C address of the device for I2C, the chip select
11 number for SPI.
12
Mark Brown20fb2772013-04-11 18:11:51 +010013 - gpio-controller : Indicates this device is a GPIO controller.
14 - #gpio-cells : Must be 2. The first cell is the pin number and the
15 second cell is used to specify optional parameters (currently unused).
16
17 - AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply,
18 SPKVDD1-supply, SPKVDD2-supply : power supplies for the device, as covered
19 in Documentation/devicetree/bindings/regulator/regulator.txt
20
21Optional properties:
22
23 - interrupts : The interrupt line the IRQ signal for the device is
24 connected to. This is optional, if it is not connected then none
25 of the interrupt related properties should be specified.
26 - interrupt-controller : These devices contain interrupt controllers
27 and may provide interrupt services to other devices if they have an
28 interrupt line connected.
Mark Brown20fb2772013-04-11 18:11:51 +010029 - #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
30 The first cell is the IRQ number.
31 The second cell is the flags, encoded as the trigger masks from
Andrew F. Davis51669f82015-09-21 11:25:40 -050032 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
Mark Brown20fb2772013-04-11 18:11:51 +010033
Mark Brown087ee092013-07-25 15:29:49 +010034 - clocks : A list of up to two phandle and clock specifier pairs
35 - clock-names : A list of clock names sorted in the same order as clocks.
36 Valid clock names are "MCLK1" and "MCLK2".
37
Mark Brown20fb2772013-04-11 18:11:51 +010038 - wlf,gpio-cfg : A list of GPIO configuration register values. If absent,
39 no configuration of these registers is performed. If any value is
40 over 0xffff then the register will be left as default. If present 11
41 values must be supplied.
42
43 - wlf,micbias-cfg : Two MICBIAS register values for WM1811 or
44 WM8958. If absent the register defaults will be used.
45
46 - wlf,ldo1ena : GPIO specifier for control of LDO1ENA input to device.
47 - wlf,ldo2ena : GPIO specifier for control of LDO2ENA input to device.
48
49 - wlf,lineout1-se : If present LINEOUT1 is in single ended mode.
50 - wlf,lineout2-se : If present LINEOUT2 is in single ended mode.
51
52 - wlf,lineout1-feedback : If present LINEOUT1 has common mode feedback
53 connected.
54 - wlf,lineout2-feedback : If present LINEOUT2 has common mode feedback
55 connected.
56
57 - wlf,ldoena-always-driven : If present LDOENA is always driven.
58
Anthony Brandon2d4bc572018-07-09 19:46:43 +020059 - wlf,spkmode-pu : If present enable the internal pull-up resistor on
60 the SPKMODE pin.
61
Anthony Brandon3a6372d2018-07-09 19:46:45 +020062 - wlf,csnaddr-pd : If present enable the internal pull-down resistor on
63 the CS/ADDR pin.
64
Mark Browncf763c22011-11-22 18:22:29 +000065Example:
66
Fabio Estevam34f58972018-05-20 09:53:41 -030067wm8994: codec@1a {
Mark Browncf763c22011-11-22 18:22:29 +000068 compatible = "wlf,wm8994";
69 reg = <0x1a>;
Mark Brown20fb2772013-04-11 18:11:51 +010070
71 gpio-controller;
72 #gpio-cells = <2>;
73
74 lineout1-se;
75
76 AVDD2-supply = <&regulator>;
77 CPVDD-supply = <&regulator>;
78 DBVDD1-supply = <&regulator>;
79 DBVDD2-supply = <&regulator>;
80 DBVDD3-supply = <&regulator>;
81 SPKVDD1-supply = <&regulator>;
82 SPKVDD2-supply = <&regulator>;
Mark Browncf763c22011-11-22 18:22:29 +000083};