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Nishad Kamdarddd3e8b2019-05-01 12:37:11 +05301/* SPDX-License-Identifier: GPL-2.0+ */
Manivannan Sadhasivam3495e292018-03-26 23:08:57 +05302//
3// OWL common clock driver
4//
5// Copyright (c) 2014 Actions Semi Inc.
6// Author: David Liu <liuwei@actions-semi.com>
7//
8// Copyright (c) 2018 Linaro Ltd.
9// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
10
11#ifndef _OWL_COMMON_H_
12#define _OWL_COMMON_H_
13
14#include <linux/clk-provider.h>
Manivannan Sadhasivam3495e292018-03-26 23:08:57 +053015#include <linux/regmap.h>
16
17struct device_node;
Rob Herringa96cbb12023-07-18 08:31:43 -060018struct platform_device;
Manivannan Sadhasivam3495e292018-03-26 23:08:57 +053019
20struct owl_clk_common {
21 struct regmap *regmap;
22 struct clk_hw hw;
23};
24
25struct owl_clk_desc {
26 struct owl_clk_common **clks;
27 unsigned long num_clks;
28 struct clk_hw_onecell_data *hw_clks;
Manivannan Sadhasivam09dbde02018-08-10 15:21:11 +053029 const struct owl_reset_map *resets;
30 unsigned long num_resets;
Manivannan Sadhasivam3a23eb72018-08-10 15:21:05 +053031 struct regmap *regmap;
Manivannan Sadhasivam3495e292018-03-26 23:08:57 +053032};
33
34static inline struct owl_clk_common *
35 hw_to_owl_clk_common(const struct clk_hw *hw)
36{
37 return container_of(hw, struct owl_clk_common, hw);
38}
39
40int owl_clk_regmap_init(struct platform_device *pdev,
Manivannan Sadhasivam3a23eb72018-08-10 15:21:05 +053041 struct owl_clk_desc *desc);
Manivannan Sadhasivam3495e292018-03-26 23:08:57 +053042int owl_clk_probe(struct device *dev, struct clk_hw_onecell_data *hw_clks);
43
44#endif /* _OWL_COMMON_H_ */