blob: f4adba2d1dd3e6671b08c3a3ccb156a841829dfa [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * probe.c - PCI detection and setup code
3 */
4
5#include <linux/kernel.h>
6#include <linux/delay.h>
7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/cpumask.h>
Shaohua Li7d715a62008-02-25 09:46:41 +080012#include <linux/pci-aspm.h>
Greg KHbc56b9e2005-04-08 14:53:31 +090013#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
16#define CARDBUS_RESERVE_BUSNR 3
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
18/* Ugh. Need to stop exporting this to modules. */
19LIST_HEAD(pci_root_buses);
20EXPORT_SYMBOL(pci_root_buses);
21
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080022
23static int find_anything(struct device *dev, void *data)
24{
25 return 1;
26}
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070028/*
29 * Some device drivers need know if pci is initiated.
30 * Basically, we think pci is not initiated when there
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080031 * is no device to be found on the pci_bus_type.
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070032 */
33int no_pci_devices(void)
34{
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080035 struct device *dev;
36 int no_devices;
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070037
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080038 dev = bus_find_device(&pci_bus_type, NULL, NULL, find_anything);
39 no_devices = (dev == NULL);
40 put_device(dev);
41 return no_devices;
42}
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070043EXPORT_SYMBOL(no_pci_devices);
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045/*
46 * PCI Bus Class Devices
47 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040048static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
Mike Travis39106dc2008-04-08 11:43:03 -070049 int type,
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040050 struct device_attribute *attr,
Alan Cox4327edf2005-09-10 00:25:49 -070051 char *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -070052{
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 int ret;
Mike Travis588235bb532009-01-04 05:18:02 -080054 const struct cpumask *cpumask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Mike Travis588235bb532009-01-04 05:18:02 -080056 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
Mike Travis39106dc2008-04-08 11:43:03 -070057 ret = type?
Mike Travis588235bb532009-01-04 05:18:02 -080058 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
59 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
Mike Travis39106dc2008-04-08 11:43:03 -070060 buf[ret++] = '\n';
61 buf[ret] = '\0';
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 return ret;
63}
Mike Travis39106dc2008-04-08 11:43:03 -070064
65static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
66 struct device_attribute *attr,
67 char *buf)
68{
69 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
70}
71
72static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
73 struct device_attribute *attr,
74 char *buf)
75{
76 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
77}
78
79DEVICE_ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
80DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
82/*
83 * PCI Bus Class
84 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040085static void release_pcibus_dev(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -070086{
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040087 struct pci_bus *pci_bus = to_pci_bus(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
89 if (pci_bus->bridge)
90 put_device(pci_bus->bridge);
Bjorn Helgaas2fe2abf2010-02-23 10:24:36 -070091 pci_bus_remove_resources(pci_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -070092 kfree(pci_bus);
93}
94
95static struct class pcibus_class = {
96 .name = "pci_bus",
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040097 .dev_release = &release_pcibus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -070098};
99
100static int __init pcibus_class_init(void)
101{
102 return class_register(&pcibus_class);
103}
104postcore_initcall(pcibus_class_init);
105
106/*
107 * Translate the low bits of the PCI base
108 * to the resource type
109 */
110static inline unsigned int pci_calc_resource_flags(unsigned int flags)
111{
112 if (flags & PCI_BASE_ADDRESS_SPACE_IO)
113 return IORESOURCE_IO;
114
115 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
116 return IORESOURCE_MEM | IORESOURCE_PREFETCH;
117
118 return IORESOURCE_MEM;
119}
120
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400121static u64 pci_size(u64 base, u64 maxbase, u64 mask)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800122{
123 u64 size = mask & maxbase; /* Find the significant bits */
124 if (!size)
125 return 0;
126
127 /* Get the lowest of them to find the decode size, and
128 from that the extent. */
129 size = (size & ~(size-1)) - 1;
130
131 /* base == maxbase can be valid only if the BAR has
132 already been programmed with all 1s. */
133 if (base == maxbase && ((base | size) & mask) != mask)
134 return 0;
135
136 return size;
137}
138
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400139static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800140{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400141 if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
142 res->flags = bar & ~PCI_BASE_ADDRESS_IO_MASK;
143 return pci_bar_io;
144 }
145
146 res->flags = bar & ~PCI_BASE_ADDRESS_MEM_MASK;
147
Peter Chubbe3545972008-10-13 11:49:04 +1100148 if (res->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400149 return pci_bar_mem64;
150 return pci_bar_mem32;
151}
152
Yu Zhao0b400c72008-11-22 02:40:40 +0800153/**
154 * pci_read_base - read a PCI BAR
155 * @dev: the PCI device
156 * @type: type of the BAR
157 * @res: resource buffer to be filled in
158 * @pos: BAR position in the config space
159 *
160 * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400161 */
Yu Zhao0b400c72008-11-22 02:40:40 +0800162int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400163 struct resource *res, unsigned int pos)
164{
165 u32 l, sz, mask;
166
Michael S. Tsirkin1ed67432009-10-29 17:24:59 +0200167 mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400168
169 res->name = pci_name(dev);
170
171 pci_read_config_dword(dev, pos, &l);
Michael S. Tsirkin1ed67432009-10-29 17:24:59 +0200172 pci_write_config_dword(dev, pos, l | mask);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400173 pci_read_config_dword(dev, pos, &sz);
174 pci_write_config_dword(dev, pos, l);
175
176 /*
177 * All bits set in sz means the device isn't working properly.
Bjorn Helgaas45aa23b2010-04-22 09:02:43 -0600178 * If the BAR isn't implemented, all bits must be 0. If it's a
179 * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
180 * 1 must be clear.
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400181 */
Bjorn Helgaas45aa23b2010-04-22 09:02:43 -0600182 if (!sz || sz == 0xffffffff)
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400183 goto fail;
184
185 /*
186 * I don't know how l can have all bits set. Copied from old code.
187 * Maybe it fixes a bug on some ancient platform.
188 */
189 if (l == 0xffffffff)
190 l = 0;
191
192 if (type == pci_bar_unknown) {
193 type = decode_bar(res, l);
194 res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
195 if (type == pci_bar_io) {
196 l &= PCI_BASE_ADDRESS_IO_MASK;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700197 mask = PCI_BASE_ADDRESS_IO_MASK & IO_SPACE_LIMIT;
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400198 } else {
199 l &= PCI_BASE_ADDRESS_MEM_MASK;
200 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
201 }
202 } else {
203 res->flags |= (l & IORESOURCE_ROM_ENABLE);
204 l &= PCI_ROM_ADDRESS_MASK;
205 mask = (u32)PCI_ROM_ADDRESS_MASK;
206 }
207
208 if (type == pci_bar_mem64) {
209 u64 l64 = l;
210 u64 sz64 = sz;
211 u64 mask64 = mask | (u64)~0 << 32;
212
213 pci_read_config_dword(dev, pos + 4, &l);
214 pci_write_config_dword(dev, pos + 4, ~0);
215 pci_read_config_dword(dev, pos + 4, &sz);
216 pci_write_config_dword(dev, pos + 4, l);
217
218 l64 |= ((u64)l << 32);
219 sz64 |= ((u64)sz << 32);
220
221 sz64 = pci_size(l64, sz64, mask64);
222
223 if (!sz64)
224 goto fail;
225
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400226 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700227 dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n",
228 pos);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400229 goto fail;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600230 }
231
232 res->flags |= IORESOURCE_MEM_64;
233 if ((sizeof(resource_size_t) < 8) && l) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400234 /* Address above 32-bit boundary; disable the BAR */
235 pci_write_config_dword(dev, pos, 0);
236 pci_write_config_dword(dev, pos + 4, 0);
237 res->start = 0;
238 res->end = sz64;
239 } else {
240 res->start = l64;
241 res->end = l64 + sz64;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600242 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
Bjorn Helgaasa369c792009-10-06 15:33:44 -0600243 pos, res);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400244 }
245 } else {
Bjorn Helgaas45aa23b2010-04-22 09:02:43 -0600246 sz = pci_size(l, sz, mask);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400247
Bjorn Helgaas45aa23b2010-04-22 09:02:43 -0600248 if (!sz)
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400249 goto fail;
250
251 res->start = l;
Bjorn Helgaas45aa23b2010-04-22 09:02:43 -0600252 res->end = l + sz;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200253
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600254 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400255 }
256
257 out:
258 return (type == pci_bar_mem64) ? 1 : 0;
259 fail:
260 res->flags = 0;
261 goto out;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800262}
263
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
265{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400266 unsigned int pos, reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400268 for (pos = 0; pos < howmany; pos++) {
269 struct resource *res = &dev->resource[pos];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270 reg = PCI_BASE_ADDRESS_0 + (pos << 2);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400271 pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272 }
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400273
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 if (rom) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400275 struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 dev->rom_base_reg = rom;
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400277 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH |
278 IORESOURCE_READONLY | IORESOURCE_CACHEABLE |
279 IORESOURCE_SIZEALIGN;
280 __pci_read_base(dev, pci_bar_mem32, res, rom);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 }
282}
283
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700284static void __devinit pci_read_bridge_io(struct pci_bus *child)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285{
286 struct pci_dev *dev = child->self;
287 u8 io_base_lo, io_limit_lo;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 unsigned long base, limit;
289 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 res = child->resource[0];
292 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
293 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
294 base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
295 limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
296
297 if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
298 u16 io_base_hi, io_limit_hi;
299 pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
300 pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
301 base |= (io_base_hi << 16);
302 limit |= (io_limit_hi << 16);
303 }
304
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800305 if (base && base <= limit) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
Daniel Yeisley9d265122005-12-05 07:06:43 -0500307 if (!res->start)
308 res->start = base;
309 if (!res->end)
310 res->end = limit + 0xfff;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600311 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800312 } else {
313 dev_printk(KERN_DEBUG, &dev->dev,
Bjorn Helgaas7b8ff6d2010-03-16 15:53:03 -0600314 " bridge window [io %#06lx-%#06lx] (disabled)\n",
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800315 base, limit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 }
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700317}
318
319static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
320{
321 struct pci_dev *dev = child->self;
322 u16 mem_base_lo, mem_limit_lo;
323 unsigned long base, limit;
324 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325
326 res = child->resource[1];
327 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
328 pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
329 base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
330 limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800331 if (base && base <= limit) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
333 res->start = base;
334 res->end = limit + 0xfffff;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600335 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800336 } else {
337 dev_printk(KERN_DEBUG, &dev->dev,
Bjorn Helgaas7b8ff6d2010-03-16 15:53:03 -0600338 " bridge window [mem %#010lx-%#010lx] (disabled)\n",
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800339 base, limit + 0xfffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340 }
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700341}
342
343static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
344{
345 struct pci_dev *dev = child->self;
346 u16 mem_base_lo, mem_limit_lo;
347 unsigned long base, limit;
348 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349
350 res = child->resource[2];
351 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
352 pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
353 base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
354 limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
355
356 if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
357 u32 mem_base_hi, mem_limit_hi;
358 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
359 pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
360
361 /*
362 * Some bridges set the base > limit by default, and some
363 * (broken) BIOSes do not initialize them. If we find
364 * this, just assume they are not being used.
365 */
366 if (mem_base_hi <= mem_limit_hi) {
367#if BITS_PER_LONG == 64
368 base |= ((long) mem_base_hi) << 32;
369 limit |= ((long) mem_limit_hi) << 32;
370#else
371 if (mem_base_hi || mem_limit_hi) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600372 dev_err(&dev->dev, "can't handle 64-bit "
373 "address space for bridge\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374 return;
375 }
376#endif
377 }
378 }
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800379 if (base && base <= limit) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700380 res->flags = (mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) |
381 IORESOURCE_MEM | IORESOURCE_PREFETCH;
382 if (res->flags & PCI_PREF_RANGE_TYPE_64)
383 res->flags |= IORESOURCE_MEM_64;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 res->start = base;
385 res->end = limit + 0xfffff;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600386 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800387 } else {
388 dev_printk(KERN_DEBUG, &dev->dev,
Bjorn Helgaas7b8ff6d2010-03-16 15:53:03 -0600389 " bridge window [mem %#010lx-%#010lx pref] (disabled)\n",
Yinghai Lucd81e1e2010-01-22 01:02:22 -0800390 base, limit + 0xfffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391 }
392}
393
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700394void __devinit pci_read_bridge_bases(struct pci_bus *child)
395{
396 struct pci_dev *dev = child->self;
Bjorn Helgaas2fe2abf2010-02-23 10:24:36 -0700397 struct resource *res;
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700398 int i;
399
400 if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */
401 return;
402
403 dev_info(&dev->dev, "PCI bridge to [bus %02x-%02x]%s\n",
404 child->secondary, child->subordinate,
405 dev->transparent ? " (subtractive decode)" : "");
406
Bjorn Helgaas2fe2abf2010-02-23 10:24:36 -0700407 pci_bus_remove_resources(child);
408 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
409 child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
410
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700411 pci_read_bridge_io(child);
412 pci_read_bridge_mmio(child);
413 pci_read_bridge_mmio_pref(child);
Bjorn Helgaas2adf7512010-02-23 10:24:26 -0700414
415 if (dev->transparent) {
Bjorn Helgaas2fe2abf2010-02-23 10:24:36 -0700416 pci_bus_for_each_resource(child->parent, res, i) {
417 if (res) {
418 pci_bus_add_resource(child, res,
419 PCI_SUBTRACTIVE_DECODE);
Bjorn Helgaas2adf7512010-02-23 10:24:26 -0700420 dev_printk(KERN_DEBUG, &dev->dev,
421 " bridge window %pR (subtractive decode)\n",
Bjorn Helgaas2fe2abf2010-02-23 10:24:36 -0700422 res);
423 }
Bjorn Helgaas2adf7512010-02-23 10:24:26 -0700424 }
425 }
Bjorn Helgaasfa27b2d2010-02-23 10:24:21 -0700426}
427
Sam Ravnborg96bde062007-03-26 21:53:30 -0800428static struct pci_bus * pci_alloc_bus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429{
430 struct pci_bus *b;
431
Eric Sesterhennf5afe802006-02-28 15:34:49 +0100432 b = kzalloc(sizeof(*b), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 if (b) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434 INIT_LIST_HEAD(&b->node);
435 INIT_LIST_HEAD(&b->children);
436 INIT_LIST_HEAD(&b->devices);
Alex Chiangf46753c2008-06-10 15:28:50 -0600437 INIT_LIST_HEAD(&b->slots);
Bjorn Helgaas2fe2abf2010-02-23 10:24:36 -0700438 INIT_LIST_HEAD(&b->resources);
Matthew Wilcox3749c512009-12-13 08:11:32 -0500439 b->max_bus_speed = PCI_SPEED_UNKNOWN;
440 b->cur_bus_speed = PCI_SPEED_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 }
442 return b;
443}
444
Matthew Wilcox9be60ca2009-12-13 08:11:33 -0500445static unsigned char pcix_bus_speed[] = {
446 PCI_SPEED_UNKNOWN, /* 0 */
447 PCI_SPEED_66MHz_PCIX, /* 1 */
448 PCI_SPEED_100MHz_PCIX, /* 2 */
449 PCI_SPEED_133MHz_PCIX, /* 3 */
450 PCI_SPEED_UNKNOWN, /* 4 */
451 PCI_SPEED_66MHz_PCIX_ECC, /* 5 */
452 PCI_SPEED_100MHz_PCIX_ECC, /* 6 */
453 PCI_SPEED_133MHz_PCIX_ECC, /* 7 */
454 PCI_SPEED_UNKNOWN, /* 8 */
455 PCI_SPEED_66MHz_PCIX_266, /* 9 */
456 PCI_SPEED_100MHz_PCIX_266, /* A */
457 PCI_SPEED_133MHz_PCIX_266, /* B */
458 PCI_SPEED_UNKNOWN, /* C */
459 PCI_SPEED_66MHz_PCIX_533, /* D */
460 PCI_SPEED_100MHz_PCIX_533, /* E */
461 PCI_SPEED_133MHz_PCIX_533 /* F */
462};
463
Matthew Wilcox3749c512009-12-13 08:11:32 -0500464static unsigned char pcie_link_speed[] = {
465 PCI_SPEED_UNKNOWN, /* 0 */
466 PCIE_SPEED_2_5GT, /* 1 */
467 PCIE_SPEED_5_0GT, /* 2 */
Matthew Wilcox9dfd97f2009-12-13 08:11:35 -0500468 PCIE_SPEED_8_0GT, /* 3 */
Matthew Wilcox3749c512009-12-13 08:11:32 -0500469 PCI_SPEED_UNKNOWN, /* 4 */
470 PCI_SPEED_UNKNOWN, /* 5 */
471 PCI_SPEED_UNKNOWN, /* 6 */
472 PCI_SPEED_UNKNOWN, /* 7 */
473 PCI_SPEED_UNKNOWN, /* 8 */
474 PCI_SPEED_UNKNOWN, /* 9 */
475 PCI_SPEED_UNKNOWN, /* A */
476 PCI_SPEED_UNKNOWN, /* B */
477 PCI_SPEED_UNKNOWN, /* C */
478 PCI_SPEED_UNKNOWN, /* D */
479 PCI_SPEED_UNKNOWN, /* E */
480 PCI_SPEED_UNKNOWN /* F */
481};
482
483void pcie_update_link_speed(struct pci_bus *bus, u16 linksta)
484{
485 bus->cur_bus_speed = pcie_link_speed[linksta & 0xf];
486}
487EXPORT_SYMBOL_GPL(pcie_update_link_speed);
488
Matthew Wilcox45b4cdd52009-12-13 08:11:34 -0500489static unsigned char agp_speeds[] = {
490 AGP_UNKNOWN,
491 AGP_1X,
492 AGP_2X,
493 AGP_4X,
494 AGP_8X
495};
496
497static enum pci_bus_speed agp_speed(int agp3, int agpstat)
498{
499 int index = 0;
500
501 if (agpstat & 4)
502 index = 3;
503 else if (agpstat & 2)
504 index = 2;
505 else if (agpstat & 1)
506 index = 1;
507 else
508 goto out;
509
510 if (agp3) {
511 index += 2;
512 if (index == 5)
513 index = 0;
514 }
515
516 out:
517 return agp_speeds[index];
518}
519
520
Matthew Wilcox9be60ca2009-12-13 08:11:33 -0500521static void pci_set_bus_speed(struct pci_bus *bus)
522{
523 struct pci_dev *bridge = bus->self;
524 int pos;
525
Matthew Wilcox45b4cdd52009-12-13 08:11:34 -0500526 pos = pci_find_capability(bridge, PCI_CAP_ID_AGP);
527 if (!pos)
528 pos = pci_find_capability(bridge, PCI_CAP_ID_AGP3);
529 if (pos) {
530 u32 agpstat, agpcmd;
531
532 pci_read_config_dword(bridge, pos + PCI_AGP_STATUS, &agpstat);
533 bus->max_bus_speed = agp_speed(agpstat & 8, agpstat & 7);
534
535 pci_read_config_dword(bridge, pos + PCI_AGP_COMMAND, &agpcmd);
536 bus->cur_bus_speed = agp_speed(agpstat & 8, agpcmd & 7);
537 }
538
Matthew Wilcox9be60ca2009-12-13 08:11:33 -0500539 pos = pci_find_capability(bridge, PCI_CAP_ID_PCIX);
540 if (pos) {
541 u16 status;
542 enum pci_bus_speed max;
543 pci_read_config_word(bridge, pos + 2, &status);
544
545 if (status & 0x8000) {
546 max = PCI_SPEED_133MHz_PCIX_533;
547 } else if (status & 0x4000) {
548 max = PCI_SPEED_133MHz_PCIX_266;
549 } else if (status & 0x0002) {
550 if (((status >> 12) & 0x3) == 2) {
551 max = PCI_SPEED_133MHz_PCIX_ECC;
552 } else {
553 max = PCI_SPEED_133MHz_PCIX;
554 }
555 } else {
556 max = PCI_SPEED_66MHz_PCIX;
557 }
558
559 bus->max_bus_speed = max;
560 bus->cur_bus_speed = pcix_bus_speed[(status >> 6) & 0xf];
561
562 return;
563 }
564
565 pos = pci_find_capability(bridge, PCI_CAP_ID_EXP);
566 if (pos) {
567 u32 linkcap;
568 u16 linksta;
569
570 pci_read_config_dword(bridge, pos + PCI_EXP_LNKCAP, &linkcap);
571 bus->max_bus_speed = pcie_link_speed[linkcap & 0xf];
572
573 pci_read_config_word(bridge, pos + PCI_EXP_LNKSTA, &linksta);
574 pcie_update_link_speed(bus, linksta);
575 }
576}
577
578
Adrian Bunkcbd4e052008-04-18 13:53:55 -0700579static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
580 struct pci_dev *bridge, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581{
582 struct pci_bus *child;
583 int i;
584
585 /*
586 * Allocate a new bus, and inherit stuff from the parent..
587 */
588 child = pci_alloc_bus();
589 if (!child)
590 return NULL;
591
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592 child->parent = parent;
593 child->ops = parent->ops;
594 child->sysdata = parent->sysdata;
Michael S. Tsirkin6e325a62006-02-14 18:52:22 +0200595 child->bus_flags = parent->bus_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400597 /* initialize some portions of the bus device, but don't register it
598 * now as the parent is not properly set up yet. This device will get
599 * registered later in pci_bus_add_devices()
600 */
601 child->dev.class = &pcibus_class;
Kay Sievers1a927132008-10-30 02:17:49 +0100602 dev_set_name(&child->dev, "%04x:%02x", pci_domain_nr(child), busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603
604 /*
605 * Set up the primary, secondary and subordinate
606 * bus numbers.
607 */
608 child->number = child->secondary = busnr;
609 child->primary = parent->secondary;
610 child->subordinate = 0xff;
611
Yu Zhao3789fa82008-11-22 02:41:07 +0800612 if (!bridge)
613 return child;
614
615 child->self = bridge;
616 child->bridge = get_device(&bridge->dev);
617
Matthew Wilcox9be60ca2009-12-13 08:11:33 -0500618 pci_set_bus_speed(child);
619
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 /* Set up default resource pointers and names.. */
Yu Zhaofde09c62008-11-22 02:39:32 +0800621 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i];
623 child->resource[i]->name = child->name;
624 }
625 bridge->subordinate = child;
626
627 return child;
628}
629
Sam Ravnborg451124a2008-02-02 22:33:43 +0100630struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631{
632 struct pci_bus *child;
633
634 child = pci_alloc_child_bus(parent, dev, busnr);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700635 if (child) {
Zhang Yanmind71374d2006-06-02 12:35:43 +0800636 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 list_add_tail(&child->node, &parent->children);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800638 up_write(&pci_bus_sem);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700639 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 return child;
641}
642
Sam Ravnborg96bde062007-03-26 21:53:30 -0800643static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700644{
645 struct pci_bus *parent = child->parent;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700646
647 /* Attempts to fix that up are really dangerous unless
648 we're going to re-assign all bus numbers. */
649 if (!pcibios_assign_all_busses())
650 return;
651
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700652 while (parent->parent && parent->subordinate < max) {
653 parent->subordinate = max;
654 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
655 parent = parent->parent;
656 }
657}
658
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659/*
660 * If it's a bridge, configure it and scan the bus behind it.
661 * For CardBus bridges, we don't scan behind as the devices will
662 * be handled by the bridge driver itself.
663 *
664 * We need to process bridges in two passes -- first we scan those
665 * already configured by the BIOS and after we are done with all of
666 * them, we proceed to assigning numbers to the remaining buses in
667 * order to avoid overlaps between old and new bus numbers.
668 */
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100669int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670{
671 struct pci_bus *child;
672 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
Dominik Brodowski49887942005-12-08 16:53:12 +0100673 u32 buses, i, j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674 u16 bctl;
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600675 u8 primary, secondary, subordinate;
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100676 int broken = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677
678 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600679 primary = buses & 0xFF;
680 secondary = (buses >> 8) & 0xFF;
681 subordinate = (buses >> 16) & 0xFF;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600683 dev_dbg(&dev->dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n",
684 secondary, subordinate, pass);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100686 /* Check if setup is sensible at all */
687 if (!pass &&
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600688 (primary != bus->number || secondary <= bus->number)) {
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100689 dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
690 broken = 1;
691 }
692
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 /* Disable MasterAbortMode during probing to avoid reporting
694 of bus errors (in some architectures) */
695 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
696 pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
697 bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
698
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600699 if ((secondary || subordinate) && !pcibios_assign_all_busses() &&
700 !is_cardbus && !broken) {
701 unsigned int cmax;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702 /*
703 * Bus already configured by firmware, process it in the first
704 * pass and just note the configuration.
705 */
706 if (pass)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000707 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708
709 /*
710 * If we already got to this bus through a different bridge,
Alex Chiang74710de2009-03-20 14:56:10 -0600711 * don't re-add it. This can happen with the i450NX chipset.
712 *
713 * However, we continue to descend down the hierarchy and
714 * scan remaining child buses.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700715 */
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600716 child = pci_find_bus(pci_domain_nr(bus), secondary);
Alex Chiang74710de2009-03-20 14:56:10 -0600717 if (!child) {
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600718 child = pci_add_new_bus(bus, dev, secondary);
Alex Chiang74710de2009-03-20 14:56:10 -0600719 if (!child)
720 goto out;
Bjorn Helgaas99ddd552010-03-16 15:52:58 -0600721 child->primary = primary;
722 child->subordinate = subordinate;
Alex Chiang74710de2009-03-20 14:56:10 -0600723 child->bridge_ctl = bctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724 }
725
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 cmax = pci_scan_child_bus(child);
727 if (cmax > max)
728 max = cmax;
729 if (child->subordinate > max)
730 max = child->subordinate;
731 } else {
732 /*
733 * We need to assign a number to this bus which we always
734 * do in the second pass.
735 */
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700736 if (!pass) {
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100737 if (pcibios_assign_all_busses() || broken)
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700738 /* Temporarily disable forwarding of the
739 configuration cycles on all bridges in
740 this bus segment to avoid possible
741 conflicts in the second pass between two
742 bridges programmed with overlapping
743 bus ranges. */
744 pci_write_config_dword(dev, PCI_PRIMARY_BUS,
745 buses & ~0xffffff);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000746 goto out;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700747 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700748
749 /* Clear errors */
750 pci_write_config_word(dev, PCI_STATUS, 0xffff);
751
Rajesh Shahcc574502005-04-28 00:25:47 -0700752 /* Prevent assigning a bus number that already exists.
753 * This can happen when a bridge is hot-plugged */
754 if (pci_find_bus(pci_domain_nr(bus), max+1))
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000755 goto out;
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700756 child = pci_add_new_bus(bus, dev, ++max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757 buses = (buses & 0xff000000)
758 | ((unsigned int)(child->primary) << 0)
759 | ((unsigned int)(child->secondary) << 8)
760 | ((unsigned int)(child->subordinate) << 16);
761
762 /*
763 * yenta.c forces a secondary latency timer of 176.
764 * Copy that behaviour here.
765 */
766 if (is_cardbus) {
767 buses &= ~0xff000000;
768 buses |= CARDBUS_LATENCY_TIMER << 24;
769 }
770
771 /*
772 * We need to blast all three values with a single write.
773 */
774 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
775
776 if (!is_cardbus) {
Gary Hade11949252007-10-08 16:24:16 -0700777 child->bridge_ctl = bctl;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700778 /*
779 * Adjust subordinate busnr in parent buses.
780 * We do this before scanning for children because
781 * some devices may not be detected if the bios
782 * was lazy.
783 */
784 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700785 /* Now we can scan all subordinate buses... */
786 max = pci_scan_child_bus(child);
Kristen Accardie3ac86d2006-01-17 16:57:01 -0800787 /*
788 * now fix it up again since we have found
789 * the real value of max.
790 */
791 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792 } else {
793 /*
794 * For CardBus bridges, we leave 4 bus numbers
795 * as cards with a PCI-to-PCI bridge can be
796 * inserted later.
797 */
Dominik Brodowski49887942005-12-08 16:53:12 +0100798 for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
799 struct pci_bus *parent = bus;
Rajesh Shahcc574502005-04-28 00:25:47 -0700800 if (pci_find_bus(pci_domain_nr(bus),
801 max+i+1))
802 break;
Dominik Brodowski49887942005-12-08 16:53:12 +0100803 while (parent->parent) {
804 if ((!pcibios_assign_all_busses()) &&
805 (parent->subordinate > max) &&
806 (parent->subordinate <= max+i)) {
807 j = 1;
808 }
809 parent = parent->parent;
810 }
811 if (j) {
812 /*
813 * Often, there are two cardbus bridges
814 * -- try to leave one valid bus number
815 * for each one.
816 */
817 i /= 2;
818 break;
819 }
820 }
Rajesh Shahcc574502005-04-28 00:25:47 -0700821 max += i;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700822 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823 }
824 /*
825 * Set the subordinate bus number to its real value.
826 */
827 child->subordinate = max;
828 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
829 }
830
Gary Hadecb3576f2008-02-08 14:00:52 -0800831 sprintf(child->name,
832 (is_cardbus ? "PCI CardBus %04x:%02x" : "PCI Bus %04x:%02x"),
833 pci_domain_nr(bus), child->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834
Bernhard Kaindld55bef512007-07-30 20:35:13 +0200835 /* Has only triggered on CardBus, fixup is in yenta_socket */
Dominik Brodowski49887942005-12-08 16:53:12 +0100836 while (bus->parent) {
837 if ((child->subordinate > bus->subordinate) ||
838 (child->number > bus->subordinate) ||
839 (child->number < bus->number) ||
840 (child->subordinate < bus->number)) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700841 dev_info(&child->dev, "[bus %02x-%02x] %s "
842 "hidden behind%s bridge %s [bus %02x-%02x]\n",
Bernhard Kaindld55bef512007-07-30 20:35:13 +0200843 child->number, child->subordinate,
844 (bus->number > child->subordinate &&
845 bus->subordinate < child->number) ?
Joe Perchesa6f29a92007-11-19 17:48:29 -0800846 "wholly" : "partially",
847 bus->self->transparent ? " transparent" : "",
Bjorn Helgaas865df572009-11-04 10:32:57 -0700848 dev_name(&bus->dev),
Bernhard Kaindld55bef512007-07-30 20:35:13 +0200849 bus->number, bus->subordinate);
Dominik Brodowski49887942005-12-08 16:53:12 +0100850 }
851 bus = bus->parent;
852 }
853
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000854out:
855 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
856
Linus Torvalds1da177e2005-04-16 15:20:36 -0700857 return max;
858}
859
860/*
861 * Read interrupt line and base address registers.
862 * The architecture-dependent code can tweak these, of course.
863 */
864static void pci_read_irq(struct pci_dev *dev)
865{
866 unsigned char irq;
867
868 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq);
Kristen Accardiffeff7882005-11-02 16:24:32 -0800869 dev->pin = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700870 if (irq)
871 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
872 dev->irq = irq;
873}
874
Benjamin Herrenschmidtbb209c82010-01-26 17:10:03 +0000875void set_pcie_port_type(struct pci_dev *pdev)
Yu Zhao480b93b2009-03-20 11:25:14 +0800876{
877 int pos;
878 u16 reg16;
879
880 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
881 if (!pos)
882 return;
883 pdev->is_pcie = 1;
Kenji Kaneshige0efea002009-11-05 12:05:11 +0900884 pdev->pcie_cap = pos;
Yu Zhao480b93b2009-03-20 11:25:14 +0800885 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
886 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
887}
888
Benjamin Herrenschmidtbb209c82010-01-26 17:10:03 +0000889void set_pcie_hotplug_bridge(struct pci_dev *pdev)
Eric W. Biederman28760482009-09-09 14:09:24 -0700890{
891 int pos;
892 u16 reg16;
893 u32 reg32;
894
Kenji Kaneshige06a1cba2009-11-11 14:30:56 +0900895 pos = pci_pcie_cap(pdev);
Eric W. Biederman28760482009-09-09 14:09:24 -0700896 if (!pos)
897 return;
898 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
899 if (!(reg16 & PCI_EXP_FLAGS_SLOT))
900 return;
901 pci_read_config_dword(pdev, pos + PCI_EXP_SLTCAP, &reg32);
902 if (reg32 & PCI_EXP_SLTCAP_HPC)
903 pdev->is_hotplug_bridge = 1;
904}
905
Bartlomiej Zolnierkiewicz01abc2a2007-04-23 23:19:36 +0200906#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
Randy Dunlap76e6a1d2006-12-29 16:47:29 -0800907
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908/**
909 * pci_setup_device - fill in class and map information of a device
910 * @dev: the device structure to fill
911 *
912 * Initialize the device structure with information about the device's
913 * vendor,class,memory and IO-space addresses,IRQ lines etc.
914 * Called at initialisation of the PCI subsystem and by CardBus services.
Yu Zhao480b93b2009-03-20 11:25:14 +0800915 * Returns 0 on success and negative if unknown type of device (not normal,
916 * bridge or CardBus).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917 */
Yu Zhao480b93b2009-03-20 11:25:14 +0800918int pci_setup_device(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700919{
920 u32 class;
Yu Zhao480b93b2009-03-20 11:25:14 +0800921 u8 hdr_type;
922 struct pci_slot *slot;
Gabe Blackbc577d22009-10-06 10:45:19 -0500923 int pos = 0;
Yu Zhao480b93b2009-03-20 11:25:14 +0800924
925 if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
926 return -EIO;
927
928 dev->sysdata = dev->bus->sysdata;
929 dev->dev.parent = dev->bus->bridge;
930 dev->dev.bus = &pci_bus_type;
931 dev->hdr_type = hdr_type & 0x7f;
932 dev->multifunction = !!(hdr_type & 0x80);
Yu Zhao480b93b2009-03-20 11:25:14 +0800933 dev->error_state = pci_channel_io_normal;
934 set_pcie_port_type(dev);
935
936 list_for_each_entry(slot, &dev->bus->slots, list)
937 if (PCI_SLOT(dev->devfn) == slot->number)
938 dev->slot = slot;
939
940 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
941 set this higher, assuming the system even supports it. */
942 dev->dma_mask = 0xffffffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700943
Greg Kroah-Hartmaneebfcfb2008-07-02 13:24:49 -0700944 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
945 dev->bus->number, PCI_SLOT(dev->devfn),
946 PCI_FUNC(dev->devfn));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947
948 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
Auke Kokb8a3a522007-06-08 15:46:30 -0700949 dev->revision = class & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950 class >>= 8; /* upper 3 bytes */
951 dev->class = class;
952 class >>= 8;
953
Bjorn Helgaas34a2e152008-08-25 15:45:20 -0600954 dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 dev->vendor, dev->device, class, dev->hdr_type);
956
Yu Zhao853346e2009-03-21 22:05:11 +0800957 /* need to have dev->class ready */
958 dev->cfg_size = pci_cfg_space_size(dev);
959
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960 /* "Unknown power state" */
Daniel Ritz3fe9d192005-08-17 15:32:19 -0700961 dev->current_state = PCI_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962
963 /* Early fixups, before probing the BARs */
964 pci_fixup_device(pci_fixup_early, dev);
Yu Zhaof79b1b12009-05-28 00:25:05 +0800965 /* device class may be changed after fixup */
966 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967
968 switch (dev->hdr_type) { /* header type */
969 case PCI_HEADER_TYPE_NORMAL: /* standard header */
970 if (class == PCI_CLASS_BRIDGE_PCI)
971 goto bad;
972 pci_read_irq(dev);
973 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
974 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
975 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
Alan Cox368c73d2006-10-04 00:41:26 +0100976
977 /*
978 * Do the ugly legacy mode stuff here rather than broken chip
979 * quirk code. Legacy mode ATA controllers have fixed
980 * addresses. These are not always echoed in BAR0-3, and
981 * BAR0-3 in a few cases contain junk!
982 */
983 if (class == PCI_CLASS_STORAGE_IDE) {
984 u8 progif;
985 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
986 if ((progif & 1) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800987 dev->resource[0].start = 0x1F0;
988 dev->resource[0].end = 0x1F7;
989 dev->resource[0].flags = LEGACY_IO_RESOURCE;
990 dev->resource[1].start = 0x3F6;
991 dev->resource[1].end = 0x3F6;
992 dev->resource[1].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100993 }
994 if ((progif & 4) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800995 dev->resource[2].start = 0x170;
996 dev->resource[2].end = 0x177;
997 dev->resource[2].flags = LEGACY_IO_RESOURCE;
998 dev->resource[3].start = 0x376;
999 dev->resource[3].end = 0x376;
1000 dev->resource[3].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +01001001 }
1002 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003 break;
1004
1005 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
1006 if (class != PCI_CLASS_BRIDGE_PCI)
1007 goto bad;
1008 /* The PCI-to-PCI bridge spec requires that subtractive
1009 decoding (i.e. transparent) bridge must have programming
1010 interface code of 0x01. */
Kristen Accardi3efd2732005-11-02 16:55:49 -08001011 pci_read_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 dev->transparent = ((dev->class & 0xff) == 1);
1013 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
Eric W. Biederman28760482009-09-09 14:09:24 -07001014 set_pcie_hotplug_bridge(dev);
Gabe Blackbc577d22009-10-06 10:45:19 -05001015 pos = pci_find_capability(dev, PCI_CAP_ID_SSVID);
1016 if (pos) {
1017 pci_read_config_word(dev, pos + PCI_SSVID_VENDOR_ID, &dev->subsystem_vendor);
1018 pci_read_config_word(dev, pos + PCI_SSVID_DEVICE_ID, &dev->subsystem_device);
1019 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020 break;
1021
1022 case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */
1023 if (class != PCI_CLASS_BRIDGE_CARDBUS)
1024 goto bad;
1025 pci_read_irq(dev);
1026 pci_read_bases(dev, 1, 0);
1027 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
1028 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device);
1029 break;
1030
1031 default: /* unknown header */
Bjorn Helgaas80ccba12008-06-13 10:52:11 -06001032 dev_err(&dev->dev, "unknown header type %02x, "
1033 "ignoring device\n", dev->hdr_type);
Yu Zhao480b93b2009-03-20 11:25:14 +08001034 return -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001035
1036 bad:
Bjorn Helgaas80ccba12008-06-13 10:52:11 -06001037 dev_err(&dev->dev, "ignoring class %02x (doesn't match header "
1038 "type %02x)\n", class, dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039 dev->class = PCI_CLASS_NOT_DEFINED;
1040 }
1041
1042 /* We found a fine healthy device, go go go... */
1043 return 0;
1044}
1045
Zhao, Yu201de562008-10-13 19:49:55 +08001046static void pci_release_capabilities(struct pci_dev *dev)
1047{
1048 pci_vpd_release(dev);
Yu Zhaod1b054d2009-03-20 11:25:11 +08001049 pci_iov_release(dev);
Zhao, Yu201de562008-10-13 19:49:55 +08001050}
1051
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052/**
1053 * pci_release_dev - free a pci device structure when all users of it are finished.
1054 * @dev: device that's been disconnected
1055 *
1056 * Will be called only by the device core when all users of this pci device are
1057 * done.
1058 */
1059static void pci_release_dev(struct device *dev)
1060{
1061 struct pci_dev *pci_dev;
1062
1063 pci_dev = to_pci_dev(dev);
Zhao, Yu201de562008-10-13 19:49:55 +08001064 pci_release_capabilities(pci_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 kfree(pci_dev);
1066}
1067
1068/**
1069 * pci_cfg_space_size - get the configuration space size of the PCI device.
Randy Dunlap8f7020d2005-10-23 11:57:38 -07001070 * @dev: PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -07001071 *
1072 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
1073 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
1074 * access it. Maybe we don't have a way to generate extended config space
1075 * accesses, or the device is behind a reverse Express bridge. So we try
1076 * reading the dword at 0x100 which must either be 0 or a valid extended
1077 * capability header.
1078 */
Yinghai Lu70b9f7d2008-04-28 16:27:23 -07001079int pci_cfg_space_size_ext(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001080{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001081 u32 status;
Zhao, Yu557848c2008-10-13 19:18:07 +08001082 int pos = PCI_CFG_SPACE_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001083
Zhao, Yu557848c2008-10-13 19:18:07 +08001084 if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001085 goto fail;
1086 if (status == 0xffffffff)
1087 goto fail;
1088
1089 return PCI_CFG_SPACE_EXP_SIZE;
1090
1091 fail:
1092 return PCI_CFG_SPACE_SIZE;
1093}
1094
Yinghai Lu57741a72008-02-15 01:32:50 -08001095int pci_cfg_space_size(struct pci_dev *dev)
1096{
Yinghai Lu70b9f7d2008-04-28 16:27:23 -07001097 int pos;
1098 u32 status;
Yinghai Ludfadd9ed2009-03-08 21:35:37 -07001099 u16 class;
1100
1101 class = dev->class >> 8;
1102 if (class == PCI_CLASS_BRIDGE_HOST)
1103 return pci_cfg_space_size_ext(dev);
Yinghai Lu70b9f7d2008-04-28 16:27:23 -07001104
Kenji Kaneshige06a1cba2009-11-11 14:30:56 +09001105 pos = pci_pcie_cap(dev);
Yinghai Lu70b9f7d2008-04-28 16:27:23 -07001106 if (!pos) {
1107 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
1108 if (!pos)
1109 goto fail;
1110
1111 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
1112 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
1113 goto fail;
1114 }
1115
1116 return pci_cfg_space_size_ext(dev);
1117
1118 fail:
1119 return PCI_CFG_SPACE_SIZE;
Yinghai Lu57741a72008-02-15 01:32:50 -08001120}
1121
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122static void pci_release_bus_bridge_dev(struct device *dev)
1123{
1124 kfree(dev);
1125}
1126
Michael Ellerman65891212007-04-05 17:19:08 +10001127struct pci_dev *alloc_pci_dev(void)
1128{
1129 struct pci_dev *dev;
1130
1131 dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
1132 if (!dev)
1133 return NULL;
1134
Michael Ellerman65891212007-04-05 17:19:08 +10001135 INIT_LIST_HEAD(&dev->bus_list);
1136
1137 return dev;
1138}
1139EXPORT_SYMBOL(alloc_pci_dev);
1140
Linus Torvalds1da177e2005-04-16 15:20:36 -07001141/*
1142 * Read the config data for a PCI device, sanity-check it
1143 * and fill in the dev structure...
1144 */
Adrian Bunk7f7b5de2008-04-18 13:53:55 -07001145static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146{
1147 struct pci_dev *dev;
1148 u32 l;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001149 int delay = 1;
1150
1151 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
1152 return NULL;
1153
1154 /* some broken boards return 0 or ~0 if a slot is empty: */
1155 if (l == 0xffffffff || l == 0x00000000 ||
1156 l == 0x0000ffff || l == 0xffff0000)
1157 return NULL;
1158
1159 /* Configuration request Retry Status */
1160 while (l == 0xffff0001) {
1161 msleep(delay);
1162 delay *= 2;
1163 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
1164 return NULL;
1165 /* Card hasn't responded in 60 seconds? Must be stuck. */
1166 if (delay > 60 * 1000) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -06001167 printk(KERN_WARNING "pci %04x:%02x:%02x.%d: not "
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168 "responding\n", pci_domain_nr(bus),
1169 bus->number, PCI_SLOT(devfn),
1170 PCI_FUNC(devfn));
1171 return NULL;
1172 }
1173 }
1174
Michael Ellermanbab41e92007-04-05 17:19:09 +10001175 dev = alloc_pci_dev();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001176 if (!dev)
1177 return NULL;
1178
Linus Torvalds1da177e2005-04-16 15:20:36 -07001179 dev->bus = bus;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001180 dev->devfn = devfn;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181 dev->vendor = l & 0xffff;
1182 dev->device = (l >> 16) & 0xffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183
Yu Zhao480b93b2009-03-20 11:25:14 +08001184 if (pci_setup_device(dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185 kfree(dev);
1186 return NULL;
1187 }
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001188
1189 return dev;
1190}
1191
Zhao, Yu201de562008-10-13 19:49:55 +08001192static void pci_init_capabilities(struct pci_dev *dev)
1193{
1194 /* MSI/MSI-X list */
1195 pci_msi_init_pci_dev(dev);
1196
Rafael J. Wysocki63f48982008-12-07 22:02:58 +01001197 /* Buffers for saving PCIe and PCI-X capabilities */
1198 pci_allocate_cap_save_buffers(dev);
1199
Zhao, Yu201de562008-10-13 19:49:55 +08001200 /* Power Management */
1201 pci_pm_init(dev);
Jesse Barneseb9c39d2008-12-17 12:10:05 -08001202 platform_pci_wakeup_init(dev);
Zhao, Yu201de562008-10-13 19:49:55 +08001203
1204 /* Vital Product Data */
1205 pci_vpd_pci22_init(dev);
Yu Zhao58c3a722008-10-14 14:02:53 +08001206
1207 /* Alternative Routing-ID Forwarding */
1208 pci_enable_ari(dev);
Yu Zhaod1b054d2009-03-20 11:25:11 +08001209
1210 /* Single Root I/O Virtualization */
1211 pci_iov_init(dev);
Allen Kayae21ee62009-10-07 10:27:17 -07001212
1213 /* Enable ACS P2P upstream forwarding */
Chris Wright5d990b62009-12-04 12:15:21 -08001214 pci_enable_acs(dev);
Zhao, Yu201de562008-10-13 19:49:55 +08001215}
1216
Sam Ravnborg96bde062007-03-26 21:53:30 -08001217void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001218{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001219 device_initialize(&dev->dev);
1220 dev->dev.release = pci_release_dev;
1221 pci_dev_get(dev);
1222
Linus Torvalds1da177e2005-04-16 15:20:36 -07001223 dev->dev.dma_mask = &dev->dma_mask;
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -08001224 dev->dev.dma_parms = &dev->dma_parms;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001225 dev->dev.coherent_dma_mask = 0xffffffffull;
1226
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -08001227 pci_set_dma_max_seg_size(dev, 65536);
FUJITA Tomonori59fc67d2008-02-04 22:28:14 -08001228 pci_set_dma_seg_boundary(dev, 0xffffffff);
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -08001229
Linus Torvalds1da177e2005-04-16 15:20:36 -07001230 /* Fix up broken headers */
1231 pci_fixup_device(pci_fixup_header, dev);
1232
Rafael J. Wysocki4b77b0a2009-09-09 23:49:59 +02001233 /* Clear the state_saved flag. */
1234 dev->state_saved = false;
1235
Zhao, Yu201de562008-10-13 19:49:55 +08001236 /* Initialize various capabilities */
1237 pci_init_capabilities(dev);
Rafael J. Wysockieb9d0fe2008-07-07 03:34:48 +02001238
Linus Torvalds1da177e2005-04-16 15:20:36 -07001239 /*
1240 * Add the device to our list of discovered devices
1241 * and the bus list for fixup functions, etc.
1242 */
Zhang Yanmind71374d2006-06-02 12:35:43 +08001243 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001244 list_add_tail(&dev->bus_list, &bus->devices);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001245 up_write(&pci_bus_sem);
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001246}
1247
Sam Ravnborg451124a2008-02-02 22:33:43 +01001248struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001249{
1250 struct pci_dev *dev;
1251
Trent Piepho90bdb312009-03-20 14:56:00 -06001252 dev = pci_get_slot(bus, devfn);
1253 if (dev) {
1254 pci_dev_put(dev);
1255 return dev;
1256 }
1257
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001258 dev = pci_scan_device(bus, devfn);
1259 if (!dev)
1260 return NULL;
1261
1262 pci_device_add(dev, bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001263
1264 return dev;
1265}
Adrian Bunkb73e9682007-11-21 15:07:11 -08001266EXPORT_SYMBOL(pci_scan_single_device);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001267
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001268static unsigned next_ari_fn(struct pci_dev *dev, unsigned fn)
1269{
1270 u16 cap;
Matthew Wilcox4fb88c12010-01-17 14:01:41 -07001271 unsigned pos, next_fn;
1272
1273 if (!dev)
1274 return 0;
1275
1276 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI);
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001277 if (!pos)
1278 return 0;
1279 pci_read_config_word(dev, pos + 4, &cap);
Matthew Wilcox4fb88c12010-01-17 14:01:41 -07001280 next_fn = cap >> 8;
1281 if (next_fn <= fn)
1282 return 0;
1283 return next_fn;
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001284}
1285
1286static unsigned next_trad_fn(struct pci_dev *dev, unsigned fn)
1287{
1288 return (fn + 1) % 8;
1289}
1290
1291static unsigned no_next_fn(struct pci_dev *dev, unsigned fn)
1292{
1293 return 0;
1294}
1295
1296static int only_one_child(struct pci_bus *bus)
1297{
1298 struct pci_dev *parent = bus->self;
1299 if (!parent || !pci_is_pcie(parent))
1300 return 0;
1301 if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
1302 parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
1303 return 1;
1304 return 0;
1305}
1306
Linus Torvalds1da177e2005-04-16 15:20:36 -07001307/**
1308 * pci_scan_slot - scan a PCI slot on a bus for devices.
1309 * @bus: PCI bus to scan
1310 * @devfn: slot number to scan (must have zero function.)
1311 *
1312 * Scan a PCI slot on the specified PCI bus for devices, adding
1313 * discovered devices to the @bus->devices list. New devices
Greg Kroah-Hartman8a1bc902008-02-14 14:56:56 -08001314 * will not have is_added set.
Trent Piepho1b69dfc2009-03-20 14:56:05 -06001315 *
1316 * Returns the number of new devices found.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001317 */
Sam Ravnborg96bde062007-03-26 21:53:30 -08001318int pci_scan_slot(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001319{
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001320 unsigned fn, nr = 0;
Trent Piepho1b69dfc2009-03-20 14:56:05 -06001321 struct pci_dev *dev;
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001322 unsigned (*next_fn)(struct pci_dev *, unsigned) = no_next_fn;
1323
1324 if (only_one_child(bus) && (devfn > 0))
1325 return 0; /* Already scanned the entire slot */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001326
Trent Piepho1b69dfc2009-03-20 14:56:05 -06001327 dev = pci_scan_single_device(bus, devfn);
Matthew Wilcox4fb88c12010-01-17 14:01:41 -07001328 if (!dev)
1329 return 0;
1330 if (!dev->is_added)
Trent Piepho1b69dfc2009-03-20 14:56:05 -06001331 nr++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001332
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001333 if (pci_ari_enabled(bus))
1334 next_fn = next_ari_fn;
Matthew Wilcox4fb88c12010-01-17 14:01:41 -07001335 else if (dev->multifunction)
Matthew Wilcoxf07852d2009-12-13 08:10:02 -05001336 next_fn = next_trad_fn;
1337
1338 for (fn = next_fn(dev, 0); fn > 0; fn = next_fn(dev, fn)) {
1339 dev = pci_scan_single_device(bus, devfn + fn);
1340 if (dev) {
1341 if (!dev->is_added)
1342 nr++;
1343 dev->multifunction = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001344 }
1345 }
Shaohua Li7d715a62008-02-25 09:46:41 +08001346
Shaohua Li149e1632008-07-23 10:32:31 +08001347 /* only one slot has pcie device */
1348 if (bus->self && nr)
Shaohua Li7d715a62008-02-25 09:46:41 +08001349 pcie_aspm_init_link_state(bus->self);
1350
Linus Torvalds1da177e2005-04-16 15:20:36 -07001351 return nr;
1352}
1353
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001354unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001355{
1356 unsigned int devfn, pass, max = bus->secondary;
1357 struct pci_dev *dev;
1358
Bjorn Helgaas0207c352009-11-04 10:32:52 -07001359 dev_dbg(&bus->dev, "scanning bus\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001360
1361 /* Go find them, Rover! */
1362 for (devfn = 0; devfn < 0x100; devfn += 8)
1363 pci_scan_slot(bus, devfn);
1364
Yu Zhaoa28724b2009-03-20 11:25:13 +08001365 /* Reserve buses for SR-IOV capability. */
1366 max += pci_iov_bus_range(bus);
1367
Linus Torvalds1da177e2005-04-16 15:20:36 -07001368 /*
1369 * After performing arch-dependent fixup of the bus, look behind
1370 * all PCI-to-PCI bridges on this bus.
1371 */
Alex Chiang74710de2009-03-20 14:56:10 -06001372 if (!bus->is_added) {
Bjorn Helgaas0207c352009-11-04 10:32:52 -07001373 dev_dbg(&bus->dev, "fixups for bus\n");
Alex Chiang74710de2009-03-20 14:56:10 -06001374 pcibios_fixup_bus(bus);
1375 if (pci_is_root_bus(bus))
1376 bus->is_added = 1;
1377 }
1378
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 for (pass=0; pass < 2; pass++)
1380 list_for_each_entry(dev, &bus->devices, bus_list) {
1381 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1382 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1383 max = pci_scan_bridge(bus, dev, max, pass);
1384 }
1385
1386 /*
1387 * We've scanned the bus and so we know all about what's on
1388 * the other side of any bridges that may be on this bus plus
1389 * any devices.
1390 *
1391 * Return how far we've got finding sub-buses.
1392 */
Bjorn Helgaas0207c352009-11-04 10:32:52 -07001393 dev_dbg(&bus->dev, "bus scan returning with max=%02x\n", max);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001394 return max;
1395}
1396
Sam Ravnborg96bde062007-03-26 21:53:30 -08001397struct pci_bus * pci_create_bus(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001398 int bus, struct pci_ops *ops, void *sysdata)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399{
1400 int error;
Bjorn Helgaas0207c352009-11-04 10:32:52 -07001401 struct pci_bus *b, *b2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001402 struct device *dev;
1403
1404 b = pci_alloc_bus();
1405 if (!b)
1406 return NULL;
1407
Geert Uytterhoeven6a3b3e22009-03-15 20:14:37 +01001408 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001409 if (!dev){
1410 kfree(b);
1411 return NULL;
1412 }
1413
1414 b->sysdata = sysdata;
1415 b->ops = ops;
1416
Bjorn Helgaas0207c352009-11-04 10:32:52 -07001417 b2 = pci_find_bus(pci_domain_nr(b), bus);
1418 if (b2) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419 /* If we already got to this bus through a different bridge, ignore it */
Bjorn Helgaas0207c352009-11-04 10:32:52 -07001420 dev_dbg(&b2->dev, "bus already known\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421 goto err_out;
1422 }
Zhang Yanmind71374d2006-06-02 12:35:43 +08001423
1424 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001425 list_add_tail(&b->node, &pci_root_buses);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001426 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427
Linus Torvalds1da177e2005-04-16 15:20:36 -07001428 dev->parent = parent;
1429 dev->release = pci_release_bus_bridge_dev;
Kay Sievers1a927132008-10-30 02:17:49 +01001430 dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001431 error = device_register(dev);
1432 if (error)
1433 goto dev_reg_err;
1434 b->bridge = get_device(dev);
Rafael J. Wysockia1e4d72c2010-02-08 19:16:33 +01001435 device_enable_async_suspend(b->bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001436
Yinghai Lu0d358f22008-02-19 03:20:41 -08001437 if (!parent)
1438 set_dev_node(b->bridge, pcibus_to_node(b));
1439
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001440 b->dev.class = &pcibus_class;
1441 b->dev.parent = b->bridge;
Kay Sievers1a927132008-10-30 02:17:49 +01001442 dev_set_name(&b->dev, "%04x:%02x", pci_domain_nr(b), bus);
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001443 error = device_register(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444 if (error)
1445 goto class_dev_reg_err;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001446 error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001447 if (error)
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001448 goto dev_create_file_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001449
1450 /* Create legacy_io and legacy_mem files for this bus */
1451 pci_create_legacy_files(b);
1452
Linus Torvalds1da177e2005-04-16 15:20:36 -07001453 b->number = b->secondary = bus;
1454 b->resource[0] = &ioport_resource;
1455 b->resource[1] = &iomem_resource;
1456
Linus Torvalds1da177e2005-04-16 15:20:36 -07001457 return b;
1458
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001459dev_create_file_err:
1460 device_unregister(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001461class_dev_reg_err:
1462 device_unregister(dev);
1463dev_reg_err:
Zhang Yanmind71374d2006-06-02 12:35:43 +08001464 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465 list_del(&b->node);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001466 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001467err_out:
1468 kfree(dev);
1469 kfree(b);
1470 return NULL;
1471}
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001472
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001473struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001474 int bus, struct pci_ops *ops, void *sysdata)
1475{
1476 struct pci_bus *b;
1477
1478 b = pci_create_bus(parent, bus, ops, sysdata);
1479 if (b)
1480 b->subordinate = pci_scan_child_bus(b);
1481 return b;
1482}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001483EXPORT_SYMBOL(pci_scan_bus_parented);
1484
1485#ifdef CONFIG_HOTPLUG
Alex Chiang3ed4fd92009-03-20 14:56:25 -06001486/**
1487 * pci_rescan_bus - scan a PCI bus for devices.
1488 * @bus: PCI bus to scan
1489 *
1490 * Scan a PCI bus and child buses for new devices, adds them,
1491 * and enables them.
1492 *
1493 * Returns the max number of subordinate bus discovered.
1494 */
Alex Chiang5446a6b2009-04-01 18:24:12 -06001495unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
Alex Chiang3ed4fd92009-03-20 14:56:25 -06001496{
1497 unsigned int max;
1498 struct pci_dev *dev;
1499
1500 max = pci_scan_child_bus(bus);
1501
Alex Chiang705b1aa2009-03-20 14:56:31 -06001502 down_read(&pci_bus_sem);
Alex Chiang3ed4fd92009-03-20 14:56:25 -06001503 list_for_each_entry(dev, &bus->devices, bus_list)
1504 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1505 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1506 if (dev->subordinate)
1507 pci_bus_size_bridges(dev->subordinate);
Alex Chiang705b1aa2009-03-20 14:56:31 -06001508 up_read(&pci_bus_sem);
Alex Chiang3ed4fd92009-03-20 14:56:25 -06001509
1510 pci_bus_assign_resources(bus);
1511 pci_enable_bridges(bus);
1512 pci_bus_add_devices(bus);
1513
1514 return max;
1515}
1516EXPORT_SYMBOL_GPL(pci_rescan_bus);
1517
Linus Torvalds1da177e2005-04-16 15:20:36 -07001518EXPORT_SYMBOL(pci_add_new_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001519EXPORT_SYMBOL(pci_scan_slot);
1520EXPORT_SYMBOL(pci_scan_bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001521EXPORT_SYMBOL_GPL(pci_scan_child_bus);
1522#endif
Matt Domsch6b4b78fe2006-09-29 15:23:23 -05001523
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001524static int __init pci_sort_bf_cmp(const struct device *d_a, const struct device *d_b)
Matt Domsch6b4b78fe2006-09-29 15:23:23 -05001525{
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001526 const struct pci_dev *a = to_pci_dev(d_a);
1527 const struct pci_dev *b = to_pci_dev(d_b);
1528
Matt Domsch6b4b78fe2006-09-29 15:23:23 -05001529 if (pci_domain_nr(a->bus) < pci_domain_nr(b->bus)) return -1;
1530 else if (pci_domain_nr(a->bus) > pci_domain_nr(b->bus)) return 1;
1531
1532 if (a->bus->number < b->bus->number) return -1;
1533 else if (a->bus->number > b->bus->number) return 1;
1534
1535 if (a->devfn < b->devfn) return -1;
1536 else if (a->devfn > b->devfn) return 1;
1537
1538 return 0;
1539}
1540
Greg Kroah-Hartman5ff580c2008-02-14 14:56:56 -08001541void __init pci_sort_breadthfirst(void)
Matt Domsch6b4b78fe2006-09-29 15:23:23 -05001542{
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001543 bus_sort_breadthfirst(&pci_bus_type, &pci_sort_bf_cmp);
Matt Domsch6b4b78fe2006-09-29 15:23:23 -05001544}