Thomas Gleixner | fcaf203 | 2019-05-27 08:55:08 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Freescale Semiconductor, Inc. |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
Anson Huang | 7d6b5e4f | 2020-08-05 07:17:29 +0800 | [diff] [blame] | 6 | #include <linux/bits.h> |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 7 | #include <linux/clk-provider.h> |
| 8 | #include <linux/err.h> |
| 9 | #include <linux/io.h> |
| 10 | #include <linux/slab.h> |
| 11 | #include "clk.h" |
| 12 | |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 13 | /** |
| 14 | * struct clk_fixup_mux - imx integer fixup multiplexer clock |
| 15 | * @mux: the parent class |
| 16 | * @ops: pointer to clk_ops of parent class |
| 17 | * @fixup: a hook to fixup the write value |
| 18 | * |
| 19 | * The imx fixup multiplexer clock is a subclass of basic clk_mux |
| 20 | * with an addtional fixup hook. |
| 21 | */ |
| 22 | struct clk_fixup_mux { |
| 23 | struct clk_mux mux; |
| 24 | const struct clk_ops *ops; |
| 25 | void (*fixup)(u32 *val); |
| 26 | }; |
| 27 | |
| 28 | static inline struct clk_fixup_mux *to_clk_fixup_mux(struct clk_hw *hw) |
| 29 | { |
| 30 | struct clk_mux *mux = to_clk_mux(hw); |
| 31 | |
| 32 | return container_of(mux, struct clk_fixup_mux, mux); |
| 33 | } |
| 34 | |
| 35 | static u8 clk_fixup_mux_get_parent(struct clk_hw *hw) |
| 36 | { |
| 37 | struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw); |
| 38 | |
| 39 | return fixup_mux->ops->get_parent(&fixup_mux->mux.hw); |
| 40 | } |
| 41 | |
| 42 | static int clk_fixup_mux_set_parent(struct clk_hw *hw, u8 index) |
| 43 | { |
| 44 | struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw); |
| 45 | struct clk_mux *mux = to_clk_mux(hw); |
Anson Huang | 79ccef6 | 2020-02-12 17:03:00 +0800 | [diff] [blame] | 46 | unsigned long flags; |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 47 | u32 val; |
| 48 | |
| 49 | spin_lock_irqsave(mux->lock, flags); |
| 50 | |
| 51 | val = readl(mux->reg); |
| 52 | val &= ~(mux->mask << mux->shift); |
| 53 | val |= index << mux->shift; |
| 54 | fixup_mux->fixup(&val); |
| 55 | writel(val, mux->reg); |
| 56 | |
| 57 | spin_unlock_irqrestore(mux->lock, flags); |
| 58 | |
| 59 | return 0; |
| 60 | } |
| 61 | |
| 62 | static const struct clk_ops clk_fixup_mux_ops = { |
| 63 | .get_parent = clk_fixup_mux_get_parent, |
| 64 | .set_parent = clk_fixup_mux_set_parent, |
| 65 | }; |
| 66 | |
Abel Vesa | 3ead0f1 | 2019-05-29 12:26:44 +0000 | [diff] [blame] | 67 | struct clk_hw *imx_clk_hw_fixup_mux(const char *name, void __iomem *reg, |
A.s. Dong | 9e5ef7a | 2018-11-14 13:02:00 +0000 | [diff] [blame] | 68 | u8 shift, u8 width, const char * const *parents, |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 69 | int num_parents, void (*fixup)(u32 *val)) |
| 70 | { |
| 71 | struct clk_fixup_mux *fixup_mux; |
Abel Vesa | 3ead0f1 | 2019-05-29 12:26:44 +0000 | [diff] [blame] | 72 | struct clk_hw *hw; |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 73 | struct clk_init_data init; |
Abel Vesa | 3ead0f1 | 2019-05-29 12:26:44 +0000 | [diff] [blame] | 74 | int ret; |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 75 | |
| 76 | if (!fixup) |
| 77 | return ERR_PTR(-EINVAL); |
| 78 | |
| 79 | fixup_mux = kzalloc(sizeof(*fixup_mux), GFP_KERNEL); |
| 80 | if (!fixup_mux) |
| 81 | return ERR_PTR(-ENOMEM); |
| 82 | |
| 83 | init.name = name; |
| 84 | init.ops = &clk_fixup_mux_ops; |
| 85 | init.parent_names = parents; |
| 86 | init.num_parents = num_parents; |
Shawn Guo | bdb1b5f | 2013-09-04 20:49:04 +0800 | [diff] [blame] | 87 | init.flags = 0; |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 88 | |
| 89 | fixup_mux->mux.reg = reg; |
| 90 | fixup_mux->mux.shift = shift; |
| 91 | fixup_mux->mux.mask = BIT(width) - 1; |
| 92 | fixup_mux->mux.lock = &imx_ccm_lock; |
| 93 | fixup_mux->mux.hw.init = &init; |
| 94 | fixup_mux->ops = &clk_mux_ops; |
| 95 | fixup_mux->fixup = fixup; |
| 96 | |
Abel Vesa | 3ead0f1 | 2019-05-29 12:26:44 +0000 | [diff] [blame] | 97 | hw = &fixup_mux->mux.hw; |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 98 | |
Abel Vesa | 3ead0f1 | 2019-05-29 12:26:44 +0000 | [diff] [blame] | 99 | ret = clk_hw_register(NULL, hw); |
| 100 | if (ret) { |
| 101 | kfree(fixup_mux); |
| 102 | return ERR_PTR(ret); |
| 103 | } |
| 104 | |
| 105 | return hw; |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 106 | } |