Thomas Gleixner | 1a59d1b8 | 2019-05-27 08:55:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Linas Vepstas | 172ca92 | 2005-11-03 18:50:04 -0600 | [diff] [blame] | 2 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. |
Gavin Shan | cb3bc9d | 2012-02-27 20:03:51 +0000 | [diff] [blame] | 4 | * Copyright 2001-2012 IBM Corporation. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
Benjamin Herrenschmidt | 8b8da35 | 2008-10-27 19:48:37 +0000 | [diff] [blame] | 7 | #ifndef _POWERPC_EEH_H |
| 8 | #define _POWERPC_EEH_H |
Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 9 | #ifdef __KERNEL__ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/init.h> |
| 12 | #include <linux/list.h> |
| 13 | #include <linux/string.h> |
Gavin Shan | 5a71978 | 2013-06-20 13:21:01 +0800 | [diff] [blame] | 14 | #include <linux/time.h> |
Gavin Shan | 05ec424 | 2014-06-10 11:41:55 +1000 | [diff] [blame] | 15 | #include <linux/atomic.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | |
Gavin Shan | ed3e81f | 2015-03-26 16:42:07 +1100 | [diff] [blame] | 17 | #include <uapi/asm/eeh.h> |
| 18 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | struct pci_dev; |
John Rose | 827c1a6 | 2006-02-24 11:34:23 -0600 | [diff] [blame] | 20 | struct pci_bus; |
Gavin Shan | e8e9b34 | 2015-03-17 16:15:05 +1100 | [diff] [blame] | 21 | struct pci_dn; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | #ifdef CONFIG_EEH |
| 24 | |
Gavin Shan | 8a5ad35 | 2014-04-24 18:00:17 +1000 | [diff] [blame] | 25 | /* EEH subsystem flags */ |
Mauro S. M. Rodrigues | ee8c446 | 2018-03-22 23:10:52 -0300 | [diff] [blame] | 26 | #define EEH_ENABLED 0x01 /* EEH enabled */ |
| 27 | #define EEH_FORCE_DISABLED 0x02 /* EEH disabled */ |
| 28 | #define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */ |
| 29 | #define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */ |
Mauro S. M. Rodrigues | ee8c446 | 2018-03-22 23:10:52 -0300 | [diff] [blame] | 30 | #define EEH_ENABLE_IO_FOR_LOG 0x20 /* Enable IO for log */ |
| 31 | #define EEH_EARLY_DUMP_LOG 0x40 /* Dump log immediately */ |
Gavin Shan | 8a5ad35 | 2014-04-24 18:00:17 +1000 | [diff] [blame] | 32 | |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 33 | /* |
Gavin Shan | 26833a5 | 2014-04-24 18:00:23 +1000 | [diff] [blame] | 34 | * Delay for PE reset, all in ms |
| 35 | * |
| 36 | * PCI specification has reset hold time of 100 milliseconds. |
| 37 | * We have 250 milliseconds here. The PCI bus settlement time |
| 38 | * is specified as 1.5 seconds and we have 1.8 seconds. |
| 39 | */ |
| 40 | #define EEH_PE_RST_HOLD_TIME 250 |
| 41 | #define EEH_PE_RST_SETTLE_TIME 1800 |
| 42 | |
| 43 | /* |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 44 | * The struct is used to trace PE related EEH functionality. |
| 45 | * In theory, there will have one instance of the struct to |
Michael Ellerman | 027dfac | 2016-06-01 16:34:37 +1000 | [diff] [blame] | 46 | * be created against particular PE. In nature, PEs correlate |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 47 | * to each other. the struct has to reflect that hierarchy in |
| 48 | * order to easily pick up those affected PEs when one particular |
| 49 | * PE has EEH errors. |
| 50 | * |
| 51 | * Also, one particular PE might be composed of PCI device, PCI |
| 52 | * bus and its subordinate components. The struct also need ship |
| 53 | * the information. Further more, one particular PE is only meaingful |
| 54 | * in the corresponding PHB. Therefore, the root PEs should be created |
| 55 | * against existing PHBs in on-to-one fashion. |
| 56 | */ |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 57 | #define EEH_PE_INVALID (1 << 0) /* Invalid */ |
| 58 | #define EEH_PE_PHB (1 << 1) /* PHB PE */ |
| 59 | #define EEH_PE_DEVICE (1 << 2) /* Device PE */ |
| 60 | #define EEH_PE_BUS (1 << 3) /* Bus PE */ |
Wei Yang | c29fa27 | 2016-03-04 10:53:08 +1100 | [diff] [blame] | 61 | #define EEH_PE_VF (1 << 4) /* VF PE */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 62 | |
| 63 | #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ |
| 64 | #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ |
Gavin Shan | 8a6b371 | 2014-10-01 17:07:50 +1000 | [diff] [blame] | 65 | #define EEH_PE_CFG_BLOCKED (1 << 2) /* Block config access */ |
Gavin Shan | 28bf36f | 2014-11-14 10:47:29 +1100 | [diff] [blame] | 66 | #define EEH_PE_RESET (1 << 3) /* PE reset in progress */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 67 | |
Gavin Shan | 807a827 | 2013-07-24 10:24:55 +0800 | [diff] [blame] | 68 | #define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */ |
Gavin Shan | b6541db | 2014-10-01 17:07:53 +1000 | [diff] [blame] | 69 | #define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */ |
Gavin Shan | 432227e | 2014-12-11 14:28:55 +1100 | [diff] [blame] | 70 | #define EEH_PE_REMOVED (1 << 10) /* Removed permanently */ |
Gavin Shan | 05ba75f | 2016-02-09 15:50:21 +1100 | [diff] [blame] | 71 | #define EEH_PE_PRI_BUS (1 << 11) /* Cached primary bus */ |
Gavin Shan | 807a827 | 2013-07-24 10:24:55 +0800 | [diff] [blame] | 72 | |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 73 | struct eeh_pe { |
| 74 | int type; /* PE type: PHB/Bus/Device */ |
| 75 | int state; /* PE EEH dependent mode */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 76 | int addr; /* PE configuration address */ |
| 77 | struct pci_controller *phb; /* Associated PHB */ |
Gavin Shan | 8cdb283 | 2013-06-20 13:20:55 +0800 | [diff] [blame] | 78 | struct pci_bus *bus; /* Top PCI bus for bus PE */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 79 | int check_count; /* Times of ignored error */ |
| 80 | int freeze_count; /* Times of froze up */ |
Arnd Bergmann | edfd17f | 2017-11-04 22:26:52 +0100 | [diff] [blame] | 81 | time64_t tstamp; /* Time on first-time freeze */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 82 | int false_positives; /* Times of reported #ff's */ |
Gavin Shan | 05ec424 | 2014-06-10 11:41:55 +1000 | [diff] [blame] | 83 | atomic_t pass_dev_cnt; /* Count of passed through devs */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 84 | struct eeh_pe *parent; /* Parent PE */ |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 85 | void *data; /* PE auxillary data */ |
Sam Bobroff | 80e65b0 | 2018-09-12 11:23:26 +1000 | [diff] [blame] | 86 | struct list_head child_list; /* List of PEs below this PE */ |
| 87 | struct list_head child; /* Memb. child_list/eeh_phb_pe */ |
| 88 | struct list_head edevs; /* List of eeh_dev in this PE */ |
Oliver O'Halloran | 25baf3d | 2019-09-03 20:15:56 +1000 | [diff] [blame] | 89 | |
Michael Ellerman | 1b7f3b6c | 2019-09-13 23:32:13 +1000 | [diff] [blame] | 90 | #ifdef CONFIG_STACKTRACE |
Oliver O'Halloran | 25baf3d | 2019-09-03 20:15:56 +1000 | [diff] [blame] | 91 | /* |
| 92 | * Saved stack trace. When we find a PE freeze in eeh_dev_check_failure |
| 93 | * the stack trace is saved here so we can print it in the recovery |
| 94 | * thread if it turns out to due to a real problem rather than |
| 95 | * a hot-remove. |
| 96 | * |
| 97 | * A max of 64 entries might be overkill, but it also might not be. |
| 98 | */ |
| 99 | unsigned long stack_trace[64]; |
| 100 | int trace_entries; |
Michael Ellerman | 1b7f3b6c | 2019-09-13 23:32:13 +1000 | [diff] [blame] | 101 | #endif /* CONFIG_STACKTRACE */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 102 | }; |
| 103 | |
Gavin Shan | 9feed42 | 2013-07-24 10:24:56 +0800 | [diff] [blame] | 104 | #define eeh_pe_for_each_dev(pe, edev, tmp) \ |
Sam Bobroff | 80e65b0 | 2018-09-12 11:23:26 +1000 | [diff] [blame] | 105 | list_for_each_entry_safe(edev, tmp, &pe->edevs, entry) |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 106 | |
Sam Bobroff | 309ed3a | 2018-05-25 13:11:35 +1000 | [diff] [blame] | 107 | #define eeh_for_each_pe(root, pe) \ |
| 108 | for (pe = root; pe; pe = eeh_pe_next(pe, root)) |
| 109 | |
Gavin Shan | 05ec424 | 2014-06-10 11:41:55 +1000 | [diff] [blame] | 110 | static inline bool eeh_pe_passed(struct eeh_pe *pe) |
| 111 | { |
| 112 | return pe ? !!atomic_read(&pe->pass_dev_cnt) : false; |
| 113 | } |
| 114 | |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 115 | /* |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 116 | * The struct is used to trace EEH state for the associated |
| 117 | * PCI device node or PCI device. In future, it might |
| 118 | * represent PE as well so that the EEH device to form |
| 119 | * another tree except the currently existing tree of PCI |
| 120 | * buses and PCI devices |
| 121 | */ |
Gavin Shan | 4b83bd4 | 2013-07-24 10:24:59 +0800 | [diff] [blame] | 122 | #define EEH_DEV_BRIDGE (1 << 0) /* PCI bridge */ |
| 123 | #define EEH_DEV_ROOT_PORT (1 << 1) /* PCIe root port */ |
| 124 | #define EEH_DEV_DS_PORT (1 << 2) /* Downstream port */ |
| 125 | #define EEH_DEV_IRQ_DISABLED (1 << 3) /* Interrupt disabled */ |
| 126 | #define EEH_DEV_DISCONNECTED (1 << 4) /* Removing from PE */ |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 127 | |
Gavin Shan | f26c7a0 | 2014-01-12 14:13:45 +0800 | [diff] [blame] | 128 | #define EEH_DEV_NO_HANDLER (1 << 8) /* No error handler */ |
| 129 | #define EEH_DEV_SYSFS (1 << 9) /* Sysfs created */ |
Gavin Shan | d2b0f6f | 2014-04-24 18:00:19 +1000 | [diff] [blame] | 130 | #define EEH_DEV_REMOVED (1 << 10) /* Removed permanently */ |
Gavin Shan | ab55d21 | 2013-07-24 10:25:01 +0800 | [diff] [blame] | 131 | |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 132 | struct eeh_dev { |
| 133 | int mode; /* EEH mode */ |
Oliver O'Halloran | 7c33a99 | 2019-08-16 14:48:11 +1000 | [diff] [blame] | 134 | int bdfn; /* bdfn of device (for cfg ops) */ |
| 135 | struct pci_controller *controller; |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 136 | int pe_config_addr; /* PE config address */ |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 137 | u32 config_space[16]; /* Saved PCI config space */ |
Gavin Shan | 2a18dfc | 2014-04-24 18:00:16 +1000 | [diff] [blame] | 138 | int pcix_cap; /* Saved PCIx capability */ |
| 139 | int pcie_cap; /* Saved PCIe capability */ |
| 140 | int aer_cap; /* Saved AER capability */ |
Wei Yang | 9312bc5 | 2016-03-04 10:53:09 +1100 | [diff] [blame] | 141 | int af_cap; /* Saved AF capability */ |
Gavin Shan | 968f968 | 2012-09-07 22:44:05 +0000 | [diff] [blame] | 142 | struct eeh_pe *pe; /* Associated PE */ |
Sam Bobroff | 80e65b0 | 2018-09-12 11:23:26 +1000 | [diff] [blame] | 143 | struct list_head entry; /* Membership in eeh_pe.edevs */ |
| 144 | struct list_head rmv_entry; /* Membership in rmv_list */ |
Gavin Shan | e8e9b34 | 2015-03-17 16:15:05 +1100 | [diff] [blame] | 145 | struct pci_dn *pdn; /* Associated PCI device node */ |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 146 | struct pci_dev *pdev; /* Associated PCI device */ |
Wei Yang | 67086e3 | 2016-03-04 10:53:11 +1100 | [diff] [blame] | 147 | bool in_error; /* Error flag for edev */ |
Oliver O'Halloran | dffa915 | 2020-07-25 18:12:20 +1000 | [diff] [blame] | 148 | |
| 149 | /* VF specific properties */ |
Wei Yang | 39218cd | 2016-03-04 10:53:07 +1100 | [diff] [blame] | 150 | struct pci_dev *physfn; /* Associated SRIOV PF */ |
Oliver O'Halloran | dffa915 | 2020-07-25 18:12:20 +1000 | [diff] [blame] | 151 | int vf_index; /* Index of this VF */ |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 152 | }; |
| 153 | |
Sam Bobroff | b093f2c | 2019-08-16 14:48:12 +1000 | [diff] [blame] | 154 | /* "fmt" must be a simple literal string */ |
| 155 | #define EEH_EDEV_PRINT(level, edev, fmt, ...) \ |
| 156 | pr_##level("PCI %04x:%02x:%02x.%x#%04x: EEH: " fmt, \ |
| 157 | (edev)->controller->global_number, PCI_BUSNO((edev)->bdfn), \ |
| 158 | PCI_SLOT((edev)->bdfn), PCI_FUNC((edev)->bdfn), \ |
| 159 | ((edev)->pe ? (edev)->pe_config_addr : 0xffff), ##__VA_ARGS__) |
| 160 | #define eeh_edev_dbg(edev, fmt, ...) EEH_EDEV_PRINT(debug, (edev), fmt, ##__VA_ARGS__) |
| 161 | #define eeh_edev_info(edev, fmt, ...) EEH_EDEV_PRINT(info, (edev), fmt, ##__VA_ARGS__) |
| 162 | #define eeh_edev_warn(edev, fmt, ...) EEH_EDEV_PRINT(warn, (edev), fmt, ##__VA_ARGS__) |
| 163 | #define eeh_edev_err(edev, fmt, ...) EEH_EDEV_PRINT(err, (edev), fmt, ##__VA_ARGS__) |
| 164 | |
Gavin Shan | e8e9b34 | 2015-03-17 16:15:05 +1100 | [diff] [blame] | 165 | static inline struct pci_dn *eeh_dev_to_pdn(struct eeh_dev *edev) |
| 166 | { |
| 167 | return edev ? edev->pdn : NULL; |
| 168 | } |
| 169 | |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 170 | static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev) |
| 171 | { |
Gavin Shan | 2d5c121 | 2013-06-05 15:34:03 +0800 | [diff] [blame] | 172 | return edev ? edev->pdev : NULL; |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 173 | } |
| 174 | |
Wei Yang | 2a58222 | 2014-09-17 10:48:26 +0800 | [diff] [blame] | 175 | static inline struct eeh_pe *eeh_dev_to_pe(struct eeh_dev* edev) |
| 176 | { |
| 177 | return edev ? edev->pe : NULL; |
| 178 | } |
| 179 | |
Gavin Shan | 7e4e786 | 2014-01-15 13:16:11 +0800 | [diff] [blame] | 180 | /* Return values from eeh_ops::next_error */ |
| 181 | enum { |
| 182 | EEH_NEXT_ERR_NONE = 0, |
| 183 | EEH_NEXT_ERR_INF, |
| 184 | EEH_NEXT_ERR_FROZEN_PE, |
| 185 | EEH_NEXT_ERR_FENCED_PHB, |
| 186 | EEH_NEXT_ERR_DEAD_PHB, |
| 187 | EEH_NEXT_ERR_DEAD_IOC |
| 188 | }; |
| 189 | |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 190 | /* |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 191 | * The struct is used to trace the registered EEH operation |
| 192 | * callback functions. Actually, those operation callback |
| 193 | * functions are heavily platform dependent. That means the |
| 194 | * platform should register its own EEH operation callback |
| 195 | * functions before any EEH further operations. |
| 196 | */ |
Gavin Shan | 8fb8f709 | 2012-02-27 20:03:55 +0000 | [diff] [blame] | 197 | #define EEH_OPT_DISABLE 0 /* EEH disable */ |
| 198 | #define EEH_OPT_ENABLE 1 /* EEH enable */ |
| 199 | #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */ |
| 200 | #define EEH_OPT_THAW_DMA 3 /* DMA enable */ |
Gavin Shan | 0d5ee52 | 2014-09-30 12:38:52 +1000 | [diff] [blame] | 201 | #define EEH_OPT_FREEZE_PE 4 /* Freeze PE */ |
Gavin Shan | eb594a4 | 2012-02-27 20:03:57 +0000 | [diff] [blame] | 202 | #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */ |
| 203 | #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */ |
| 204 | #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */ |
| 205 | #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */ |
| 206 | #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */ |
| 207 | #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */ |
| 208 | #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */ |
Gavin Shan | 2652481 | 2012-02-27 20:03:59 +0000 | [diff] [blame] | 209 | #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */ |
| 210 | #define EEH_RESET_HOT 1 /* Hot reset */ |
| 211 | #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */ |
Gavin Shan | 8d63329 | 2012-02-27 20:04:00 +0000 | [diff] [blame] | 212 | #define EEH_LOG_TEMP 1 /* EEH temporary error log */ |
| 213 | #define EEH_LOG_PERM 2 /* EEH permanent error log */ |
Gavin Shan | eb594a4 | 2012-02-27 20:03:57 +0000 | [diff] [blame] | 214 | |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 215 | struct eeh_ops { |
| 216 | char *name; |
Oliver O'Halloran | e86350f7 | 2020-03-06 18:39:04 +1100 | [diff] [blame] | 217 | struct eeh_dev *(*probe)(struct pci_dev *pdev); |
Gavin Shan | 371a395 | 2012-09-07 22:44:14 +0000 | [diff] [blame] | 218 | int (*set_option)(struct eeh_pe *pe, int option); |
Sam Bobroff | fef7f90 | 2018-09-12 11:23:32 +1000 | [diff] [blame] | 219 | int (*get_state)(struct eeh_pe *pe, int *delay); |
Gavin Shan | 371a395 | 2012-09-07 22:44:14 +0000 | [diff] [blame] | 220 | int (*reset)(struct eeh_pe *pe, int option); |
Gavin Shan | 371a395 | 2012-09-07 22:44:14 +0000 | [diff] [blame] | 221 | int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len); |
| 222 | int (*configure_bridge)(struct eeh_pe *pe); |
Gavin Shan | 131c123 | 2014-09-30 12:38:56 +1000 | [diff] [blame] | 223 | int (*err_inject)(struct eeh_pe *pe, int type, int func, |
| 224 | unsigned long addr, unsigned long mask); |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 225 | int (*read_config)(struct eeh_dev *edev, int where, int size, u32 *val); |
| 226 | int (*write_config)(struct eeh_dev *edev, int where, int size, u32 val); |
Gavin Shan | 8a6b1bc | 2013-06-20 13:21:04 +0800 | [diff] [blame] | 227 | int (*next_error)(struct eeh_pe **pe); |
Oliver O'Halloran | 0c2c765 | 2020-07-25 18:12:24 +1000 | [diff] [blame] | 228 | int (*restore_config)(struct eeh_dev *edev); |
Oliver O'Halloran | 8225d54 | 2020-07-25 18:12:25 +1000 | [diff] [blame] | 229 | int (*notify_resume)(struct eeh_dev *edev); |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 230 | }; |
| 231 | |
Gavin Shan | 8a5ad35 | 2014-04-24 18:00:17 +1000 | [diff] [blame] | 232 | extern int eeh_subsystem_flags; |
Oliver O'Halloran | 46ee7c3 | 2019-02-15 11:48:11 +1100 | [diff] [blame] | 233 | extern u32 eeh_max_freezes; |
Oliver O'Halloran | 6b493f6 | 2019-02-15 11:48:16 +1100 | [diff] [blame] | 234 | extern bool eeh_debugfs_no_recover; |
Gavin Shan | aa1e637 | 2012-02-27 20:03:53 +0000 | [diff] [blame] | 235 | extern struct eeh_ops *eeh_ops; |
Gavin Shan | 4907581 | 2013-06-20 13:21:03 +0800 | [diff] [blame] | 236 | extern raw_spinlock_t confirm_error_lock; |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 237 | |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 238 | static inline void eeh_add_flag(int flag) |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 239 | { |
Gavin Shan | 8a5ad35 | 2014-04-24 18:00:17 +1000 | [diff] [blame] | 240 | eeh_subsystem_flags |= flag; |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 241 | } |
| 242 | |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 243 | static inline void eeh_clear_flag(int flag) |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 244 | { |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 245 | eeh_subsystem_flags &= ~flag; |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 246 | } |
| 247 | |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 248 | static inline bool eeh_has_flag(int flag) |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 249 | { |
Gavin Shan | 05b1721 | 2014-07-17 14:41:38 +1000 | [diff] [blame] | 250 | return !!(eeh_subsystem_flags & flag); |
| 251 | } |
| 252 | |
| 253 | static inline bool eeh_enabled(void) |
| 254 | { |
Sam Bobroff | 5464492 | 2018-09-12 11:23:29 +1000 | [diff] [blame] | 255 | return eeh_has_flag(EEH_ENABLED) && !eeh_has_flag(EEH_FORCE_DISABLED); |
Gavin Shan | d7bb886 | 2012-09-07 22:44:21 +0000 | [diff] [blame] | 256 | } |
Gavin Shan | 646a849 | 2012-09-07 22:44:06 +0000 | [diff] [blame] | 257 | |
Gavin Shan | 4907581 | 2013-06-20 13:21:03 +0800 | [diff] [blame] | 258 | static inline void eeh_serialize_lock(unsigned long *flags) |
| 259 | { |
| 260 | raw_spin_lock_irqsave(&confirm_error_lock, *flags); |
| 261 | } |
| 262 | |
| 263 | static inline void eeh_serialize_unlock(unsigned long flags) |
| 264 | { |
| 265 | raw_spin_unlock_irqrestore(&confirm_error_lock, flags); |
| 266 | } |
| 267 | |
Sam Bobroff | 34a286a | 2018-03-19 13:49:23 +1100 | [diff] [blame] | 268 | static inline bool eeh_state_active(int state) |
| 269 | { |
| 270 | return (state & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) |
| 271 | == (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); |
| 272 | } |
| 273 | |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 274 | typedef void (*eeh_edev_traverse_func)(struct eeh_dev *edev, void *flag); |
Sam Bobroff | d6c4932 | 2018-05-25 13:11:32 +1000 | [diff] [blame] | 275 | typedef void *(*eeh_pe_traverse_func)(struct eeh_pe *pe, void *flag); |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 276 | void eeh_set_pe_aux_size(int size); |
Greg Kroah-Hartman | cad5cef | 2012-12-21 14:04:10 -0800 | [diff] [blame] | 277 | int eeh_phb_pe_create(struct pci_controller *phb); |
Sam Bobroff | fef7f90 | 2018-09-12 11:23:32 +1000 | [diff] [blame] | 278 | int eeh_wait_state(struct eeh_pe *pe, int max_wait); |
Gavin Shan | 9ff6743 | 2013-06-20 13:20:53 +0800 | [diff] [blame] | 279 | struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb); |
Sam Bobroff | 309ed3a | 2018-05-25 13:11:35 +1000 | [diff] [blame] | 280 | struct eeh_pe *eeh_pe_next(struct eeh_pe *pe, struct eeh_pe *root); |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 281 | struct eeh_pe *eeh_pe_get(struct pci_controller *phb, int pe_no); |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 282 | int eeh_pe_tree_insert(struct eeh_dev *edev, struct eeh_pe *new_pe_parent); |
Oliver O'Halloran | d923ab7 | 2020-07-25 18:12:29 +1000 | [diff] [blame] | 283 | int eeh_pe_tree_remove(struct eeh_dev *edev); |
Gavin Shan | 5a71978 | 2013-06-20 13:21:01 +0800 | [diff] [blame] | 284 | void eeh_pe_update_time_stamp(struct eeh_pe *pe); |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 285 | void *eeh_pe_traverse(struct eeh_pe *root, |
Sam Bobroff | d6c4932 | 2018-05-25 13:11:32 +1000 | [diff] [blame] | 286 | eeh_pe_traverse_func fn, void *flag); |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 287 | void eeh_pe_dev_traverse(struct eeh_pe *root, |
| 288 | eeh_edev_traverse_func fn, void *flag); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 289 | void eeh_pe_restore_bars(struct eeh_pe *pe); |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 290 | const char *eeh_pe_loc_get(struct eeh_pe *pe); |
Gavin Shan | 9b3c76f | 2012-09-07 22:44:19 +0000 | [diff] [blame] | 291 | struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe); |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 292 | |
Sam Bobroff | c44e4cc | 2019-08-16 14:48:10 +1000 | [diff] [blame] | 293 | void eeh_show_enabled(void); |
Oliver O'Halloran | d125aed | 2020-09-18 19:30:42 +1000 | [diff] [blame] | 294 | int __init eeh_init(struct eeh_ops *ops); |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 295 | int eeh_check_failure(const volatile void __iomem *token); |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 296 | int eeh_dev_check_failure(struct eeh_dev *edev); |
Sam Bobroff | 685a0bc | 2019-08-16 14:48:08 +1000 | [diff] [blame] | 297 | void eeh_addr_cache_init(void); |
Oliver O'Halloran | e86350f7 | 2020-03-06 18:39:04 +1100 | [diff] [blame] | 298 | void eeh_probe_device(struct pci_dev *pdev); |
Gavin Shan | 807a827 | 2013-07-24 10:24:55 +0800 | [diff] [blame] | 299 | void eeh_remove_device(struct pci_dev *); |
Sam Bobroff | 188fdea | 2018-11-29 14:16:38 +1100 | [diff] [blame] | 300 | int eeh_unfreeze_pe(struct eeh_pe *pe); |
Gavin Shan | 5cfb20b | 2014-09-30 12:39:07 +1000 | [diff] [blame] | 301 | int eeh_pe_reset_and_recover(struct eeh_pe *pe); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 302 | int eeh_dev_open(struct pci_dev *pdev); |
| 303 | void eeh_dev_release(struct pci_dev *pdev); |
| 304 | struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group); |
| 305 | int eeh_pe_set_option(struct eeh_pe *pe, int option); |
| 306 | int eeh_pe_get_state(struct eeh_pe *pe); |
Sam Bobroff | 1ef5207 | 2018-11-29 14:16:41 +1100 | [diff] [blame] | 307 | int eeh_pe_reset(struct eeh_pe *pe, int option, bool include_passed); |
Gavin Shan | 212d16c | 2014-06-10 11:41:56 +1000 | [diff] [blame] | 308 | int eeh_pe_configure(struct eeh_pe *pe); |
Gavin Shan | ec33d36 | 2015-03-26 16:42:08 +1100 | [diff] [blame] | 309 | int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func, |
| 310 | unsigned long addr, unsigned long mask); |
Linas Vepstas | e2a296e | 2005-11-03 18:51:31 -0600 | [diff] [blame] | 311 | |
| 312 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. |
| 314 | * |
| 315 | * If this macro yields TRUE, the caller relays to eeh_check_failure() |
| 316 | * which does further tests out of line. |
| 317 | */ |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 318 | #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | |
| 320 | /* |
| 321 | * Reads from a device which has been isolated by EEH will return |
| 322 | * all 1s. This macro gives an all-1s value of the given size (in |
| 323 | * bytes: 1, 2, or 4) for comparing with the result of a read. |
| 324 | */ |
| 325 | #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8)) |
| 326 | |
| 327 | #else /* !CONFIG_EEH */ |
Gavin Shan | eb740b5 | 2012-02-27 20:04:04 +0000 | [diff] [blame] | 328 | |
Gavin Shan | 2ec5a0a | 2014-02-12 15:24:55 +0800 | [diff] [blame] | 329 | static inline bool eeh_enabled(void) |
| 330 | { |
| 331 | return false; |
| 332 | } |
| 333 | |
Sam Bobroff | c44e4cc | 2019-08-16 14:48:10 +1000 | [diff] [blame] | 334 | static inline void eeh_show_enabled(void) { } |
Gavin Shan | 51fb5f5 | 2013-06-20 13:20:56 +0800 | [diff] [blame] | 335 | |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 336 | static inline int eeh_check_failure(const volatile void __iomem *token) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | { |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 338 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | } |
| 340 | |
Gavin Shan | f8f7d63 | 2012-09-07 22:44:22 +0000 | [diff] [blame] | 341 | #define eeh_dev_check_failure(x) (0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | |
Sam Bobroff | 685a0bc | 2019-08-16 14:48:08 +1000 | [diff] [blame] | 343 | static inline void eeh_addr_cache_init(void) { } |
| 344 | |
Oliver O'Halloran | e86350f7 | 2020-03-06 18:39:04 +1100 | [diff] [blame] | 345 | static inline void eeh_probe_device(struct pci_dev *dev) { } |
Gavin Shan | f285649 | 2013-07-24 10:24:52 +0800 | [diff] [blame] | 346 | |
Gavin Shan | 807a827 | 2013-07-24 10:24:55 +0800 | [diff] [blame] | 347 | static inline void eeh_remove_device(struct pci_dev *dev) { } |
Gavin Shan | 646a849 | 2012-09-07 22:44:06 +0000 | [diff] [blame] | 348 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | #define EEH_POSSIBLE_ERROR(val, type) (0) |
| 350 | #define EEH_IO_ERROR_VALUE(size) (-1UL) |
Oliver O'Halloran | 475028e | 2020-07-25 18:12:18 +1000 | [diff] [blame] | 351 | static inline int eeh_phb_pe_create(struct pci_controller *phb) { return 0; } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | #endif /* CONFIG_EEH */ |
| 353 | |
Oliver O'Halloran | b6eebb0 | 2020-03-06 18:39:03 +1100 | [diff] [blame] | 354 | #if defined(CONFIG_PPC_PSERIES) && defined(CONFIG_EEH) |
Oliver O'Halloran | b6eebb0 | 2020-03-06 18:39:03 +1100 | [diff] [blame] | 355 | void pseries_eeh_init_edev_recursive(struct pci_dn *pdn); |
Oliver O'Halloran | b6eebb0 | 2020-03-06 18:39:03 +1100 | [diff] [blame] | 356 | #endif |
| 357 | |
Benjamin Herrenschmidt | 8b8da35 | 2008-10-27 19:48:37 +0000 | [diff] [blame] | 358 | #ifdef CONFIG_PPC64 |
Linas Vepstas | 172ca92 | 2005-11-03 18:50:04 -0600 | [diff] [blame] | 359 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | * MMIO read/write operations with EEH support. |
| 361 | */ |
| 362 | static inline u8 eeh_readb(const volatile void __iomem *addr) |
| 363 | { |
| 364 | u8 val = in_8(addr); |
| 365 | if (EEH_POSSIBLE_ERROR(val, u8)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 366 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | return val; |
| 368 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | |
| 370 | static inline u16 eeh_readw(const volatile void __iomem *addr) |
| 371 | { |
| 372 | u16 val = in_le16(addr); |
| 373 | if (EEH_POSSIBLE_ERROR(val, u16)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 374 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | return val; |
| 376 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | |
| 378 | static inline u32 eeh_readl(const volatile void __iomem *addr) |
| 379 | { |
| 380 | u32 val = in_le32(addr); |
| 381 | if (EEH_POSSIBLE_ERROR(val, u32)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 382 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | return val; |
| 384 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | |
| 386 | static inline u64 eeh_readq(const volatile void __iomem *addr) |
| 387 | { |
| 388 | u64 val = in_le64(addr); |
| 389 | if (EEH_POSSIBLE_ERROR(val, u64)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 390 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | return val; |
| 392 | } |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 393 | |
| 394 | static inline u16 eeh_readw_be(const volatile void __iomem *addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | { |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 396 | u16 val = in_be16(addr); |
| 397 | if (EEH_POSSIBLE_ERROR(val, u16)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 398 | eeh_check_failure(addr); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 399 | return val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | } |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 401 | |
| 402 | static inline u32 eeh_readl_be(const volatile void __iomem *addr) |
| 403 | { |
| 404 | u32 val = in_be32(addr); |
| 405 | if (EEH_POSSIBLE_ERROR(val, u32)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 406 | eeh_check_failure(addr); |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 407 | return val; |
| 408 | } |
| 409 | |
| 410 | static inline u64 eeh_readq_be(const volatile void __iomem *addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | { |
| 412 | u64 val = in_be64(addr); |
| 413 | if (EEH_POSSIBLE_ERROR(val, u64)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 414 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | return val; |
| 416 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 418 | static inline void eeh_memcpy_fromio(void *dest, const |
| 419 | volatile void __iomem *src, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | unsigned long n) |
| 421 | { |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 422 | _memcpy_fromio(dest, src, n); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | |
| 424 | /* Look for ffff's here at dest[n]. Assume that at least 4 bytes |
| 425 | * were copied. Check all four bytes. |
| 426 | */ |
Benjamin Herrenschmidt | 68a6435 | 2006-11-13 09:27:39 +1100 | [diff] [blame] | 427 | if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 428 | eeh_check_failure(src); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | } |
| 430 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | /* in-string eeh macros */ |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 432 | static inline void eeh_readsb(const volatile void __iomem *addr, void * buf, |
| 433 | int ns) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | { |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 435 | _insb(addr, buf, ns); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 437 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | } |
| 439 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 440 | static inline void eeh_readsw(const volatile void __iomem *addr, void * buf, |
| 441 | int ns) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | { |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 443 | _insw(addr, buf, ns); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 445 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | } |
| 447 | |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 448 | static inline void eeh_readsl(const volatile void __iomem *addr, void * buf, |
| 449 | int nl) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | { |
Benjamin Herrenschmidt | 4cb3cee | 2006-11-11 17:25:10 +1100 | [diff] [blame] | 451 | _insl(addr, buf, nl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32)) |
Gavin Shan | 3e93805 | 2014-09-30 12:38:50 +1000 | [diff] [blame] | 453 | eeh_check_failure(addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | } |
| 455 | |
Oliver O'Halloran | 5ca85ae | 2019-02-15 11:48:13 +1100 | [diff] [blame] | 456 | |
Nick Child | d276960 | 2021-12-16 17:00:16 -0500 | [diff] [blame] | 457 | void __init eeh_cache_debugfs_init(void); |
Oliver O'Halloran | 5ca85ae | 2019-02-15 11:48:13 +1100 | [diff] [blame] | 458 | |
Benjamin Herrenschmidt | 8b8da35 | 2008-10-27 19:48:37 +0000 | [diff] [blame] | 459 | #endif /* CONFIG_PPC64 */ |
Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 460 | #endif /* __KERNEL__ */ |
Benjamin Herrenschmidt | 8b8da35 | 2008-10-27 19:48:37 +0000 | [diff] [blame] | 461 | #endif /* _POWERPC_EEH_H */ |