Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 2 | comment "Processor Type" |
| 3 | |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 4 | choice |
| 5 | prompt "CPU family support" |
| 6 | default M68KCLASSIC if MMU |
| 7 | default COLDFIRE if !MMU |
| 8 | help |
| 9 | The Freescale (was Motorola) M68K family of processors implements |
| 10 | the full 68000 processor instruction set. |
Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 11 | The Freescale ColdFire family of processors is a modern derivative |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 12 | of the 68000 processor family. They are mainly targeted at embedded |
| 13 | applications, and are all System-On-Chip (SOC) devices, as opposed |
| 14 | to stand alone CPUs. They implement a subset of the original 68000 |
| 15 | processor instruction set. |
| 16 | If you anticipate running this kernel on a computer with a classic |
| 17 | MC68xxx processor, select M68KCLASSIC. |
| 18 | If you anticipate running this kernel on a computer with a ColdFire |
| 19 | processor, select COLDFIRE. |
| 20 | |
| 21 | config M68KCLASSIC |
| 22 | bool "Classic M68K CPU family support" |
Mike Rapoport | fcd353a | 2020-12-14 19:10:15 -0800 | [diff] [blame] | 23 | select HAVE_ARCH_PFN_VALID |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 24 | |
| 25 | config COLDFIRE |
| 26 | bool "Coldfire CPU family support" |
Mark Brown | 7563bbf | 2012-04-15 10:52:54 +0100 | [diff] [blame] | 27 | select ARCH_HAVE_CUSTOM_GPIO_H |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 28 | select CPU_HAS_NO_BITFIELDS |
Geert Uytterhoeven | 2189e92 | 2021-07-25 12:44:13 +0200 | [diff] [blame] | 29 | select CPU_HAS_NO_CAS |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 30 | select CPU_HAS_NO_MULDIV64 |
| 31 | select GENERIC_CSUM |
Linus Walleij | e05f2e1 | 2016-04-19 11:17:49 +0200 | [diff] [blame] | 32 | select GPIOLIB |
Stephen Boyd | bbd7ffd | 2020-04-08 23:44:13 -0700 | [diff] [blame] | 33 | select HAVE_LEGACY_CLK |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 34 | |
| 35 | endchoice |
| 36 | |
| 37 | if M68KCLASSIC |
| 38 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 39 | config M68000 |
Greg Ungerer | 6b8be80 | 2022-05-18 16:14:05 +1000 | [diff] [blame] | 40 | def_bool y |
Luis Alves | 9da1a84 | 2012-10-25 21:01:16 +0100 | [diff] [blame] | 41 | depends on !MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 42 | select CPU_HAS_NO_BITFIELDS |
Geert Uytterhoeven | 2189e92 | 2021-07-25 12:44:13 +0200 | [diff] [blame] | 43 | select CPU_HAS_NO_CAS |
Greg Ungerer | 84f3fb7 | 2011-11-11 15:13:08 +1000 | [diff] [blame] | 44 | select CPU_HAS_NO_MULDIV64 |
Geert Uytterhoeven | 9f1f118 | 2012-06-06 19:37:52 +0200 | [diff] [blame] | 45 | select CPU_HAS_NO_UNALIGNED |
Greg Ungerer | 7f73baf | 2011-10-18 15:49:19 +1000 | [diff] [blame] | 46 | select GENERIC_CSUM |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 47 | select CPU_NO_EFFICIENT_FFS |
George Spelvin | 14c44b9 | 2016-05-26 11:36:19 -0400 | [diff] [blame] | 48 | select HAVE_ARCH_HASH |
Greg Ungerer | 18011e5 | 2022-08-25 14:36:44 +1000 | [diff] [blame] | 49 | select LEGACY_TIMER_TICK |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 50 | help |
| 51 | The Freescale (was Motorola) 68000 CPU is the first generation of |
| 52 | the well known M68K family of processors. The CPU core as well as |
| 53 | being available as a stand alone CPU was also used in many |
| 54 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain |
| 55 | a paging MMU. |
| 56 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 57 | config M68020 |
| 58 | bool "68020 support" |
| 59 | depends on MMU |
Greg Ungerer | e5f8d1f | 2016-08-24 13:32:01 +1000 | [diff] [blame] | 60 | select FPU |
Greg Ungerer | e08d703 | 2011-10-14 14:43:30 +1000 | [diff] [blame] | 61 | select CPU_HAS_ADDRESS_SPACES |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 62 | help |
| 63 | If you anticipate running this kernel on a computer with a MC68020 |
| 64 | processor, say Y. Otherwise, say N. Note that the 68020 requires a |
| 65 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the |
| 66 | Sun 3, which provides its own version. |
| 67 | |
| 68 | config M68030 |
| 69 | bool "68030 support" |
| 70 | depends on MMU && !MMU_SUN3 |
Greg Ungerer | e5f8d1f | 2016-08-24 13:32:01 +1000 | [diff] [blame] | 71 | select FPU |
Greg Ungerer | e08d703 | 2011-10-14 14:43:30 +1000 | [diff] [blame] | 72 | select CPU_HAS_ADDRESS_SPACES |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 73 | help |
| 74 | If you anticipate running this kernel on a computer with a MC68030 |
| 75 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not |
| 76 | work, as it does not include an MMU (Memory Management Unit). |
| 77 | |
| 78 | config M68040 |
| 79 | bool "68040 support" |
| 80 | depends on MMU && !MMU_SUN3 |
Greg Ungerer | e5f8d1f | 2016-08-24 13:32:01 +1000 | [diff] [blame] | 81 | select FPU |
Greg Ungerer | e08d703 | 2011-10-14 14:43:30 +1000 | [diff] [blame] | 82 | select CPU_HAS_ADDRESS_SPACES |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 83 | help |
| 84 | If you anticipate running this kernel on a computer with a MC68LC040 |
| 85 | or MC68040 processor, say Y. Otherwise, say N. Note that an |
| 86 | MC68EC040 will not work, as it does not include an MMU (Memory |
| 87 | Management Unit). |
| 88 | |
| 89 | config M68060 |
| 90 | bool "68060 support" |
| 91 | depends on MMU && !MMU_SUN3 |
Greg Ungerer | e5f8d1f | 2016-08-24 13:32:01 +1000 | [diff] [blame] | 92 | select FPU |
Greg Ungerer | e08d703 | 2011-10-14 14:43:30 +1000 | [diff] [blame] | 93 | select CPU_HAS_ADDRESS_SPACES |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 94 | help |
| 95 | If you anticipate running this kernel on a computer with a MC68060 |
| 96 | processor, say Y. Otherwise, say N. |
| 97 | |
| 98 | config M68328 |
Arnd Bergmann | 8b22820 | 2020-10-30 15:26:24 +0100 | [diff] [blame] | 99 | bool |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 100 | depends on !MMU |
| 101 | select M68000 |
| 102 | help |
| 103 | Motorola 68328 processor support. |
| 104 | |
| 105 | config M68EZ328 |
Arnd Bergmann | 8b22820 | 2020-10-30 15:26:24 +0100 | [diff] [blame] | 106 | bool |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 107 | depends on !MMU |
| 108 | select M68000 |
| 109 | help |
| 110 | Motorola 68EX328 processor support. |
| 111 | |
| 112 | config M68VZ328 |
Arnd Bergmann | 8b22820 | 2020-10-30 15:26:24 +0100 | [diff] [blame] | 113 | bool |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 114 | depends on !MMU |
| 115 | select M68000 |
| 116 | help |
| 117 | Motorola 68VZ328 processor support. |
| 118 | |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 119 | endif # M68KCLASSIC |
| 120 | |
| 121 | if COLDFIRE |
| 122 | |
Greg Ungerer | fa95a1d | 2015-07-07 15:44:02 +1000 | [diff] [blame] | 123 | choice |
| 124 | prompt "ColdFire SoC type" |
| 125 | default M520x |
| 126 | help |
| 127 | Select the type of ColdFire System-on-Chip (SoC) that you want |
| 128 | to build for. |
| 129 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 130 | config M5206 |
| 131 | bool "MCF5206" |
| 132 | depends on !MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 133 | select COLDFIRE_SW_A7 |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 134 | select COLDFIRE_TIMERS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 135 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 136 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 137 | help |
| 138 | Motorola ColdFire 5206 processor support. |
| 139 | |
| 140 | config M5206e |
| 141 | bool "MCF5206e" |
| 142 | depends on !MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 143 | select COLDFIRE_SW_A7 |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 144 | select COLDFIRE_TIMERS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 145 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 146 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 147 | help |
| 148 | Motorola ColdFire 5206e processor support. |
| 149 | |
| 150 | config M520x |
| 151 | bool "MCF520x" |
| 152 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 153 | select COLDFIRE_PIT_TIMER |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 154 | select HAVE_CACHE_SPLIT |
| 155 | help |
Juerg Haefliger | a1ab4c1 | 2022-05-24 09:58:46 +0200 | [diff] [blame] | 156 | Freescale Coldfire 5207/5208 processor support. |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 157 | |
| 158 | config M523x |
| 159 | bool "MCF523x" |
| 160 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 161 | select COLDFIRE_PIT_TIMER |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 162 | select HAVE_CACHE_SPLIT |
| 163 | select HAVE_IPSBAR |
| 164 | help |
| 165 | Freescale Coldfire 5230/1/2/4/5 processor support |
| 166 | |
| 167 | config M5249 |
| 168 | bool "MCF5249" |
| 169 | depends on !MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 170 | select COLDFIRE_SW_A7 |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 171 | select COLDFIRE_TIMERS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 172 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 173 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 174 | help |
| 175 | Motorola ColdFire 5249 processor support. |
| 176 | |
Steven King | 04e037a | 2012-06-05 08:23:08 -0700 | [diff] [blame] | 177 | config M525x |
| 178 | bool "MCF525x" |
| 179 | depends on !MMU |
| 180 | select COLDFIRE_SW_A7 |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 181 | select COLDFIRE_TIMERS |
Steven King | 04e037a | 2012-06-05 08:23:08 -0700 | [diff] [blame] | 182 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 183 | select CPU_NO_EFFICIENT_FFS |
Steven King | 04e037a | 2012-06-05 08:23:08 -0700 | [diff] [blame] | 184 | help |
| 185 | Freescale (Motorola) Coldfire 5251/5253 processor support. |
| 186 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 187 | config M5271 |
| 188 | bool "MCF5271" |
| 189 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 190 | select COLDFIRE_PIT_TIMER |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 191 | select M527x |
| 192 | select HAVE_CACHE_SPLIT |
| 193 | select HAVE_IPSBAR |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 194 | help |
| 195 | Freescale (Motorola) ColdFire 5270/5271 processor support. |
| 196 | |
| 197 | config M5272 |
| 198 | bool "MCF5272" |
| 199 | depends on !MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 200 | select COLDFIRE_SW_A7 |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 201 | select COLDFIRE_TIMERS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 202 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 203 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 204 | help |
| 205 | Motorola ColdFire 5272 processor support. |
| 206 | |
| 207 | config M5275 |
| 208 | bool "MCF5275" |
| 209 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 210 | select COLDFIRE_PIT_TIMER |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 211 | select M527x |
| 212 | select HAVE_CACHE_SPLIT |
| 213 | select HAVE_IPSBAR |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 214 | help |
| 215 | Freescale (Motorola) ColdFire 5274/5275 processor support. |
| 216 | |
| 217 | config M528x |
| 218 | bool "MCF528x" |
| 219 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 220 | select COLDFIRE_PIT_TIMER |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 221 | select HAVE_CACHE_SPLIT |
| 222 | select HAVE_IPSBAR |
| 223 | help |
| 224 | Motorola ColdFire 5280/5282 processor support. |
| 225 | |
| 226 | config M5307 |
| 227 | bool "MCF5307" |
| 228 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 229 | select COLDFIRE_TIMERS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 230 | select COLDFIRE_SW_A7 |
| 231 | select HAVE_CACHE_CB |
| 232 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 233 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 234 | help |
| 235 | Motorola ColdFire 5307 processor support. |
| 236 | |
| 237 | config M532x |
| 238 | bool "MCF532x" |
| 239 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 240 | select COLDFIRE_TIMERS |
Greg Ungerer | 6eac402 | 2012-11-05 12:01:38 +1000 | [diff] [blame] | 241 | select M53xx |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 242 | select HAVE_CACHE_CB |
| 243 | help |
| 244 | Freescale (Motorola) ColdFire 532x processor support. |
| 245 | |
Greg Ungerer | e9d9dc6 | 2012-11-05 15:32:15 +1000 | [diff] [blame] | 246 | config M537x |
| 247 | bool "MCF537x" |
| 248 | depends on !MMU |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 249 | select COLDFIRE_TIMERS |
Greg Ungerer | e9d9dc6 | 2012-11-05 15:32:15 +1000 | [diff] [blame] | 250 | select M53xx |
| 251 | select HAVE_CACHE_CB |
| 252 | help |
| 253 | Freescale ColdFire 537x processor support. |
| 254 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 255 | config M5407 |
| 256 | bool "MCF5407" |
| 257 | depends on !MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 258 | select COLDFIRE_SW_A7 |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 259 | select COLDFIRE_TIMERS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 260 | select HAVE_CACHE_CB |
| 261 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 262 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 263 | help |
| 264 | Motorola ColdFire 5407 processor support. |
| 265 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 266 | config M547x |
| 267 | bool "MCF547x" |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 268 | select M54xx |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 269 | select COLDFIRE_SLTIMERS |
Greg Ungerer | 1f7034b | 2011-10-19 14:13:18 +1000 | [diff] [blame] | 270 | select MMU_COLDFIRE if MMU |
Greg Ungerer | e5f8d1f | 2016-08-24 13:32:01 +1000 | [diff] [blame] | 271 | select FPU if MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 272 | select HAVE_CACHE_CB |
| 273 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 274 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 275 | help |
| 276 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. |
| 277 | |
| 278 | config M548x |
| 279 | bool "MCF548x" |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 280 | select COLDFIRE_SLTIMERS |
Greg Ungerer | 1f7034b | 2011-10-19 14:13:18 +1000 | [diff] [blame] | 281 | select MMU_COLDFIRE if MMU |
Greg Ungerer | e5f8d1f | 2016-08-24 13:32:01 +1000 | [diff] [blame] | 282 | select FPU if MMU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 283 | select M54xx |
| 284 | select HAVE_CACHE_CB |
| 285 | select HAVE_MBAR |
Zhaoxiu Zeng | fff7fb0 | 2016-05-20 17:03:57 -0700 | [diff] [blame] | 286 | select CPU_NO_EFFICIENT_FFS |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 287 | help |
| 288 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. |
| 289 | |
Steven King | bea8bcb | 2012-06-06 14:28:31 -0700 | [diff] [blame] | 290 | config M5441x |
| 291 | bool "MCF5441x" |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 292 | select COLDFIRE_PIT_TIMER |
Greg Ungerer | b47c7b6 | 2017-01-10 22:52:32 +1000 | [diff] [blame] | 293 | select MMU_COLDFIRE if MMU |
Steven King | bea8bcb | 2012-06-06 14:28:31 -0700 | [diff] [blame] | 294 | select HAVE_CACHE_CB |
| 295 | help |
| 296 | Freescale Coldfire 54410/54415/54416/54417/54418 processor support. |
| 297 | |
Greg Ungerer | fa95a1d | 2015-07-07 15:44:02 +1000 | [diff] [blame] | 298 | endchoice |
| 299 | |
| 300 | config M527x |
| 301 | bool |
| 302 | |
| 303 | config M53xx |
| 304 | bool |
| 305 | |
| 306 | config M54xx |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 307 | select HAVE_PCI |
Greg Ungerer | fa95a1d | 2015-07-07 15:44:02 +1000 | [diff] [blame] | 308 | bool |
| 309 | |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 310 | config COLDFIRE_PIT_TIMER |
| 311 | bool |
Arnd Bergmann | 275e70e | 2020-09-24 16:28:53 +0200 | [diff] [blame] | 312 | |
| 313 | config COLDFIRE_TIMERS |
| 314 | bool |
| 315 | select LEGACY_TIMER_TICK |
| 316 | |
| 317 | config COLDFIRE_SLTIMERS |
| 318 | bool |
| 319 | select LEGACY_TIMER_TICK |
| 320 | |
Geert Uytterhoeven | ad8f955 | 2011-12-26 20:32:02 +0100 | [diff] [blame] | 321 | endif # COLDFIRE |
| 322 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 323 | comment "Processor Specific Options" |
| 324 | |
| 325 | config M68KFPU_EMU |
Kees Cook | 112f8b1 | 2012-10-23 13:01:27 -0700 | [diff] [blame] | 326 | bool "Math emulation support" |
Geert Uytterhoeven | ed6bc6b | 2022-05-13 14:50:28 +0200 | [diff] [blame] | 327 | depends on M68KCLASSIC && FPU |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 328 | help |
| 329 | At some point in the future, this will cause floating-point math |
| 330 | instructions to be emulated by the kernel on machines that lack a |
| 331 | floating-point math coprocessor. Thrill-seekers and chronically |
| 332 | sleep-deprived psychotic hacker types can say Y now, everyone else |
| 333 | should probably wait a while. |
| 334 | |
| 335 | config M68KFPU_EMU_EXTRAPREC |
| 336 | bool "Math emulation extra precision" |
| 337 | depends on M68KFPU_EMU |
| 338 | help |
| 339 | The fpu uses normally a few bit more during calculations for |
| 340 | correct rounding, the emulator can (often) do the same but this |
| 341 | extra calculation can cost quite some time, so you can disable |
| 342 | it here. The emulator will then "only" calculate with a 64 bit |
| 343 | mantissa and round slightly incorrect, what is more than enough |
| 344 | for normal usage. |
| 345 | |
| 346 | config M68KFPU_EMU_ONLY |
| 347 | bool "Math emulation only kernel" |
| 348 | depends on M68KFPU_EMU |
| 349 | help |
| 350 | This option prevents any floating-point instructions from being |
| 351 | compiled into the kernel, thereby the kernel doesn't save any |
| 352 | floating point context anymore during task switches, so this |
| 353 | kernel will only be usable on machines without a floating-point |
| 354 | math coprocessor. This makes the kernel a bit faster as no tests |
| 355 | needs to be executed whether a floating-point instruction in the |
| 356 | kernel should be executed or not. |
| 357 | |
| 358 | config ADVANCED |
| 359 | bool "Advanced configuration options" |
| 360 | depends on MMU |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 361 | help |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 362 | This gives you access to some advanced options for the CPU. The |
| 363 | defaults should be fine for most users, but these options may make |
| 364 | it possible for you to improve performance somewhat if you know what |
| 365 | you are doing. |
| 366 | |
| 367 | Note that the answer to this question won't directly affect the |
| 368 | kernel: saying N will just cause the configurator to skip all |
| 369 | the questions about these options. |
| 370 | |
| 371 | Most users should say N to this question. |
| 372 | |
| 373 | config RMW_INSNS |
| 374 | bool "Use read-modify-write instructions" |
Geert Uytterhoeven | 2189e92 | 2021-07-25 12:44:13 +0200 | [diff] [blame] | 375 | depends on ADVANCED && !CPU_HAS_NO_CAS |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 376 | help |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 377 | This allows to use certain instructions that work with indivisible |
| 378 | read-modify-write bus cycles. While this is faster than the |
| 379 | workaround of disabling interrupts, it can conflict with DMA |
| 380 | ( = direct memory access) on many Amiga systems, and it is also said |
| 381 | to destabilize other machines. It is very likely that this will |
| 382 | cause serious problems on any Amiga or Atari Medusa if set. The only |
| 383 | configuration where it should work are 68030-based Ataris, where it |
| 384 | apparently improves performance. But you've been warned! Unless you |
| 385 | really know what you are doing, say N. Try Y only if you're quite |
| 386 | adventurous. |
| 387 | |
| 388 | config SINGLE_MEMORY_CHUNK |
| 389 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 |
| 390 | depends on MMU |
Mike Rapoport | 6b2ad8d | 2020-12-14 19:10:07 -0800 | [diff] [blame] | 391 | default y if SUN3 || MMU_COLDFIRE |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 392 | help |
| 393 | Ignore all but the first contiguous chunk of physical memory for VM |
| 394 | purposes. This will save a few bytes kernel size and may speed up |
Mike Rapoport | fcd353a | 2020-12-14 19:10:15 -0800 | [diff] [blame] | 395 | some operations. |
| 396 | When this option os set to N, you may want to lower "Maximum zone |
| 397 | order" to save memory that could be wasted for unused memory map. |
| 398 | Say N if not sure. |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 399 | |
Zi Yan | 0192445 | 2022-08-15 10:39:59 -0400 | [diff] [blame] | 400 | config ARCH_FORCE_MAX_ORDER |
Mike Rapoport | fcd353a | 2020-12-14 19:10:15 -0800 | [diff] [blame] | 401 | int "Maximum zone order" if ADVANCED |
| 402 | depends on !SINGLE_MEMORY_CHUNK |
| 403 | default "11" |
| 404 | help |
| 405 | The kernel memory allocator divides physically contiguous memory |
| 406 | blocks into "zones", where each zone is a power of two number of |
| 407 | pages. This option selects the largest power of two that the kernel |
| 408 | keeps in the memory allocator. If you need to allocate very large |
| 409 | blocks of physically contiguous memory, then you may need to |
| 410 | increase this value. |
| 411 | |
| 412 | For systems that have holes in their physical address space this |
| 413 | value also defines the minimal size of the hole that allows |
| 414 | freeing unused memory map. |
| 415 | |
| 416 | This config option is actually maximum order plus one. For example, |
| 417 | a value of 11 means that the largest free memory block is 2^10 pages. |
| 418 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 419 | config 060_WRITETHROUGH |
| 420 | bool "Use write-through caching for 68060 supervisor accesses" |
| 421 | depends on ADVANCED && M68060 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 422 | help |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 423 | The 68060 generally uses copyback caching of recently accessed data. |
| 424 | Copyback caching means that memory writes will be held in an on-chip |
| 425 | cache and only written back to memory some time later. Saying Y |
| 426 | here will force supervisor (kernel) accesses to use writethrough |
| 427 | caching. Writethrough caching means that data is written to memory |
| 428 | straight away, so that cache and memory data always agree. |
| 429 | Writethrough caching is less efficient, but is needed for some |
| 430 | drivers on 68060 based systems where the 68060 bus snooping signal |
| 431 | is hardwired on. The 53c710 SCSI driver is known to suffer from |
| 432 | this problem. |
| 433 | |
| 434 | config M68K_L2_CACHE |
| 435 | bool |
| 436 | depends on MAC |
| 437 | default y |
| 438 | |
Geert Uytterhoeven | 022613e | 2012-06-06 17:26:35 +0200 | [diff] [blame] | 439 | config CPU_HAS_NO_BITFIELDS |
| 440 | bool |
| 441 | |
Geert Uytterhoeven | 2189e92 | 2021-07-25 12:44:13 +0200 | [diff] [blame] | 442 | config CPU_HAS_NO_CAS |
| 443 | bool |
| 444 | |
Geert Uytterhoeven | 022613e | 2012-06-06 17:26:35 +0200 | [diff] [blame] | 445 | config CPU_HAS_NO_MULDIV64 |
| 446 | bool |
| 447 | |
Geert Uytterhoeven | 9f1f118 | 2012-06-06 19:37:52 +0200 | [diff] [blame] | 448 | config CPU_HAS_NO_UNALIGNED |
| 449 | bool |
| 450 | |
Geert Uytterhoeven | 022613e | 2012-06-06 17:26:35 +0200 | [diff] [blame] | 451 | config CPU_HAS_ADDRESS_SPACES |
| 452 | bool |
Arnd Bergmann | 12700c1 | 2022-02-15 17:55:04 +0100 | [diff] [blame] | 453 | select ALTERNATE_USER_ADDRESS_SPACE |
Geert Uytterhoeven | 022613e | 2012-06-06 17:26:35 +0200 | [diff] [blame] | 454 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 455 | config FPU |
| 456 | bool |
| 457 | |
| 458 | config COLDFIRE_SW_A7 |
| 459 | bool |
| 460 | |
| 461 | config HAVE_CACHE_SPLIT |
| 462 | bool |
| 463 | |
| 464 | config HAVE_CACHE_CB |
| 465 | bool |
| 466 | |
| 467 | config HAVE_MBAR |
| 468 | bool |
| 469 | |
| 470 | config HAVE_IPSBAR |
| 471 | bool |
| 472 | |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 473 | config CLOCK_FREQ |
| 474 | int "Set the core clock frequency" |
Greg Ungerer | 15c2ca4 | 2015-07-07 15:01:53 +1000 | [diff] [blame] | 475 | default "25000000" if M5206 |
| 476 | default "54000000" if M5206e |
| 477 | default "166666666" if M520x |
| 478 | default "140000000" if M5249 |
| 479 | default "150000000" if M527x || M523x |
| 480 | default "90000000" if M5307 |
| 481 | default "50000000" if M5407 |
| 482 | default "266000000" if M54xx |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 483 | default "66666666" |
Greg Ungerer | d9ee489 | 2015-07-07 14:21:21 +1000 | [diff] [blame] | 484 | depends on COLDFIRE |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 485 | help |
| 486 | Define the CPU clock frequency in use. This is the core clock |
| 487 | frequency, it may or may not be the same as the external clock |
| 488 | crystal fitted to your board. Some processors have an internal |
| 489 | PLL and can have their frequency programmed at run time, others |
| 490 | use internal dividers. In general the kernel won't setup a PLL |
| 491 | if it is fitted (there are some exceptions). This value will be |
| 492 | specific to the exact CPU that you are using. |
| 493 | |
| 494 | config OLDMASK |
| 495 | bool "Old mask 5307 (1H55J) silicon" |
| 496 | depends on M5307 |
| 497 | help |
| 498 | Build support for the older revision ColdFire 5307 silicon. |
| 499 | Specifically this is the 1H55J mask revision. |
| 500 | |
| 501 | if HAVE_CACHE_SPLIT |
| 502 | choice |
| 503 | prompt "Split Cache Configuration" |
| 504 | default CACHE_I |
| 505 | |
| 506 | config CACHE_I |
| 507 | bool "Instruction" |
| 508 | help |
| 509 | Use all of the ColdFire CPU cache memory as an instruction cache. |
| 510 | |
| 511 | config CACHE_D |
| 512 | bool "Data" |
| 513 | help |
| 514 | Use all of the ColdFire CPU cache memory as a data cache. |
| 515 | |
| 516 | config CACHE_BOTH |
| 517 | bool "Both" |
| 518 | help |
| 519 | Split the ColdFire CPU cache, and use half as an instruction cache |
| 520 | and half as a data cache. |
| 521 | endchoice |
Juerg Haefliger | a1ab4c1 | 2022-05-24 09:58:46 +0200 | [diff] [blame] | 522 | endif # HAVE_CACHE_SPLIT |
Greg Ungerer | 0e152d8 | 2011-06-20 15:49:09 +1000 | [diff] [blame] | 523 | |
| 524 | if HAVE_CACHE_CB |
| 525 | choice |
| 526 | prompt "Data cache mode" |
| 527 | default CACHE_WRITETHRU |
| 528 | |
| 529 | config CACHE_WRITETHRU |
| 530 | bool "Write-through" |
| 531 | help |
| 532 | The ColdFire CPU cache is set into Write-through mode. |
| 533 | |
| 534 | config CACHE_COPYBACK |
| 535 | bool "Copy-back" |
| 536 | help |
| 537 | The ColdFire CPU cache is set into Copy-back mode. |
| 538 | endchoice |
Juerg Haefliger | a1ab4c1 | 2022-05-24 09:58:46 +0200 | [diff] [blame] | 539 | endif # HAVE_CACHE_CB |