Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 1 | /* |
Michal Simek | 968674b | 2013-08-27 10:48:29 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2013 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2012-2013 Xilinx, Inc. |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 4 | * Copyright (C) 2007-2009 PetaLogix |
| 5 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file "COPYING" in the main directory of this archive |
| 9 | * for more details. |
| 10 | */ |
| 11 | |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 12 | #include <linux/irqdomain.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 13 | #include <linux/irq.h> |
Joel Porquet | fd4b267 | 2015-07-07 17:13:15 -0400 | [diff] [blame] | 14 | #include <linux/irqchip.h> |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 15 | #include <linux/irqchip/chained_irq.h> |
Michal Simek | bcff661 | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 16 | #include <linux/of_address.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 17 | #include <linux/io.h> |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 18 | #include <linux/jump_label.h> |
John Williams | 892ee92 | 2009-07-29 22:08:40 +1000 | [diff] [blame] | 19 | #include <linux/bug.h> |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 20 | #include <linux/of_irq.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 21 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 22 | /* No one else should require these constants, so define them locally here. */ |
| 23 | #define ISR 0x00 /* Interrupt Status Register */ |
| 24 | #define IPR 0x04 /* Interrupt Pending Register */ |
| 25 | #define IER 0x08 /* Interrupt Enable Register */ |
| 26 | #define IAR 0x0c /* Interrupt Acknowledge Register */ |
| 27 | #define SIE 0x10 /* Set Interrupt Enable bits */ |
| 28 | #define CIE 0x14 /* Clear Interrupt Enable bits */ |
| 29 | #define IVR 0x18 /* Interrupt Vector Register */ |
| 30 | #define MER 0x1c /* Master Enable Register */ |
| 31 | |
| 32 | #define MER_ME (1<<0) |
| 33 | #define MER_HIE (1<<1) |
| 34 | |
Michal Simek | 1e36492 | 2022-03-04 08:51:29 +0100 | [diff] [blame] | 35 | #define SPURIOUS_IRQ (-1U) |
| 36 | |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 37 | static DEFINE_STATIC_KEY_FALSE(xintc_is_be); |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 38 | |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 39 | struct xintc_irq_chip { |
| 40 | void __iomem *base; |
| 41 | struct irq_domain *root_domain; |
| 42 | u32 intr_mask; |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 43 | u32 nr_irq; |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 44 | }; |
| 45 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 46 | static struct xintc_irq_chip *primary_intc; |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 47 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 48 | static void xintc_write(struct xintc_irq_chip *irqc, int reg, u32 data) |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 49 | { |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 50 | if (static_branch_unlikely(&xintc_is_be)) |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 51 | iowrite32be(data, irqc->base + reg); |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 52 | else |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 53 | iowrite32(data, irqc->base + reg); |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 54 | } |
| 55 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 56 | static u32 xintc_read(struct xintc_irq_chip *irqc, int reg) |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 57 | { |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 58 | if (static_branch_unlikely(&xintc_is_be)) |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 59 | return ioread32be(irqc->base + reg); |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 60 | else |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 61 | return ioread32(irqc->base + reg); |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 62 | } |
| 63 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 64 | static void intc_enable_or_unmask(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 65 | { |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 66 | struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); |
| 67 | unsigned long mask = BIT(d->hwirq); |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 68 | |
Zubair Lutfullah Kakakhel | a5734de | 2016-11-14 12:13:46 +0000 | [diff] [blame] | 69 | pr_debug("irq-xilinx: enable_or_unmask: %ld\n", d->hwirq); |
steve@digidescorp.com | 33d9ff5 | 2009-11-17 08:43:39 -0600 | [diff] [blame] | 70 | |
| 71 | /* ack level irqs because they can't be acked during |
| 72 | * ack function since the handle_level_irq function |
| 73 | * acks the irq before calling the interrupt handler |
| 74 | */ |
Thomas Gleixner | 4adc192 | 2011-03-24 14:52:04 +0100 | [diff] [blame] | 75 | if (irqd_is_level_type(d)) |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 76 | xintc_write(irqc, IAR, mask); |
Michal Simek | 7958a68 | 2012-11-05 11:51:13 +0100 | [diff] [blame] | 77 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 78 | xintc_write(irqc, SIE, mask); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 79 | } |
| 80 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 81 | static void intc_disable_or_mask(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 82 | { |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 83 | struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); |
| 84 | |
Zubair Lutfullah Kakakhel | a5734de | 2016-11-14 12:13:46 +0000 | [diff] [blame] | 85 | pr_debug("irq-xilinx: disable: %ld\n", d->hwirq); |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 86 | xintc_write(irqc, CIE, BIT(d->hwirq)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 87 | } |
| 88 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 89 | static void intc_ack(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 90 | { |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 91 | struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); |
| 92 | |
Zubair Lutfullah Kakakhel | a5734de | 2016-11-14 12:13:46 +0000 | [diff] [blame] | 93 | pr_debug("irq-xilinx: ack: %ld\n", d->hwirq); |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 94 | xintc_write(irqc, IAR, BIT(d->hwirq)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 95 | } |
| 96 | |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 97 | static void intc_mask_ack(struct irq_data *d) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 98 | { |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 99 | struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); |
| 100 | unsigned long mask = BIT(d->hwirq); |
Michal Simek | 6c7a267 | 2011-12-09 10:45:20 +0100 | [diff] [blame] | 101 | |
Zubair Lutfullah Kakakhel | a5734de | 2016-11-14 12:13:46 +0000 | [diff] [blame] | 102 | pr_debug("irq-xilinx: disable_and_ack: %ld\n", d->hwirq); |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 103 | xintc_write(irqc, CIE, mask); |
| 104 | xintc_write(irqc, IAR, mask); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 105 | } |
| 106 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 107 | static struct irq_chip intc_dev = { |
| 108 | .name = "Xilinx INTC", |
Thomas Gleixner | 6f205a4 | 2011-02-06 19:36:30 +0000 | [diff] [blame] | 109 | .irq_unmask = intc_enable_or_unmask, |
| 110 | .irq_mask = intc_disable_or_mask, |
| 111 | .irq_ack = intc_ack, |
| 112 | .irq_mask_ack = intc_mask_ack, |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 113 | }; |
| 114 | |
Michal Simek | c0d997f | 2012-12-13 17:30:05 +0100 | [diff] [blame] | 115 | static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 116 | { |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 117 | struct xintc_irq_chip *irqc = d->host_data; |
| 118 | |
| 119 | if (irqc->intr_mask & BIT(hw)) { |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 120 | irq_set_chip_and_handler_name(irq, &intc_dev, |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 121 | handle_edge_irq, "edge"); |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 122 | irq_clear_status_flags(irq, IRQ_LEVEL); |
| 123 | } else { |
| 124 | irq_set_chip_and_handler_name(irq, &intc_dev, |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 125 | handle_level_irq, "level"); |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 126 | irq_set_status_flags(irq, IRQ_LEVEL); |
| 127 | } |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 128 | irq_set_chip_data(irq, irqc); |
Grant Likely | 2462bac | 2012-01-26 14:10:13 -0700 | [diff] [blame] | 129 | return 0; |
| 130 | } |
| 131 | |
| 132 | static const struct irq_domain_ops xintc_irq_domain_ops = { |
| 133 | .xlate = irq_domain_xlate_onetwocell, |
| 134 | .map = xintc_map, |
| 135 | }; |
| 136 | |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 137 | static void xil_intc_irq_handler(struct irq_desc *desc) |
| 138 | { |
| 139 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 140 | struct xintc_irq_chip *irqc; |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 141 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 142 | irqc = irq_data_get_irq_handler_data(&desc->irq_data); |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 143 | chained_irq_enter(chip, desc); |
| 144 | do { |
Marc Zyngier | 046a6ee | 2021-05-04 17:42:18 +0100 | [diff] [blame] | 145 | u32 hwirq = xintc_read(irqc, IVR); |
| 146 | |
| 147 | if (hwirq == -1U) |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 148 | break; |
Marc Zyngier | 046a6ee | 2021-05-04 17:42:18 +0100 | [diff] [blame] | 149 | |
| 150 | generic_handle_domain_irq(irqc->root_domain, hwirq); |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 151 | } while (true); |
| 152 | chained_irq_exit(chip, desc); |
| 153 | } |
| 154 | |
Michal Simek | 1e36492 | 2022-03-04 08:51:29 +0100 | [diff] [blame] | 155 | static void xil_intc_handle_irq(struct pt_regs *regs) |
| 156 | { |
| 157 | u32 hwirq; |
| 158 | |
| 159 | do { |
| 160 | hwirq = xintc_read(primary_intc, IVR); |
| 161 | if (unlikely(hwirq == SPURIOUS_IRQ)) |
| 162 | break; |
| 163 | |
| 164 | generic_handle_domain_irq(primary_intc->root_domain, hwirq); |
| 165 | } while (true); |
| 166 | } |
| 167 | |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 168 | static int __init xilinx_intc_of_init(struct device_node *intc, |
| 169 | struct device_node *parent) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 170 | { |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 171 | struct xintc_irq_chip *irqc; |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 172 | int ret, irq; |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 173 | |
| 174 | irqc = kzalloc(sizeof(*irqc), GFP_KERNEL); |
| 175 | if (!irqc) |
| 176 | return -ENOMEM; |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 177 | irqc->base = of_iomap(intc, 0); |
| 178 | BUG_ON(!irqc->base); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 179 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 180 | ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &irqc->nr_irq); |
Michal Simek | bcff661 | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 181 | if (ret < 0) { |
Zubair Lutfullah Kakakhel | a5734de | 2016-11-14 12:13:46 +0000 | [diff] [blame] | 182 | pr_err("irq-xilinx: unable to read xlnx,num-intr-inputs\n"); |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 183 | goto error; |
Michal Simek | bcff661 | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 184 | } |
| 185 | |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 186 | ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &irqc->intr_mask); |
Michal Simek | bcff661 | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 187 | if (ret < 0) { |
Zubair Lutfullah Kakakhel | 8a11da5 | 2016-11-14 12:13:50 +0000 | [diff] [blame] | 188 | pr_warn("irq-xilinx: unable to read xlnx,kind-of-intr\n"); |
| 189 | irqc->intr_mask = 0; |
Michal Simek | bcff661 | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 190 | } |
| 191 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 192 | if (irqc->intr_mask >> irqc->nr_irq) |
Zubair Lutfullah Kakakhel | a5734de | 2016-11-14 12:13:46 +0000 | [diff] [blame] | 193 | pr_warn("irq-xilinx: mismatch in kind-of-intr param\n"); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 194 | |
Rob Herring | e81f54c | 2017-07-18 16:43:10 -0500 | [diff] [blame] | 195 | pr_info("irq-xilinx: %pOF: num_irq=%d, edge=0x%x\n", |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 196 | intc, irqc->nr_irq, irqc->intr_mask); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 197 | |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 198 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 199 | /* |
| 200 | * Disable all external interrupts until they are |
Ingo Molnar | a359f75 | 2021-03-22 04:21:30 +0100 | [diff] [blame] | 201 | * explicitly requested. |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 202 | */ |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 203 | xintc_write(irqc, IER, 0); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 204 | |
| 205 | /* Acknowledge any pending interrupts just in case. */ |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 206 | xintc_write(irqc, IAR, 0xffffffff); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 207 | |
| 208 | /* Turn on the Master Enable. */ |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 209 | xintc_write(irqc, MER, MER_HIE | MER_ME); |
| 210 | if (xintc_read(irqc, MER) != (MER_HIE | MER_ME)) { |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 211 | static_branch_enable(&xintc_is_be); |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 212 | xintc_write(irqc, MER, MER_HIE | MER_ME); |
Michal Simek | 1aa1243 | 2014-02-24 14:56:32 +0100 | [diff] [blame] | 213 | } |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 214 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 215 | irqc->root_domain = irq_domain_add_linear(intc, irqc->nr_irq, |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 216 | &xintc_irq_domain_ops, irqc); |
| 217 | if (!irqc->root_domain) { |
| 218 | pr_err("irq-xilinx: Unable to create IRQ domain\n"); |
Michal Simek | c74038b | 2020-03-17 18:25:58 +0530 | [diff] [blame] | 219 | ret = -EINVAL; |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 220 | goto error; |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 221 | } |
Dan Christensen | 7c2c851 | 2013-03-17 04:48:56 -0500 | [diff] [blame] | 222 | |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 223 | if (parent) { |
| 224 | irq = irq_of_parse_and_map(intc, 0); |
| 225 | if (irq) { |
| 226 | irq_set_chained_handler_and_data(irq, |
| 227 | xil_intc_irq_handler, |
| 228 | irqc); |
| 229 | } else { |
| 230 | pr_err("irq-xilinx: interrupts property not in DT\n"); |
| 231 | ret = -EINVAL; |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 232 | goto error; |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 233 | } |
| 234 | } else { |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 235 | primary_intc = irqc; |
Marc Zyngier | e02f6c0 | 2020-03-30 10:41:58 +0100 | [diff] [blame] | 236 | irq_set_default_host(primary_intc->root_domain); |
Michal Simek | 1e36492 | 2022-03-04 08:51:29 +0100 | [diff] [blame] | 237 | set_handle_irq(xil_intc_handle_irq); |
Zubair Lutfullah Kakakhel | 9689c99 | 2016-11-14 12:13:49 +0000 | [diff] [blame] | 238 | } |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 239 | |
| 240 | return 0; |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 241 | |
Mubin Sayyed | 67862a3 | 2020-03-17 18:25:57 +0530 | [diff] [blame] | 242 | error: |
| 243 | iounmap(irqc->base); |
Zubair Lutfullah Kakakhel | 591db74 | 2016-11-14 12:13:47 +0000 | [diff] [blame] | 244 | kfree(irqc); |
| 245 | return ret; |
| 246 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 247 | } |
Michal Simek | 8a9e90a | 2013-08-27 10:49:00 +0200 | [diff] [blame] | 248 | |
Zubair Lutfullah Kakakhel | 8328255 | 2016-11-14 12:13:51 +0000 | [diff] [blame] | 249 | IRQCHIP_DECLARE(xilinx_intc_xps, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init); |
| 250 | IRQCHIP_DECLARE(xilinx_intc_opb, "xlnx,opb-intc-1.00.c", xilinx_intc_of_init); |