blob: 6a92376daf3f60620285eb474fc075d6b10c3949 [file] [log] [blame]
Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Mark A. Greer0c176fa2006-10-16 13:52:09 -07002/*
3 * Copied from <file:arch/powerpc/kernel/misc_32.S>
4 *
5 * This file contains miscellaneous low-level functions.
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 *
8 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
9 * and Paul Mackerras.
10 *
11 * kexec bits:
12 * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
13 * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
Mark A. Greer0c176fa2006-10-16 13:52:09 -070014 */
15#include "ppc_asm.h"
16
17#define SPRN_PVR 0x11F /* Processor Version Register */
18
19 .text
20
Christophe Leroy8b14e1d2020-09-29 06:48:36 +000021/* udelay needs to know the period of the
Mark A. Greer0c176fa2006-10-16 13:52:09 -070022 * timebase in nanoseconds. This used to be hardcoded to be 60ns
23 * (period of 66MHz/4). Now a variable is used that is initialized to
24 * 60 for backward compatibility, but it can be overridden as necessary
25 * with code something like this:
26 * extern unsigned long timebase_period_ns;
27 * timebase_period_ns = 1000000000 / bd->bi_tbfreq;
28 */
29 .data
30 .globl timebase_period_ns
31timebase_period_ns:
32 .long 60
33
34 .text
35/*
36 * Delay for a number of microseconds
37 */
38 .globl udelay
39udelay:
Mark A. Greer0c176fa2006-10-16 13:52:09 -070040 mulli r4,r3,1000 /* nanoseconds */
41 /* Change r4 to be the number of ticks using:
42 * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
43 * timebase_period_ns defaults to 60 (16.6MHz) */
44 mflr r5
Alan Modra3d635ab2020-11-27 11:48:42 +110045 bcl 20,31,0f
Mark A. Greer0c176fa2006-10-16 13:52:09 -0700460: mflr r6
47 mtlr r5
Alan Modra3d635ab2020-11-27 11:48:42 +110048 addis r5,r6,(timebase_period_ns-0b)@ha
49 lwz r5,(timebase_period_ns-0b)@l(r5)
Mark A. Greer0c176fa2006-10-16 13:52:09 -070050 add r4,r4,r5
51 addi r4,r4,-1
52 divw r4,r4,r5 /* BUS ticks */
Christophe Leroy72e4b2c2017-08-08 13:58:50 +0200531: MFTBU(r5)
54 MFTBL(r6)
55 MFTBU(r7)
Mark A. Greer0c176fa2006-10-16 13:52:09 -070056 cmpw 0,r5,r7
57 bne 1b /* Get [synced] base time */
58 addc r9,r6,r4 /* Compute end time */
59 addze r8,r5
Christophe Leroy72e4b2c2017-08-08 13:58:50 +0200602: MFTBU(r5)
Mark A. Greer0c176fa2006-10-16 13:52:09 -070061 cmpw 0,r5,r8
62 blt 2b
63 bgt 3f
Christophe Leroy72e4b2c2017-08-08 13:58:50 +020064 MFTBL(r6)
Mark A. Greer0c176fa2006-10-16 13:52:09 -070065 cmpw 0,r6,r9
66 blt 2b
673: blr