blob: 97b0d4ae221acd0bcbfbd29335f741c0525e95c8 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Dave Airliec0e09202008-05-29 10:09:59 +10002#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
Chris Wilson39bf4de82017-10-24 19:15:47 +01006# Add a set of useful warning flags and enable -Werror for CI to prevent
7# trivial mistakes from creeping in. We have to do this piecemeal as we reject
8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9# need to filter out dubious warnings. Still it is our interest
10# to keep running locally with W=1 C=1 until we are completely clean.
11#
12# Note the danger in using -Wall -Wextra is that when CI updates gcc we
13# will most likely get a sudden build breakage... Hopefully we will fix
14# new warnings before CI updates!
Kees Cook0bb95f82018-06-25 15:59:34 -070015subdir-ccflags-y := -Wall -Wextra
Tong Zhangbaf68212022-02-14 11:58:20 -080016subdir-ccflags-y += -Wno-format-security
Nathan Chancellor4b2437f2021-09-14 12:49:45 -070017subdir-ccflags-y += -Wno-unused-parameter
18subdir-ccflags-y += -Wno-type-limits
19subdir-ccflags-y += -Wno-missing-field-initializers
20subdir-ccflags-y += -Wno-sign-compare
Arnd Bergmann13447942022-03-08 22:56:12 +010021subdir-ccflags-y += -Wno-shift-negative-value
Chris Wilson6a05d292018-02-08 16:16:39 +000022subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
Nick Desaulniers9f4069b2020-04-26 14:42:15 -070023subdir-ccflags-y += $(call cc-disable-warning, frame-address)
Chris Wilson39bf4de82017-10-24 19:15:47 +010024subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
25
26# Fine grained warnings disable
Chris Wilson4ab09d02017-10-30 17:29:27 +000027CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
Masahiro Yamada54b8ae62019-08-30 13:34:01 +090028CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
Chris Wilson39bf4de82017-10-24 19:15:47 +010029
Jani Nikula9ef424e2019-06-26 17:36:17 +030030subdir-ccflags-y += -I$(srctree)/$(src)
Chris Wilson112ed2d2019-04-24 18:48:39 +010031
Daniel Vetter2fae6a82014-03-07 09:17:21 +010032# Please keep these build lists sorted!
33
34# core driver code
Jani Nikula58471f632021-11-11 12:13:02 +020035i915-y += i915_driver.o \
Tvrtko Ursulin5f0d4d12022-04-01 15:21:58 +010036 i915_drm_client.o \
Chris Wilson16dc2242020-05-09 11:50:21 +010037 i915_config.o \
Chris Wilson26f00512019-08-07 15:20:41 +010038 i915_getparam.o \
Jani Nikula198bca92022-01-20 13:33:46 +020039 i915_ioctl.o \
40 i915_irq.o \
Chris Wilsonf7452c72021-01-11 22:52:20 +000041 i915_mitigations.o \
Daniel Vetter708b7df2021-07-27 14:10:37 +020042 i915_module.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010043 i915_params.o \
Chris Wilson42f55512016-06-24 14:00:26 +010044 i915_pci.o \
Chris Wilson37d63f82019-05-28 10:29:50 +010045 i915_scatterlist.o \
Pedro Tammela79960222018-12-05 09:06:08 -020046 i915_suspend.o \
Jani Nikula63bf8302019-10-04 15:20:18 +030047 i915_switcheroo.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010048 i915_sysfs.o \
Jani Nikula358c8552019-08-08 16:42:43 +030049 i915_utils.o \
Jani Nikulad670c782023-04-03 15:24:27 +030050 intel_clock_gating.o \
Chris Wilson94b4f3b2016-07-05 10:40:20 +010051 intel_device_info.o \
Matthew Auld232a6eb2019-10-08 17:01:14 +010052 intel_memory_region.o \
Jani Nikula4dd43752021-10-14 13:28:57 +030053 intel_pcode.o \
Thomas Hellströmd1487382021-06-02 10:38:08 +020054 intel_region_ttm.o \
Oscar Mateo7d3c4252018-04-10 09:12:46 -070055 intel_runtime_pm.o \
Jani Nikulaabffa712021-10-14 13:28:58 +030056 intel_sbi.o \
Jani Nikula7eb186b2021-03-26 15:21:32 +020057 intel_step.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +030058 intel_uncore.o \
Jani Nikulafb5f4322020-02-12 16:40:57 +020059 intel_wakeref.o \
Jani Nikula1eecf31e2021-10-13 13:11:59 +030060 vlv_sideband.o \
Jani Nikulafb5f4322020-02-12 16:40:57 +020061 vlv_suspend.o
Chris Wilson112ed2d2019-04-24 18:48:39 +010062
Jani Nikulaf052feb2022-12-08 16:23:47 +020063# core peripheral code
64i915-y += \
65 soc/intel_dram.o \
Jani Nikulaa13144e2023-01-17 14:33:07 +020066 soc/intel_gmch.o \
Jani Nikulaf052feb2022-12-08 16:23:47 +020067 soc/intel_pch.o
68
Chris Wilson112ed2d2019-04-24 18:48:39 +010069# core library code
70i915-y += \
71 i915_memcpy.o \
72 i915_mm.o \
73 i915_sw_fence.o \
Chris Wilson8e458fe2019-08-21 20:16:06 +010074 i915_sw_fence_work.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010075 i915_syncmap.o \
76 i915_user_extensions.o
Daniel Vetter9c065a72014-09-30 10:56:38 +020077
Daniel Vetter2fae6a82014-03-07 09:17:21 +010078i915-$(CONFIG_COMPAT) += i915_ioc32.o
Jani Nikulac43c5a82019-12-05 17:43:40 +020079i915-$(CONFIG_DEBUG_FS) += \
80 i915_debugfs.o \
81 i915_debugfs_params.o \
Jani Nikula926b0052020-02-11 18:14:51 +020082 display/intel_display_debugfs.o \
Jani Nikulac43c5a82019-12-05 17:43:40 +020083 display/intel_pipe_crc.o
Tvrtko Ursulinb46a33e2017-11-21 18:18:45 +000084i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +010085
Chris Wilson112ed2d2019-04-24 18:48:39 +010086# "Graphics Technology" (aka we talk to the gpu)
Chris Wilson112ed2d2019-04-24 18:48:39 +010087gt-y += \
Chris Wilsonc1f85872020-06-01 08:24:12 +010088 gt/gen2_engine_cs.o \
89 gt/gen6_engine_cs.o \
Matthew Auld2c86e552020-01-07 13:40:09 +000090 gt/gen6_ppgtt.o \
Prathap Kumar Valsan47f82532020-03-06 00:09:57 +000091 gt/gen7_renderclear.o \
Daniele Ceraolo Spuriod0d829e2020-12-09 23:36:18 +000092 gt/gen8_engine_cs.o \
Matthew Auld2c86e552020-01-07 13:40:09 +000093 gt/gen8_ppgtt.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010094 gt/intel_breadcrumbs.o \
95 gt/intel_context.o \
Chris Wilsonb4d3aca2020-01-31 10:45:42 +000096 gt/intel_context_sseu.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010097 gt/intel_engine_cs.o \
Chris Wilsonb5e8e952019-10-21 18:43:39 +010098 gt/intel_engine_heartbeat.o \
Chris Wilson79ffac852019-04-24 21:07:17 +010099 gt/intel_engine_pm.o \
Chris Wilson750e76b2019-08-06 13:43:00 +0100100 gt/intel_engine_user.o \
Chris Wilson70a2b432020-12-09 23:36:17 +0000101 gt/intel_execlists_submission.o \
Matthew Auld2c86e552020-01-07 13:40:09 +0000102 gt/intel_ggtt.o \
Chris Wilsonf899f782020-03-16 11:38:43 +0000103 gt/intel_ggtt_fencing.o \
Tvrtko Ursulin24635c52019-06-21 08:07:41 +0100104 gt/intel_gt.o \
Chris Wilson16e87452020-04-30 12:18:12 +0100105 gt/intel_gt_buffer_pool.o \
Chris Wilson9c878552020-04-24 17:28:05 +0100106 gt/intel_gt_clock_utils.o \
Lucas De Marchi022f3242021-09-17 19:57:51 -0700107 gt/intel_gt_debugfs.o \
Lucas De Marchi00142bc2021-09-17 19:57:52 -0700108 gt/intel_gt_engines_debugfs.o \
Andi Shyticf1c97d2019-08-11 22:06:33 +0100109 gt/intel_gt_irq.o \
Matt Ropere7858252022-06-14 17:10:18 -0700110 gt/intel_gt_mcr.o \
Chris Wilson79ffac852019-04-24 21:07:17 +0100111 gt/intel_gt_pm.o \
Lucas De Marchi23f6a822021-09-17 19:57:53 -0700112 gt/intel_gt_pm_debugfs.o \
Andi Shytid7620432019-08-11 15:28:00 +0100113 gt/intel_gt_pm_irq.o \
Chris Wilson66101972019-10-04 14:40:06 +0100114 gt/intel_gt_requests.o \
Andi Shytib770bcf2022-03-19 01:39:34 +0200115 gt/intel_gt_sysfs.o \
Andi Shyti80cf8af2022-03-19 01:39:35 +0200116 gt/intel_gt_sysfs_pm.o \
Matthew Auld2c86e552020-01-07 13:40:09 +0000117 gt/intel_gtt.o \
Andi Shyti0dc3c562019-10-20 19:41:39 +0100118 gt/intel_llc.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +0100119 gt/intel_lrc.o \
Chris Wilsoncf586022021-06-17 08:30:13 +0200120 gt/intel_migrate.o \
Chris Wilson2871ea82019-10-24 11:03:44 +0100121 gt/intel_mocs.o \
Matthew Auld2c86e552020-01-07 13:40:09 +0000122 gt/intel_ppgtt.o \
Andi Shytic1132362019-09-27 12:08:49 +0100123 gt/intel_rc6.o \
Matthew Auldf178b892021-01-12 16:43:00 +0000124 gt/intel_region_lmem.o \
Chris Wilson20060582019-07-04 10:19:25 +0100125 gt/intel_renderstate.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +0100126 gt/intel_reset.o \
Chris Wilson2871ea82019-10-24 11:03:44 +0100127 gt/intel_ring.o \
128 gt/intel_ring_submission.o \
Andi Shyti3e7abf82019-10-24 22:16:41 +0100129 gt/intel_rps.o \
Matt Roperf0e2f002022-09-06 16:49:32 -0700130 gt/intel_sa_media.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +0100131 gt/intel_sseu.o \
Daniele Ceraolo Spurioa00eda7d2020-07-07 17:39:52 -0700132 gt/intel_sseu_debugfs.o \
Tvrtko Ursulinf0c02c12019-06-21 08:08:10 +0100133 gt/intel_timeline.o \
Aravind Iddamsettyee714342022-11-07 18:05:58 -0800134 gt/intel_wopcm.o \
Chris Wilson4ec76db2020-02-28 13:17:10 +0000135 gt/intel_workarounds.o \
Chris Wilsonbe1cb552020-04-29 18:24:29 +0100136 gt/shmem_utils.o \
Chris Wilson4ec76db2020-02-28 13:17:10 +0000137 gt/sysfs_engines.o
Aravind Iddamsettyee714342022-11-07 18:05:58 -0800138
Casey Bowman7a5c9222022-03-30 16:48:08 -0700139# x86 intel-gtt module support
Lucas De Marchi9ce07d92022-06-17 16:05:59 -0700140gt-$(CONFIG_X86) += gt/intel_ggtt_gmch.o
Chris Wilson20060582019-07-04 10:19:25 +0100141# autogenerated null render state
142gt-y += \
143 gt/gen6_renderstate.o \
144 gt/gen7_renderstate.o \
145 gt/gen8_renderstate.o \
146 gt/gen9_renderstate.o
Chris Wilson112ed2d2019-04-24 18:48:39 +0100147i915-y += $(gt-y)
148
149# GEM (Graphics Execution Management) code
Chris Wilson98932142019-05-28 10:29:44 +0100150gem-y += \
Chris Wilson3f43c872019-05-28 10:29:53 +0100151 gem/i915_gem_busy.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100152 gem/i915_gem_clflush.o \
153 gem/i915_gem_context.o \
Matthew Aulddcaccaf2021-01-14 18:24:00 +0000154 gem/i915_gem_create.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100155 gem/i915_gem_dmabuf.o \
Chris Wilsonf0e4a062019-05-28 10:29:48 +0100156 gem/i915_gem_domain.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100157 gem/i915_gem_execbuffer.o \
158 gem/i915_gem_internal.o \
Chris Wilson84753552019-05-28 10:29:45 +0100159 gem/i915_gem_object.o \
Matthew Auldb908be52019-10-25 16:37:22 +0100160 gem/i915_gem_lmem.o \
Chris Wilsonb414fcd2019-05-28 10:29:47 +0100161 gem/i915_gem_mman.o \
Chris Wilsonf0334282019-05-28 10:29:46 +0100162 gem/i915_gem_pages.o \
163 gem/i915_gem_phys.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100164 gem/i915_gem_pm.o \
Matthew Auld232a6eb2019-10-08 17:01:14 +0100165 gem/i915_gem_region.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100166 gem/i915_gem_shmem.o \
167 gem/i915_gem_shrinker.o \
168 gem/i915_gem_stolen.o \
Chris Wilson446e2d12019-05-28 10:29:54 +0100169 gem/i915_gem_throttle.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100170 gem/i915_gem_tiling.o \
Thomas Hellström213d5092021-06-10 09:01:49 +0200171 gem/i915_gem_ttm.o \
Thomas Hellström3589fdb2021-11-04 12:07:17 +0100172 gem/i915_gem_ttm_move.o \
Thomas Hellströmc56ce952021-09-22 08:25:22 +0200173 gem/i915_gem_ttm_pm.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100174 gem/i915_gem_userptr.o \
Chris Wilsond45a1a52019-05-28 10:29:52 +0100175 gem/i915_gem_wait.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100176 gem/i915_gemfs.o
Chris Wilson64d6c502019-02-05 13:00:02 +0000177i915-y += \
Chris Wilson98932142019-05-28 10:29:44 +0100178 $(gem-y) \
Chris Wilson64d6c502019-02-05 13:00:02 +0000179 i915_active.o \
180 i915_cmd_parser.o \
Thomas Hellström63cf4ca2021-12-21 21:00:49 +0100181 i915_deps.o \
Chris Wilsonb47eb4a2010-08-07 11:01:23 +0100182 i915_gem_evict.o \
Chris Wilson54cf91d2010-11-25 18:00:26 +0000183 i915_gem_gtt.o \
Thomas Hellström5c43ec52021-06-17 08:30:08 +0200184 i915_gem_ww.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100185 i915_gem.o \
Lionel Landwerlina446ae22018-03-06 12:28:56 +0000186 i915_query.o \
Chris Wilsone61e0f52018-02-21 09:56:36 +0000187 i915_request.o \
Chris Wilsone2f3496e2018-10-01 15:47:54 +0100188 i915_scheduler.o \
Chris Wilson1c5d22f2009-08-25 11:15:50 +0100189 i915_trace_points.o \
Matthew Auld88be9a02021-06-16 16:24:55 +0100190 i915_ttm_buddy_manager.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +0200191 i915_vma.o \
Aravind Iddamsettyee714342022-11-07 18:05:58 -0800192 i915_vma_resource.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100193
Alex Dai33a732f2015-08-12 15:43:36 +0100194# general-purpose microcontroller (GuC) support
Daniele Ceraolo Spurio242c4b92022-12-08 12:05:16 -0800195i915-y += \
Daniele Ceraolo Spurio15bd4a62022-12-08 12:05:18 -0800196 gt/uc/intel_gsc_fw.o \
Daniele Ceraolo Spurio242c4b92022-12-08 12:05:16 -0800197 gt/uc/intel_gsc_uc.o \
Suraj Kandpal459b2602023-03-16 14:59:22 +0530198 gt/uc/intel_gsc_uc_heci_cmd_submit.o\
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100199 gt/uc/intel_guc.o \
200 gt/uc/intel_guc_ads.o \
Alan Previn24492512022-03-21 09:45:15 -0700201 gt/uc/intel_guc_capture.o \
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100202 gt/uc/intel_guc_ct.o \
Daniele Ceraolo Spurio293a5542020-03-26 11:11:20 -0700203 gt/uc/intel_guc_debugfs.o \
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100204 gt/uc/intel_guc_fw.o \
John Harrison8781f052022-03-06 15:21:56 -0800205 gt/uc/intel_guc_hwconfig.o \
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100206 gt/uc/intel_guc_log.o \
Daniele Ceraolo Spurio293a5542020-03-26 11:11:20 -0700207 gt/uc/intel_guc_log_debugfs.o \
Vinay Belgaumkar216d56c2021-07-30 13:21:19 -0700208 gt/uc/intel_guc_rc.o \
Vinay Belgaumkardff0fc42021-07-30 13:21:06 -0700209 gt/uc/intel_guc_slpc.o \
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100210 gt/uc/intel_guc_submission.o \
211 gt/uc/intel_huc.o \
Daniele Ceraolo Spurio293a5542020-03-26 11:11:20 -0700212 gt/uc/intel_huc_debugfs.o \
Daniele Ceraolo Spurio242c4b92022-12-08 12:05:16 -0800213 gt/uc/intel_huc_fw.o \
214 gt/uc/intel_uc.o \
215 gt/uc/intel_uc_debugfs.o \
216 gt/uc/intel_uc_fw.o
Alex Dai33a732f2015-08-12 15:43:36 +0100217
Tomas Winkler1e3dc1d2022-04-19 12:33:08 -0700218# graphics system controller (GSC) support
219i915-y += gt/intel_gsc.o
220
Dale B Stimsonb3b088e2022-10-13 08:45:20 -0700221# graphics hardware monitoring (HWMON) support
222i915-$(CONFIG_HWMON) += i915_hwmon.o
223
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100224# modesetting core code
Jani Nikuladf0566a2019-06-13 11:44:16 +0300225i915-y += \
Ville Syrjäläf3b603d2022-02-09 13:35:23 +0200226 display/hsw_ips.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300227 display/intel_atomic.o \
228 display/intel_atomic_plane.o \
229 display/intel_audio.o \
230 display/intel_bios.o \
231 display/intel_bw.o \
232 display/intel_cdclk.o \
233 display/intel_color.o \
234 display/intel_combo_phy.o \
235 display/intel_connector.o \
Dave Airliefbf756c2021-01-14 13:13:45 +0200236 display/intel_crtc.o \
Jani Nikula3e29d3b2022-06-16 12:48:16 +0300237 display/intel_crtc_state_dump.o \
Dave Airlie99ce2702020-12-21 11:04:48 +0200238 display/intel_cursor.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300239 display/intel_display.o \
240 display/intel_display_power.o \
Imre Deak323286c2022-04-15 00:06:42 +0300241 display/intel_display_power_map.o \
Imre Deakef1e1702022-02-22 18:51:34 +0200242 display/intel_display_power_well.o \
Jani Nikula6dbbff22023-03-02 18:49:36 +0200243 display/intel_display_rps.o \
Anusha Srivatsa32f94022021-05-18 14:34:44 -0700244 display/intel_dmc.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300245 display/intel_dpio_phy.o \
Dave Airlie8cf41f32021-01-14 13:13:46 +0200246 display/intel_dpll.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300247 display/intel_dpll_mgr.o \
Jani Nikuladc6d6152021-08-23 15:25:31 +0300248 display/intel_dpt.o \
José Roberto de Souzaa1b63112021-08-27 10:42:52 -0700249 display/intel_drrs.o \
Animesh Manna67f3b582019-09-20 17:29:22 +0530250 display/intel_dsb.o \
Imre Deakf837a612021-03-25 23:47:49 +0200251 display/intel_fb.o \
Dave Airlie814c8752021-10-12 14:34:59 +1000252 display/intel_fb_pin.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300253 display/intel_fbc.o \
Dave Airlie777e6872021-01-14 13:13:47 +0200254 display/intel_fdi.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300255 display/intel_fifo_underrun.o \
256 display/intel_frontbuffer.o \
Ville Syrjälä0ef19052020-01-20 19:47:24 +0200257 display/intel_global_state.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300258 display/intel_hdcp.o \
Suraj Kandpal18fd7f82023-03-16 14:59:26 +0530259 display/intel_hdcp_gsc.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300260 display/intel_hotplug.o \
Jani Nikula03120fe2022-11-09 16:42:06 +0200261 display/intel_hti.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300262 display/intel_lpe_audio.o \
Jani Nikuladf17ff62022-06-16 12:48:15 +0300263 display/intel_modeset_verify.o \
Jani Nikula2c7676b62022-06-17 12:48:16 +0300264 display/intel_modeset_setup.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300265 display/intel_overlay.o \
Ville Syrjäläb2de2d02021-10-15 10:16:18 +0300266 display/intel_pch_display.o \
Ville Syrjäläae880cd2021-10-15 10:16:17 +0300267 display/intel_pch_refclk.o \
Dave Airlie1cd967c2021-10-12 14:34:58 +1000268 display/intel_plane_initial.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300269 display/intel_psr.o \
270 display/intel_quirks.o \
Imre Deakbc853282019-06-28 17:36:15 +0300271 display/intel_sprite.o \
Ville Syrjäläaf3004c2023-03-14 15:02:55 +0200272 display/intel_sprite_uapi.o \
Jani Nikula4fb87832019-10-01 18:25:06 +0300273 display/intel_tc.o \
Jani Nikula62fe4512023-01-16 14:56:12 +0200274 display/intel_vblank.o \
Dave Airlie00a16d02020-12-21 13:09:57 +0200275 display/intel_vga.o \
Jani Nikula94b49d52023-02-13 21:59:57 +0200276 display/intel_wm.o \
Dave Airlie46d12f92021-02-05 16:48:36 +0200277 display/i9xx_plane.o \
Jani Nikula94b49d52023-02-13 21:59:57 +0200278 display/i9xx_wm.o \
Dave Airlie714b1cd2021-02-05 16:48:42 +0200279 display/skl_scaler.o \
Ville Syrjälä42a0d252022-09-08 22:16:45 +0300280 display/skl_universal_plane.o \
281 display/skl_watermark.o
Jani Nikuladf0566a2019-06-13 11:44:16 +0300282i915-$(CONFIG_ACPI) += \
283 display/intel_acpi.o \
284 display/intel_opregion.o
285i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
286 display/intel_fbdev.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100287
288# modesetting output/encoder code
Jani Nikula379bc102019-06-13 11:44:15 +0300289i915-y += \
290 display/dvo_ch7017.o \
291 display/dvo_ch7xxx.o \
292 display/dvo_ivch.o \
293 display/dvo_ns2501.o \
294 display/dvo_sil164.o \
295 display/dvo_tfp410.o \
Ville Syrjälä917c2892021-03-18 18:10:13 +0200296 display/g4x_dp.o \
Ville Syrjälä33e9e542021-03-18 18:10:14 +0200297 display/g4x_hdmi.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300298 display/icl_dsi.o \
Jani Nikula6cc42fb2021-08-25 14:06:50 +0300299 display/intel_backlight.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300300 display/intel_crt.o \
301 display/intel_ddi.o \
Dave Airlie99092a92021-02-04 21:43:18 +0200302 display/intel_ddi_buf_trans.o \
Jani Nikulafd2b94a2021-12-08 13:05:17 +0200303 display/intel_display_trace.o \
Imre Deak89cb0ba2022-10-25 14:44:55 +0300304 display/intel_dkl_phy.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300305 display/intel_dp.o \
Jani Nikulaaa850fb2021-01-20 12:18:34 +0200306 display/intel_dp_aux.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300307 display/intel_dp_aux_backlight.o \
Sean Pauld079b7e2020-08-18 11:39:00 -0400308 display/intel_dp_hdcp.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300309 display/intel_dp_link_training.o \
310 display/intel_dp_mst.o \
311 display/intel_dsi.o \
312 display/intel_dsi_dcs_backlight.o \
313 display/intel_dsi_vbt.o \
314 display/intel_dvo.o \
315 display/intel_gmbus.o \
316 display/intel_hdmi.o \
317 display/intel_lspcon.o \
318 display/intel_lvds.o \
319 display/intel_panel.o \
Jani Nikulaabad6802021-01-08 19:44:09 +0200320 display/intel_pps.o \
Vandita Kulkarnic33ebdb2021-05-18 17:06:10 -0700321 display/intel_qp_tables.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300322 display/intel_sdvo.o \
Matt Roper29081002021-07-23 10:42:32 -0700323 display/intel_snps_phy.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300324 display/intel_tv.o \
325 display/intel_vdsc.o \
Manasi Navare5b0c5942021-01-25 12:08:18 -0800326 display/intel_vrr.o \
Jani Nikula379bc102019-06-13 11:44:15 +0300327 display/vlv_dsi.o \
328 display/vlv_dsi_pll.o
Dave Airliec0e09202008-05-29 10:09:59 +1000329
Michal Wajdeczko5ed7a0c2019-06-26 12:38:26 +0000330i915-y += i915_perf.o
331
Daniele Ceraolo Spurioc5be8fc2022-09-27 17:41:37 -0700332# Protected execution platform (PXP) support. Base support is required for HuC
333i915-y += \
Huang, Sean Z0436ac12021-09-24 12:14:40 -0700334 pxp/intel_pxp.o \
Tomas Winkler887a1932022-09-27 17:41:39 -0700335 pxp/intel_pxp_tee.o \
336 pxp/intel_pxp_huc.o
Daniele Ceraolo Spurioc5be8fc2022-09-27 17:41:37 -0700337
338i915-$(CONFIG_DRM_I915_PXP) += \
Huang, Sean Z95c9e122021-09-24 12:14:43 -0700339 pxp/intel_pxp_cmd.o \
Daniele Ceraolo Spurio390cf1b2021-09-24 12:14:50 -0700340 pxp/intel_pxp_debugfs.o \
Huang, Sean Z2ae09682021-09-24 12:14:44 -0700341 pxp/intel_pxp_irq.o \
Huang, Sean Z0cfab4c2021-09-24 12:14:47 -0700342 pxp/intel_pxp_pm.o \
Daniele Ceraolo Spurioc5be8fc2022-09-27 17:41:37 -0700343 pxp/intel_pxp_session.o
Daniele Ceraolo Spurio3ad2dd92021-09-24 12:14:39 -0700344
Chris Wilson98a2f412016-10-12 10:05:18 +0100345# Post-mortem debug and GPU hang state capture
346i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
Chris Wilson953c7f82017-02-13 17:15:12 +0000347i915-$(CONFIG_DRM_I915_SELFTEST) += \
Thomas Hellström57143f22021-06-17 08:30:17 +0200348 gem/selftests/i915_gem_client_blt.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100349 gem/selftests/igt_gem_utils.o \
Rahul Kumar Singh3a4bfa02021-07-26 17:23:42 -0700350 selftests/intel_scheduler_helpers.o \
Chris Wilson953c7f82017-02-13 17:15:12 +0000351 selftests/i915_random.o \
Chris Wilson98dc0452018-05-05 10:10:13 +0100352 selftests/i915_selftest.o \
Chris Wilsonf3bc6322020-01-03 10:45:15 +0000353 selftests/igt_atomic.o \
Tvrtko Ursulin8d2f6e22018-11-30 08:02:53 +0000354 selftests/igt_flush_test.o \
Chris Wilsone4a8c812019-01-21 22:20:47 +0000355 selftests/igt_live_test.o \
Chris Wilson6fedafa2019-11-07 18:06:00 +0000356 selftests/igt_mmap.o \
Tvrtko Ursulin28d6ccc2018-12-03 12:50:11 +0000357 selftests/igt_reset.o \
Chris Wilsond4e3d452020-04-17 16:20:17 +0100358 selftests/igt_spinner.o \
359 selftests/librapl.o
Chris Wilson98a2f412016-10-12 10:05:18 +0100360
Yu Zhangcf9d2892015-02-10 19:05:47 +0800361# virtual gpu code
362i915-y += i915_vgpu.o
363
Jani Nikula7f0cf302022-04-13 15:25:39 +0300364i915-$(CONFIG_DRM_I915_GVT) += \
365 intel_gvt.o \
366 intel_gvt_mmio_table.o
Zhi Wang0ad35fe2016-06-16 08:07:00 -0400367include $(src)/gvt/Makefile
Zhi Wang0ad35fe2016-06-16 08:07:00 -0400368
Chris Wilsonc58305a2016-08-19 16:54:28 +0100369obj-$(CONFIG_DRM_I915) += i915.o
Christoph Hellwig8b750bf2022-04-11 16:13:35 +0200370obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200371
Jani Nikulaaaee4bb2023-04-03 15:57:10 +0300372# kernel-doc test
373#
374# Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build
375ifdef CONFIG_DRM_I915_WERROR
376 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none $<
377endif
378
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200379# header test
380
381# exclude some broken headers from the test coverage
382no-header-test := \
Jani Nikulae056f662020-12-08 12:29:14 +0200383 display/intel_vbt_defs.h
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200384
Masahiro Yamada2047ace2021-01-20 15:23:51 +0900385always-$(CONFIG_DRM_I915_WERROR) += \
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200386 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
387 $(shell cd $(srctree)/$(src) && find * -name '*.h')))
388
389quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
Jani Nikula899ff792023-04-04 12:05:28 +0300390 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \
391 $(srctree)/scripts/kernel-doc -none $<; touch $@
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200392
393$(obj)/%.hdrtest: $(src)/%.h FORCE
394 $(call if_changed_dep,hdrtest)