blob: be1917be28f2d457c561a117ea92dd49c7f62d50 [file] [log] [blame]
Stefan Wahren6be665a2018-09-04 19:29:11 +02001// SPDX-License-Identifier: GPL-2.0+
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002/*
3 * Copyright (C) 2015 Microchip Technology
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004 */
5#include <linux/version.h>
6#include <linux/module.h>
7#include <linux/netdevice.h>
8#include <linux/etherdevice.h>
9#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000010#include <linux/usb.h>
11#include <linux/crc32.h>
12#include <linux/signal.h>
13#include <linux/slab.h>
14#include <linux/if_vlan.h>
15#include <linux/uaccess.h>
16#include <linux/list.h>
17#include <linux/ip.h>
18#include <linux/ipv6.h>
19#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020020#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000021#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000022#include <linux/interrupt.h>
23#include <linux/irqdomain.h>
24#include <linux/irq.h>
25#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000026#include <linux/microchipphy.h>
Raghuram Chary J89b36fb2018-04-28 11:33:14 +053027#include <linux/phy_fixed.h>
Phil Elwell1827b062018-04-19 17:59:39 +010028#include <linux/of_mdio.h>
Phil Elwell760db292018-04-19 17:59:38 +010029#include <linux/of_net.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000030#include "lan78xx.h"
31
32#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
33#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
34#define DRIVER_NAME "lan78xx"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000035
36#define TX_TIMEOUT_JIFFIES (5 * HZ)
37#define THROTTLE_JIFFIES (HZ / 8)
38#define UNLINK_TIMEOUT_MS 3
39
40#define RX_MAX_QUEUE_MEMORY (60 * 1518)
41
42#define SS_USB_PKT_SIZE (1024)
43#define HS_USB_PKT_SIZE (512)
44#define FS_USB_PKT_SIZE (64)
45
46#define MAX_RX_FIFO_SIZE (12 * 1024)
47#define MAX_TX_FIFO_SIZE (12 * 1024)
48#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
49#define DEFAULT_BULK_IN_DELAY (0x0800)
50#define MAX_SINGLE_PACKET_SIZE (9000)
51#define DEFAULT_TX_CSUM_ENABLE (true)
52#define DEFAULT_RX_CSUM_ENABLE (true)
53#define DEFAULT_TSO_CSUM_ENABLE (true)
54#define DEFAULT_VLAN_FILTER_ENABLE (true)
Dave Stevensonec21ecf2018-06-25 15:07:14 +010055#define DEFAULT_VLAN_RX_OFFLOAD (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000056#define TX_OVERHEAD (8)
57#define RXW_PADDING 2
58
59#define LAN78XX_USB_VENDOR_ID (0x0424)
60#define LAN7800_USB_PRODUCT_ID (0x7800)
61#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000062#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000063#define LAN78XX_EEPROM_MAGIC (0x78A5)
64#define LAN78XX_OTP_MAGIC (0x78F3)
65
66#define MII_READ 1
67#define MII_WRITE 0
68
69#define EEPROM_INDICATOR (0xA5)
70#define EEPROM_MAC_OFFSET (0x01)
71#define MAX_EEPROM_SIZE 512
72#define OTP_INDICATOR_1 (0xF3)
73#define OTP_INDICATOR_2 (0xF7)
74
75#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
76 WAKE_MCAST | WAKE_BCAST | \
77 WAKE_ARP | WAKE_MAGIC)
78
79/* USB related defines */
80#define BULK_IN_PIPE 1
81#define BULK_OUT_PIPE 2
82
83/* default autosuspend delay (mSec)*/
84#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
85
Woojung Huh20ff5562016-03-16 22:10:40 +000086/* statistic update interval (mSec) */
87#define STAT_UPDATE_TIMER (1 * 1000)
88
Woojung Huhcc89c322016-11-01 20:02:00 +000089/* defines interrupts from interrupt EP */
90#define MAX_INT_EP (32)
91#define INT_EP_INTEP (31)
92#define INT_EP_OTP_WR_DONE (28)
93#define INT_EP_EEE_TX_LPI_START (26)
94#define INT_EP_EEE_TX_LPI_STOP (25)
95#define INT_EP_EEE_RX_LPI (24)
96#define INT_EP_MAC_RESET_TIMEOUT (23)
97#define INT_EP_RDFO (22)
98#define INT_EP_TXE (21)
99#define INT_EP_USB_STATUS (20)
100#define INT_EP_TX_DIS (19)
101#define INT_EP_RX_DIS (18)
102#define INT_EP_PHY (17)
103#define INT_EP_DP (16)
104#define INT_EP_MAC_ERR (15)
105#define INT_EP_TDFU (14)
106#define INT_EP_TDFO (13)
107#define INT_EP_UTX (12)
108#define INT_EP_GPIO_11 (11)
109#define INT_EP_GPIO_10 (10)
110#define INT_EP_GPIO_9 (9)
111#define INT_EP_GPIO_8 (8)
112#define INT_EP_GPIO_7 (7)
113#define INT_EP_GPIO_6 (6)
114#define INT_EP_GPIO_5 (5)
115#define INT_EP_GPIO_4 (4)
116#define INT_EP_GPIO_3 (3)
117#define INT_EP_GPIO_2 (2)
118#define INT_EP_GPIO_1 (1)
119#define INT_EP_GPIO_0 (0)
120
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000121static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
122 "RX FCS Errors",
123 "RX Alignment Errors",
124 "Rx Fragment Errors",
125 "RX Jabber Errors",
126 "RX Undersize Frame Errors",
127 "RX Oversize Frame Errors",
128 "RX Dropped Frames",
129 "RX Unicast Byte Count",
130 "RX Broadcast Byte Count",
131 "RX Multicast Byte Count",
132 "RX Unicast Frames",
133 "RX Broadcast Frames",
134 "RX Multicast Frames",
135 "RX Pause Frames",
136 "RX 64 Byte Frames",
137 "RX 65 - 127 Byte Frames",
138 "RX 128 - 255 Byte Frames",
139 "RX 256 - 511 Bytes Frames",
140 "RX 512 - 1023 Byte Frames",
141 "RX 1024 - 1518 Byte Frames",
142 "RX Greater 1518 Byte Frames",
143 "EEE RX LPI Transitions",
144 "EEE RX LPI Time",
145 "TX FCS Errors",
146 "TX Excess Deferral Errors",
147 "TX Carrier Errors",
148 "TX Bad Byte Count",
149 "TX Single Collisions",
150 "TX Multiple Collisions",
151 "TX Excessive Collision",
152 "TX Late Collisions",
153 "TX Unicast Byte Count",
154 "TX Broadcast Byte Count",
155 "TX Multicast Byte Count",
156 "TX Unicast Frames",
157 "TX Broadcast Frames",
158 "TX Multicast Frames",
159 "TX Pause Frames",
160 "TX 64 Byte Frames",
161 "TX 65 - 127 Byte Frames",
162 "TX 128 - 255 Byte Frames",
163 "TX 256 - 511 Bytes Frames",
164 "TX 512 - 1023 Byte Frames",
165 "TX 1024 - 1518 Byte Frames",
166 "TX Greater 1518 Byte Frames",
167 "EEE TX LPI Transitions",
168 "EEE TX LPI Time",
169};
170
171struct lan78xx_statstage {
172 u32 rx_fcs_errors;
173 u32 rx_alignment_errors;
174 u32 rx_fragment_errors;
175 u32 rx_jabber_errors;
176 u32 rx_undersize_frame_errors;
177 u32 rx_oversize_frame_errors;
178 u32 rx_dropped_frames;
179 u32 rx_unicast_byte_count;
180 u32 rx_broadcast_byte_count;
181 u32 rx_multicast_byte_count;
182 u32 rx_unicast_frames;
183 u32 rx_broadcast_frames;
184 u32 rx_multicast_frames;
185 u32 rx_pause_frames;
186 u32 rx_64_byte_frames;
187 u32 rx_65_127_byte_frames;
188 u32 rx_128_255_byte_frames;
189 u32 rx_256_511_bytes_frames;
190 u32 rx_512_1023_byte_frames;
191 u32 rx_1024_1518_byte_frames;
192 u32 rx_greater_1518_byte_frames;
193 u32 eee_rx_lpi_transitions;
194 u32 eee_rx_lpi_time;
195 u32 tx_fcs_errors;
196 u32 tx_excess_deferral_errors;
197 u32 tx_carrier_errors;
198 u32 tx_bad_byte_count;
199 u32 tx_single_collisions;
200 u32 tx_multiple_collisions;
201 u32 tx_excessive_collision;
202 u32 tx_late_collisions;
203 u32 tx_unicast_byte_count;
204 u32 tx_broadcast_byte_count;
205 u32 tx_multicast_byte_count;
206 u32 tx_unicast_frames;
207 u32 tx_broadcast_frames;
208 u32 tx_multicast_frames;
209 u32 tx_pause_frames;
210 u32 tx_64_byte_frames;
211 u32 tx_65_127_byte_frames;
212 u32 tx_128_255_byte_frames;
213 u32 tx_256_511_bytes_frames;
214 u32 tx_512_1023_byte_frames;
215 u32 tx_1024_1518_byte_frames;
216 u32 tx_greater_1518_byte_frames;
217 u32 eee_tx_lpi_transitions;
218 u32 eee_tx_lpi_time;
219};
220
Woojung Huh20ff5562016-03-16 22:10:40 +0000221struct lan78xx_statstage64 {
222 u64 rx_fcs_errors;
223 u64 rx_alignment_errors;
224 u64 rx_fragment_errors;
225 u64 rx_jabber_errors;
226 u64 rx_undersize_frame_errors;
227 u64 rx_oversize_frame_errors;
228 u64 rx_dropped_frames;
229 u64 rx_unicast_byte_count;
230 u64 rx_broadcast_byte_count;
231 u64 rx_multicast_byte_count;
232 u64 rx_unicast_frames;
233 u64 rx_broadcast_frames;
234 u64 rx_multicast_frames;
235 u64 rx_pause_frames;
236 u64 rx_64_byte_frames;
237 u64 rx_65_127_byte_frames;
238 u64 rx_128_255_byte_frames;
239 u64 rx_256_511_bytes_frames;
240 u64 rx_512_1023_byte_frames;
241 u64 rx_1024_1518_byte_frames;
242 u64 rx_greater_1518_byte_frames;
243 u64 eee_rx_lpi_transitions;
244 u64 eee_rx_lpi_time;
245 u64 tx_fcs_errors;
246 u64 tx_excess_deferral_errors;
247 u64 tx_carrier_errors;
248 u64 tx_bad_byte_count;
249 u64 tx_single_collisions;
250 u64 tx_multiple_collisions;
251 u64 tx_excessive_collision;
252 u64 tx_late_collisions;
253 u64 tx_unicast_byte_count;
254 u64 tx_broadcast_byte_count;
255 u64 tx_multicast_byte_count;
256 u64 tx_unicast_frames;
257 u64 tx_broadcast_frames;
258 u64 tx_multicast_frames;
259 u64 tx_pause_frames;
260 u64 tx_64_byte_frames;
261 u64 tx_65_127_byte_frames;
262 u64 tx_128_255_byte_frames;
263 u64 tx_256_511_bytes_frames;
264 u64 tx_512_1023_byte_frames;
265 u64 tx_1024_1518_byte_frames;
266 u64 tx_greater_1518_byte_frames;
267 u64 eee_tx_lpi_transitions;
268 u64 eee_tx_lpi_time;
269};
270
Raghuram Chary J49621862018-04-20 11:43:50 +0530271static u32 lan78xx_regs[] = {
272 ID_REV,
273 INT_STS,
274 HW_CFG,
275 PMT_CTL,
276 E2P_CMD,
277 E2P_DATA,
278 USB_STATUS,
279 VLAN_TYPE,
280 MAC_CR,
281 MAC_RX,
282 MAC_TX,
283 FLOW,
284 ERR_STS,
285 MII_ACC,
286 MII_DATA,
287 EEE_TX_LPI_REQ_DLY,
288 EEE_TW_TX_SYS,
289 EEE_TX_LPI_REM_DLY,
290 WUCSR
291};
292
293#define PHY_REG_SIZE (32 * sizeof(u32))
294
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000295struct lan78xx_net;
296
297struct lan78xx_priv {
298 struct lan78xx_net *dev;
299 u32 rfe_ctl;
300 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
301 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
302 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
303 struct mutex dataport_mutex; /* for dataport access */
304 spinlock_t rfe_ctl_lock; /* for rfe register access */
305 struct work_struct set_multicast;
306 struct work_struct set_vlan;
307 u32 wol;
308};
309
310enum skb_state {
311 illegal = 0,
312 tx_start,
313 tx_done,
314 rx_start,
315 rx_done,
316 rx_cleanup,
317 unlink_start
318};
319
320struct skb_data { /* skb->cb is one of these */
321 struct urb *urb;
322 struct lan78xx_net *dev;
323 enum skb_state state;
324 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000325 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000326};
327
328struct usb_context {
329 struct usb_ctrlrequest req;
330 struct lan78xx_net *dev;
331};
332
333#define EVENT_TX_HALT 0
334#define EVENT_RX_HALT 1
335#define EVENT_RX_MEMORY 2
336#define EVENT_STS_SPLIT 3
337#define EVENT_LINK_RESET 4
338#define EVENT_RX_PAUSED 5
339#define EVENT_DEV_WAKING 6
340#define EVENT_DEV_ASLEEP 7
341#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000342#define EVENT_STAT_UPDATE 9
343
344struct statstage {
345 struct mutex access_lock; /* for stats access */
346 struct lan78xx_statstage saved;
347 struct lan78xx_statstage rollover_count;
348 struct lan78xx_statstage rollover_max;
349 struct lan78xx_statstage64 curr_stat;
350};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000351
Woojung Huhcc89c322016-11-01 20:02:00 +0000352struct irq_domain_data {
353 struct irq_domain *irqdomain;
354 unsigned int phyirq;
355 struct irq_chip *irqchip;
356 irq_flow_handler_t irq_handler;
357 u32 irqenable;
358 struct mutex irq_lock; /* for irq bus access */
359};
360
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000361struct lan78xx_net {
362 struct net_device *net;
363 struct usb_device *udev;
364 struct usb_interface *intf;
365 void *driver_priv;
366
367 int rx_qlen;
368 int tx_qlen;
369 struct sk_buff_head rxq;
370 struct sk_buff_head txq;
371 struct sk_buff_head done;
372 struct sk_buff_head rxq_pause;
373 struct sk_buff_head txq_pend;
374
375 struct tasklet_struct bh;
376 struct delayed_work wq;
377
378 struct usb_host_endpoint *ep_blkin;
379 struct usb_host_endpoint *ep_blkout;
380 struct usb_host_endpoint *ep_intr;
381
382 int msg_enable;
383
384 struct urb *urb_intr;
385 struct usb_anchor deferred;
386
387 struct mutex phy_mutex; /* for phy access */
388 unsigned pipe_in, pipe_out, pipe_intr;
389
390 u32 hard_mtu; /* count any extra framing */
391 size_t rx_urb_size; /* size for rx urbs */
392
393 unsigned long flags;
394
395 wait_queue_head_t *wait;
396 unsigned char suspend_count;
397
398 unsigned maxpacket;
399 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000400 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000401
402 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000403
404 int link_on;
405 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000406
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000407 u32 chipid;
408 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000409 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000410 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000411
412 int fc_autoneg;
413 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000414
415 int delta;
416 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000417
418 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000419};
420
Woojung Huh02dc1f32016-12-07 20:26:25 +0000421/* define external phy id */
422#define PHY_LAN8835 (0x0007C130)
423#define PHY_KSZ9031RNX (0x00221620)
424
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000425/* use ethtool to change the level for any given device */
426static int msg_level = -1;
427module_param(msg_level, int, 0);
428MODULE_PARM_DESC(msg_level, "Override default message level");
429
430static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
431{
432 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
433 int ret;
434
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000435 if (!buf)
436 return -ENOMEM;
437
438 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
439 USB_VENDOR_REQUEST_READ_REGISTER,
440 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
441 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
442 if (likely(ret >= 0)) {
443 le32_to_cpus(buf);
444 *data = *buf;
445 } else {
446 netdev_warn(dev->net,
447 "Failed to read register index 0x%08x. ret = %d",
448 index, ret);
449 }
450
451 kfree(buf);
452
453 return ret;
454}
455
456static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
457{
458 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
459 int ret;
460
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000461 if (!buf)
462 return -ENOMEM;
463
464 *buf = data;
465 cpu_to_le32s(buf);
466
467 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
468 USB_VENDOR_REQUEST_WRITE_REGISTER,
469 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
470 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
471 if (unlikely(ret < 0)) {
472 netdev_warn(dev->net,
473 "Failed to write register index 0x%08x. ret = %d",
474 index, ret);
475 }
476
477 kfree(buf);
478
479 return ret;
480}
481
482static int lan78xx_read_stats(struct lan78xx_net *dev,
483 struct lan78xx_statstage *data)
484{
485 int ret = 0;
486 int i;
487 struct lan78xx_statstage *stats;
488 u32 *src;
489 u32 *dst;
490
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000491 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
492 if (!stats)
493 return -ENOMEM;
494
495 ret = usb_control_msg(dev->udev,
496 usb_rcvctrlpipe(dev->udev, 0),
497 USB_VENDOR_REQUEST_GET_STATS,
498 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
499 0,
500 0,
501 (void *)stats,
502 sizeof(*stats),
503 USB_CTRL_SET_TIMEOUT);
504 if (likely(ret >= 0)) {
505 src = (u32 *)stats;
506 dst = (u32 *)data;
507 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
508 le32_to_cpus(&src[i]);
509 dst[i] = src[i];
510 }
511 } else {
512 netdev_warn(dev->net,
513 "Failed to read stat ret = 0x%x", ret);
514 }
515
516 kfree(stats);
517
518 return ret;
519}
520
Woojung Huh20ff5562016-03-16 22:10:40 +0000521#define check_counter_rollover(struct1, dev_stats, member) { \
522 if (struct1->member < dev_stats.saved.member) \
523 dev_stats.rollover_count.member++; \
524 }
525
526static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
527 struct lan78xx_statstage *stats)
528{
529 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
530 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
531 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
532 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
533 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
534 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
535 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
536 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
537 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
538 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
539 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
540 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
541 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
542 check_counter_rollover(stats, dev->stats, rx_pause_frames);
543 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
544 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
545 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
546 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
547 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
548 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
549 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
550 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
551 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
552 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
553 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
554 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
555 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
556 check_counter_rollover(stats, dev->stats, tx_single_collisions);
557 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
558 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
559 check_counter_rollover(stats, dev->stats, tx_late_collisions);
560 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
561 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
562 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
563 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
564 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
565 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
566 check_counter_rollover(stats, dev->stats, tx_pause_frames);
567 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
568 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
569 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
570 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
571 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
572 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
573 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
574 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
575 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
576
577 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
578}
579
580static void lan78xx_update_stats(struct lan78xx_net *dev)
581{
582 u32 *p, *count, *max;
583 u64 *data;
584 int i;
585 struct lan78xx_statstage lan78xx_stats;
586
587 if (usb_autopm_get_interface(dev->intf) < 0)
588 return;
589
590 p = (u32 *)&lan78xx_stats;
591 count = (u32 *)&dev->stats.rollover_count;
592 max = (u32 *)&dev->stats.rollover_max;
593 data = (u64 *)&dev->stats.curr_stat;
594
595 mutex_lock(&dev->stats.access_lock);
596
597 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
598 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
599
600 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
601 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
602
603 mutex_unlock(&dev->stats.access_lock);
604
605 usb_autopm_put_interface(dev->intf);
606}
607
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000608/* Loop until the read is completed with timeout called with phy_mutex held */
609static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
610{
611 unsigned long start_time = jiffies;
612 u32 val;
613 int ret;
614
615 do {
616 ret = lan78xx_read_reg(dev, MII_ACC, &val);
617 if (unlikely(ret < 0))
618 return -EIO;
619
620 if (!(val & MII_ACC_MII_BUSY_))
621 return 0;
622 } while (!time_after(jiffies, start_time + HZ));
623
624 return -EIO;
625}
626
627static inline u32 mii_access(int id, int index, int read)
628{
629 u32 ret;
630
631 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
632 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
633 if (read)
634 ret |= MII_ACC_MII_READ_;
635 else
636 ret |= MII_ACC_MII_WRITE_;
637 ret |= MII_ACC_MII_BUSY_;
638
639 return ret;
640}
641
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000642static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
643{
644 unsigned long start_time = jiffies;
645 u32 val;
646 int ret;
647
648 do {
649 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
650 if (unlikely(ret < 0))
651 return -EIO;
652
653 if (!(val & E2P_CMD_EPC_BUSY_) ||
654 (val & E2P_CMD_EPC_TIMEOUT_))
655 break;
656 usleep_range(40, 100);
657 } while (!time_after(jiffies, start_time + HZ));
658
659 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
660 netdev_warn(dev->net, "EEPROM read operation timeout");
661 return -EIO;
662 }
663
664 return 0;
665}
666
667static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
668{
669 unsigned long start_time = jiffies;
670 u32 val;
671 int ret;
672
673 do {
674 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
675 if (unlikely(ret < 0))
676 return -EIO;
677
678 if (!(val & E2P_CMD_EPC_BUSY_))
679 return 0;
680
681 usleep_range(40, 100);
682 } while (!time_after(jiffies, start_time + HZ));
683
684 netdev_warn(dev->net, "EEPROM is busy");
685 return -EIO;
686}
687
688static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
689 u32 length, u8 *data)
690{
691 u32 val;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000692 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000693 int i, ret;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000694 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000695
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000696 /* depends on chip, some EEPROM pins are muxed with LED function.
697 * disable & restore LED function to access EEPROM.
698 */
699 ret = lan78xx_read_reg(dev, HW_CFG, &val);
700 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000701 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000702 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
703 ret = lan78xx_write_reg(dev, HW_CFG, val);
704 }
705
706 retval = lan78xx_eeprom_confirm_not_busy(dev);
707 if (retval)
708 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000709
710 for (i = 0; i < length; i++) {
711 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
712 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
713 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000714 if (unlikely(ret < 0)) {
715 retval = -EIO;
716 goto exit;
717 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000718
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000719 retval = lan78xx_wait_eeprom(dev);
720 if (retval < 0)
721 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000722
723 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000724 if (unlikely(ret < 0)) {
725 retval = -EIO;
726 goto exit;
727 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000728
729 data[i] = val & 0xFF;
730 offset++;
731 }
732
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000733 retval = 0;
734exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000735 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000736 ret = lan78xx_write_reg(dev, HW_CFG, saved);
737
738 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000739}
740
741static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
742 u32 length, u8 *data)
743{
744 u8 sig;
745 int ret;
746
747 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
748 if ((ret == 0) && (sig == EEPROM_INDICATOR))
749 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
750 else
751 ret = -EINVAL;
752
753 return ret;
754}
755
756static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
757 u32 length, u8 *data)
758{
759 u32 val;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000760 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000761 int i, ret;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000762 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000763
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000764 /* depends on chip, some EEPROM pins are muxed with LED function.
765 * disable & restore LED function to access EEPROM.
766 */
767 ret = lan78xx_read_reg(dev, HW_CFG, &val);
768 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000769 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000770 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
771 ret = lan78xx_write_reg(dev, HW_CFG, val);
772 }
773
774 retval = lan78xx_eeprom_confirm_not_busy(dev);
775 if (retval)
776 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000777
778 /* Issue write/erase enable command */
779 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
780 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000781 if (unlikely(ret < 0)) {
782 retval = -EIO;
783 goto exit;
784 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000785
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000786 retval = lan78xx_wait_eeprom(dev);
787 if (retval < 0)
788 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000789
790 for (i = 0; i < length; i++) {
791 /* Fill data register */
792 val = data[i];
793 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000794 if (ret < 0) {
795 retval = -EIO;
796 goto exit;
797 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000798
799 /* Send "write" command */
800 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
801 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
802 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000803 if (ret < 0) {
804 retval = -EIO;
805 goto exit;
806 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000807
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000808 retval = lan78xx_wait_eeprom(dev);
809 if (retval < 0)
810 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000811
812 offset++;
813 }
814
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000815 retval = 0;
816exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000817 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000818 ret = lan78xx_write_reg(dev, HW_CFG, saved);
819
820 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000821}
822
823static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
824 u32 length, u8 *data)
825{
826 int i;
827 int ret;
828 u32 buf;
829 unsigned long timeout;
830
831 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
832
833 if (buf & OTP_PWR_DN_PWRDN_N_) {
834 /* clear it and wait to be cleared */
835 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
836
837 timeout = jiffies + HZ;
838 do {
839 usleep_range(1, 10);
840 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
841 if (time_after(jiffies, timeout)) {
842 netdev_warn(dev->net,
843 "timeout on OTP_PWR_DN");
844 return -EIO;
845 }
846 } while (buf & OTP_PWR_DN_PWRDN_N_);
847 }
848
849 for (i = 0; i < length; i++) {
850 ret = lan78xx_write_reg(dev, OTP_ADDR1,
851 ((offset + i) >> 8) & OTP_ADDR1_15_11);
852 ret = lan78xx_write_reg(dev, OTP_ADDR2,
853 ((offset + i) & OTP_ADDR2_10_3));
854
855 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
856 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
857
858 timeout = jiffies + HZ;
859 do {
860 udelay(1);
861 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
862 if (time_after(jiffies, timeout)) {
863 netdev_warn(dev->net,
864 "timeout on OTP_STATUS");
865 return -EIO;
866 }
867 } while (buf & OTP_STATUS_BUSY_);
868
869 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
870
871 data[i] = (u8)(buf & 0xFF);
872 }
873
874 return 0;
875}
876
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000877static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
878 u32 length, u8 *data)
879{
880 int i;
881 int ret;
882 u32 buf;
883 unsigned long timeout;
884
885 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
886
887 if (buf & OTP_PWR_DN_PWRDN_N_) {
888 /* clear it and wait to be cleared */
889 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
890
891 timeout = jiffies + HZ;
892 do {
893 udelay(1);
894 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
895 if (time_after(jiffies, timeout)) {
896 netdev_warn(dev->net,
897 "timeout on OTP_PWR_DN completion");
898 return -EIO;
899 }
900 } while (buf & OTP_PWR_DN_PWRDN_N_);
901 }
902
903 /* set to BYTE program mode */
904 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
905
906 for (i = 0; i < length; i++) {
907 ret = lan78xx_write_reg(dev, OTP_ADDR1,
908 ((offset + i) >> 8) & OTP_ADDR1_15_11);
909 ret = lan78xx_write_reg(dev, OTP_ADDR2,
910 ((offset + i) & OTP_ADDR2_10_3));
911 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
912 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
913 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
914
915 timeout = jiffies + HZ;
916 do {
917 udelay(1);
918 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
919 if (time_after(jiffies, timeout)) {
920 netdev_warn(dev->net,
921 "Timeout on OTP_STATUS completion");
922 return -EIO;
923 }
924 } while (buf & OTP_STATUS_BUSY_);
925 }
926
927 return 0;
928}
929
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000930static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
931 u32 length, u8 *data)
932{
933 u8 sig;
934 int ret;
935
936 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
937
938 if (ret == 0) {
Nathan Chancellor94e7c842018-09-20 15:48:30 -0700939 if (sig == OTP_INDICATOR_2)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000940 offset += 0x100;
Nathan Chancellor94e7c842018-09-20 15:48:30 -0700941 else if (sig != OTP_INDICATOR_1)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000942 ret = -EINVAL;
Phil Elwell4bfc3382018-04-11 10:59:17 +0100943 if (!ret)
944 ret = lan78xx_read_raw_otp(dev, offset, length, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000945 }
946
947 return ret;
948}
949
950static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
951{
952 int i, ret;
953
954 for (i = 0; i < 100; i++) {
955 u32 dp_sel;
956
957 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
958 if (unlikely(ret < 0))
959 return -EIO;
960
961 if (dp_sel & DP_SEL_DPRDY_)
962 return 0;
963
964 usleep_range(40, 100);
965 }
966
967 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
968
969 return -EIO;
970}
971
972static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
973 u32 addr, u32 length, u32 *buf)
974{
975 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
976 u32 dp_sel;
977 int i, ret;
978
979 if (usb_autopm_get_interface(dev->intf) < 0)
980 return 0;
981
982 mutex_lock(&pdata->dataport_mutex);
983
984 ret = lan78xx_dataport_wait_not_busy(dev);
985 if (ret < 0)
986 goto done;
987
988 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
989
990 dp_sel &= ~DP_SEL_RSEL_MASK_;
991 dp_sel |= ram_select;
992 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
993
994 for (i = 0; i < length; i++) {
995 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
996
997 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
998
999 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
1000
1001 ret = lan78xx_dataport_wait_not_busy(dev);
1002 if (ret < 0)
1003 goto done;
1004 }
1005
1006done:
1007 mutex_unlock(&pdata->dataport_mutex);
1008 usb_autopm_put_interface(dev->intf);
1009
1010 return ret;
1011}
1012
1013static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1014 int index, u8 addr[ETH_ALEN])
1015{
Stefan Wahren51ceac92018-09-04 19:29:12 +02001016 u32 temp;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001017
1018 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1019 temp = addr[3];
1020 temp = addr[2] | (temp << 8);
1021 temp = addr[1] | (temp << 8);
1022 temp = addr[0] | (temp << 8);
1023 pdata->pfilter_table[index][1] = temp;
1024 temp = addr[5];
1025 temp = addr[4] | (temp << 8);
1026 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1027 pdata->pfilter_table[index][0] = temp;
1028 }
1029}
1030
1031/* returns hash bit number for given MAC address */
1032static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1033{
1034 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1035}
1036
1037static void lan78xx_deferred_multicast_write(struct work_struct *param)
1038{
1039 struct lan78xx_priv *pdata =
1040 container_of(param, struct lan78xx_priv, set_multicast);
1041 struct lan78xx_net *dev = pdata->dev;
1042 int i;
1043 int ret;
1044
1045 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1046 pdata->rfe_ctl);
1047
1048 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1049 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1050
1051 for (i = 1; i < NUM_OF_MAF; i++) {
1052 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1053 ret = lan78xx_write_reg(dev, MAF_LO(i),
1054 pdata->pfilter_table[i][1]);
1055 ret = lan78xx_write_reg(dev, MAF_HI(i),
1056 pdata->pfilter_table[i][0]);
1057 }
1058
1059 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1060}
1061
1062static void lan78xx_set_multicast(struct net_device *netdev)
1063{
1064 struct lan78xx_net *dev = netdev_priv(netdev);
1065 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1066 unsigned long flags;
1067 int i;
1068
1069 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1070
1071 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1072 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1073
1074 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1075 pdata->mchash_table[i] = 0;
1076 /* pfilter_table[0] has own HW address */
1077 for (i = 1; i < NUM_OF_MAF; i++) {
1078 pdata->pfilter_table[i][0] =
1079 pdata->pfilter_table[i][1] = 0;
1080 }
1081
1082 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1083
1084 if (dev->net->flags & IFF_PROMISC) {
1085 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1086 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1087 } else {
1088 if (dev->net->flags & IFF_ALLMULTI) {
1089 netif_dbg(dev, drv, dev->net,
1090 "receive all multicast enabled");
1091 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1092 }
1093 }
1094
1095 if (netdev_mc_count(dev->net)) {
1096 struct netdev_hw_addr *ha;
1097 int i;
1098
1099 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1100
1101 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1102
1103 i = 1;
1104 netdev_for_each_mc_addr(ha, netdev) {
1105 /* set first 32 into Perfect Filter */
1106 if (i < 33) {
1107 lan78xx_set_addr_filter(pdata, i, ha->addr);
1108 } else {
1109 u32 bitnum = lan78xx_hash(ha->addr);
1110
1111 pdata->mchash_table[bitnum / 32] |=
1112 (1 << (bitnum % 32));
1113 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1114 }
1115 i++;
1116 }
1117 }
1118
1119 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1120
1121 /* defer register writes to a sleepable context */
1122 schedule_work(&pdata->set_multicast);
1123}
1124
1125static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1126 u16 lcladv, u16 rmtadv)
1127{
1128 u32 flow = 0, fct_flow = 0;
1129 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001130 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001131
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001132 if (dev->fc_autoneg)
1133 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1134 else
1135 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001136
1137 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001138 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001139
1140 if (cap & FLOW_CTRL_RX)
1141 flow |= FLOW_CR_RX_FCEN_;
1142
1143 if (dev->udev->speed == USB_SPEED_SUPER)
1144 fct_flow = 0x817;
1145 else if (dev->udev->speed == USB_SPEED_HIGH)
1146 fct_flow = 0x211;
1147
1148 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1149 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1150 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1151
1152 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1153
1154 /* threshold value should be set before enabling flow */
1155 ret = lan78xx_write_reg(dev, FLOW, flow);
1156
1157 return 0;
1158}
1159
1160static int lan78xx_link_reset(struct lan78xx_net *dev)
1161{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001162 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001163 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001164 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001165 u32 buf;
1166
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001167 /* clear LAN78xx interrupt status */
1168 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1169 if (unlikely(ret < 0))
1170 return -EIO;
1171
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001172 phy_read_status(phydev);
1173
1174 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001175 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001176
1177 /* reset MAC */
1178 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1179 if (unlikely(ret < 0))
1180 return -EIO;
1181 buf |= MAC_CR_RST_;
1182 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1183 if (unlikely(ret < 0))
1184 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001185
Woojung Huh20ff5562016-03-16 22:10:40 +00001186 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001187 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001188 dev->link_on = true;
1189
Philippe Reynes6e765102016-10-09 12:07:04 +02001190 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001191
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001192 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001193 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001194 /* disable U2 */
1195 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1196 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1197 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1198 /* enable U1 */
1199 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1200 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1201 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1202 } else {
1203 /* enable U1 & U2 */
1204 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1205 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1206 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1207 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1208 }
1209 }
1210
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001211 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001212 if (ladv < 0)
1213 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001214
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001215 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001216 if (radv < 0)
1217 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001218
1219 netif_dbg(dev, link, dev->net,
1220 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001221 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001222
Philippe Reynes6e765102016-10-09 12:07:04 +02001223 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1224 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001225
1226 if (!timer_pending(&dev->stat_monitor)) {
1227 dev->delta = 1;
1228 mod_timer(&dev->stat_monitor,
1229 jiffies + STAT_UPDATE_TIMER);
1230 }
Stefan Wahren136f55f2018-07-28 09:52:10 +02001231
1232 tasklet_schedule(&dev->bh);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001233 }
1234
1235 return ret;
1236}
1237
1238/* some work can't be done in tasklets, so we use keventd
1239 *
1240 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1241 * but tasklet_schedule() doesn't. hope the failure is rare.
1242 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001243static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001244{
1245 set_bit(work, &dev->flags);
1246 if (!schedule_delayed_work(&dev->wq, 0))
1247 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1248}
1249
1250static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1251{
1252 u32 intdata;
1253
1254 if (urb->actual_length != 4) {
1255 netdev_warn(dev->net,
1256 "unexpected urb length %d", urb->actual_length);
1257 return;
1258 }
1259
1260 memcpy(&intdata, urb->transfer_buffer, 4);
1261 le32_to_cpus(&intdata);
1262
1263 if (intdata & INT_ENP_PHY_INT) {
1264 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001265 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1266
1267 if (dev->domain_data.phyirq > 0)
1268 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001269 } else
1270 netdev_warn(dev->net,
1271 "unexpected interrupt: 0x%08x\n", intdata);
1272}
1273
1274static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1275{
1276 return MAX_EEPROM_SIZE;
1277}
1278
1279static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1280 struct ethtool_eeprom *ee, u8 *data)
1281{
1282 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301283 int ret;
1284
1285 ret = usb_autopm_get_interface(dev->intf);
1286 if (ret)
1287 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001288
1289 ee->magic = LAN78XX_EEPROM_MAGIC;
1290
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301291 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1292
1293 usb_autopm_put_interface(dev->intf);
1294
1295 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001296}
1297
1298static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1299 struct ethtool_eeprom *ee, u8 *data)
1300{
1301 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301302 int ret;
1303
1304 ret = usb_autopm_get_interface(dev->intf);
1305 if (ret)
1306 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001307
Nisar Sayedc0776822017-09-21 02:36:37 +05301308 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1309 * to load data from EEPROM
1310 */
1311 if (ee->magic == LAN78XX_EEPROM_MAGIC)
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301312 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001313 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1314 (ee->offset == 0) &&
1315 (ee->len == 512) &&
1316 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301317 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001318
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301319 usb_autopm_put_interface(dev->intf);
1320
1321 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001322}
1323
1324static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1325 u8 *data)
1326{
1327 if (stringset == ETH_SS_STATS)
1328 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1329}
1330
1331static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1332{
1333 if (sset == ETH_SS_STATS)
1334 return ARRAY_SIZE(lan78xx_gstrings);
1335 else
1336 return -EOPNOTSUPP;
1337}
1338
1339static void lan78xx_get_stats(struct net_device *netdev,
1340 struct ethtool_stats *stats, u64 *data)
1341{
1342 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001343
Woojung Huh20ff5562016-03-16 22:10:40 +00001344 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001345
Woojung Huh20ff5562016-03-16 22:10:40 +00001346 mutex_lock(&dev->stats.access_lock);
1347 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1348 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001349}
1350
1351static void lan78xx_get_wol(struct net_device *netdev,
1352 struct ethtool_wolinfo *wol)
1353{
1354 struct lan78xx_net *dev = netdev_priv(netdev);
1355 int ret;
1356 u32 buf;
1357 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1358
1359 if (usb_autopm_get_interface(dev->intf) < 0)
1360 return;
1361
1362 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1363 if (unlikely(ret < 0)) {
1364 wol->supported = 0;
1365 wol->wolopts = 0;
1366 } else {
1367 if (buf & USB_CFG_RMT_WKP_) {
1368 wol->supported = WAKE_ALL;
1369 wol->wolopts = pdata->wol;
1370 } else {
1371 wol->supported = 0;
1372 wol->wolopts = 0;
1373 }
1374 }
1375
1376 usb_autopm_put_interface(dev->intf);
1377}
1378
1379static int lan78xx_set_wol(struct net_device *netdev,
1380 struct ethtool_wolinfo *wol)
1381{
1382 struct lan78xx_net *dev = netdev_priv(netdev);
1383 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1384 int ret;
1385
1386 ret = usb_autopm_get_interface(dev->intf);
1387 if (ret < 0)
1388 return ret;
1389
Florian Fainellieb9ad082018-09-28 16:18:52 -07001390 if (wol->wolopts & ~WAKE_ALL)
1391 return -EINVAL;
1392
1393 pdata->wol = wol->wolopts;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001394
1395 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1396
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001397 phy_ethtool_set_wol(netdev->phydev, wol);
1398
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001399 usb_autopm_put_interface(dev->intf);
1400
1401 return ret;
1402}
1403
1404static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1405{
1406 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001407 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001408 int ret;
1409 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001410
1411 ret = usb_autopm_get_interface(dev->intf);
1412 if (ret < 0)
1413 return ret;
1414
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001415 ret = phy_ethtool_get_eee(phydev, edata);
1416 if (ret < 0)
1417 goto exit;
1418
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001419 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1420 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001421 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001422 edata->eee_active = !!(edata->advertised &
1423 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001424 edata->tx_lpi_enabled = true;
1425 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1426 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1427 edata->tx_lpi_timer = buf;
1428 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001429 edata->eee_enabled = false;
1430 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001431 edata->tx_lpi_enabled = false;
1432 edata->tx_lpi_timer = 0;
1433 }
1434
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001435 ret = 0;
1436exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001437 usb_autopm_put_interface(dev->intf);
1438
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001439 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001440}
1441
1442static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1443{
1444 struct lan78xx_net *dev = netdev_priv(net);
1445 int ret;
1446 u32 buf;
1447
1448 ret = usb_autopm_get_interface(dev->intf);
1449 if (ret < 0)
1450 return ret;
1451
1452 if (edata->eee_enabled) {
1453 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1454 buf |= MAC_CR_EEE_EN_;
1455 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1456
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001457 phy_ethtool_set_eee(net->phydev, edata);
1458
1459 buf = (u32)edata->tx_lpi_timer;
1460 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001461 } else {
1462 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1463 buf &= ~MAC_CR_EEE_EN_;
1464 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1465 }
1466
1467 usb_autopm_put_interface(dev->intf);
1468
1469 return 0;
1470}
1471
1472static u32 lan78xx_get_link(struct net_device *net)
1473{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001474 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001475
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001476 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001477}
1478
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001479static void lan78xx_get_drvinfo(struct net_device *net,
1480 struct ethtool_drvinfo *info)
1481{
1482 struct lan78xx_net *dev = netdev_priv(net);
1483
1484 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001485 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1486}
1487
1488static u32 lan78xx_get_msglevel(struct net_device *net)
1489{
1490 struct lan78xx_net *dev = netdev_priv(net);
1491
1492 return dev->msg_enable;
1493}
1494
1495static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1496{
1497 struct lan78xx_net *dev = netdev_priv(net);
1498
1499 dev->msg_enable = level;
1500}
1501
Philippe Reynes6e765102016-10-09 12:07:04 +02001502static int lan78xx_get_link_ksettings(struct net_device *net,
1503 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001504{
1505 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001506 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001507 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001508
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001509 ret = usb_autopm_get_interface(dev->intf);
1510 if (ret < 0)
1511 return ret;
1512
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001513 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001514
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001515 usb_autopm_put_interface(dev->intf);
1516
1517 return ret;
1518}
1519
Philippe Reynes6e765102016-10-09 12:07:04 +02001520static int lan78xx_set_link_ksettings(struct net_device *net,
1521 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001522{
1523 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001524 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001525 int ret = 0;
1526 int temp;
1527
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001528 ret = usb_autopm_get_interface(dev->intf);
1529 if (ret < 0)
1530 return ret;
1531
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001532 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001533 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001534
Philippe Reynes6e765102016-10-09 12:07:04 +02001535 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001536 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001537 temp = phy_read(phydev, MII_BMCR);
1538 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001539 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001540 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001541 }
1542
1543 usb_autopm_put_interface(dev->intf);
1544
1545 return ret;
1546}
1547
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001548static void lan78xx_get_pause(struct net_device *net,
1549 struct ethtool_pauseparam *pause)
1550{
1551 struct lan78xx_net *dev = netdev_priv(net);
1552 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001553 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001554
Philippe Reynes6e765102016-10-09 12:07:04 +02001555 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001556
1557 pause->autoneg = dev->fc_autoneg;
1558
1559 if (dev->fc_request_control & FLOW_CTRL_TX)
1560 pause->tx_pause = 1;
1561
1562 if (dev->fc_request_control & FLOW_CTRL_RX)
1563 pause->rx_pause = 1;
1564}
1565
1566static int lan78xx_set_pause(struct net_device *net,
1567 struct ethtool_pauseparam *pause)
1568{
1569 struct lan78xx_net *dev = netdev_priv(net);
1570 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001571 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001572 int ret;
1573
Philippe Reynes6e765102016-10-09 12:07:04 +02001574 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001575
Philippe Reynes6e765102016-10-09 12:07:04 +02001576 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001577 ret = -EINVAL;
1578 goto exit;
1579 }
1580
1581 dev->fc_request_control = 0;
1582 if (pause->rx_pause)
1583 dev->fc_request_control |= FLOW_CTRL_RX;
1584
1585 if (pause->tx_pause)
1586 dev->fc_request_control |= FLOW_CTRL_TX;
1587
Philippe Reynes6e765102016-10-09 12:07:04 +02001588 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001589 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001590 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001591
Philippe Reynes6e765102016-10-09 12:07:04 +02001592 ethtool_convert_link_mode_to_legacy_u32(
1593 &advertising, ecmd.link_modes.advertising);
1594
1595 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001596 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001597 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1598
1599 ethtool_convert_legacy_u32_to_link_mode(
1600 ecmd.link_modes.advertising, advertising);
1601
1602 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001603 }
1604
1605 dev->fc_autoneg = pause->autoneg;
1606
1607 ret = 0;
1608exit:
1609 return ret;
1610}
1611
Raghuram Chary J49621862018-04-20 11:43:50 +05301612static int lan78xx_get_regs_len(struct net_device *netdev)
1613{
1614 if (!netdev->phydev)
1615 return (sizeof(lan78xx_regs));
1616 else
1617 return (sizeof(lan78xx_regs) + PHY_REG_SIZE);
1618}
1619
1620static void
1621lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1622 void *buf)
1623{
1624 u32 *data = buf;
1625 int i, j;
1626 struct lan78xx_net *dev = netdev_priv(netdev);
1627
1628 /* Read Device/MAC registers */
zhong jiangbf37afc2018-08-03 14:53:14 +08001629 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++)
Raghuram Chary J49621862018-04-20 11:43:50 +05301630 lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]);
1631
1632 if (!netdev->phydev)
1633 return;
1634
1635 /* Read PHY registers */
1636 for (j = 0; j < 32; i++, j++)
1637 data[i] = phy_read(netdev->phydev, j);
1638}
1639
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001640static const struct ethtool_ops lan78xx_ethtool_ops = {
1641 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001642 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001643 .get_drvinfo = lan78xx_get_drvinfo,
1644 .get_msglevel = lan78xx_get_msglevel,
1645 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001646 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1647 .get_eeprom = lan78xx_ethtool_get_eeprom,
1648 .set_eeprom = lan78xx_ethtool_set_eeprom,
1649 .get_ethtool_stats = lan78xx_get_stats,
1650 .get_sset_count = lan78xx_get_sset_count,
1651 .get_strings = lan78xx_get_strings,
1652 .get_wol = lan78xx_get_wol,
1653 .set_wol = lan78xx_set_wol,
1654 .get_eee = lan78xx_get_eee,
1655 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001656 .get_pauseparam = lan78xx_get_pause,
1657 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001658 .get_link_ksettings = lan78xx_get_link_ksettings,
1659 .set_link_ksettings = lan78xx_set_link_ksettings,
Raghuram Chary J49621862018-04-20 11:43:50 +05301660 .get_regs_len = lan78xx_get_regs_len,
1661 .get_regs = lan78xx_get_regs,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001662};
1663
1664static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1665{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001666 if (!netif_running(netdev))
1667 return -EINVAL;
1668
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001669 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001670}
1671
1672static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1673{
1674 u32 addr_lo, addr_hi;
1675 int ret;
1676 u8 addr[6];
1677
1678 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1679 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1680
1681 addr[0] = addr_lo & 0xFF;
1682 addr[1] = (addr_lo >> 8) & 0xFF;
1683 addr[2] = (addr_lo >> 16) & 0xFF;
1684 addr[3] = (addr_lo >> 24) & 0xFF;
1685 addr[4] = addr_hi & 0xFF;
1686 addr[5] = (addr_hi >> 8) & 0xFF;
1687
1688 if (!is_valid_ether_addr(addr)) {
Phil Elwell760db292018-04-19 17:59:38 +01001689 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1690 /* valid address present in Device Tree */
1691 netif_dbg(dev, ifup, dev->net,
1692 "MAC address read from Device Tree");
1693 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1694 ETH_ALEN, addr) == 0) ||
1695 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1696 ETH_ALEN, addr) == 0)) &&
1697 is_valid_ether_addr(addr)) {
1698 /* eeprom values are valid so use them */
1699 netif_dbg(dev, ifup, dev->net,
1700 "MAC address read from EEPROM");
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001701 } else {
1702 /* generate random MAC */
Joe Perches6c1f0a12018-06-22 10:51:00 -07001703 eth_random_addr(addr);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001704 netif_dbg(dev, ifup, dev->net,
1705 "MAC address set to random addr");
1706 }
Phil Elwell760db292018-04-19 17:59:38 +01001707
1708 addr_lo = addr[0] | (addr[1] << 8) |
1709 (addr[2] << 16) | (addr[3] << 24);
1710 addr_hi = addr[4] | (addr[5] << 8);
1711
1712 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1713 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001714 }
1715
1716 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1717 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1718
1719 ether_addr_copy(dev->net->dev_addr, addr);
1720}
1721
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001722/* MDIO read and write wrappers for phylib */
1723static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001724{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001725 struct lan78xx_net *dev = bus->priv;
1726 u32 val, addr;
1727 int ret;
1728
1729 ret = usb_autopm_get_interface(dev->intf);
1730 if (ret < 0)
1731 return ret;
1732
1733 mutex_lock(&dev->phy_mutex);
1734
1735 /* confirm MII not busy */
1736 ret = lan78xx_phy_wait_not_busy(dev);
1737 if (ret < 0)
1738 goto done;
1739
1740 /* set the address, index & direction (read from PHY) */
1741 addr = mii_access(phy_id, idx, MII_READ);
1742 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1743
1744 ret = lan78xx_phy_wait_not_busy(dev);
1745 if (ret < 0)
1746 goto done;
1747
1748 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1749
1750 ret = (int)(val & 0xFFFF);
1751
1752done:
1753 mutex_unlock(&dev->phy_mutex);
1754 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001755
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001756 return ret;
1757}
1758
1759static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1760 u16 regval)
1761{
1762 struct lan78xx_net *dev = bus->priv;
1763 u32 val, addr;
1764 int ret;
1765
1766 ret = usb_autopm_get_interface(dev->intf);
1767 if (ret < 0)
1768 return ret;
1769
1770 mutex_lock(&dev->phy_mutex);
1771
1772 /* confirm MII not busy */
1773 ret = lan78xx_phy_wait_not_busy(dev);
1774 if (ret < 0)
1775 goto done;
1776
1777 val = (u32)regval;
1778 ret = lan78xx_write_reg(dev, MII_DATA, val);
1779
1780 /* set the address, index & direction (write to PHY) */
1781 addr = mii_access(phy_id, idx, MII_WRITE);
1782 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1783
1784 ret = lan78xx_phy_wait_not_busy(dev);
1785 if (ret < 0)
1786 goto done;
1787
1788done:
1789 mutex_unlock(&dev->phy_mutex);
1790 usb_autopm_put_interface(dev->intf);
1791 return 0;
1792}
1793
1794static int lan78xx_mdio_init(struct lan78xx_net *dev)
1795{
Phil Elwell1827b062018-04-19 17:59:39 +01001796 struct device_node *node;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001797 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001798
1799 dev->mdiobus = mdiobus_alloc();
1800 if (!dev->mdiobus) {
1801 netdev_err(dev->net, "can't allocate MDIO bus\n");
1802 return -ENOMEM;
1803 }
1804
1805 dev->mdiobus->priv = (void *)dev;
1806 dev->mdiobus->read = lan78xx_mdiobus_read;
1807 dev->mdiobus->write = lan78xx_mdiobus_write;
1808 dev->mdiobus->name = "lan78xx-mdiobus";
1809
1810 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1811 dev->udev->bus->busnum, dev->udev->devnum);
1812
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001813 switch (dev->chipid) {
1814 case ID_REV_CHIP_ID_7800_:
1815 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001816 /* set to internal PHY id */
1817 dev->mdiobus->phy_mask = ~(1 << 1);
1818 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001819 case ID_REV_CHIP_ID_7801_:
1820 /* scan thru PHYAD[2..0] */
1821 dev->mdiobus->phy_mask = ~(0xFF);
1822 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001823 }
1824
Phil Elwell1827b062018-04-19 17:59:39 +01001825 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
Florian Fainelli00e798c2018-05-15 16:56:19 -07001826 ret = of_mdiobus_register(dev->mdiobus, node);
zhong jiang764ea372018-09-16 21:20:17 +08001827 of_node_put(node);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001828 if (ret) {
1829 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001830 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001831 }
1832
1833 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1834 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001835exit1:
1836 mdiobus_free(dev->mdiobus);
1837 return ret;
1838}
1839
1840static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1841{
1842 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001843 mdiobus_free(dev->mdiobus);
1844}
1845
1846static void lan78xx_link_status_change(struct net_device *net)
1847{
Woojung Huh14437e32016-04-25 22:22:36 +00001848 struct phy_device *phydev = net->phydev;
1849 int ret, temp;
1850
1851 /* At forced 100 F/H mode, chip may fail to set mode correctly
1852 * when cable is switched between long(~50+m) and short one.
1853 * As workaround, set to 10 before setting to 100
1854 * at forced 100 F/H mode.
1855 */
1856 if (!phydev->autoneg && (phydev->speed == 100)) {
1857 /* disable phy interrupt */
1858 temp = phy_read(phydev, LAN88XX_INT_MASK);
1859 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1860 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1861
1862 temp = phy_read(phydev, MII_BMCR);
1863 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1864 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1865 temp |= BMCR_SPEED100;
1866 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1867
1868 /* clear pending interrupt generated while workaround */
1869 temp = phy_read(phydev, LAN88XX_INT_STS);
1870
1871 /* enable phy interrupt back */
1872 temp = phy_read(phydev, LAN88XX_INT_MASK);
1873 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1874 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1875 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001876}
1877
Woojung Huhcc89c322016-11-01 20:02:00 +00001878static int irq_map(struct irq_domain *d, unsigned int irq,
1879 irq_hw_number_t hwirq)
1880{
1881 struct irq_domain_data *data = d->host_data;
1882
1883 irq_set_chip_data(irq, data);
1884 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1885 irq_set_noprobe(irq);
1886
1887 return 0;
1888}
1889
1890static void irq_unmap(struct irq_domain *d, unsigned int irq)
1891{
1892 irq_set_chip_and_handler(irq, NULL, NULL);
1893 irq_set_chip_data(irq, NULL);
1894}
1895
1896static const struct irq_domain_ops chip_domain_ops = {
1897 .map = irq_map,
1898 .unmap = irq_unmap,
1899};
1900
1901static void lan78xx_irq_mask(struct irq_data *irqd)
1902{
1903 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1904
1905 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1906}
1907
1908static void lan78xx_irq_unmask(struct irq_data *irqd)
1909{
1910 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1911
1912 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1913}
1914
1915static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1916{
1917 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1918
1919 mutex_lock(&data->irq_lock);
1920}
1921
1922static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1923{
1924 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1925 struct lan78xx_net *dev =
1926 container_of(data, struct lan78xx_net, domain_data);
1927 u32 buf;
1928 int ret;
1929
1930 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1931 * are only two callbacks executed in non-atomic contex.
1932 */
1933 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1934 if (buf != data->irqenable)
1935 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1936
1937 mutex_unlock(&data->irq_lock);
1938}
1939
1940static struct irq_chip lan78xx_irqchip = {
1941 .name = "lan78xx-irqs",
1942 .irq_mask = lan78xx_irq_mask,
1943 .irq_unmask = lan78xx_irq_unmask,
1944 .irq_bus_lock = lan78xx_irq_bus_lock,
1945 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1946};
1947
1948static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1949{
1950 struct device_node *of_node;
1951 struct irq_domain *irqdomain;
1952 unsigned int irqmap = 0;
1953 u32 buf;
1954 int ret = 0;
1955
1956 of_node = dev->udev->dev.parent->of_node;
1957
1958 mutex_init(&dev->domain_data.irq_lock);
1959
1960 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1961 dev->domain_data.irqenable = buf;
1962
1963 dev->domain_data.irqchip = &lan78xx_irqchip;
1964 dev->domain_data.irq_handler = handle_simple_irq;
1965
1966 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1967 &chip_domain_ops, &dev->domain_data);
1968 if (irqdomain) {
1969 /* create mapping for PHY interrupt */
1970 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1971 if (!irqmap) {
1972 irq_domain_remove(irqdomain);
1973
1974 irqdomain = NULL;
1975 ret = -EINVAL;
1976 }
1977 } else {
1978 ret = -EINVAL;
1979 }
1980
1981 dev->domain_data.irqdomain = irqdomain;
1982 dev->domain_data.phyirq = irqmap;
1983
1984 return ret;
1985}
1986
1987static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1988{
1989 if (dev->domain_data.phyirq > 0) {
1990 irq_dispose_mapping(dev->domain_data.phyirq);
1991
1992 if (dev->domain_data.irqdomain)
1993 irq_domain_remove(dev->domain_data.irqdomain);
1994 }
1995 dev->domain_data.phyirq = 0;
1996 dev->domain_data.irqdomain = NULL;
1997}
1998
Woojung Huh02dc1f32016-12-07 20:26:25 +00001999static int lan8835_fixup(struct phy_device *phydev)
2000{
2001 int buf;
2002 int ret;
2003 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2004
2005 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00002006 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002007 buf &= ~0x1800;
2008 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00002009 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002010
2011 /* RGMII MAC TXC Delay Enable */
2012 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2013 MAC_RGMII_ID_TXC_DELAY_EN_);
2014
2015 /* RGMII TX DLL Tune Adjust */
2016 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2017
2018 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
2019
2020 return 1;
2021}
2022
2023static int ksz9031rnx_fixup(struct phy_device *phydev)
2024{
2025 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2026
2027 /* Micrel9301RNX PHY configuration */
2028 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002029 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002030 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002031 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002032 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002033 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002034
2035 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2036
2037 return 1;
2038}
2039
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302040static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002041{
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302042 u32 buf;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002043 int ret;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302044 struct fixed_phy_status fphy_status = {
2045 .link = 1,
2046 .speed = SPEED_1000,
2047 .duplex = DUPLEX_FULL,
2048 };
Colin Ian King3b51cc72018-02-01 17:10:18 +00002049 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002050
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002051 phydev = phy_find_first(dev->mdiobus);
2052 if (!phydev) {
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302053 netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n");
2054 phydev = fixed_phy_register(PHY_POLL, &fphy_status, -1,
2055 NULL);
2056 if (IS_ERR(phydev)) {
2057 netdev_err(dev->net, "No PHY/fixed_PHY found\n");
2058 return NULL;
2059 }
2060 netdev_dbg(dev->net, "Registered FIXED PHY\n");
2061 dev->interface = PHY_INTERFACE_MODE_RGMII;
2062 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2063 MAC_RGMII_ID_TXC_DELAY_EN_);
2064 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2065 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2066 buf |= HW_CFG_CLK125_EN_;
2067 buf |= HW_CFG_REFCLK25_EN_;
2068 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2069 } else {
Woojung Huh02dc1f32016-12-07 20:26:25 +00002070 if (!phydev->drv) {
2071 netdev_err(dev->net, "no PHY driver found\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302072 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002073 }
Woojung Huh02dc1f32016-12-07 20:26:25 +00002074 dev->interface = PHY_INTERFACE_MODE_RGMII;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002075 /* external PHY fixup for KSZ9031RNX */
2076 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2077 ksz9031rnx_fixup);
2078 if (ret < 0) {
Raghuram Chary J7670ed72018-04-28 11:33:16 +05302079 netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302080 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002081 }
2082 /* external PHY fixup for LAN8835 */
2083 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2084 lan8835_fixup);
2085 if (ret < 0) {
Raghuram Chary J7670ed72018-04-28 11:33:16 +05302086 netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302087 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002088 }
2089 /* add more external PHY fixup here if needed */
2090
2091 phydev->is_internal = false;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302092 }
2093 return phydev;
2094}
2095
2096static int lan78xx_phy_init(struct lan78xx_net *dev)
2097{
2098 int ret;
2099 u32 mii_adv;
2100 struct phy_device *phydev;
2101
2102 switch (dev->chipid) {
2103 case ID_REV_CHIP_ID_7801_:
2104 phydev = lan7801_phy_init(dev);
2105 if (!phydev) {
2106 netdev_err(dev->net, "lan7801: PHY Init Failed");
2107 return -EIO;
2108 }
2109 break;
2110
2111 case ID_REV_CHIP_ID_7800_:
2112 case ID_REV_CHIP_ID_7850_:
2113 phydev = phy_find_first(dev->mdiobus);
2114 if (!phydev) {
2115 netdev_err(dev->net, "no PHY found\n");
2116 return -EIO;
2117 }
2118 phydev->is_internal = true;
2119 dev->interface = PHY_INTERFACE_MODE_GMII;
2120 break;
2121
2122 default:
2123 netdev_err(dev->net, "Unknown CHIP ID found\n");
2124 return -EIO;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002125 }
2126
Woojung Huhcc89c322016-11-01 20:02:00 +00002127 /* if phyirq is not set, use polling mode in phylib */
2128 if (dev->domain_data.phyirq > 0)
2129 phydev->irq = dev->domain_data.phyirq;
2130 else
2131 phydev->irq = 0;
2132 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002133
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002134 /* set to AUTOMDIX */
2135 phydev->mdix = ETH_TP_MDI_AUTO;
2136
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002137 ret = phy_connect_direct(dev->net, phydev,
2138 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002139 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002140 if (ret) {
2141 netdev_err(dev->net, "can't attach PHY to %s\n",
2142 dev->mdiobus->id);
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302143 if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2144 if (phy_is_pseudo_fixed_link(phydev)) {
2145 fixed_phy_unregister(phydev);
2146 } else {
2147 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX,
2148 0xfffffff0);
2149 phy_unregister_fixup_for_uid(PHY_LAN8835,
2150 0xfffffff0);
2151 }
2152 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002153 return -EIO;
2154 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002155
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002156 /* MAC doesn't support 1000T Half */
Andrew Lunn41124fa2018-09-12 01:53:14 +02002157 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002158
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002159 /* support both flow controls */
2160 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2161 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2162 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2163 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2164
Phil Elwell1827b062018-04-19 17:59:39 +01002165 if (phydev->mdio.dev.of_node) {
2166 u32 reg;
2167 int len;
2168
2169 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
2170 "microchip,led-modes",
2171 sizeof(u32));
2172 if (len >= 0) {
2173 /* Ensure the appropriate LEDs are enabled */
2174 lan78xx_read_reg(dev, HW_CFG, &reg);
2175 reg &= ~(HW_CFG_LED0_EN_ |
2176 HW_CFG_LED1_EN_ |
2177 HW_CFG_LED2_EN_ |
2178 HW_CFG_LED3_EN_);
2179 reg |= (len > 0) * HW_CFG_LED0_EN_ |
2180 (len > 1) * HW_CFG_LED1_EN_ |
2181 (len > 2) * HW_CFG_LED2_EN_ |
2182 (len > 3) * HW_CFG_LED3_EN_;
2183 lan78xx_write_reg(dev, HW_CFG, reg);
2184 }
2185 }
2186
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002187 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002188
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002189 dev->fc_autoneg = phydev->autoneg;
2190
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002191 return 0;
2192}
2193
2194static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2195{
2196 int ret = 0;
2197 u32 buf;
2198 bool rxenabled;
2199
2200 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2201
2202 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2203
2204 if (rxenabled) {
2205 buf &= ~MAC_RX_RXEN_;
2206 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2207 }
2208
2209 /* add 4 to size for FCS */
2210 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2211 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2212
2213 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2214
2215 if (rxenabled) {
2216 buf |= MAC_RX_RXEN_;
2217 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2218 }
2219
2220 return 0;
2221}
2222
2223static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2224{
2225 struct sk_buff *skb;
2226 unsigned long flags;
2227 int count = 0;
2228
2229 spin_lock_irqsave(&q->lock, flags);
2230 while (!skb_queue_empty(q)) {
2231 struct skb_data *entry;
2232 struct urb *urb;
2233 int ret;
2234
2235 skb_queue_walk(q, skb) {
2236 entry = (struct skb_data *)skb->cb;
2237 if (entry->state != unlink_start)
2238 goto found;
2239 }
2240 break;
2241found:
2242 entry->state = unlink_start;
2243 urb = entry->urb;
2244
2245 /* Get reference count of the URB to avoid it to be
2246 * freed during usb_unlink_urb, which may trigger
2247 * use-after-free problem inside usb_unlink_urb since
2248 * usb_unlink_urb is always racing with .complete
2249 * handler(include defer_bh).
2250 */
2251 usb_get_urb(urb);
2252 spin_unlock_irqrestore(&q->lock, flags);
2253 /* during some PM-driven resume scenarios,
2254 * these (async) unlinks complete immediately
2255 */
2256 ret = usb_unlink_urb(urb);
2257 if (ret != -EINPROGRESS && ret != 0)
2258 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2259 else
2260 count++;
2261 usb_put_urb(urb);
2262 spin_lock_irqsave(&q->lock, flags);
2263 }
2264 spin_unlock_irqrestore(&q->lock, flags);
2265 return count;
2266}
2267
2268static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2269{
2270 struct lan78xx_net *dev = netdev_priv(netdev);
2271 int ll_mtu = new_mtu + netdev->hard_header_len;
2272 int old_hard_mtu = dev->hard_mtu;
2273 int old_rx_urb_size = dev->rx_urb_size;
2274 int ret;
2275
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002276 /* no second zero-length packet read wanted after mtu-sized packets */
2277 if ((ll_mtu % dev->maxpacket) == 0)
2278 return -EDOM;
2279
Dave Stevenson2259b7a2018-06-25 15:07:12 +01002280 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + VLAN_ETH_HLEN);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002281
2282 netdev->mtu = new_mtu;
2283
2284 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2285 if (dev->rx_urb_size == old_hard_mtu) {
2286 dev->rx_urb_size = dev->hard_mtu;
2287 if (dev->rx_urb_size > old_rx_urb_size) {
2288 if (netif_running(dev->net)) {
2289 unlink_urbs(dev, &dev->rxq);
2290 tasklet_schedule(&dev->bh);
2291 }
2292 }
2293 }
2294
2295 return 0;
2296}
2297
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002298static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002299{
2300 struct lan78xx_net *dev = netdev_priv(netdev);
2301 struct sockaddr *addr = p;
2302 u32 addr_lo, addr_hi;
2303 int ret;
2304
2305 if (netif_running(netdev))
2306 return -EBUSY;
2307
2308 if (!is_valid_ether_addr(addr->sa_data))
2309 return -EADDRNOTAVAIL;
2310
2311 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2312
2313 addr_lo = netdev->dev_addr[0] |
2314 netdev->dev_addr[1] << 8 |
2315 netdev->dev_addr[2] << 16 |
2316 netdev->dev_addr[3] << 24;
2317 addr_hi = netdev->dev_addr[4] |
2318 netdev->dev_addr[5] << 8;
2319
2320 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2321 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2322
2323 return 0;
2324}
2325
2326/* Enable or disable Rx checksum offload engine */
2327static int lan78xx_set_features(struct net_device *netdev,
2328 netdev_features_t features)
2329{
2330 struct lan78xx_net *dev = netdev_priv(netdev);
2331 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2332 unsigned long flags;
2333 int ret;
2334
2335 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2336
2337 if (features & NETIF_F_RXCSUM) {
2338 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2339 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2340 } else {
2341 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2342 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2343 }
2344
2345 if (features & NETIF_F_HW_VLAN_CTAG_RX)
Dave Stevensonec21ecf2018-06-25 15:07:14 +01002346 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_;
2347 else
2348 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_;
2349
Dave Stevenson4a273272018-06-25 15:07:13 +01002350 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002351 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2352 else
2353 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2354
2355 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2356
2357 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2358
2359 return 0;
2360}
2361
2362static void lan78xx_deferred_vlan_write(struct work_struct *param)
2363{
2364 struct lan78xx_priv *pdata =
2365 container_of(param, struct lan78xx_priv, set_vlan);
2366 struct lan78xx_net *dev = pdata->dev;
2367
2368 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2369 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2370}
2371
2372static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2373 __be16 proto, u16 vid)
2374{
2375 struct lan78xx_net *dev = netdev_priv(netdev);
2376 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2377 u16 vid_bit_index;
2378 u16 vid_dword_index;
2379
2380 vid_dword_index = (vid >> 5) & 0x7F;
2381 vid_bit_index = vid & 0x1F;
2382
2383 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2384
2385 /* defer register writes to a sleepable context */
2386 schedule_work(&pdata->set_vlan);
2387
2388 return 0;
2389}
2390
2391static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2392 __be16 proto, u16 vid)
2393{
2394 struct lan78xx_net *dev = netdev_priv(netdev);
2395 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2396 u16 vid_bit_index;
2397 u16 vid_dword_index;
2398
2399 vid_dword_index = (vid >> 5) & 0x7F;
2400 vid_bit_index = vid & 0x1F;
2401
2402 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2403
2404 /* defer register writes to a sleepable context */
2405 schedule_work(&pdata->set_vlan);
2406
2407 return 0;
2408}
2409
2410static void lan78xx_init_ltm(struct lan78xx_net *dev)
2411{
2412 int ret;
2413 u32 buf;
2414 u32 regs[6] = { 0 };
2415
2416 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2417 if (buf & USB_CFG1_LTM_ENABLE_) {
2418 u8 temp[2];
2419 /* Get values from EEPROM first */
2420 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2421 if (temp[0] == 24) {
2422 ret = lan78xx_read_raw_eeprom(dev,
2423 temp[1] * 2,
2424 24,
2425 (u8 *)regs);
2426 if (ret < 0)
2427 return;
2428 }
2429 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2430 if (temp[0] == 24) {
2431 ret = lan78xx_read_raw_otp(dev,
2432 temp[1] * 2,
2433 24,
2434 (u8 *)regs);
2435 if (ret < 0)
2436 return;
2437 }
2438 }
2439 }
2440
2441 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2442 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2443 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2444 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2445 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2446 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2447}
2448
2449static int lan78xx_reset(struct lan78xx_net *dev)
2450{
2451 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2452 u32 buf;
2453 int ret = 0;
2454 unsigned long timeout;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302455 u8 sig;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002456
2457 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2458 buf |= HW_CFG_LRST_;
2459 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2460
2461 timeout = jiffies + HZ;
2462 do {
2463 mdelay(1);
2464 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2465 if (time_after(jiffies, timeout)) {
2466 netdev_warn(dev->net,
2467 "timeout on completion of LiteReset");
2468 return -EIO;
2469 }
2470 } while (buf & HW_CFG_LRST_);
2471
2472 lan78xx_init_mac_address(dev);
2473
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002474 /* save DEVID for later usage */
2475 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002476 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2477 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002478
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002479 /* Respond to the IN token with a NAK */
2480 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2481 buf |= USB_CFG_BIR_;
2482 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2483
2484 /* Init LTM */
2485 lan78xx_init_ltm(dev);
2486
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002487 if (dev->udev->speed == USB_SPEED_SUPER) {
2488 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2489 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2490 dev->rx_qlen = 4;
2491 dev->tx_qlen = 4;
2492 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2493 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2494 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2495 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2496 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2497 } else {
2498 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2499 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2500 dev->rx_qlen = 4;
Yuiko Oshinoa5b13792018-01-15 13:24:28 -05002501 dev->tx_qlen = 4;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002502 }
2503
2504 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2505 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2506
2507 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2508 buf |= HW_CFG_MEF_;
2509 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2510
2511 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2512 buf |= USB_CFG_BCE_;
2513 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2514
2515 /* set FIFO sizes */
2516 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2517 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2518
2519 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2520 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2521
2522 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2523 ret = lan78xx_write_reg(dev, FLOW, 0);
2524 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2525
2526 /* Don't need rfe_ctl_lock during initialisation */
2527 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2528 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2529 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2530
2531 /* Enable or disable checksum offload engines */
2532 lan78xx_set_features(dev->net, dev->net->features);
2533
2534 lan78xx_set_multicast(dev->net);
2535
2536 /* reset PHY */
2537 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2538 buf |= PMT_CTL_PHY_RST_;
2539 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2540
2541 timeout = jiffies + HZ;
2542 do {
2543 mdelay(1);
2544 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2545 if (time_after(jiffies, timeout)) {
2546 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2547 return -EIO;
2548 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002549 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002550
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002551 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002552 /* LAN7801 only has RGMII mode */
2553 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2554 buf &= ~MAC_CR_GMII_EN_;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302555
2556 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2557 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2558 if (!ret && sig != EEPROM_INDICATOR) {
2559 /* Implies there is no external eeprom. Set mac speed */
2560 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2561 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2562 }
2563 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002564 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2565
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002566 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2567 buf |= MAC_TX_TXEN_;
2568 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2569
2570 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2571 buf |= FCT_TX_CTL_EN_;
2572 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2573
Dave Stevenson2259b7a2018-06-25 15:07:12 +01002574 ret = lan78xx_set_rx_max_frame_length(dev,
2575 dev->net->mtu + VLAN_ETH_HLEN);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002576
2577 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2578 buf |= MAC_RX_RXEN_;
2579 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2580
2581 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2582 buf |= FCT_RX_CTL_EN_;
2583 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2584
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002585 return 0;
2586}
2587
Woojung Huh20ff5562016-03-16 22:10:40 +00002588static void lan78xx_init_stats(struct lan78xx_net *dev)
2589{
2590 u32 *p;
2591 int i;
2592
2593 /* initialize for stats update
2594 * some counters are 20bits and some are 32bits
2595 */
2596 p = (u32 *)&dev->stats.rollover_max;
2597 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2598 p[i] = 0xFFFFF;
2599
2600 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2601 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2602 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2603 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2604 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2605 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2606 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2607 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2608 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2609 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2610
Phil Elwellfed56072018-04-11 12:02:47 +01002611 set_bit(EVENT_STAT_UPDATE, &dev->flags);
Woojung Huh20ff5562016-03-16 22:10:40 +00002612}
2613
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002614static int lan78xx_open(struct net_device *net)
2615{
2616 struct lan78xx_net *dev = netdev_priv(net);
2617 int ret;
2618
2619 ret = usb_autopm_get_interface(dev->intf);
2620 if (ret < 0)
2621 goto out;
2622
Alexander Graf92571a12018-04-04 00:19:35 +02002623 phy_start(net->phydev);
2624
2625 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002626
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002627 /* for Link Check */
2628 if (dev->urb_intr) {
2629 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2630 if (ret < 0) {
2631 netif_err(dev, ifup, dev->net,
2632 "intr submit %d\n", ret);
2633 goto done;
2634 }
2635 }
2636
Woojung Huh20ff5562016-03-16 22:10:40 +00002637 lan78xx_init_stats(dev);
2638
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002639 set_bit(EVENT_DEV_OPEN, &dev->flags);
2640
2641 netif_start_queue(net);
2642
2643 dev->link_on = false;
2644
2645 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2646done:
2647 usb_autopm_put_interface(dev->intf);
2648
2649out:
2650 return ret;
2651}
2652
2653static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2654{
2655 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2656 DECLARE_WAITQUEUE(wait, current);
2657 int temp;
2658
2659 /* ensure there are no more active urbs */
2660 add_wait_queue(&unlink_wakeup, &wait);
2661 set_current_state(TASK_UNINTERRUPTIBLE);
2662 dev->wait = &unlink_wakeup;
2663 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2664
2665 /* maybe wait for deletions to finish. */
2666 while (!skb_queue_empty(&dev->rxq) &&
2667 !skb_queue_empty(&dev->txq) &&
2668 !skb_queue_empty(&dev->done)) {
2669 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2670 set_current_state(TASK_UNINTERRUPTIBLE);
2671 netif_dbg(dev, ifdown, dev->net,
2672 "waited for %d urb completions\n", temp);
2673 }
2674 set_current_state(TASK_RUNNING);
2675 dev->wait = NULL;
2676 remove_wait_queue(&unlink_wakeup, &wait);
2677}
2678
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002679static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002680{
Stefan Wahren51ceac92018-09-04 19:29:12 +02002681 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002682
Woojung Huh20ff5562016-03-16 22:10:40 +00002683 if (timer_pending(&dev->stat_monitor))
2684 del_timer_sync(&dev->stat_monitor);
2685
Alexander Graf92571a12018-04-04 00:19:35 +02002686 if (net->phydev)
2687 phy_stop(net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002688
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002689 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2690 netif_stop_queue(net);
2691
2692 netif_info(dev, ifdown, dev->net,
2693 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2694 net->stats.rx_packets, net->stats.tx_packets,
2695 net->stats.rx_errors, net->stats.tx_errors);
2696
2697 lan78xx_terminate_urbs(dev);
2698
2699 usb_kill_urb(dev->urb_intr);
2700
2701 skb_queue_purge(&dev->rxq_pause);
2702
2703 /* deferred work (task, timer, softirq) must also stop.
2704 * can't flush_scheduled_work() until we drop rtnl (later),
2705 * else workers could deadlock; so make workers a NOP.
2706 */
2707 dev->flags = 0;
2708 cancel_delayed_work_sync(&dev->wq);
2709 tasklet_kill(&dev->bh);
2710
2711 usb_autopm_put_interface(dev->intf);
2712
2713 return 0;
2714}
2715
2716static int lan78xx_linearize(struct sk_buff *skb)
2717{
2718 return skb_linearize(skb);
2719}
2720
2721static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2722 struct sk_buff *skb, gfp_t flags)
2723{
2724 u32 tx_cmd_a, tx_cmd_b;
2725
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002726 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002727 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002728 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002729 }
2730
2731 if (lan78xx_linearize(skb) < 0)
2732 return NULL;
2733
2734 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2735
2736 if (skb->ip_summed == CHECKSUM_PARTIAL)
2737 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2738
2739 tx_cmd_b = 0;
2740 if (skb_is_gso(skb)) {
2741 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2742
2743 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2744
2745 tx_cmd_a |= TX_CMD_A_LSO_;
2746 }
2747
2748 if (skb_vlan_tag_present(skb)) {
2749 tx_cmd_a |= TX_CMD_A_IVTG_;
2750 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2751 }
2752
2753 skb_push(skb, 4);
2754 cpu_to_le32s(&tx_cmd_b);
2755 memcpy(skb->data, &tx_cmd_b, 4);
2756
2757 skb_push(skb, 4);
2758 cpu_to_le32s(&tx_cmd_a);
2759 memcpy(skb->data, &tx_cmd_a, 4);
2760
2761 return skb;
2762}
2763
2764static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2765 struct sk_buff_head *list, enum skb_state state)
2766{
2767 unsigned long flags;
2768 enum skb_state old_state;
2769 struct skb_data *entry = (struct skb_data *)skb->cb;
2770
2771 spin_lock_irqsave(&list->lock, flags);
2772 old_state = entry->state;
2773 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002774
2775 __skb_unlink(skb, list);
2776 spin_unlock(&list->lock);
2777 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002778
2779 __skb_queue_tail(&dev->done, skb);
2780 if (skb_queue_len(&dev->done) == 1)
2781 tasklet_schedule(&dev->bh);
2782 spin_unlock_irqrestore(&dev->done.lock, flags);
2783
2784 return old_state;
2785}
2786
2787static void tx_complete(struct urb *urb)
2788{
2789 struct sk_buff *skb = (struct sk_buff *)urb->context;
2790 struct skb_data *entry = (struct skb_data *)skb->cb;
2791 struct lan78xx_net *dev = entry->dev;
2792
2793 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002794 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002795 dev->net->stats.tx_bytes += entry->length;
2796 } else {
2797 dev->net->stats.tx_errors++;
2798
2799 switch (urb->status) {
2800 case -EPIPE:
2801 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2802 break;
2803
2804 /* software-driven interface shutdown */
2805 case -ECONNRESET:
2806 case -ESHUTDOWN:
2807 break;
2808
2809 case -EPROTO:
2810 case -ETIME:
2811 case -EILSEQ:
2812 netif_stop_queue(dev->net);
2813 break;
2814 default:
2815 netif_dbg(dev, tx_err, dev->net,
2816 "tx err %d\n", entry->urb->status);
2817 break;
2818 }
2819 }
2820
2821 usb_autopm_put_interface_async(dev->intf);
2822
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002823 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002824}
2825
2826static void lan78xx_queue_skb(struct sk_buff_head *list,
2827 struct sk_buff *newsk, enum skb_state state)
2828{
2829 struct skb_data *entry = (struct skb_data *)newsk->cb;
2830
2831 __skb_queue_tail(list, newsk);
2832 entry->state = state;
2833}
2834
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002835static netdev_tx_t
2836lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002837{
2838 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002839 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002840
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002841 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002842 skb_tx_timestamp(skb);
2843 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2844 }
2845
2846 if (skb2) {
2847 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002848
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002849 /* throttle TX patch at slower than SUPER SPEED USB */
2850 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2851 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002852 netif_stop_queue(net);
2853 } else {
2854 netif_dbg(dev, tx_err, dev->net,
2855 "lan78xx_tx_prep return NULL\n");
2856 dev->net->stats.tx_errors++;
2857 dev->net->stats.tx_dropped++;
2858 }
2859
2860 tasklet_schedule(&dev->bh);
2861
2862 return NETDEV_TX_OK;
2863}
2864
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002865static int
2866lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002867{
2868 int tmp;
2869 struct usb_host_interface *alt = NULL;
2870 struct usb_host_endpoint *in = NULL, *out = NULL;
2871 struct usb_host_endpoint *status = NULL;
2872
2873 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2874 unsigned ep;
2875
2876 in = NULL;
2877 out = NULL;
2878 status = NULL;
2879 alt = intf->altsetting + tmp;
2880
2881 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2882 struct usb_host_endpoint *e;
2883 int intr = 0;
2884
2885 e = alt->endpoint + ep;
2886 switch (e->desc.bmAttributes) {
2887 case USB_ENDPOINT_XFER_INT:
2888 if (!usb_endpoint_dir_in(&e->desc))
2889 continue;
2890 intr = 1;
2891 /* FALLTHROUGH */
2892 case USB_ENDPOINT_XFER_BULK:
2893 break;
2894 default:
2895 continue;
2896 }
2897 if (usb_endpoint_dir_in(&e->desc)) {
2898 if (!intr && !in)
2899 in = e;
2900 else if (intr && !status)
2901 status = e;
2902 } else {
2903 if (!out)
2904 out = e;
2905 }
2906 }
2907 if (in && out)
2908 break;
2909 }
2910 if (!alt || !in || !out)
2911 return -EINVAL;
2912
2913 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2914 in->desc.bEndpointAddress &
2915 USB_ENDPOINT_NUMBER_MASK);
2916 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2917 out->desc.bEndpointAddress &
2918 USB_ENDPOINT_NUMBER_MASK);
2919 dev->ep_intr = status;
2920
2921 return 0;
2922}
2923
2924static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2925{
2926 struct lan78xx_priv *pdata = NULL;
2927 int ret;
2928 int i;
2929
2930 ret = lan78xx_get_endpoints(dev, intf);
Stefan Wahrenfa8cd982018-09-04 19:29:09 +02002931 if (ret) {
2932 netdev_warn(dev->net, "lan78xx_get_endpoints failed: %d\n",
2933 ret);
2934 return ret;
2935 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002936
2937 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2938
2939 pdata = (struct lan78xx_priv *)(dev->data[0]);
2940 if (!pdata) {
2941 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2942 return -ENOMEM;
2943 }
2944
2945 pdata->dev = dev;
2946
2947 spin_lock_init(&pdata->rfe_ctl_lock);
2948 mutex_init(&pdata->dataport_mutex);
2949
2950 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2951
2952 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2953 pdata->vlan_table[i] = 0;
2954
2955 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2956
2957 dev->net->features = 0;
2958
2959 if (DEFAULT_TX_CSUM_ENABLE)
2960 dev->net->features |= NETIF_F_HW_CSUM;
2961
2962 if (DEFAULT_RX_CSUM_ENABLE)
2963 dev->net->features |= NETIF_F_RXCSUM;
2964
2965 if (DEFAULT_TSO_CSUM_ENABLE)
2966 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2967
Dave Stevensonec21ecf2018-06-25 15:07:14 +01002968 if (DEFAULT_VLAN_RX_OFFLOAD)
2969 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX;
2970
Dave Stevenson4a273272018-06-25 15:07:13 +01002971 if (DEFAULT_VLAN_FILTER_ENABLE)
2972 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2973
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002974 dev->net->hw_features = dev->net->features;
2975
Woojung Huhcc89c322016-11-01 20:02:00 +00002976 ret = lan78xx_setup_irq_domain(dev);
2977 if (ret < 0) {
2978 netdev_warn(dev->net,
2979 "lan78xx_setup_irq_domain() failed : %d", ret);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302980 goto out1;
Woojung Huhcc89c322016-11-01 20:02:00 +00002981 }
2982
Nisar Sayed0573f942017-08-01 10:24:33 +00002983 dev->net->hard_header_len += TX_OVERHEAD;
2984 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2985
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002986 /* Init all registers */
2987 ret = lan78xx_reset(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302988 if (ret) {
2989 netdev_warn(dev->net, "Registers INIT FAILED....");
2990 goto out2;
2991 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002992
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002993 ret = lan78xx_mdio_init(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302994 if (ret) {
2995 netdev_warn(dev->net, "MDIO INIT FAILED.....");
2996 goto out2;
2997 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002998
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002999 dev->net->flags |= IFF_MULTICAST;
3000
3001 pdata->wol = WAKE_MAGIC;
3002
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003003 return ret;
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303004
3005out2:
3006 lan78xx_remove_irq_domain(dev);
3007
3008out1:
3009 netdev_warn(dev->net, "Bind routine FAILED");
3010 cancel_work_sync(&pdata->set_multicast);
3011 cancel_work_sync(&pdata->set_vlan);
3012 kfree(pdata);
3013 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003014}
3015
3016static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
3017{
3018 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3019
Woojung Huhcc89c322016-11-01 20:02:00 +00003020 lan78xx_remove_irq_domain(dev);
3021
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003022 lan78xx_remove_mdio(dev);
3023
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003024 if (pdata) {
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303025 cancel_work_sync(&pdata->set_multicast);
3026 cancel_work_sync(&pdata->set_vlan);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003027 netif_dbg(dev, ifdown, dev->net, "free pdata");
3028 kfree(pdata);
3029 pdata = NULL;
3030 dev->data[0] = 0;
3031 }
3032}
3033
3034static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
3035 struct sk_buff *skb,
3036 u32 rx_cmd_a, u32 rx_cmd_b)
3037{
Dave Stevenson9343ac82018-06-25 15:07:15 +01003038 /* HW Checksum offload appears to be flawed if used when not stripping
3039 * VLAN headers. Drop back to S/W checksums under these conditions.
3040 */
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003041 if (!(dev->net->features & NETIF_F_RXCSUM) ||
Dave Stevenson9343ac82018-06-25 15:07:15 +01003042 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) ||
3043 ((rx_cmd_a & RX_CMD_A_FVTG_) &&
3044 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003045 skb->ip_summed = CHECKSUM_NONE;
3046 } else {
3047 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
3048 skb->ip_summed = CHECKSUM_COMPLETE;
3049 }
3050}
3051
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003052static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev,
3053 struct sk_buff *skb,
3054 u32 rx_cmd_a, u32 rx_cmd_b)
3055{
3056 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) &&
3057 (rx_cmd_a & RX_CMD_A_FVTG_))
3058 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3059 (rx_cmd_b & 0xffff));
3060}
3061
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003062static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003063{
Stefan Wahren51ceac92018-09-04 19:29:12 +02003064 int status;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003065
3066 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
3067 skb_queue_tail(&dev->rxq_pause, skb);
3068 return;
3069 }
3070
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003071 dev->net->stats.rx_packets++;
3072 dev->net->stats.rx_bytes += skb->len;
3073
Woojung Huh74d79a22016-04-25 22:22:32 +00003074 skb->protocol = eth_type_trans(skb, dev->net);
3075
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003076 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
3077 skb->len + sizeof(struct ethhdr), skb->protocol);
3078 memset(skb->cb, 0, sizeof(struct skb_data));
3079
3080 if (skb_defer_rx_timestamp(skb))
3081 return;
3082
3083 status = netif_rx(skb);
3084 if (status != NET_RX_SUCCESS)
3085 netif_dbg(dev, rx_err, dev->net,
3086 "netif_rx status %d\n", status);
3087}
3088
3089static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
3090{
3091 if (skb->len < dev->net->hard_header_len)
3092 return 0;
3093
3094 while (skb->len > 0) {
3095 u32 rx_cmd_a, rx_cmd_b, align_count, size;
3096 u16 rx_cmd_c;
3097 struct sk_buff *skb2;
3098 unsigned char *packet;
3099
3100 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
3101 le32_to_cpus(&rx_cmd_a);
3102 skb_pull(skb, sizeof(rx_cmd_a));
3103
3104 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
3105 le32_to_cpus(&rx_cmd_b);
3106 skb_pull(skb, sizeof(rx_cmd_b));
3107
3108 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
3109 le16_to_cpus(&rx_cmd_c);
3110 skb_pull(skb, sizeof(rx_cmd_c));
3111
3112 packet = skb->data;
3113
3114 /* get the packet length */
3115 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
3116 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
3117
3118 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
3119 netif_dbg(dev, rx_err, dev->net,
3120 "Error rx_cmd_a=0x%08x", rx_cmd_a);
3121 } else {
3122 /* last frame in this batch */
3123 if (skb->len == size) {
3124 lan78xx_rx_csum_offload(dev, skb,
3125 rx_cmd_a, rx_cmd_b);
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003126 lan78xx_rx_vlan_offload(dev, skb,
3127 rx_cmd_a, rx_cmd_b);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003128
3129 skb_trim(skb, skb->len - 4); /* remove fcs */
3130 skb->truesize = size + sizeof(struct sk_buff);
3131
3132 return 1;
3133 }
3134
3135 skb2 = skb_clone(skb, GFP_ATOMIC);
3136 if (unlikely(!skb2)) {
3137 netdev_warn(dev->net, "Error allocating skb");
3138 return 0;
3139 }
3140
3141 skb2->len = size;
3142 skb2->data = packet;
3143 skb_set_tail_pointer(skb2, size);
3144
3145 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003146 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003147
3148 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3149 skb2->truesize = size + sizeof(struct sk_buff);
3150
3151 lan78xx_skb_return(dev, skb2);
3152 }
3153
3154 skb_pull(skb, size);
3155
3156 /* padding bytes before the next frame starts */
3157 if (skb->len)
3158 skb_pull(skb, align_count);
3159 }
3160
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003161 return 1;
3162}
3163
3164static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3165{
3166 if (!lan78xx_rx(dev, skb)) {
3167 dev->net->stats.rx_errors++;
3168 goto done;
3169 }
3170
3171 if (skb->len) {
3172 lan78xx_skb_return(dev, skb);
3173 return;
3174 }
3175
3176 netif_dbg(dev, rx_err, dev->net, "drop\n");
3177 dev->net->stats.rx_errors++;
3178done:
3179 skb_queue_tail(&dev->done, skb);
3180}
3181
3182static void rx_complete(struct urb *urb);
3183
3184static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3185{
3186 struct sk_buff *skb;
3187 struct skb_data *entry;
3188 unsigned long lockflags;
3189 size_t size = dev->rx_urb_size;
3190 int ret = 0;
3191
3192 skb = netdev_alloc_skb_ip_align(dev->net, size);
3193 if (!skb) {
3194 usb_free_urb(urb);
3195 return -ENOMEM;
3196 }
3197
3198 entry = (struct skb_data *)skb->cb;
3199 entry->urb = urb;
3200 entry->dev = dev;
3201 entry->length = 0;
3202
3203 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3204 skb->data, size, rx_complete, skb);
3205
3206 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3207
3208 if (netif_device_present(dev->net) &&
3209 netif_running(dev->net) &&
3210 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3211 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3212 ret = usb_submit_urb(urb, GFP_ATOMIC);
3213 switch (ret) {
3214 case 0:
3215 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3216 break;
3217 case -EPIPE:
3218 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3219 break;
3220 case -ENODEV:
3221 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3222 netif_device_detach(dev->net);
3223 break;
3224 case -EHOSTUNREACH:
3225 ret = -ENOLINK;
3226 break;
3227 default:
3228 netif_dbg(dev, rx_err, dev->net,
3229 "rx submit, %d\n", ret);
3230 tasklet_schedule(&dev->bh);
3231 }
3232 } else {
3233 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3234 ret = -ENOLINK;
3235 }
3236 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3237 if (ret) {
3238 dev_kfree_skb_any(skb);
3239 usb_free_urb(urb);
3240 }
3241 return ret;
3242}
3243
3244static void rx_complete(struct urb *urb)
3245{
3246 struct sk_buff *skb = (struct sk_buff *)urb->context;
3247 struct skb_data *entry = (struct skb_data *)skb->cb;
3248 struct lan78xx_net *dev = entry->dev;
3249 int urb_status = urb->status;
3250 enum skb_state state;
3251
3252 skb_put(skb, urb->actual_length);
3253 state = rx_done;
3254 entry->urb = NULL;
3255
3256 switch (urb_status) {
3257 case 0:
3258 if (skb->len < dev->net->hard_header_len) {
3259 state = rx_cleanup;
3260 dev->net->stats.rx_errors++;
3261 dev->net->stats.rx_length_errors++;
3262 netif_dbg(dev, rx_err, dev->net,
3263 "rx length %d\n", skb->len);
3264 }
3265 usb_mark_last_busy(dev->udev);
3266 break;
3267 case -EPIPE:
3268 dev->net->stats.rx_errors++;
3269 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3270 /* FALLTHROUGH */
3271 case -ECONNRESET: /* async unlink */
3272 case -ESHUTDOWN: /* hardware gone */
3273 netif_dbg(dev, ifdown, dev->net,
3274 "rx shutdown, code %d\n", urb_status);
3275 state = rx_cleanup;
3276 entry->urb = urb;
3277 urb = NULL;
3278 break;
3279 case -EPROTO:
3280 case -ETIME:
3281 case -EILSEQ:
3282 dev->net->stats.rx_errors++;
3283 state = rx_cleanup;
3284 entry->urb = urb;
3285 urb = NULL;
3286 break;
3287
3288 /* data overrun ... flush fifo? */
3289 case -EOVERFLOW:
3290 dev->net->stats.rx_over_errors++;
3291 /* FALLTHROUGH */
3292
3293 default:
3294 state = rx_cleanup;
3295 dev->net->stats.rx_errors++;
3296 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3297 break;
3298 }
3299
3300 state = defer_bh(dev, skb, &dev->rxq, state);
3301
3302 if (urb) {
3303 if (netif_running(dev->net) &&
3304 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3305 state != unlink_start) {
3306 rx_submit(dev, urb, GFP_ATOMIC);
3307 return;
3308 }
3309 usb_free_urb(urb);
3310 }
3311 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3312}
3313
3314static void lan78xx_tx_bh(struct lan78xx_net *dev)
3315{
3316 int length;
3317 struct urb *urb = NULL;
3318 struct skb_data *entry;
3319 unsigned long flags;
3320 struct sk_buff_head *tqp = &dev->txq_pend;
3321 struct sk_buff *skb, *skb2;
3322 int ret;
3323 int count, pos;
3324 int skb_totallen, pkt_cnt;
3325
3326 skb_totallen = 0;
3327 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003328 count = 0;
3329 length = 0;
Stefan Wahrendea39ac2018-07-15 21:53:20 +02003330 spin_lock_irqsave(&tqp->lock, flags);
David S. Millere42a43a2018-08-06 23:12:17 -07003331 skb_queue_walk(tqp, skb) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003332 if (skb_is_gso(skb)) {
David S. Millere42a43a2018-08-06 23:12:17 -07003333 if (!skb_queue_is_first(tqp, skb)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003334 /* handle previous packets first */
3335 break;
3336 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003337 count = 1;
3338 length = skb->len - TX_OVERHEAD;
Stefan Wahrendea39ac2018-07-15 21:53:20 +02003339 __skb_unlink(skb, tqp);
3340 spin_unlock_irqrestore(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003341 goto gso_skb;
3342 }
3343
3344 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3345 break;
3346 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3347 pkt_cnt++;
3348 }
Stefan Wahrendea39ac2018-07-15 21:53:20 +02003349 spin_unlock_irqrestore(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003350
3351 /* copy to a single skb */
3352 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3353 if (!skb)
3354 goto drop;
3355
3356 skb_put(skb, skb_totallen);
3357
3358 for (count = pos = 0; count < pkt_cnt; count++) {
3359 skb2 = skb_dequeue(tqp);
3360 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003361 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003362 memcpy(skb->data + pos, skb2->data, skb2->len);
3363 pos += roundup(skb2->len, sizeof(u32));
3364 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003365 }
3366 }
3367
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003368gso_skb:
3369 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003370 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003371 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003372
3373 entry = (struct skb_data *)skb->cb;
3374 entry->urb = urb;
3375 entry->dev = dev;
3376 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003377 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003378
3379 spin_lock_irqsave(&dev->txq.lock, flags);
3380 ret = usb_autopm_get_interface_async(dev->intf);
3381 if (ret < 0) {
3382 spin_unlock_irqrestore(&dev->txq.lock, flags);
3383 goto drop;
3384 }
3385
3386 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3387 skb->data, skb->len, tx_complete, skb);
3388
3389 if (length % dev->maxpacket == 0) {
3390 /* send USB_ZERO_PACKET */
3391 urb->transfer_flags |= URB_ZERO_PACKET;
3392 }
3393
3394#ifdef CONFIG_PM
3395 /* if this triggers the device is still a sleep */
3396 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3397 /* transmission will be done in resume */
3398 usb_anchor_urb(urb, &dev->deferred);
3399 /* no use to process more packets */
3400 netif_stop_queue(dev->net);
3401 usb_put_urb(urb);
3402 spin_unlock_irqrestore(&dev->txq.lock, flags);
3403 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3404 return;
3405 }
3406#endif
3407
3408 ret = usb_submit_urb(urb, GFP_ATOMIC);
3409 switch (ret) {
3410 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003411 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003412 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3413 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3414 netif_stop_queue(dev->net);
3415 break;
3416 case -EPIPE:
3417 netif_stop_queue(dev->net);
3418 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3419 usb_autopm_put_interface_async(dev->intf);
3420 break;
3421 default:
3422 usb_autopm_put_interface_async(dev->intf);
3423 netif_dbg(dev, tx_err, dev->net,
3424 "tx: submit urb err %d\n", ret);
3425 break;
3426 }
3427
3428 spin_unlock_irqrestore(&dev->txq.lock, flags);
3429
3430 if (ret) {
3431 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3432drop:
3433 dev->net->stats.tx_dropped++;
3434 if (skb)
3435 dev_kfree_skb_any(skb);
3436 usb_free_urb(urb);
3437 } else
3438 netif_dbg(dev, tx_queued, dev->net,
3439 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3440}
3441
3442static void lan78xx_rx_bh(struct lan78xx_net *dev)
3443{
3444 struct urb *urb;
3445 int i;
3446
3447 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3448 for (i = 0; i < 10; i++) {
3449 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3450 break;
3451 urb = usb_alloc_urb(0, GFP_ATOMIC);
3452 if (urb)
3453 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3454 return;
3455 }
3456
3457 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3458 tasklet_schedule(&dev->bh);
3459 }
3460 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3461 netif_wake_queue(dev->net);
3462}
3463
3464static void lan78xx_bh(unsigned long param)
3465{
3466 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3467 struct sk_buff *skb;
3468 struct skb_data *entry;
3469
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003470 while ((skb = skb_dequeue(&dev->done))) {
3471 entry = (struct skb_data *)(skb->cb);
3472 switch (entry->state) {
3473 case rx_done:
3474 entry->state = rx_cleanup;
3475 rx_process(dev, skb);
3476 continue;
3477 case tx_done:
3478 usb_free_urb(entry->urb);
3479 dev_kfree_skb(skb);
3480 continue;
3481 case rx_cleanup:
3482 usb_free_urb(entry->urb);
3483 dev_kfree_skb(skb);
3484 continue;
3485 default:
3486 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3487 return;
3488 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003489 }
3490
3491 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003492 /* reset update timer delta */
3493 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3494 dev->delta = 1;
3495 mod_timer(&dev->stat_monitor,
3496 jiffies + STAT_UPDATE_TIMER);
3497 }
3498
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003499 if (!skb_queue_empty(&dev->txq_pend))
3500 lan78xx_tx_bh(dev);
3501
3502 if (!timer_pending(&dev->delay) &&
3503 !test_bit(EVENT_RX_HALT, &dev->flags))
3504 lan78xx_rx_bh(dev);
3505 }
3506}
3507
3508static void lan78xx_delayedwork(struct work_struct *work)
3509{
3510 int status;
3511 struct lan78xx_net *dev;
3512
3513 dev = container_of(work, struct lan78xx_net, wq.work);
3514
3515 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3516 unlink_urbs(dev, &dev->txq);
3517 status = usb_autopm_get_interface(dev->intf);
3518 if (status < 0)
3519 goto fail_pipe;
3520 status = usb_clear_halt(dev->udev, dev->pipe_out);
3521 usb_autopm_put_interface(dev->intf);
3522 if (status < 0 &&
3523 status != -EPIPE &&
3524 status != -ESHUTDOWN) {
3525 if (netif_msg_tx_err(dev))
3526fail_pipe:
3527 netdev_err(dev->net,
3528 "can't clear tx halt, status %d\n",
3529 status);
3530 } else {
3531 clear_bit(EVENT_TX_HALT, &dev->flags);
3532 if (status != -ESHUTDOWN)
3533 netif_wake_queue(dev->net);
3534 }
3535 }
3536 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3537 unlink_urbs(dev, &dev->rxq);
3538 status = usb_autopm_get_interface(dev->intf);
3539 if (status < 0)
3540 goto fail_halt;
3541 status = usb_clear_halt(dev->udev, dev->pipe_in);
3542 usb_autopm_put_interface(dev->intf);
3543 if (status < 0 &&
3544 status != -EPIPE &&
3545 status != -ESHUTDOWN) {
3546 if (netif_msg_rx_err(dev))
3547fail_halt:
3548 netdev_err(dev->net,
3549 "can't clear rx halt, status %d\n",
3550 status);
3551 } else {
3552 clear_bit(EVENT_RX_HALT, &dev->flags);
3553 tasklet_schedule(&dev->bh);
3554 }
3555 }
3556
3557 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3558 int ret = 0;
3559
3560 clear_bit(EVENT_LINK_RESET, &dev->flags);
3561 status = usb_autopm_get_interface(dev->intf);
3562 if (status < 0)
3563 goto skip_reset;
3564 if (lan78xx_link_reset(dev) < 0) {
3565 usb_autopm_put_interface(dev->intf);
3566skip_reset:
3567 netdev_info(dev->net, "link reset failed (%d)\n",
3568 ret);
3569 } else {
3570 usb_autopm_put_interface(dev->intf);
3571 }
3572 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003573
3574 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3575 lan78xx_update_stats(dev);
3576
3577 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3578
3579 mod_timer(&dev->stat_monitor,
3580 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3581
3582 dev->delta = min((dev->delta * 2), 50);
3583 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003584}
3585
3586static void intr_complete(struct urb *urb)
3587{
3588 struct lan78xx_net *dev = urb->context;
3589 int status = urb->status;
3590
3591 switch (status) {
3592 /* success */
3593 case 0:
3594 lan78xx_status(dev, urb);
3595 break;
3596
3597 /* software-driven interface shutdown */
3598 case -ENOENT: /* urb killed */
3599 case -ESHUTDOWN: /* hardware gone */
3600 netif_dbg(dev, ifdown, dev->net,
3601 "intr shutdown, code %d\n", status);
3602 return;
3603
3604 /* NOTE: not throttling like RX/TX, since this endpoint
3605 * already polls infrequently
3606 */
3607 default:
3608 netdev_dbg(dev->net, "intr status %d\n", status);
3609 break;
3610 }
3611
3612 if (!netif_running(dev->net))
3613 return;
3614
3615 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3616 status = usb_submit_urb(urb, GFP_ATOMIC);
3617 if (status != 0)
3618 netif_err(dev, timer, dev->net,
3619 "intr resubmit --> %d\n", status);
3620}
3621
3622static void lan78xx_disconnect(struct usb_interface *intf)
3623{
Stefan Wahren51ceac92018-09-04 19:29:12 +02003624 struct lan78xx_net *dev;
3625 struct usb_device *udev;
3626 struct net_device *net;
3627 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003628
3629 dev = usb_get_intfdata(intf);
3630 usb_set_intfdata(intf, NULL);
3631 if (!dev)
3632 return;
3633
3634 udev = interface_to_usbdev(intf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003635 net = dev->net;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303636 phydev = net->phydev;
Alexander Graf92571a12018-04-04 00:19:35 +02003637
3638 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3639 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3640
3641 phy_disconnect(net->phydev);
3642
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303643 if (phy_is_pseudo_fixed_link(phydev))
3644 fixed_phy_unregister(phydev);
3645
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003646 unregister_netdev(net);
3647
3648 cancel_delayed_work_sync(&dev->wq);
3649
3650 usb_scuttle_anchored_urbs(&dev->deferred);
3651
3652 lan78xx_unbind(dev, intf);
3653
3654 usb_kill_urb(dev->urb_intr);
3655 usb_free_urb(dev->urb_intr);
3656
3657 free_netdev(net);
3658 usb_put_dev(udev);
3659}
3660
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003661static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003662{
3663 struct lan78xx_net *dev = netdev_priv(net);
3664
3665 unlink_urbs(dev, &dev->txq);
3666 tasklet_schedule(&dev->bh);
3667}
3668
3669static const struct net_device_ops lan78xx_netdev_ops = {
3670 .ndo_open = lan78xx_open,
3671 .ndo_stop = lan78xx_stop,
3672 .ndo_start_xmit = lan78xx_start_xmit,
3673 .ndo_tx_timeout = lan78xx_tx_timeout,
3674 .ndo_change_mtu = lan78xx_change_mtu,
3675 .ndo_set_mac_address = lan78xx_set_mac_addr,
3676 .ndo_validate_addr = eth_validate_addr,
3677 .ndo_do_ioctl = lan78xx_ioctl,
3678 .ndo_set_rx_mode = lan78xx_set_multicast,
3679 .ndo_set_features = lan78xx_set_features,
3680 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3681 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3682};
3683
Kees Cookd28bb962017-10-16 17:29:32 -07003684static void lan78xx_stat_monitor(struct timer_list *t)
Woojung Huh20ff5562016-03-16 22:10:40 +00003685{
Kees Cookd28bb962017-10-16 17:29:32 -07003686 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
Woojung Huh20ff5562016-03-16 22:10:40 +00003687
3688 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3689}
3690
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003691static int lan78xx_probe(struct usb_interface *intf,
3692 const struct usb_device_id *id)
3693{
3694 struct lan78xx_net *dev;
3695 struct net_device *netdev;
3696 struct usb_device *udev;
3697 int ret;
3698 unsigned maxp;
3699 unsigned period;
3700 u8 *buf = NULL;
3701
3702 udev = interface_to_usbdev(intf);
3703 udev = usb_get_dev(udev);
3704
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003705 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3706 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003707 dev_err(&intf->dev, "Error: OOM\n");
3708 ret = -ENOMEM;
3709 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003710 }
3711
3712 /* netdev_printk() needs this */
3713 SET_NETDEV_DEV(netdev, &intf->dev);
3714
3715 dev = netdev_priv(netdev);
3716 dev->udev = udev;
3717 dev->intf = intf;
3718 dev->net = netdev;
3719 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3720 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3721
3722 skb_queue_head_init(&dev->rxq);
3723 skb_queue_head_init(&dev->txq);
3724 skb_queue_head_init(&dev->done);
3725 skb_queue_head_init(&dev->rxq_pause);
3726 skb_queue_head_init(&dev->txq_pend);
3727 mutex_init(&dev->phy_mutex);
3728
3729 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3730 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3731 init_usb_anchor(&dev->deferred);
3732
3733 netdev->netdev_ops = &lan78xx_netdev_ops;
3734 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3735 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3736
Woojung Huh20ff5562016-03-16 22:10:40 +00003737 dev->delta = 1;
Kees Cookd28bb962017-10-16 17:29:32 -07003738 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
Woojung Huh20ff5562016-03-16 22:10:40 +00003739
3740 mutex_init(&dev->stats.access_lock);
3741
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003742 ret = lan78xx_bind(dev, intf);
3743 if (ret < 0)
3744 goto out2;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003745
3746 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3747 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3748
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003749 /* MTU range: 68 - 9000 */
3750 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3751
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003752 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3753 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3754 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3755
3756 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3757 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3758
3759 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3760 dev->ep_intr->desc.bEndpointAddress &
3761 USB_ENDPOINT_NUMBER_MASK);
3762 period = dev->ep_intr->desc.bInterval;
3763
3764 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3765 buf = kmalloc(maxp, GFP_KERNEL);
3766 if (buf) {
3767 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3768 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003769 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003770 kfree(buf);
3771 goto out3;
3772 } else {
3773 usb_fill_int_urb(dev->urb_intr, dev->udev,
3774 dev->pipe_intr, buf, maxp,
3775 intr_complete, dev, period);
3776 }
3777 }
3778
3779 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3780
3781 /* driver requires remote-wakeup capability during autosuspend. */
3782 intf->needs_remote_wakeup = 1;
3783
3784 ret = register_netdev(netdev);
3785 if (ret != 0) {
3786 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003787 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003788 }
3789
3790 usb_set_intfdata(intf, dev);
3791
3792 ret = device_set_wakeup_enable(&udev->dev, true);
3793
3794 /* Default delay of 2sec has more overhead than advantage.
3795 * Set to 10sec as default.
3796 */
3797 pm_runtime_set_autosuspend_delay(&udev->dev,
3798 DEFAULT_AUTOSUSPEND_DELAY);
3799
Alexander Graf92571a12018-04-04 00:19:35 +02003800 ret = lan78xx_phy_init(dev);
3801 if (ret < 0)
3802 goto out4;
3803
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003804 return 0;
3805
Alexander Graf92571a12018-04-04 00:19:35 +02003806out4:
3807 unregister_netdev(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003808out3:
3809 lan78xx_unbind(dev, intf);
3810out2:
3811 free_netdev(netdev);
3812out1:
3813 usb_put_dev(udev);
3814
3815 return ret;
3816}
3817
3818static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3819{
3820 const u16 crc16poly = 0x8005;
3821 int i;
3822 u16 bit, crc, msb;
3823 u8 data;
3824
3825 crc = 0xFFFF;
3826 for (i = 0; i < len; i++) {
3827 data = *buf++;
3828 for (bit = 0; bit < 8; bit++) {
3829 msb = crc >> 15;
3830 crc <<= 1;
3831
3832 if (msb ^ (u16)(data & 1)) {
3833 crc ^= crc16poly;
3834 crc |= (u16)0x0001U;
3835 }
3836 data >>= 1;
3837 }
3838 }
3839
3840 return crc;
3841}
3842
3843static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3844{
3845 u32 buf;
3846 int ret;
3847 int mask_index;
3848 u16 crc;
3849 u32 temp_wucsr;
3850 u32 temp_pmt_ctl;
3851 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3852 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3853 const u8 arp_type[2] = { 0x08, 0x06 };
3854
3855 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3856 buf &= ~MAC_TX_TXEN_;
3857 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3858 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3859 buf &= ~MAC_RX_RXEN_;
3860 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3861
3862 ret = lan78xx_write_reg(dev, WUCSR, 0);
3863 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3864 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3865
3866 temp_wucsr = 0;
3867
3868 temp_pmt_ctl = 0;
3869 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3870 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3871 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3872
3873 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3874 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3875
3876 mask_index = 0;
3877 if (wol & WAKE_PHY) {
3878 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3879
3880 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3881 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3882 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3883 }
3884 if (wol & WAKE_MAGIC) {
3885 temp_wucsr |= WUCSR_MPEN_;
3886
3887 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3888 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3889 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3890 }
3891 if (wol & WAKE_BCAST) {
3892 temp_wucsr |= WUCSR_BCST_EN_;
3893
3894 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3895 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3896 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3897 }
3898 if (wol & WAKE_MCAST) {
3899 temp_wucsr |= WUCSR_WAKE_EN_;
3900
3901 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3902 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3903 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3904 WUF_CFGX_EN_ |
3905 WUF_CFGX_TYPE_MCAST_ |
3906 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3907 (crc & WUF_CFGX_CRC16_MASK_));
3908
3909 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3910 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3911 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3912 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3913 mask_index++;
3914
3915 /* for IPv6 Multicast */
3916 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3917 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3918 WUF_CFGX_EN_ |
3919 WUF_CFGX_TYPE_MCAST_ |
3920 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3921 (crc & WUF_CFGX_CRC16_MASK_));
3922
3923 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3924 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3925 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3926 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3927 mask_index++;
3928
3929 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3930 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3931 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3932 }
3933 if (wol & WAKE_UCAST) {
3934 temp_wucsr |= WUCSR_PFDA_EN_;
3935
3936 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3937 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3938 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3939 }
3940 if (wol & WAKE_ARP) {
3941 temp_wucsr |= WUCSR_WAKE_EN_;
3942
3943 /* set WUF_CFG & WUF_MASK
3944 * for packettype (offset 12,13) = ARP (0x0806)
3945 */
3946 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3947 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3948 WUF_CFGX_EN_ |
3949 WUF_CFGX_TYPE_ALL_ |
3950 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3951 (crc & WUF_CFGX_CRC16_MASK_));
3952
3953 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3954 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3955 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3956 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3957 mask_index++;
3958
3959 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3960 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3961 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3962 }
3963
3964 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3965
3966 /* when multiple WOL bits are set */
3967 if (hweight_long((unsigned long)wol) > 1) {
3968 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3969 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3970 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3971 }
3972 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3973
3974 /* clear WUPS */
3975 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3976 buf |= PMT_CTL_WUPS_MASK_;
3977 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3978
3979 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3980 buf |= MAC_RX_RXEN_;
3981 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3982
3983 return 0;
3984}
3985
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003986static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003987{
3988 struct lan78xx_net *dev = usb_get_intfdata(intf);
3989 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3990 u32 buf;
3991 int ret;
3992 int event;
3993
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003994 event = message.event;
3995
3996 if (!dev->suspend_count++) {
3997 spin_lock_irq(&dev->txq.lock);
3998 /* don't autosuspend while transmitting */
3999 if ((skb_queue_len(&dev->txq) ||
4000 skb_queue_len(&dev->txq_pend)) &&
4001 PMSG_IS_AUTO(message)) {
4002 spin_unlock_irq(&dev->txq.lock);
4003 ret = -EBUSY;
4004 goto out;
4005 } else {
4006 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
4007 spin_unlock_irq(&dev->txq.lock);
4008 }
4009
4010 /* stop TX & RX */
4011 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4012 buf &= ~MAC_TX_TXEN_;
4013 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4014 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4015 buf &= ~MAC_RX_RXEN_;
4016 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4017
4018 /* empty out the rx and queues */
4019 netif_device_detach(dev->net);
4020 lan78xx_terminate_urbs(dev);
4021 usb_kill_urb(dev->urb_intr);
4022
4023 /* reattach */
4024 netif_device_attach(dev->net);
4025 }
4026
4027 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00004028 del_timer(&dev->stat_monitor);
4029
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004030 if (PMSG_IS_AUTO(message)) {
4031 /* auto suspend (selective suspend) */
4032 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4033 buf &= ~MAC_TX_TXEN_;
4034 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4035 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4036 buf &= ~MAC_RX_RXEN_;
4037 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4038
4039 ret = lan78xx_write_reg(dev, WUCSR, 0);
4040 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4041 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4042
4043 /* set goodframe wakeup */
4044 ret = lan78xx_read_reg(dev, WUCSR, &buf);
4045
4046 buf |= WUCSR_RFE_WAKE_EN_;
4047 buf |= WUCSR_STORE_WAKE_;
4048
4049 ret = lan78xx_write_reg(dev, WUCSR, buf);
4050
4051 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4052
4053 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
4054 buf |= PMT_CTL_RES_CLR_WKP_STS_;
4055
4056 buf |= PMT_CTL_PHY_WAKE_EN_;
4057 buf |= PMT_CTL_WOL_EN_;
4058 buf &= ~PMT_CTL_SUS_MODE_MASK_;
4059 buf |= PMT_CTL_SUS_MODE_3_;
4060
4061 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4062
4063 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4064
4065 buf |= PMT_CTL_WUPS_MASK_;
4066
4067 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4068
4069 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4070 buf |= MAC_RX_RXEN_;
4071 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4072 } else {
4073 lan78xx_set_suspend(dev, pdata->wol);
4074 }
4075 }
4076
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00004077 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004078out:
4079 return ret;
4080}
4081
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004082static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004083{
4084 struct lan78xx_net *dev = usb_get_intfdata(intf);
4085 struct sk_buff *skb;
4086 struct urb *res;
4087 int ret;
4088 u32 buf;
4089
Woojung Huh20ff5562016-03-16 22:10:40 +00004090 if (!timer_pending(&dev->stat_monitor)) {
4091 dev->delta = 1;
4092 mod_timer(&dev->stat_monitor,
4093 jiffies + STAT_UPDATE_TIMER);
4094 }
4095
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004096 if (!--dev->suspend_count) {
4097 /* resume interrupt URBs */
4098 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
4099 usb_submit_urb(dev->urb_intr, GFP_NOIO);
4100
4101 spin_lock_irq(&dev->txq.lock);
4102 while ((res = usb_get_from_anchor(&dev->deferred))) {
4103 skb = (struct sk_buff *)res->context;
4104 ret = usb_submit_urb(res, GFP_ATOMIC);
4105 if (ret < 0) {
4106 dev_kfree_skb_any(skb);
4107 usb_free_urb(res);
4108 usb_autopm_put_interface_async(dev->intf);
4109 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02004110 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004111 lan78xx_queue_skb(&dev->txq, skb, tx_start);
4112 }
4113 }
4114
4115 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
4116 spin_unlock_irq(&dev->txq.lock);
4117
4118 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
4119 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
4120 netif_start_queue(dev->net);
4121 tasklet_schedule(&dev->bh);
4122 }
4123 }
4124
4125 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4126 ret = lan78xx_write_reg(dev, WUCSR, 0);
4127 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4128
4129 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
4130 WUCSR2_ARP_RCD_ |
4131 WUCSR2_IPV6_TCPSYN_RCD_ |
4132 WUCSR2_IPV4_TCPSYN_RCD_);
4133
4134 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
4135 WUCSR_EEE_RX_WAKE_ |
4136 WUCSR_PFDA_FR_ |
4137 WUCSR_RFE_WAKE_FR_ |
4138 WUCSR_WUFR_ |
4139 WUCSR_MPR_ |
4140 WUCSR_BCST_FR_);
4141
4142 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4143 buf |= MAC_TX_TXEN_;
4144 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4145
4146 return 0;
4147}
4148
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004149static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004150{
4151 struct lan78xx_net *dev = usb_get_intfdata(intf);
4152
4153 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004154
Alexander Graf92571a12018-04-04 00:19:35 +02004155 phy_start(dev->net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004156
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004157 return lan78xx_resume(intf);
4158}
4159
4160static const struct usb_device_id products[] = {
4161 {
4162 /* LAN7800 USB Gigabit Ethernet Device */
4163 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4164 },
4165 {
4166 /* LAN7850 USB Gigabit Ethernet Device */
4167 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4168 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004169 {
4170 /* LAN7801 USB Gigabit Ethernet Device */
4171 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4172 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004173 {},
4174};
4175MODULE_DEVICE_TABLE(usb, products);
4176
4177static struct usb_driver lan78xx_driver = {
4178 .name = DRIVER_NAME,
4179 .id_table = products,
4180 .probe = lan78xx_probe,
4181 .disconnect = lan78xx_disconnect,
4182 .suspend = lan78xx_suspend,
4183 .resume = lan78xx_resume,
4184 .reset_resume = lan78xx_reset_resume,
4185 .supports_autosuspend = 1,
4186 .disable_hub_initiated_lpm = 1,
4187};
4188
4189module_usb_driver(lan78xx_driver);
4190
4191MODULE_AUTHOR(DRIVER_AUTHOR);
4192MODULE_DESCRIPTION(DRIVER_DESC);
4193MODULE_LICENSE("GPL");