blob: d4da643251901d91eca46e859fdccf69e289782c [file] [log] [blame]
Jisheng Zhang35043952018-05-16 16:04:29 +08001/* SPDX-License-Identifier: GPL-2.0 */
Alexandre Belloni6f9ba9b2014-05-19 18:43:26 +02002/*
3 * Copyright (c) 2014 Marvell Technology Group Ltd.
4 *
5 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
6 * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Alexandre Belloni6f9ba9b2014-05-19 18:43:26 +02007 */
8#ifndef __BERLIN2_DIV_H
9#define __BERLIN2_DIV_H
10
Stephen Boydf6475e22016-08-16 15:40:52 -070011struct clk_hw;
Alexandre Belloni6f9ba9b2014-05-19 18:43:26 +020012
13#define BERLIN2_DIV_HAS_GATE BIT(0)
14#define BERLIN2_DIV_HAS_MUX BIT(1)
15
16#define BERLIN2_PLL_SELECT(_off, _sh) \
17 .pll_select_offs = _off, \
18 .pll_select_shift = _sh
19
20#define BERLIN2_PLL_SWITCH(_off, _sh) \
21 .pll_switch_offs = _off, \
22 .pll_switch_shift = _sh
23
24#define BERLIN2_DIV_SELECT(_off, _sh) \
25 .div_select_offs = _off, \
26 .div_select_shift = _sh
27
28#define BERLIN2_DIV_SWITCH(_off, _sh) \
29 .div_switch_offs = _off, \
30 .div_switch_shift = _sh
31
32#define BERLIN2_DIV_D3SWITCH(_off, _sh) \
33 .div3_switch_offs = _off, \
34 .div3_switch_shift = _sh
35
36#define BERLIN2_DIV_GATE(_off, _sh) \
37 .gate_offs = _off, \
38 .gate_shift = _sh
39
40#define BERLIN2_SINGLE_DIV(_off) \
41 BERLIN2_DIV_GATE(_off, 0), \
42 BERLIN2_PLL_SELECT(_off, 1), \
43 BERLIN2_PLL_SWITCH(_off, 4), \
44 BERLIN2_DIV_SWITCH(_off, 5), \
45 BERLIN2_DIV_D3SWITCH(_off, 6), \
46 BERLIN2_DIV_SELECT(_off, 7)
47
48struct berlin2_div_map {
49 u16 pll_select_offs;
50 u16 pll_switch_offs;
51 u16 div_select_offs;
52 u16 div_switch_offs;
53 u16 div3_switch_offs;
54 u16 gate_offs;
55 u8 pll_select_shift;
56 u8 pll_switch_shift;
57 u8 div_select_shift;
58 u8 div_switch_shift;
59 u8 div3_switch_shift;
60 u8 gate_shift;
61};
62
63struct berlin2_div_data {
64 const char *name;
65 const u8 *parent_ids;
66 int num_parents;
67 unsigned long flags;
68 struct berlin2_div_map map;
69 u8 div_flags;
70};
71
Stephen Boydf6475e22016-08-16 15:40:52 -070072struct clk_hw *
Alexandre Belloni6f9ba9b2014-05-19 18:43:26 +020073berlin2_div_register(const struct berlin2_div_map *map,
74 void __iomem *base, const char *name, u8 div_flags,
75 const char **parent_names, int num_parents,
76 unsigned long flags, spinlock_t *lock);
77
78#endif /* __BERLIN2_DIV_H */