blob: afffc1547e20e076bd241882eb8161c96542bdde [file] [log] [blame]
Jerome Brunet22f65a32018-05-16 10:50:40 +02001// SPDX-License-Identifier: GPL-2.0
Carlo Caione7a29a862015-06-01 13:13:53 +02002/*
3 * Copyright (c) 2015 Endless Mobile, Inc.
4 * Author: Carlo Caione <carlo@endlessm.com>
5 *
Jerome Brunet8289aaf2018-02-19 12:21:39 +01006 * Copyright (c) 2018 Baylibre, SAS.
7 * Author: Jerome Brunet <jbrunet@baylibre.com>
Carlo Caione7a29a862015-06-01 13:13:53 +02008 */
9
10/*
11 * In the most basic form, a Meson PLL is composed as follows:
12 *
13 * PLL
Jerome Brunet87173552018-08-01 16:00:52 +020014 * +--------------------------------+
15 * | |
16 * | +--+ |
17 * in >>-----[ /N ]--->| | +-----+ |
18 * | | |------| DCO |---->> out
19 * | +--------->| | +--v--+ |
20 * | | +--+ | |
21 * | | | |
22 * | +--[ *(M + (F/Fmax) ]<--+ |
23 * | |
24 * +--------------------------------+
Carlo Caione7a29a862015-06-01 13:13:53 +020025 *
Jerome Brunet87173552018-08-01 16:00:52 +020026 * out = in * (m + frac / frac_max) / n
Carlo Caione7a29a862015-06-01 13:13:53 +020027 */
28
29#include <linux/clk-provider.h>
30#include <linux/delay.h>
31#include <linux/err.h>
32#include <linux/io.h>
Jerome Brunet94aa8a42018-01-19 16:55:23 +010033#include <linux/math64.h>
Carlo Caione7a29a862015-06-01 13:13:53 +020034#include <linux/module.h>
35#include <linux/of_address.h>
36#include <linux/slab.h>
37#include <linux/string.h>
38
39#include "clkc.h"
40
Jerome Brunet722825d2018-02-12 15:58:42 +010041static inline struct meson_clk_pll_data *
42meson_clk_pll_data(struct clk_regmap *clk)
43{
44 return (struct meson_clk_pll_data *)clk->data;
45}
Carlo Caione7a29a862015-06-01 13:13:53 +020046
Jerome Brunet8289aaf2018-02-19 12:21:39 +010047static unsigned long __pll_params_to_rate(unsigned long parent_rate,
Jerome Brunetdd601db2018-08-01 16:00:53 +020048 const struct pll_params_table *pllt,
Jerome Brunet8289aaf2018-02-19 12:21:39 +010049 u16 frac,
50 struct meson_clk_pll_data *pll)
51{
52 u64 rate = (u64)parent_rate * pllt->m;
Jerome Brunet8289aaf2018-02-19 12:21:39 +010053
54 if (frac && MESON_PARM_APPLICABLE(&pll->frac)) {
55 u64 frac_rate = (u64)parent_rate * frac;
56
57 rate += DIV_ROUND_UP_ULL(frac_rate,
58 (1 << pll->frac.width));
59 }
60
Jerome Brunet87173552018-08-01 16:00:52 +020061 return DIV_ROUND_UP_ULL(rate, pllt->n);
Jerome Brunet8289aaf2018-02-19 12:21:39 +010062}
63
Carlo Caione7a29a862015-06-01 13:13:53 +020064static unsigned long meson_clk_pll_recalc_rate(struct clk_hw *hw,
65 unsigned long parent_rate)
66{
Jerome Brunet722825d2018-02-12 15:58:42 +010067 struct clk_regmap *clk = to_clk_regmap(hw);
68 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
Jerome Brunetdd601db2018-08-01 16:00:53 +020069 struct pll_params_table pllt;
Jerome Brunet8289aaf2018-02-19 12:21:39 +010070 u16 frac;
Carlo Caione7a29a862015-06-01 13:13:53 +020071
Jerome Brunet8289aaf2018-02-19 12:21:39 +010072 pllt.n = meson_parm_read(clk->map, &pll->n);
73 pllt.m = meson_parm_read(clk->map, &pll->m);
Jerome Brunet7d3142e2018-01-19 16:55:25 +010074
Jerome Brunet8289aaf2018-02-19 12:21:39 +010075 frac = MESON_PARM_APPLICABLE(&pll->frac) ?
76 meson_parm_read(clk->map, &pll->frac) :
77 0;
Jerome Brunet94aa8a42018-01-19 16:55:23 +010078
Jerome Brunet8289aaf2018-02-19 12:21:39 +010079 return __pll_params_to_rate(parent_rate, &pllt, frac, pll);
80}
Carlo Caione7a29a862015-06-01 13:13:53 +020081
Jerome Brunet8289aaf2018-02-19 12:21:39 +010082static u16 __pll_params_with_frac(unsigned long rate,
83 unsigned long parent_rate,
Jerome Brunetdd601db2018-08-01 16:00:53 +020084 const struct pll_params_table *pllt,
Jerome Brunet8289aaf2018-02-19 12:21:39 +010085 struct meson_clk_pll_data *pll)
86{
87 u16 frac_max = (1 << pll->frac.width);
88 u64 val = (u64)rate * pllt->n;
Jerome Brunet94aa8a42018-01-19 16:55:23 +010089
Jerome Brunet0a1be862018-02-19 12:21:41 +010090 if (pll->flags & CLK_MESON_PLL_ROUND_CLOSEST)
91 val = DIV_ROUND_CLOSEST_ULL(val * frac_max, parent_rate);
92 else
93 val = div_u64(val * frac_max, parent_rate);
94
Jerome Brunet8289aaf2018-02-19 12:21:39 +010095 val -= pllt->m * frac_max;
96
97 return min((u16)val, (u16)(frac_max - 1));
98}
99
Jerome Brunetdd601db2018-08-01 16:00:53 +0200100static bool meson_clk_pll_is_better(unsigned long rate,
101 unsigned long best,
102 unsigned long now,
103 struct meson_clk_pll_data *pll)
104{
105 if (!(pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) ||
106 MESON_PARM_APPLICABLE(&pll->frac)) {
107 /* Round down */
108 if (now < rate && best < now)
109 return true;
110 } else {
111 /* Round Closest */
112 if (abs(now - rate) < abs(best - rate))
113 return true;
114 }
115
116 return false;
117}
118
119static const struct pll_params_table *
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100120meson_clk_get_pll_settings(unsigned long rate,
Jerome Brunetdd601db2018-08-01 16:00:53 +0200121 unsigned long parent_rate,
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100122 struct meson_clk_pll_data *pll)
123{
Jerome Brunetdd601db2018-08-01 16:00:53 +0200124 const struct pll_params_table *table = pll->table;
125 unsigned long best = 0, now = 0;
126 unsigned int i, best_i = 0;
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100127
128 if (!table)
129 return NULL;
130
Jerome Brunetdd601db2018-08-01 16:00:53 +0200131 for (i = 0; table[i].n; i++) {
132 now = __pll_params_to_rate(parent_rate, &table[i], 0, pll);
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100133
Jerome Brunetdd601db2018-08-01 16:00:53 +0200134 /* If we get an exact match, don't bother any further */
135 if (now == rate) {
136 return &table[i];
137 } else if (meson_clk_pll_is_better(rate, best, now, pll)) {
138 best = now;
139 best_i = i;
140 }
Jerome Brunet0a1be862018-02-19 12:21:41 +0100141 }
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100142
Jerome Brunetdd601db2018-08-01 16:00:53 +0200143 return (struct pll_params_table *)&table[best_i];
Carlo Caione7a29a862015-06-01 13:13:53 +0200144}
145
146static long meson_clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
147 unsigned long *parent_rate)
148{
Jerome Brunet722825d2018-02-12 15:58:42 +0100149 struct clk_regmap *clk = to_clk_regmap(hw);
150 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
Jerome Brunetdd601db2018-08-01 16:00:53 +0200151 const struct pll_params_table *pllt =
152 meson_clk_get_pll_settings(rate, *parent_rate, pll);
153 unsigned long round;
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100154 u16 frac;
Carlo Caione7a29a862015-06-01 13:13:53 +0200155
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100156 if (!pllt)
Jerome Brunet840e1a72018-01-19 16:55:21 +0100157 return meson_clk_pll_recalc_rate(hw, *parent_rate);
158
Jerome Brunetdd601db2018-08-01 16:00:53 +0200159 round = __pll_params_to_rate(*parent_rate, pllt, 0, pll);
160
161 if (!MESON_PARM_APPLICABLE(&pll->frac) || rate == round)
162 return round;
Carlo Caione7a29a862015-06-01 13:13:53 +0200163
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100164 /*
165 * The rate provided by the setting is not an exact match, let's
166 * try to improve the result using the fractional parameter
167 */
168 frac = __pll_params_with_frac(rate, *parent_rate, pllt, pll);
Carlo Caione7a29a862015-06-01 13:13:53 +0200169
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100170 return __pll_params_to_rate(*parent_rate, pllt, frac, pll);
Carlo Caione7a29a862015-06-01 13:13:53 +0200171}
172
Jerome Brunet722825d2018-02-12 15:58:42 +0100173static int meson_clk_pll_wait_lock(struct clk_hw *hw)
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100174{
Jerome Brunet722825d2018-02-12 15:58:42 +0100175 struct clk_regmap *clk = to_clk_regmap(hw);
176 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
Jerome Brunetc178b002018-02-19 12:21:38 +0100177 int delay = 24000000;
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100178
Jerome Brunet722825d2018-02-12 15:58:42 +0100179 do {
Jerome Brunet722825d2018-02-12 15:58:42 +0100180 /* Is the clock locked now ? */
181 if (meson_parm_read(clk->map, &pll->l))
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100182 return 0;
Jerome Brunet722825d2018-02-12 15:58:42 +0100183
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100184 delay--;
Jerome Brunet722825d2018-02-12 15:58:42 +0100185 } while (delay > 0);
186
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100187 return -ETIMEDOUT;
188}
189
Jerome Brunet722825d2018-02-12 15:58:42 +0100190static void meson_clk_pll_init(struct clk_hw *hw)
Carlo Caione7a29a862015-06-01 13:13:53 +0200191{
Jerome Brunet722825d2018-02-12 15:58:42 +0100192 struct clk_regmap *clk = to_clk_regmap(hw);
193 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
Carlo Caione7a29a862015-06-01 13:13:53 +0200194
Jerome Brunet722825d2018-02-12 15:58:42 +0100195 if (pll->init_count) {
196 meson_parm_write(clk->map, &pll->rst, 1);
197 regmap_multi_reg_write(clk->map, pll->init_regs,
198 pll->init_count);
199 meson_parm_write(clk->map, &pll->rst, 0);
Carlo Caione7a29a862015-06-01 13:13:53 +0200200 }
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100201}
202
Martin Blumenstingld6e81842018-11-15 23:40:43 +0100203static int meson_clk_pll_is_enabled(struct clk_hw *hw)
204{
205 struct clk_regmap *clk = to_clk_regmap(hw);
206 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
207
208 if (meson_parm_read(clk->map, &pll->rst) ||
209 !meson_parm_read(clk->map, &pll->en) ||
210 !meson_parm_read(clk->map, &pll->l))
211 return 0;
212
213 return 1;
214}
215
Jerome Brunete40c7e32018-08-01 16:00:50 +0200216static int meson_clk_pll_enable(struct clk_hw *hw)
217{
218 struct clk_regmap *clk = to_clk_regmap(hw);
219 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
220
Martin Blumenstingld6e81842018-11-15 23:40:43 +0100221 /* do nothing if the PLL is already enabled */
222 if (clk_hw_is_enabled(hw))
223 return 0;
224
Jerome Brunete40c7e32018-08-01 16:00:50 +0200225 /* Make sure the pll is in reset */
226 meson_parm_write(clk->map, &pll->rst, 1);
227
228 /* Enable the pll */
229 meson_parm_write(clk->map, &pll->en, 1);
230
231 /* Take the pll out reset */
232 meson_parm_write(clk->map, &pll->rst, 0);
233
234 if (meson_clk_pll_wait_lock(hw))
235 return -EIO;
236
237 return 0;
238}
239
240static void meson_clk_pll_disable(struct clk_hw *hw)
241{
242 struct clk_regmap *clk = to_clk_regmap(hw);
243 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
244
245 /* Put the pll is in reset */
246 meson_parm_write(clk->map, &pll->rst, 1);
247
248 /* Disable the pll */
249 meson_parm_write(clk->map, &pll->en, 0);
250}
251
Carlo Caione7a29a862015-06-01 13:13:53 +0200252static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
253 unsigned long parent_rate)
254{
Jerome Brunet722825d2018-02-12 15:58:42 +0100255 struct clk_regmap *clk = to_clk_regmap(hw);
256 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
Jerome Brunetdd601db2018-08-01 16:00:53 +0200257 const struct pll_params_table *pllt;
Jerome Brunete40c7e32018-08-01 16:00:50 +0200258 unsigned int enabled;
Carlo Caione7a29a862015-06-01 13:13:53 +0200259 unsigned long old_rate;
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100260 u16 frac = 0;
Carlo Caione7a29a862015-06-01 13:13:53 +0200261
262 if (parent_rate == 0 || rate == 0)
263 return -EINVAL;
264
265 old_rate = rate;
266
Jerome Brunetdd601db2018-08-01 16:00:53 +0200267 pllt = meson_clk_get_pll_settings(rate, parent_rate, pll);
Jerome Brunet722825d2018-02-12 15:58:42 +0100268 if (!pllt)
Carlo Caione7a29a862015-06-01 13:13:53 +0200269 return -EINVAL;
270
Jerome Brunete40c7e32018-08-01 16:00:50 +0200271 enabled = meson_parm_read(clk->map, &pll->en);
272 if (enabled)
273 meson_clk_pll_disable(hw);
Neil Armstrong45fcbec2017-03-22 11:32:23 +0100274
Jerome Brunet722825d2018-02-12 15:58:42 +0100275 meson_parm_write(clk->map, &pll->n, pllt->n);
276 meson_parm_write(clk->map, &pll->m, pllt->m);
Carlo Caione7a29a862015-06-01 13:13:53 +0200277
Carlo Caione7a29a862015-06-01 13:13:53 +0200278
Jerome Brunet8289aaf2018-02-19 12:21:39 +0100279 if (MESON_PARM_APPLICABLE(&pll->frac)) {
280 frac = __pll_params_with_frac(rate, parent_rate, pllt, pll);
281 meson_parm_write(clk->map, &pll->frac, frac);
282 }
Carlo Caione7a29a862015-06-01 13:13:53 +0200283
Jerome Brunete40c7e32018-08-01 16:00:50 +0200284 /* If the pll is stopped, bail out now */
285 if (!enabled)
286 return 0;
Michael Turquette4a472952016-06-06 18:08:15 -0700287
Jerome Brunete40c7e32018-08-01 16:00:50 +0200288 if (meson_clk_pll_enable(hw)) {
Carlo Caione7a29a862015-06-01 13:13:53 +0200289 pr_warn("%s: pll did not lock, trying to restore old rate %lu\n",
290 __func__, old_rate);
Jerome Brunet722825d2018-02-12 15:58:42 +0100291 /*
292 * FIXME: Do we really need/want this HACK ?
293 * It looks unsafe. what happens if the clock gets into a
294 * broken state and we can't lock back on the old_rate ? Looks
295 * like an infinite recursion is possible
296 */
Carlo Caione7a29a862015-06-01 13:13:53 +0200297 meson_clk_pll_set_rate(hw, old_rate, parent_rate);
298 }
299
Jerome Brunet722825d2018-02-12 15:58:42 +0100300 return 0;
Carlo Caione7a29a862015-06-01 13:13:53 +0200301}
302
Michael Turquetteec623f22016-04-28 12:01:42 -0700303const struct clk_ops meson_clk_pll_ops = {
Jerome Brunet722825d2018-02-12 15:58:42 +0100304 .init = meson_clk_pll_init,
Carlo Caione7a29a862015-06-01 13:13:53 +0200305 .recalc_rate = meson_clk_pll_recalc_rate,
306 .round_rate = meson_clk_pll_round_rate,
307 .set_rate = meson_clk_pll_set_rate,
Martin Blumenstingld6e81842018-11-15 23:40:43 +0100308 .is_enabled = meson_clk_pll_is_enabled,
Jerome Brunete40c7e32018-08-01 16:00:50 +0200309 .enable = meson_clk_pll_enable,
310 .disable = meson_clk_pll_disable
Carlo Caione7a29a862015-06-01 13:13:53 +0200311};
312
Michael Turquetteec623f22016-04-28 12:01:42 -0700313const struct clk_ops meson_clk_pll_ro_ops = {
Carlo Caione7a29a862015-06-01 13:13:53 +0200314 .recalc_rate = meson_clk_pll_recalc_rate,
Martin Blumenstingld6e81842018-11-15 23:40:43 +0100315 .is_enabled = meson_clk_pll_is_enabled,
Carlo Caione7a29a862015-06-01 13:13:53 +0200316};