blob: 8ed6733d5146c4c359393ae8a6236b69c869afed [file] [log] [blame]
Michael Kelleyc55a8442020-04-22 12:57:36 -07001/* SPDX-License-Identifier: GPL-2.0 */
2
3/*
4 * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
5 * Specification (TLFS):
6 * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
7 */
8
9#ifndef _ASM_GENERIC_HYPERV_TLFS_H
10#define _ASM_GENERIC_HYPERV_TLFS_H
11
12#include <linux/types.h>
13#include <linux/bits.h>
14#include <linux/time64.h>
15
16/*
17 * While not explicitly listed in the TLFS, Hyper-V always runs with a page size
18 * of 4096. These definitions are used when communicating with Hyper-V using
19 * guest physical pages and guest physical page addresses, since the guest page
20 * size may not be 4096 on all architectures.
21 */
22#define HV_HYP_PAGE_SHIFT 12
23#define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT)
24#define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1))
25
26/*
27 * Hyper-V provides two categories of flags relevant to guest VMs. The
28 * "Features" category indicates specific functionality that is available
29 * to guests on this particular instance of Hyper-V. The "Features"
30 * are presented in four groups, each of which is 32 bits. The group A
31 * and B definitions are common across architectures and are listed here.
32 * However, not all flags are relevant on all architectures.
33 *
34 * Groups C and D vary across architectures and are listed in the
35 * architecture specific portion of hyperv-tlfs.h. Some of these flags exist
36 * on multiple architectures, but the bit positions are different so they
37 * cannot appear in the generic portion of hyperv-tlfs.h.
38 *
39 * The "Enlightenments" category provides recommendations on whether to use
40 * specific enlightenments that are available. The Enlighenments are a single
41 * group of 32 bits, but they vary across architectures and are listed in
42 * the architecture specific portion of hyperv-tlfs.h.
43 */
44
45/*
46 * Group A Features.
47 */
48
49/* VP Runtime register available */
50#define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0)
51/* Partition Reference Counter available*/
52#define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1)
53/* Basic SynIC register available */
54#define HV_MSR_SYNIC_AVAILABLE BIT(2)
55/* Synthetic Timer registers available */
56#define HV_MSR_SYNTIMER_AVAILABLE BIT(3)
57/* Virtual APIC assist and VP assist page registers available */
58#define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4)
59/* Hypercall and Guest OS ID registers available*/
60#define HV_MSR_HYPERCALL_AVAILABLE BIT(5)
61/* Access virtual processor index register available*/
62#define HV_MSR_VP_INDEX_AVAILABLE BIT(6)
63/* Virtual system reset register available*/
64#define HV_MSR_RESET_AVAILABLE BIT(7)
65/* Access statistics page registers available */
66#define HV_MSR_STAT_PAGES_AVAILABLE BIT(8)
67/* Partition reference TSC register is available */
68#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9)
69/* Partition Guest IDLE register is available */
70#define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10)
71/* Partition local APIC and TSC frequency registers available */
72#define HV_ACCESS_FREQUENCY_MSRS BIT(11)
73/* AccessReenlightenmentControls privilege */
74#define HV_ACCESS_REENLIGHTENMENT BIT(13)
75/* AccessTscInvariantControls privilege */
76#define HV_ACCESS_TSC_INVARIANT BIT(15)
77
78/*
79 * Group B features.
80 */
81#define HV_CREATE_PARTITIONS BIT(0)
82#define HV_ACCESS_PARTITION_ID BIT(1)
83#define HV_ACCESS_MEMORY_POOL BIT(2)
84#define HV_ADJUST_MESSAGE_BUFFERS BIT(3)
85#define HV_POST_MESSAGES BIT(4)
86#define HV_SIGNAL_EVENTS BIT(5)
87#define HV_CREATE_PORT BIT(6)
88#define HV_CONNECT_PORT BIT(7)
89#define HV_ACCESS_STATS BIT(8)
90#define HV_DEBUGGING BIT(11)
Wei Liu8f1d14c2021-02-03 15:04:20 +000091#define HV_CPU_MANAGEMENT BIT(12)
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +000092#define HV_ENABLE_EXTENDED_HYPERCALLS BIT(20)
Andrea Parri (Microsoft)a6c76bb02021-02-01 15:48:11 +010093#define HV_ISOLATION BIT(22)
Michael Kelleyc55a8442020-04-22 12:57:36 -070094
Michael Kelleyc55a8442020-04-22 12:57:36 -070095/*
96 * TSC page layout.
97 */
98struct ms_hyperv_tsc_page {
99 volatile u32 tsc_sequence;
100 u32 reserved1;
101 volatile u64 tsc_scale;
102 volatile s64 tsc_offset;
103} __packed;
104
105/*
106 * The guest OS needs to register the guest ID with the hypervisor.
107 * The guest ID is a 64 bit entity and the structure of this ID is
108 * specified in the Hyper-V specification:
109 *
110 * msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx
111 *
112 * While the current guideline does not specify how Linux guest ID(s)
113 * need to be generated, our plan is to publish the guidelines for
114 * Linux and other guest operating systems that currently are hosted
115 * on Hyper-V. The implementation here conforms to this yet
116 * unpublished guidelines.
117 *
118 *
119 * Bit(s)
120 * 63 - Indicates if the OS is Open Source or not; 1 is Open Source
121 * 62:56 - Os Type; Linux is 0x100
122 * 55:48 - Distro specific identification
123 * 47:16 - Linux kernel version number
124 * 15:0 - Distro specific identification
125 *
126 *
127 */
128
129#define HV_LINUX_VENDOR_ID 0x8100
130
131/*
132 * Crash notification flags.
133 */
134#define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62)
135#define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63)
136
137/* Declare the various hypercall operations. */
138#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002
139#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003
140#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
141#define HVCALL_SEND_IPI 0x000b
142#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013
143#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014
144#define HVCALL_SEND_IPI_EX 0x0015
Wei Liu99a0f462021-02-03 15:04:25 +0000145#define HVCALL_GET_PARTITION_ID 0x0046
Wei Liu86b5ec32021-02-03 15:04:28 +0000146#define HVCALL_DEPOSIT_MEMORY 0x0048
147#define HVCALL_CREATE_VP 0x004e
Michael Kelley88b42da2020-04-22 12:57:37 -0700148#define HVCALL_GET_VP_REGISTERS 0x0050
149#define HVCALL_SET_VP_REGISTERS 0x0051
Michael Kelleyc55a8442020-04-22 12:57:36 -0700150#define HVCALL_POST_MESSAGE 0x005c
151#define HVCALL_SIGNAL_EVENT 0x005d
Linus Torvalds039aeb92020-06-03 15:13:47 -0700152#define HVCALL_POST_DEBUG_DATA 0x0069
153#define HVCALL_RETRIEVE_DEBUG_DATA 0x006a
154#define HVCALL_RESET_DEBUG_SESSION 0x006b
Wei Liu86b5ec32021-02-03 15:04:28 +0000155#define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076
Wei Liu466a9c32021-02-03 15:04:33 +0000156#define HVCALL_MAP_DEVICE_INTERRUPT 0x007c
157#define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d
Michael Kelleyc55a8442020-04-22 12:57:36 -0700158#define HVCALL_RETARGET_INTERRUPT 0x007e
159#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
160#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
Tianyu Lan810a5212021-10-25 08:21:08 -0400161#define HVCALL_MODIFY_SPARSE_GPA_PAGE_HOST_VISIBILITY 0x00db
Michael Kelleyc55a8442020-04-22 12:57:36 -0700162
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +0000163/* Extended hypercalls */
164#define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001
165#define HV_EXT_CALL_MEMORY_HEAT_HINT 0x8003
166
Michael Kelleyc55a8442020-04-22 12:57:36 -0700167#define HV_FLUSH_ALL_PROCESSORS BIT(0)
168#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
169#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
170#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3)
171
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +0000172/* Extended capability bits */
173#define HV_EXT_CAPABILITY_MEMORY_COLD_DISCARD_HINT BIT(8)
174
Michael Kelleyc55a8442020-04-22 12:57:36 -0700175enum HV_GENERIC_SET_FORMAT {
176 HV_GENERIC_SET_SPARSE_4K,
177 HV_GENERIC_SET_ALL,
178};
179
180#define HV_PARTITION_ID_SELF ((u64)-1)
181#define HV_VP_INDEX_SELF ((u32)-2)
182
183#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
184#define HV_HYPERCALL_FAST_BIT BIT(16)
185#define HV_HYPERCALL_VARHEAD_OFFSET 17
186#define HV_HYPERCALL_REP_COMP_OFFSET 32
187#define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32)
188#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
189#define HV_HYPERCALL_REP_START_OFFSET 48
190#define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
191
192/* hypercall status code */
193#define HV_STATUS_SUCCESS 0
194#define HV_STATUS_INVALID_HYPERCALL_CODE 2
195#define HV_STATUS_INVALID_HYPERCALL_INPUT 3
196#define HV_STATUS_INVALID_ALIGNMENT 4
197#define HV_STATUS_INVALID_PARAMETER 5
Vitaly Kuznetsovf15cdce2021-05-21 11:51:35 +0200198#define HV_STATUS_ACCESS_DENIED 6
Linus Torvalds039aeb92020-06-03 15:13:47 -0700199#define HV_STATUS_OPERATION_DENIED 8
Michael Kelleyc55a8442020-04-22 12:57:36 -0700200#define HV_STATUS_INSUFFICIENT_MEMORY 11
201#define HV_STATUS_INVALID_PORT_ID 17
202#define HV_STATUS_INVALID_CONNECTION_ID 18
203#define HV_STATUS_INSUFFICIENT_BUFFERS 19
204
205/*
206 * The Hyper-V TimeRefCount register and the TSC
207 * page provide a guest VM clock with 100ns tick rate
208 */
209#define HV_CLOCK_HZ (NSEC_PER_SEC/100)
210
211/* Define the number of synthetic interrupt sources. */
212#define HV_SYNIC_SINT_COUNT (16)
213/* Define the expected SynIC version. */
214#define HV_SYNIC_VERSION_1 (0x1)
215/* Valid SynIC vectors are 16-255. */
216#define HV_SYNIC_FIRST_VALID_VECTOR (16)
217
218#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
219#define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
220#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
221#define HV_SYNIC_SINT_MASKED (1ULL << 16)
222#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
223#define HV_SYNIC_SINT_VECTOR_MASK (0xFF)
224
225#define HV_SYNIC_STIMER_COUNT (4)
226
227/* Define synthetic interrupt controller message constants. */
228#define HV_MESSAGE_SIZE (256)
229#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240)
230#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
231
Michael Kelley5e4e6dd2021-03-02 13:38:14 -0800232/*
233 * Define hypervisor message types. Some of the message types
234 * are x86/x64 specific, but there's no good way to separate
235 * them out into the arch-specific version of hyperv-tlfs.h
236 * because C doesn't provide a way to extend enum types.
237 * Keeping them all in the arch neutral hyperv-tlfs.h seems
238 * the least messy compromise.
239 */
240enum hv_message_type {
241 HVMSG_NONE = 0x00000000,
242
243 /* Memory access messages. */
244 HVMSG_UNMAPPED_GPA = 0x80000000,
245 HVMSG_GPA_INTERCEPT = 0x80000001,
246
247 /* Timer notification messages. */
248 HVMSG_TIMER_EXPIRED = 0x80000010,
249
250 /* Error messages. */
251 HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
252 HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
253 HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
254
255 /* Trace buffer complete messages. */
256 HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
257
258 /* Platform-specific processor intercept messages. */
259 HVMSG_X64_IOPORT_INTERCEPT = 0x80010000,
260 HVMSG_X64_MSR_INTERCEPT = 0x80010001,
261 HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
262 HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
263 HVMSG_X64_APIC_EOI = 0x80010004,
264 HVMSG_X64_LEGACY_FP_ERROR = 0x80010005
265};
266
Michael Kelleyc55a8442020-04-22 12:57:36 -0700267/* Define synthetic interrupt controller message flags. */
268union hv_message_flags {
269 __u8 asu8;
270 struct {
271 __u8 msg_pending:1;
272 __u8 reserved:7;
273 } __packed;
274};
275
276/* Define port identifier type. */
277union hv_port_id {
278 __u32 asu32;
279 struct {
280 __u32 id:24;
281 __u32 reserved:8;
282 } __packed u;
283};
284
285/* Define synthetic interrupt controller message header. */
286struct hv_message_header {
287 __u32 message_type;
288 __u8 payload_size;
289 union hv_message_flags message_flags;
290 __u8 reserved[2];
291 union {
292 __u64 sender;
293 union hv_port_id port;
294 };
295} __packed;
296
297/* Define synthetic interrupt controller message format. */
298struct hv_message {
299 struct hv_message_header header;
300 union {
301 __u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
302 } u;
303} __packed;
304
305/* Define the synthetic interrupt message page layout. */
306struct hv_message_page {
307 struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
308} __packed;
309
310/* Define timer message payload structure. */
311struct hv_timer_message_payload {
312 __u32 timer_index;
313 __u32 reserved;
314 __u64 expiration_time; /* When the timer expired */
315 __u64 delivery_time; /* When the message was delivered */
316} __packed;
317
318
319/* Define synthetic interrupt controller flag constants. */
320#define HV_EVENT_FLAGS_COUNT (256 * 8)
321#define HV_EVENT_FLAGS_LONG_COUNT (256 / sizeof(unsigned long))
322
323/*
324 * Synthetic timer configuration.
325 */
326union hv_stimer_config {
327 u64 as_uint64;
328 struct {
329 u64 enable:1;
330 u64 periodic:1;
331 u64 lazy:1;
332 u64 auto_enable:1;
333 u64 apic_vector:8;
334 u64 direct_mode:1;
335 u64 reserved_z0:3;
336 u64 sintx:4;
337 u64 reserved_z1:44;
338 } __packed;
339};
340
341
342/* Define the synthetic interrupt controller event flags format. */
343union hv_synic_event_flags {
344 unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT];
345};
346
347/* Define SynIC control register. */
348union hv_synic_scontrol {
349 u64 as_uint64;
350 struct {
351 u64 enable:1;
352 u64 reserved:63;
353 } __packed;
354};
355
356/* Define synthetic interrupt source. */
357union hv_synic_sint {
358 u64 as_uint64;
359 struct {
360 u64 vector:8;
361 u64 reserved1:8;
362 u64 masked:1;
363 u64 auto_eoi:1;
364 u64 polling:1;
365 u64 reserved2:45;
366 } __packed;
367};
368
369/* Define the format of the SIMP register */
370union hv_synic_simp {
371 u64 as_uint64;
372 struct {
373 u64 simp_enabled:1;
374 u64 preserved:11;
375 u64 base_simp_gpa:52;
376 } __packed;
377};
378
379/* Define the format of the SIEFP register */
380union hv_synic_siefp {
381 u64 as_uint64;
382 struct {
383 u64 siefp_enabled:1;
384 u64 preserved:11;
385 u64 base_siefp_gpa:52;
386 } __packed;
387};
388
389struct hv_vpset {
390 u64 format;
391 u64 valid_bank_mask;
392 u64 bank_contents[];
393} __packed;
394
395/* HvCallSendSyntheticClusterIpi hypercall */
396struct hv_send_ipi {
397 u32 vector;
398 u32 reserved;
399 u64 cpu_mask;
400} __packed;
401
402/* HvCallSendSyntheticClusterIpiEx hypercall */
403struct hv_send_ipi_ex {
404 u32 vector;
405 u32 reserved;
406 struct hv_vpset vp_set;
407} __packed;
408
409/* HvFlushGuestPhysicalAddressSpace hypercalls */
410struct hv_guest_mapping_flush {
411 u64 address_space;
412 u64 flags;
413} __packed;
414
415/*
416 * HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited
417 * by the bitwidth of "additional_pages" in union hv_gpa_page_range.
418 */
419#define HV_MAX_FLUSH_PAGES (2048)
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +0000420#define HV_GPA_PAGE_RANGE_PAGE_SIZE_2MB 0
421#define HV_GPA_PAGE_RANGE_PAGE_SIZE_1GB 1
Michael Kelleyc55a8442020-04-22 12:57:36 -0700422
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +0000423/* HvFlushGuestPhysicalAddressList, HvExtCallMemoryHeatHint hypercall */
Michael Kelleyc55a8442020-04-22 12:57:36 -0700424union hv_gpa_page_range {
425 u64 address_space;
426 struct {
427 u64 additional_pages:11;
428 u64 largepage:1;
429 u64 basepfn:52;
430 } page;
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +0000431 struct {
432 u64 reserved:12;
433 u64 page_size:1;
434 u64 reserved1:8;
435 u64 base_large_pfn:43;
436 };
Michael Kelleyc55a8442020-04-22 12:57:36 -0700437};
438
439/*
440 * All input flush parameters should be in single page. The max flush
441 * count is equal with how many entries of union hv_gpa_page_range can
442 * be populated into the input parameter page.
443 */
444#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \
445 sizeof(union hv_gpa_page_range))
446
447struct hv_guest_mapping_flush_list {
448 u64 address_space;
449 u64 flags;
450 union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
451};
452
453/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
454struct hv_tlb_flush {
455 u64 address_space;
456 u64 flags;
457 u64 processor_mask;
458 u64 gva_list[];
459} __packed;
460
461/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
462struct hv_tlb_flush_ex {
463 u64 address_space;
464 u64 flags;
465 struct hv_vpset hv_vp_set;
466 u64 gva_list[];
467} __packed;
468
Wei Liu99a0f462021-02-03 15:04:25 +0000469/* HvGetPartitionId hypercall (output only) */
470struct hv_get_partition_id {
471 u64 partition_id;
472} __packed;
473
Wei Liu86b5ec32021-02-03 15:04:28 +0000474/* HvDepositMemory hypercall */
475struct hv_deposit_memory {
476 u64 partition_id;
477 u64 gpa_page_list[];
478} __packed;
479
480struct hv_proximity_domain_flags {
481 u32 proximity_preferred : 1;
482 u32 reserved : 30;
483 u32 proximity_info_valid : 1;
484} __packed;
485
486/* Not a union in windows but useful for zeroing */
487union hv_proximity_domain_info {
488 struct {
489 u32 domain_id;
490 struct hv_proximity_domain_flags flags;
491 };
492 u64 as_uint64;
493} __packed;
494
495struct hv_lp_startup_status {
496 u64 hv_status;
497 u64 substatus1;
498 u64 substatus2;
499 u64 substatus3;
500 u64 substatus4;
501 u64 substatus5;
502 u64 substatus6;
503} __packed;
504
505/* HvAddLogicalProcessor hypercall */
506struct hv_add_logical_processor_in {
507 u32 lp_index;
508 u32 apic_id;
509 union hv_proximity_domain_info proximity_domain_info;
510 u64 flags;
511} __packed;
512
513struct hv_add_logical_processor_out {
514 struct hv_lp_startup_status startup_status;
515} __packed;
516
517enum HV_SUBNODE_TYPE
518{
519 HvSubnodeAny = 0,
520 HvSubnodeSocket = 1,
521 HvSubnodeAmdNode = 2,
522 HvSubnodeL3 = 3,
523 HvSubnodeCount = 4,
524 HvSubnodeInvalid = -1
525};
526
527/* HvCreateVp hypercall */
528struct hv_create_vp {
529 u64 partition_id;
530 u32 vp_index;
531 u8 padding[3];
532 u8 subnode_type;
533 u64 subnode_id;
534 union hv_proximity_domain_info proximity_domain_info;
535 u64 flags;
536} __packed;
537
Wei Liub59fb7b2021-02-03 15:04:31 +0000538enum hv_interrupt_source {
539 HV_INTERRUPT_SOURCE_MSI = 1, /* MSI and MSI-X */
540 HV_INTERRUPT_SOURCE_IOAPIC,
541};
542
Wei Liud589ae62021-02-03 15:04:30 +0000543union hv_msi_address_register {
544 u32 as_uint32;
545 struct {
546 u32 reserved1:2;
547 u32 destination_mode:1;
548 u32 redirection_hint:1;
549 u32 reserved2:8;
550 u32 destination_id:8;
551 u32 msi_base:12;
552 };
553} __packed;
554
555union hv_msi_data_register {
556 u32 as_uint32;
557 struct {
558 u32 vector:8;
559 u32 delivery_mode:3;
560 u32 reserved1:3;
561 u32 level_assert:1;
562 u32 trigger_mode:1;
563 u32 reserved2:16;
564 };
565} __packed;
566
Michael Kelleyc55a8442020-04-22 12:57:36 -0700567/* HvRetargetDeviceInterrupt hypercall */
568union hv_msi_entry {
569 u64 as_uint64;
570 struct {
Wei Liud589ae62021-02-03 15:04:30 +0000571 union hv_msi_address_register address;
572 union hv_msi_data_register data;
Michael Kelleyc55a8442020-04-22 12:57:36 -0700573 } __packed;
574};
575
Wei Liub59fb7b2021-02-03 15:04:31 +0000576union hv_ioapic_rte {
577 u64 as_uint64;
578
579 struct {
580 u32 vector:8;
581 u32 delivery_mode:3;
582 u32 destination_mode:1;
583 u32 delivery_status:1;
584 u32 interrupt_polarity:1;
585 u32 remote_irr:1;
586 u32 trigger_mode:1;
587 u32 interrupt_mask:1;
588 u32 reserved1:15;
589
590 u32 reserved2:24;
591 u32 destination_id:8;
592 };
593
594 struct {
595 u32 low_uint32;
596 u32 high_uint32;
597 };
598} __packed;
599
Michael Kelleyc55a8442020-04-22 12:57:36 -0700600struct hv_interrupt_entry {
Wei Liub59fb7b2021-02-03 15:04:31 +0000601 u32 source;
Michael Kelleyc55a8442020-04-22 12:57:36 -0700602 u32 reserved1;
Wei Liub59fb7b2021-02-03 15:04:31 +0000603 union {
604 union hv_msi_entry msi_entry;
605 union hv_ioapic_rte ioapic_rte;
606 };
Michael Kelleyc55a8442020-04-22 12:57:36 -0700607} __packed;
608
609/*
610 * flags for hv_device_interrupt_target.flags
611 */
612#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
613#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
614
615struct hv_device_interrupt_target {
616 u32 vector;
617 u32 flags;
618 union {
619 u64 vp_mask;
620 struct hv_vpset vp_set;
621 };
622} __packed;
623
624struct hv_retarget_device_interrupt {
625 u64 partition_id; /* use "self" */
626 u64 device_id;
627 struct hv_interrupt_entry int_entry;
628 u64 reserved2;
629 struct hv_device_interrupt_target int_target;
630} __packed __aligned(8);
631
Michael Kelley88b42da2020-04-22 12:57:37 -0700632
633/* HvGetVpRegisters hypercall input with variable size reg name list*/
634struct hv_get_vp_registers_input {
635 struct {
636 u64 partitionid;
637 u32 vpindex;
638 u8 inputvtl;
639 u8 padding[3];
640 } header;
641 struct input {
642 u32 name0;
643 u32 name1;
644 } element[];
645} __packed;
646
647
648/* HvGetVpRegisters returns an array of these output elements */
649struct hv_get_vp_registers_output {
650 union {
651 struct {
652 u32 a;
653 u32 b;
654 u32 c;
655 u32 d;
656 } as32 __packed;
657 struct {
658 u64 low;
659 u64 high;
660 } as64 __packed;
661 };
662};
663
664/* HvSetVpRegisters hypercall with variable size reg name/value list*/
665struct hv_set_vp_registers_input {
666 struct {
667 u64 partitionid;
668 u32 vpindex;
669 u8 inputvtl;
670 u8 padding[3];
671 } header;
672 struct {
673 u32 name;
674 u32 padding1;
675 u64 padding2;
676 u64 valuelow;
677 u64 valuehigh;
678 } element[];
679} __packed;
680
Wei Liu12434e52021-02-03 15:04:32 +0000681enum hv_device_type {
682 HV_DEVICE_TYPE_LOGICAL = 0,
683 HV_DEVICE_TYPE_PCI = 1,
684 HV_DEVICE_TYPE_IOAPIC = 2,
685 HV_DEVICE_TYPE_ACPI = 3,
686};
687
688typedef u16 hv_pci_rid;
689typedef u16 hv_pci_segment;
690typedef u64 hv_logical_device_id;
691union hv_pci_bdf {
692 u16 as_uint16;
693
694 struct {
695 u8 function:3;
696 u8 device:5;
697 u8 bus;
698 };
699} __packed;
700
701union hv_pci_bus_range {
702 u16 as_uint16;
703
704 struct {
705 u8 subordinate_bus;
706 u8 secondary_bus;
707 };
708} __packed;
709
710union hv_device_id {
711 u64 as_uint64;
712
713 struct {
714 u64 reserved0:62;
715 u64 device_type:2;
716 };
717
718 /* HV_DEVICE_TYPE_LOGICAL */
719 struct {
720 u64 id:62;
721 u64 device_type:2;
722 } logical;
723
724 /* HV_DEVICE_TYPE_PCI */
725 struct {
726 union {
727 hv_pci_rid rid;
728 union hv_pci_bdf bdf;
729 };
730
731 hv_pci_segment segment;
732 union hv_pci_bus_range shadow_bus_range;
733
734 u16 phantom_function_bits:2;
735 u16 source_shadow:1;
736
737 u16 rsvdz0:11;
738 u16 device_type:2;
739 } pci;
740
741 /* HV_DEVICE_TYPE_IOAPIC */
742 struct {
743 u8 ioapic_id;
744 u8 rsvdz0;
745 u16 rsvdz1;
746 u16 rsvdz2;
747
748 u16 rsvdz3:14;
749 u16 device_type:2;
750 } ioapic;
751
752 /* HV_DEVICE_TYPE_ACPI */
753 struct {
754 u32 input_mapping_base;
755 u32 input_mapping_count:30;
756 u32 device_type:2;
757 } acpi;
758} __packed;
759
Wei Liu466a9c32021-02-03 15:04:33 +0000760enum hv_interrupt_trigger_mode {
761 HV_INTERRUPT_TRIGGER_MODE_EDGE = 0,
762 HV_INTERRUPT_TRIGGER_MODE_LEVEL = 1,
763};
764
765struct hv_device_interrupt_descriptor {
766 u32 interrupt_type;
767 u32 trigger_mode;
768 u32 vector_count;
769 u32 reserved;
770 struct hv_device_interrupt_target target;
771} __packed;
772
773struct hv_input_map_device_interrupt {
774 u64 partition_id;
775 u64 device_id;
776 u64 flags;
777 struct hv_interrupt_entry logical_interrupt_entry;
778 struct hv_device_interrupt_descriptor interrupt_descriptor;
779} __packed;
780
781struct hv_output_map_device_interrupt {
782 struct hv_interrupt_entry interrupt_entry;
783} __packed;
784
785struct hv_input_unmap_device_interrupt {
786 u64 partition_id;
787 u64 device_id;
788 struct hv_interrupt_entry interrupt_entry;
789} __packed;
790
791#define HV_SOURCE_SHADOW_NONE 0x0
792#define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE 0x1
793
Sunil Muthuswamy6dc2a772021-03-23 18:47:16 +0000794/*
795 * The whole argument should fit in a page to be able to pass to the hypervisor
796 * in one hypercall.
797 */
798#define HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES \
799 ((HV_HYP_PAGE_SIZE - sizeof(struct hv_memory_hint)) / \
800 sizeof(union hv_gpa_page_range))
801
802/* HvExtCallMemoryHeatHint hypercall */
803#define HV_EXT_MEMORY_HEAT_HINT_TYPE_COLD_DISCARD 2
804struct hv_memory_hint {
805 u64 type:2;
806 u64 reserved:62;
807 union hv_gpa_page_range ranges[];
808} __packed;
809
Michael Kelleyc55a8442020-04-22 12:57:36 -0700810#endif