Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 2 | * arch/blackfin/kernel/time.c |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 3 | * |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 4 | * This file contains the Blackfin-specific time handling details. |
| 5 | * Most of the stuff is located in the machine specific files. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 6 | * |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 7 | * Copyright 2004-2008 Analog Devices Inc. |
| 8 | * Licensed under the GPL-2 or later. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/profile.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/time.h> |
| 15 | #include <linux/irq.h> |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 16 | #include <linux/delay.h> |
Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 17 | #include <linux/sched.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 18 | |
| 19 | #include <asm/blackfin.h> |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 20 | #include <asm/time.h> |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 21 | #include <asm/gptimers.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 22 | |
| 23 | /* This is an NTP setting */ |
| 24 | #define TICK_SIZE (tick_nsec / 1000) |
| 25 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 26 | static struct irqaction bfin_timer_irq = { |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 27 | .name = "Blackfin Timer Tick", |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 28 | }; |
| 29 | |
Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 30 | #if defined(CONFIG_IPIPE) |
Mike Frysinger | a1ee74c | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 31 | void __init setup_system_timer0(void) |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 32 | { |
| 33 | /* Power down the core timer, just to play safe. */ |
| 34 | bfin_write_TCNTL(0); |
| 35 | |
| 36 | disable_gptimers(TIMER0bit); |
| 37 | set_gptimer_status(0, TIMER_STATUS_TRUN0); |
| 38 | while (get_gptimer_status(0) & TIMER_STATUS_TRUN0) |
| 39 | udelay(10); |
| 40 | |
| 41 | set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */ |
| 42 | set_gptimer_period(TIMER0_id, get_sclk() / HZ); |
| 43 | set_gptimer_pwidth(TIMER0_id, 1); |
| 44 | SSYNC(); |
| 45 | enable_gptimers(TIMER0bit); |
| 46 | } |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 47 | #else |
Mike Frysinger | a1ee74c | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 48 | void __init setup_core_timer(void) |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 49 | { |
| 50 | u32 tcount; |
| 51 | |
| 52 | /* power up the timer, but don't enable it just yet */ |
Mike Frysinger | 072a5cf | 2011-05-29 23:11:42 -0400 | [diff] [blame] | 53 | bfin_write_TCNTL(TMPWR); |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 54 | CSYNC(); |
| 55 | |
| 56 | /* the TSCALE prescaler counter */ |
| 57 | bfin_write_TSCALE(TIME_SCALE - 1); |
| 58 | |
| 59 | tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); |
| 60 | bfin_write_TPERIOD(tcount); |
| 61 | bfin_write_TCOUNT(tcount); |
| 62 | |
| 63 | /* now enable the timer */ |
| 64 | CSYNC(); |
| 65 | |
Mike Frysinger | 072a5cf | 2011-05-29 23:11:42 -0400 | [diff] [blame] | 66 | bfin_write_TCNTL(TAUTORLD | TMREN | TMPWR); |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 67 | } |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 68 | #endif |
| 69 | |
Mike Frysinger | a1ee74c | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 70 | static void __init |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 71 | time_sched_init(irqreturn_t(*timer_routine) (int, void *)) |
| 72 | { |
Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 73 | #if defined(CONFIG_IPIPE) |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 74 | setup_system_timer0(); |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 75 | bfin_timer_irq.handler = timer_routine; |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 76 | setup_irq(IRQ_TIMER0, &bfin_timer_irq); |
| 77 | #else |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 78 | setup_core_timer(); |
| 79 | bfin_timer_irq.handler = timer_routine; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 80 | setup_irq(IRQ_CORETMR, &bfin_timer_irq); |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 81 | #endif |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 82 | } |
| 83 | |
john stultz | 10f03f1 | 2009-09-15 21:17:19 -0700 | [diff] [blame] | 84 | #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 85 | /* |
| 86 | * Should return useconds since last timer tick |
| 87 | */ |
Stephen Warren | 7b1f620 | 2012-11-07 17:58:54 -0700 | [diff] [blame] | 88 | static u32 blackfin_gettimeoffset(void) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 89 | { |
| 90 | unsigned long offset; |
| 91 | unsigned long clocks_per_jiffy; |
| 92 | |
Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 93 | #if defined(CONFIG_IPIPE) |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 94 | clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); |
| 95 | offset = bfin_read_TIMER0_COUNTER() / \ |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 96 | (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); |
| 97 | |
| 98 | if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2)) |
| 99 | offset += (USEC_PER_SEC / HZ); |
| 100 | #else |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 101 | clocks_per_jiffy = bfin_read_TPERIOD(); |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 102 | offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \ |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 103 | (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 104 | |
| 105 | /* Check if we just wrapped the counters and maybe missed a tick */ |
| 106 | if ((bfin_read_ILAT() & (1 << IRQ_CORETMR)) |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 107 | && (offset < (100000 / HZ / 2))) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 108 | offset += (USEC_PER_SEC / HZ); |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 109 | #endif |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 110 | return offset; |
| 111 | } |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 112 | #endif |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 113 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 114 | /* |
| 115 | * timer_interrupt() needs to keep up the real-time clock, |
Torben Hohn | 4196b89 | 2011-01-27 15:59:31 +0100 | [diff] [blame] | 116 | * as well as call the "xtime_update()" routine every clocktick |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 117 | */ |
| 118 | #ifdef CONFIG_CORE_TIMER_IRQ_L1 |
Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 119 | __attribute__((l1_text)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 120 | #endif |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 121 | irqreturn_t timer_interrupt(int irq, void *dummy) |
| 122 | { |
Torben Hohn | 4196b89 | 2011-01-27 15:59:31 +0100 | [diff] [blame] | 123 | xtime_update(1); |
Peter Zijlstra | aa02cd2 | 2008-02-13 21:33:16 +0100 | [diff] [blame] | 124 | |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 125 | #ifdef CONFIG_IPIPE |
| 126 | update_root_process_times(get_irq_regs()); |
| 127 | #else |
Peter Zijlstra | aa02cd2 | 2008-02-13 21:33:16 +0100 | [diff] [blame] | 128 | update_process_times(user_mode(get_irq_regs())); |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 129 | #endif |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 130 | profile_tick(CPU_PROFILING); |
Peter Zijlstra | aa02cd2 | 2008-02-13 21:33:16 +0100 | [diff] [blame] | 131 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 132 | return IRQ_HANDLED; |
| 133 | } |
| 134 | |
John Stultz | cb0e996 | 2010-03-03 19:57:24 -0800 | [diff] [blame] | 135 | void read_persistent_clock(struct timespec *ts) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 136 | { |
| 137 | time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ |
John Stultz | cb0e996 | 2010-03-03 19:57:24 -0800 | [diff] [blame] | 138 | ts->tv_sec = secs_since_1970; |
| 139 | ts->tv_nsec = 0; |
| 140 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 141 | |
John Stultz | cb0e996 | 2010-03-03 19:57:24 -0800 | [diff] [blame] | 142 | void __init time_init(void) |
| 143 | { |
Stephen Warren | 7b1f620 | 2012-11-07 17:58:54 -0700 | [diff] [blame] | 144 | #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET |
| 145 | arch_gettimeoffset = blackfin_gettimeoffset; |
| 146 | #endif |
| 147 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 148 | #ifdef CONFIG_RTC_DRV_BFIN |
| 149 | /* [#2663] hack to filter junk RTC values that would cause |
| 150 | * userspace to have to deal with time values greater than |
| 151 | * 2^31 seconds (which uClibc cannot cope with yet) |
| 152 | */ |
| 153 | if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) { |
| 154 | printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n"); |
| 155 | bfin_write_RTC_STAT(0); |
| 156 | } |
| 157 | #endif |
| 158 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 159 | time_sched_init(timer_interrupt); |
| 160 | } |