blob: 3126b920a4a5da705162800e34ff901183479909 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Mike Frysinger1b047d82008-11-18 17:48:22 +08002 * arch/blackfin/kernel/time.c
Bryan Wu1394f032007-05-06 14:50:22 -07003 *
Mike Frysinger1b047d82008-11-18 17:48:22 +08004 * This file contains the Blackfin-specific time handling details.
5 * Most of the stuff is located in the machine specific files.
Bryan Wu1394f032007-05-06 14:50:22 -07006 *
Mike Frysinger1b047d82008-11-18 17:48:22 +08007 * Copyright 2004-2008 Analog Devices Inc.
8 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07009 */
10
11#include <linux/module.h>
12#include <linux/profile.h>
13#include <linux/interrupt.h>
14#include <linux/time.h>
15#include <linux/irq.h>
Graf Yang8f658732008-11-18 17:48:22 +080016#include <linux/delay.h>
Alexey Dobriyand43c36d2009-10-07 17:09:06 +040017#include <linux/sched.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018
19#include <asm/blackfin.h>
Michael Henneriche6c91b62008-04-25 04:58:29 +080020#include <asm/time.h>
Graf Yang8f658732008-11-18 17:48:22 +080021#include <asm/gptimers.h>
Bryan Wu1394f032007-05-06 14:50:22 -070022
23/* This is an NTP setting */
24#define TICK_SIZE (tick_nsec / 1000)
25
Bryan Wu1394f032007-05-06 14:50:22 -070026static struct irqaction bfin_timer_irq = {
Mike Frysinger1b047d82008-11-18 17:48:22 +080027 .name = "Blackfin Timer Tick",
Bryan Wu1394f032007-05-06 14:50:22 -070028};
29
Graf Yang9b9bfde2009-05-27 09:58:35 +000030#if defined(CONFIG_IPIPE)
Mike Frysingera1ee74c2009-01-07 23:14:38 +080031void __init setup_system_timer0(void)
Graf Yang8f658732008-11-18 17:48:22 +080032{
33 /* Power down the core timer, just to play safe. */
34 bfin_write_TCNTL(0);
35
36 disable_gptimers(TIMER0bit);
37 set_gptimer_status(0, TIMER_STATUS_TRUN0);
38 while (get_gptimer_status(0) & TIMER_STATUS_TRUN0)
39 udelay(10);
40
41 set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */
42 set_gptimer_period(TIMER0_id, get_sclk() / HZ);
43 set_gptimer_pwidth(TIMER0_id, 1);
44 SSYNC();
45 enable_gptimers(TIMER0bit);
46}
Mike Frysinger1b047d82008-11-18 17:48:22 +080047#else
Mike Frysingera1ee74c2009-01-07 23:14:38 +080048void __init setup_core_timer(void)
Mike Frysinger1b047d82008-11-18 17:48:22 +080049{
50 u32 tcount;
51
52 /* power up the timer, but don't enable it just yet */
Mike Frysinger072a5cf2011-05-29 23:11:42 -040053 bfin_write_TCNTL(TMPWR);
Mike Frysinger1b047d82008-11-18 17:48:22 +080054 CSYNC();
55
56 /* the TSCALE prescaler counter */
57 bfin_write_TSCALE(TIME_SCALE - 1);
58
59 tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
60 bfin_write_TPERIOD(tcount);
61 bfin_write_TCOUNT(tcount);
62
63 /* now enable the timer */
64 CSYNC();
65
Mike Frysinger072a5cf2011-05-29 23:11:42 -040066 bfin_write_TCNTL(TAUTORLD | TMREN | TMPWR);
Mike Frysinger1b047d82008-11-18 17:48:22 +080067}
Graf Yang8f658732008-11-18 17:48:22 +080068#endif
69
Mike Frysingera1ee74c2009-01-07 23:14:38 +080070static void __init
Graf Yang8f658732008-11-18 17:48:22 +080071time_sched_init(irqreturn_t(*timer_routine) (int, void *))
72{
Graf Yang9b9bfde2009-05-27 09:58:35 +000073#if defined(CONFIG_IPIPE)
Graf Yang8f658732008-11-18 17:48:22 +080074 setup_system_timer0();
Mike Frysinger1b047d82008-11-18 17:48:22 +080075 bfin_timer_irq.handler = timer_routine;
Graf Yang8f658732008-11-18 17:48:22 +080076 setup_irq(IRQ_TIMER0, &bfin_timer_irq);
77#else
Mike Frysinger1b047d82008-11-18 17:48:22 +080078 setup_core_timer();
79 bfin_timer_irq.handler = timer_routine;
Bryan Wu1394f032007-05-06 14:50:22 -070080 setup_irq(IRQ_CORETMR, &bfin_timer_irq);
Graf Yang8f658732008-11-18 17:48:22 +080081#endif
Bryan Wu1394f032007-05-06 14:50:22 -070082}
83
john stultz10f03f12009-09-15 21:17:19 -070084#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
Bryan Wu1394f032007-05-06 14:50:22 -070085/*
86 * Should return useconds since last timer tick
87 */
Stephen Warren7b1f6202012-11-07 17:58:54 -070088static u32 blackfin_gettimeoffset(void)
Bryan Wu1394f032007-05-06 14:50:22 -070089{
90 unsigned long offset;
91 unsigned long clocks_per_jiffy;
92
Graf Yang9b9bfde2009-05-27 09:58:35 +000093#if defined(CONFIG_IPIPE)
Mike Frysinger1b047d82008-11-18 17:48:22 +080094 clocks_per_jiffy = bfin_read_TIMER0_PERIOD();
95 offset = bfin_read_TIMER0_COUNTER() / \
Graf Yang8f658732008-11-18 17:48:22 +080096 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
97
98 if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2))
99 offset += (USEC_PER_SEC / HZ);
100#else
Bryan Wu1394f032007-05-06 14:50:22 -0700101 clocks_per_jiffy = bfin_read_TPERIOD();
Graf Yang8f658732008-11-18 17:48:22 +0800102 offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \
Mike Frysinger1b047d82008-11-18 17:48:22 +0800103 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
Bryan Wu1394f032007-05-06 14:50:22 -0700104
105 /* Check if we just wrapped the counters and maybe missed a tick */
106 if ((bfin_read_ILAT() & (1 << IRQ_CORETMR))
Graf Yang8f658732008-11-18 17:48:22 +0800107 && (offset < (100000 / HZ / 2)))
Bryan Wu1394f032007-05-06 14:50:22 -0700108 offset += (USEC_PER_SEC / HZ);
Graf Yang8f658732008-11-18 17:48:22 +0800109#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700110 return offset;
111}
Mike Frysinger1b047d82008-11-18 17:48:22 +0800112#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700113
Bryan Wu1394f032007-05-06 14:50:22 -0700114/*
115 * timer_interrupt() needs to keep up the real-time clock,
Torben Hohn4196b892011-01-27 15:59:31 +0100116 * as well as call the "xtime_update()" routine every clocktick
Bryan Wu1394f032007-05-06 14:50:22 -0700117 */
118#ifdef CONFIG_CORE_TIMER_IRQ_L1
Mike Frysinger1b047d82008-11-18 17:48:22 +0800119__attribute__((l1_text))
Bryan Wu1394f032007-05-06 14:50:22 -0700120#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700121irqreturn_t timer_interrupt(int irq, void *dummy)
122{
Torben Hohn4196b892011-01-27 15:59:31 +0100123 xtime_update(1);
Peter Zijlstraaa02cd22008-02-13 21:33:16 +0100124
Yi Li6a01f232009-01-07 23:14:39 +0800125#ifdef CONFIG_IPIPE
126 update_root_process_times(get_irq_regs());
127#else
Peter Zijlstraaa02cd22008-02-13 21:33:16 +0100128 update_process_times(user_mode(get_irq_regs()));
Yi Li6a01f232009-01-07 23:14:39 +0800129#endif
Graf Yang8f658732008-11-18 17:48:22 +0800130 profile_tick(CPU_PROFILING);
Peter Zijlstraaa02cd22008-02-13 21:33:16 +0100131
Bryan Wu1394f032007-05-06 14:50:22 -0700132 return IRQ_HANDLED;
133}
134
John Stultzcb0e9962010-03-03 19:57:24 -0800135void read_persistent_clock(struct timespec *ts)
Bryan Wu1394f032007-05-06 14:50:22 -0700136{
137 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
John Stultzcb0e9962010-03-03 19:57:24 -0800138 ts->tv_sec = secs_since_1970;
139 ts->tv_nsec = 0;
140}
Bryan Wu1394f032007-05-06 14:50:22 -0700141
John Stultzcb0e9962010-03-03 19:57:24 -0800142void __init time_init(void)
143{
Stephen Warren7b1f6202012-11-07 17:58:54 -0700144#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
145 arch_gettimeoffset = blackfin_gettimeoffset;
146#endif
147
Bryan Wu1394f032007-05-06 14:50:22 -0700148#ifdef CONFIG_RTC_DRV_BFIN
149 /* [#2663] hack to filter junk RTC values that would cause
150 * userspace to have to deal with time values greater than
151 * 2^31 seconds (which uClibc cannot cope with yet)
152 */
153 if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) {
154 printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n");
155 bfin_write_RTC_STAT(0);
156 }
157#endif
158
Bryan Wu1394f032007-05-06 14:50:22 -0700159 time_sched_init(timer_interrupt);
160}