blob: e66311200cbd8ae78274e7f3525d9098cec43ffe [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Dynamic DMA mapping support for AMD Hammer.
Ingo Molnar05fccb02008-01-30 13:30:12 +01003 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * Use the integrated AGP GART in the Hammer northbridge as an IOMMU for PCI.
5 * This allows to use PCI devices that only support 32bit addresses on systems
Ingo Molnar05fccb02008-01-30 13:30:12 +01006 * with more than 4GB.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
Paul Bolle395cf962011-08-15 02:02:26 +02008 * See Documentation/DMA-API-HOWTO.txt for the interface specification.
Ingo Molnar05fccb02008-01-30 13:30:12 +01009 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 * Copyright 2002 Andi Kleen, SuSE Labs.
Andi Kleenff7f3642007-10-17 18:04:37 +020011 * Subject to the GNU General Public License v2 only.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/types.h>
15#include <linux/ctype.h>
16#include <linux/agp_backend.h>
17#include <linux/init.h>
18#include <linux/mm.h>
Alexey Dobriyand43c36d2009-10-07 17:09:06 +040019#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <linux/string.h>
21#include <linux/spinlock.h>
22#include <linux/pci.h>
23#include <linux/module.h>
24#include <linux/topology.h>
25#include <linux/interrupt.h>
Akinobu Mitaa66022c2009-12-15 16:48:28 -080026#include <linux/bitmap.h>
Christoph Hellwig1eeb66a2007-05-08 00:27:03 -070027#include <linux/kdebug.h>
Jens Axboe9ee1bea2007-10-04 09:35:37 +020028#include <linux/scatterlist.h>
FUJITA Tomonorifde9a102008-02-04 22:28:11 -080029#include <linux/iommu-helper.h>
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +010030#include <linux/syscore_ops.h>
Joerg Roedel237a6222008-09-25 12:13:53 +020031#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/gfp.h>
Arun Sharma600634972011-07-26 16:09:06 -070033#include <linux/atomic.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <asm/mtrr.h>
35#include <asm/pgtable.h>
36#include <asm/proto.h>
FUJITA Tomonori46a7fa22008-07-11 10:23:42 +090037#include <asm/iommu.h>
Joerg Roedel395624f2007-10-24 12:49:47 +020038#include <asm/gart.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <asm/cacheflush.h>
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +010040#include <asm/swiotlb.h>
41#include <asm/dma.h>
Andreas Herrmann23ac4ae2010-09-17 18:03:43 +020042#include <asm/amd_nb.h>
FUJITA Tomonori338bac52009-10-27 16:34:44 +090043#include <asm/x86_init.h>
Konrad Rzeszutek Wilk22e6daf2010-08-26 13:58:03 -040044#include <asm/iommu_table.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Joerg Roedel79da0872007-10-24 12:49:49 +020046static unsigned long iommu_bus_base; /* GART remapping area (physical) */
Ingo Molnar05fccb02008-01-30 13:30:12 +010047static unsigned long iommu_size; /* size of remapping area bytes */
Linus Torvalds1da177e2005-04-16 15:20:36 -070048static unsigned long iommu_pages; /* .. and in pages */
49
Ingo Molnar05fccb02008-01-30 13:30:12 +010050static u32 *iommu_gatt_base; /* Remapping table */
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
FUJITA Tomonori42109192009-11-15 21:19:52 +090052static dma_addr_t bad_dma_addr;
53
Ingo Molnar05fccb02008-01-30 13:30:12 +010054/*
55 * If this is disabled the IOMMU will use an optimized flushing strategy
56 * of only flushing when an mapping is reused. With it true the GART is
57 * flushed for every mapping. Problem is that doing the lazy flush seems
58 * to trigger bugs with some popular PCI cards, in particular 3ware (but
59 * has been also also seen with Qlogic at least).
60 */
Jaswinder Singh Rajputc854c912008-12-29 20:38:09 +053061static int iommu_fullflush = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
Ingo Molnar05fccb02008-01-30 13:30:12 +010063/* Allocation bitmap for the remapping area: */
Linus Torvalds1da177e2005-04-16 15:20:36 -070064static DEFINE_SPINLOCK(iommu_bitmap_lock);
Ingo Molnar05fccb02008-01-30 13:30:12 +010065/* Guarded by iommu_bitmap_lock: */
66static unsigned long *iommu_gart_bitmap;
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Ingo Molnar05fccb02008-01-30 13:30:12 +010068static u32 gart_unmapped_entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
70#define GPTE_VALID 1
71#define GPTE_COHERENT 2
72#define GPTE_ENCODE(x) \
73 (((x) & 0xfffff000) | (((x) >> 32) << 4) | GPTE_VALID | GPTE_COHERENT)
74#define GPTE_DECODE(x) (((x) & 0xfffff000) | (((u64)(x) & 0xff0) << 28))
75
Ingo Molnar05fccb02008-01-30 13:30:12 +010076#define EMERGENCY_PAGES 32 /* = 128KB */
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
78#ifdef CONFIG_AGP
79#define AGPEXTERN extern
80#else
81#define AGPEXTERN
82#endif
83
Joerg Roedel665d3e22011-04-18 15:45:46 +020084/* GART can only remap to physical addresses < 1TB */
85#define GART_MAX_PHYS_ADDR (1ULL << 40)
86
Linus Torvalds1da177e2005-04-16 15:20:36 -070087/* backdoor interface to AGP driver */
88AGPEXTERN int agp_memory_reserved;
89AGPEXTERN __u32 *agp_gatt_table;
90
91static unsigned long next_bit; /* protected by iommu_bitmap_lock */
Joerg Roedel3610f212008-09-25 12:13:54 +020092static bool need_flush; /* global flush state. set for each gart wrap */
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +090094static unsigned long alloc_iommu(struct device *dev, int size,
95 unsigned long align_mask)
Ingo Molnar05fccb02008-01-30 13:30:12 +010096{
Linus Torvalds1da177e2005-04-16 15:20:36 -070097 unsigned long offset, flags;
FUJITA Tomonorifde9a102008-02-04 22:28:11 -080098 unsigned long boundary_size;
99 unsigned long base_index;
100
101 base_index = ALIGN(iommu_bus_base & dma_get_seg_boundary(dev),
102 PAGE_SIZE) >> PAGE_SHIFT;
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900103 boundary_size = ALIGN((u64)dma_get_seg_boundary(dev) + 1,
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800104 PAGE_SIZE) >> PAGE_SHIFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
Ingo Molnar05fccb02008-01-30 13:30:12 +0100106 spin_lock_irqsave(&iommu_bitmap_lock, flags);
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800107 offset = iommu_area_alloc(iommu_gart_bitmap, iommu_pages, next_bit,
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +0900108 size, base_index, boundary_size, align_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109 if (offset == -1) {
Joerg Roedel3610f212008-09-25 12:13:54 +0200110 need_flush = true;
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800111 offset = iommu_area_alloc(iommu_gart_bitmap, iommu_pages, 0,
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +0900112 size, base_index, boundary_size,
113 align_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 }
Ingo Molnar05fccb02008-01-30 13:30:12 +0100115 if (offset != -1) {
Ingo Molnar05fccb02008-01-30 13:30:12 +0100116 next_bit = offset+size;
117 if (next_bit >= iommu_pages) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 next_bit = 0;
Joerg Roedel3610f212008-09-25 12:13:54 +0200119 need_flush = true;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100120 }
121 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122 if (iommu_fullflush)
Joerg Roedel3610f212008-09-25 12:13:54 +0200123 need_flush = true;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100124 spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
125
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 return offset;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100127}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128
129static void free_iommu(unsigned long offset, int size)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100130{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 unsigned long flags;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100132
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 spin_lock_irqsave(&iommu_bitmap_lock, flags);
Akinobu Mitaa66022c2009-12-15 16:48:28 -0800134 bitmap_clear(iommu_gart_bitmap, offset, size);
Joerg Roedel70d7d352008-12-02 20:16:03 +0100135 if (offset >= next_bit)
136 next_bit = offset + size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100138}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
Ingo Molnar05fccb02008-01-30 13:30:12 +0100140/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 * Use global flush state to avoid races with multiple flushers.
142 */
Andi Kleena32073b2006-06-26 13:56:40 +0200143static void flush_gart(void)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100144{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 unsigned long flags;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 spin_lock_irqsave(&iommu_bitmap_lock, flags);
Andi Kleena32073b2006-06-26 13:56:40 +0200148 if (need_flush) {
Hans Rosenfeldeec1d4f2010-10-29 17:14:30 +0200149 amd_flush_garts();
Joerg Roedel3610f212008-09-25 12:13:54 +0200150 need_flush = false;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100151 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100153}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155#ifdef CONFIG_IOMMU_LEAK
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156/* Debugging aid for drivers that don't free their IOMMU tables */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157static int leak_trace;
Joerg Roedel79da0872007-10-24 12:49:49 +0200158static int iommu_leak_pages = 20;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100159
Joerg Roedel79da0872007-10-24 12:49:49 +0200160static void dump_leak(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161{
Ingo Molnar05fccb02008-01-30 13:30:12 +0100162 static int dump;
163
FUJITA Tomonori19c1a6f2009-04-14 09:43:19 +0900164 if (dump)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100165 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 dump = 1;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100167
FUJITA Tomonori19c1a6f2009-04-14 09:43:19 +0900168 show_stack(NULL, NULL);
169 debug_dma_dump_mappings(NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171#endif
172
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100173static void iommu_full(struct device *dev, size_t size, int dir)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174{
Ingo Molnar05fccb02008-01-30 13:30:12 +0100175 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 * Ran out of IOMMU space for this operation. This is very bad.
177 * Unfortunately the drivers cannot handle this operation properly.
Ingo Molnar05fccb02008-01-30 13:30:12 +0100178 * Return some non mapped prereserved space in the aperture and
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 * let the Northbridge deal with it. This will result in garbage
180 * in the IO operation. When the size exceeds the prereserved space
Ingo Molnar05fccb02008-01-30 13:30:12 +0100181 * memory corruption will occur or random memory will be DMAed
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 * out. Hopefully no network devices use single mappings that big.
Ingo Molnar05fccb02008-01-30 13:30:12 +0100183 */
184
Greg Kroah-Hartmanfc3a8822008-05-02 06:02:41 +0200185 dev_err(dev, "PCI-DMA: Out of IOMMU space for %lu bytes\n", size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100187 if (size > PAGE_SIZE*EMERGENCY_PAGES) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL)
189 panic("PCI-DMA: Memory would be corrupted\n");
Ingo Molnar05fccb02008-01-30 13:30:12 +0100190 if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL)
191 panic(KERN_ERR
192 "PCI-DMA: Random memory would be DMAed\n");
193 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194#ifdef CONFIG_IOMMU_LEAK
Ingo Molnar05fccb02008-01-30 13:30:12 +0100195 dump_leak();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197}
198
Ingo Molnar05fccb02008-01-30 13:30:12 +0100199static inline int
200need_iommu(struct device *dev, unsigned long addr, size_t size)
201{
FUJITA Tomonoria4c2baa2009-07-10 10:04:55 +0900202 return force_iommu || !dma_capable(dev, addr, size);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100203}
204
205static inline int
206nonforced_iommu(struct device *dev, unsigned long addr, size_t size)
207{
FUJITA Tomonoria4c2baa2009-07-10 10:04:55 +0900208 return !dma_capable(dev, addr, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209}
210
211/* Map a single continuous physical area into the IOMMU.
212 * Caller needs to check if the iommu is needed and flush.
213 */
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100214static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +0900215 size_t size, int dir, unsigned long align_mask)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100216{
Joerg Roedel1477b8e2008-10-15 22:02:11 -0700217 unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE);
Joerg Roedel665d3e22011-04-18 15:45:46 +0200218 unsigned long iommu_page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 int i;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100220
Joerg Roedel665d3e22011-04-18 15:45:46 +0200221 if (unlikely(phys_mem + size > GART_MAX_PHYS_ADDR))
222 return bad_dma_addr;
223
224 iommu_page = alloc_iommu(dev, npages, align_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 if (iommu_page == -1) {
226 if (!nonforced_iommu(dev, phys_mem, size))
Ingo Molnar05fccb02008-01-30 13:30:12 +0100227 return phys_mem;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228 if (panic_on_overflow)
229 panic("dma_map_area overflow %lu bytes\n", size);
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100230 iommu_full(dev, size, dir);
FUJITA Tomonori42109192009-11-15 21:19:52 +0900231 return bad_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232 }
233
234 for (i = 0; i < npages; i++) {
235 iommu_gatt_base[iommu_page + i] = GPTE_ENCODE(phys_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 phys_mem += PAGE_SIZE;
237 }
238 return iommu_bus_base + iommu_page*PAGE_SIZE + (phys_mem & ~PAGE_MASK);
239}
240
241/* Map a single area into the IOMMU */
FUJITA Tomonori052aedb2009-01-05 23:47:23 +0900242static dma_addr_t gart_map_page(struct device *dev, struct page *page,
243 unsigned long offset, size_t size,
244 enum dma_data_direction dir,
245 struct dma_attrs *attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246{
Ingo Molnar2be62142008-04-19 19:19:56 +0200247 unsigned long bus;
FUJITA Tomonori052aedb2009-01-05 23:47:23 +0900248 phys_addr_t paddr = page_to_phys(page) + offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 if (!dev)
Joerg Roedel6c505ce2008-08-19 16:32:45 +0200251 dev = &x86_dma_fallback_dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252
Ingo Molnar2be62142008-04-19 19:19:56 +0200253 if (!need_iommu(dev, paddr, size))
254 return paddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +0900256 bus = dma_map_area(dev, paddr, size, dir, 0);
257 flush_gart();
Ingo Molnar05fccb02008-01-30 13:30:12 +0100258
259 return bus;
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100260}
261
262/*
Jon Mason7c2d9cd2006-06-26 13:56:37 +0200263 * Free a DMA mapping.
264 */
FUJITA Tomonori052aedb2009-01-05 23:47:23 +0900265static void gart_unmap_page(struct device *dev, dma_addr_t dma_addr,
266 size_t size, enum dma_data_direction dir,
267 struct dma_attrs *attrs)
Jon Mason7c2d9cd2006-06-26 13:56:37 +0200268{
269 unsigned long iommu_page;
270 int npages;
271 int i;
272
273 if (dma_addr < iommu_bus_base + EMERGENCY_PAGES*PAGE_SIZE ||
274 dma_addr >= iommu_bus_base + iommu_size)
275 return;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100276
Jon Mason7c2d9cd2006-06-26 13:56:37 +0200277 iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT;
Joerg Roedel1477b8e2008-10-15 22:02:11 -0700278 npages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
Jon Mason7c2d9cd2006-06-26 13:56:37 +0200279 for (i = 0; i < npages; i++) {
280 iommu_gatt_base[iommu_page + i] = gart_unmapped_entry;
Jon Mason7c2d9cd2006-06-26 13:56:37 +0200281 }
282 free_iommu(iommu_page, npages);
283}
284
285/*
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100286 * Wrapper for pci_unmap_single working with scatterlists.
287 */
FUJITA Tomonori160c1d82009-01-05 23:59:02 +0900288static void gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
289 enum dma_data_direction dir, struct dma_attrs *attrs)
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100290{
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200291 struct scatterlist *s;
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100292 int i;
293
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200294 for_each_sg(sg, s, nents, i) {
Jon Mason60b08c62006-02-26 04:18:22 +0100295 if (!s->dma_length || !s->length)
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100296 break;
FUJITA Tomonorid7dff842009-01-05 23:47:28 +0900297 gart_unmap_page(dev, s->dma_address, s->dma_length, dir, NULL);
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100298 }
299}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300
301/* Fallback for dma_map_sg in case of overflow */
302static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
303 int nents, int dir)
304{
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200305 struct scatterlist *s;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306 int i;
307
308#ifdef CONFIG_IOMMU_DEBUG
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900309 pr_debug("dma_map_sg overflow\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310#endif
311
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200312 for_each_sg(sg, s, nents, i) {
Jens Axboe58b053e2007-10-22 20:02:46 +0200313 unsigned long addr = sg_phys(s);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100314
315 if (nonforced_iommu(dev, addr, s->length)) {
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +0900316 addr = dma_map_area(dev, addr, s->length, dir, 0);
FUJITA Tomonori42109192009-11-15 21:19:52 +0900317 if (addr == bad_dma_addr) {
Ingo Molnar05fccb02008-01-30 13:30:12 +0100318 if (i > 0)
FUJITA Tomonori160c1d82009-01-05 23:59:02 +0900319 gart_unmap_sg(dev, sg, i, dir, NULL);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100320 nents = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 sg[0].dma_length = 0;
322 break;
323 }
324 }
325 s->dma_address = addr;
326 s->dma_length = s->length;
327 }
Andi Kleena32073b2006-06-26 13:56:40 +0200328 flush_gart();
Ingo Molnar05fccb02008-01-30 13:30:12 +0100329
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 return nents;
331}
332
333/* Map multiple scatterlist entries continuous into the first. */
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800334static int __dma_map_cont(struct device *dev, struct scatterlist *start,
335 int nelems, struct scatterlist *sout,
336 unsigned long pages)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337{
FUJITA Tomonori7b22ff52008-08-18 00:36:18 +0900338 unsigned long iommu_start = alloc_iommu(dev, pages, 0);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100339 unsigned long iommu_page = iommu_start;
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200340 struct scatterlist *s;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341 int i;
342
343 if (iommu_start == -1)
344 return -1;
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200345
346 for_each_sg(start, s, nelems, i) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 unsigned long pages, addr;
348 unsigned long phys_addr = s->dma_address;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100349
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200350 BUG_ON(s != start && s->offset);
351 if (s == start) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352 sout->dma_address = iommu_bus_base;
353 sout->dma_address += iommu_page*PAGE_SIZE + s->offset;
354 sout->dma_length = s->length;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100355 } else {
356 sout->dma_length += s->length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 }
358
359 addr = phys_addr;
Joerg Roedel1477b8e2008-10-15 22:02:11 -0700360 pages = iommu_num_pages(s->offset, s->length, PAGE_SIZE);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100361 while (pages--) {
362 iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363 addr += PAGE_SIZE;
364 iommu_page++;
Andi Kleen0d5410642006-02-12 14:34:59 -0800365 }
Ingo Molnar05fccb02008-01-30 13:30:12 +0100366 }
367 BUG_ON(iommu_page - iommu_start != pages);
368
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 return 0;
370}
371
Ingo Molnar05fccb02008-01-30 13:30:12 +0100372static inline int
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800373dma_map_cont(struct device *dev, struct scatterlist *start, int nelems,
374 struct scatterlist *sout, unsigned long pages, int need)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375{
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200376 if (!need) {
377 BUG_ON(nelems != 1);
FUJITA Tomonorie88a39d2007-10-25 09:13:32 +0200378 sout->dma_address = start->dma_address;
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200379 sout->dma_length = start->length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 return 0;
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200381 }
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800382 return __dma_map_cont(dev, start, nelems, sout, pages);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383}
Ingo Molnar05fccb02008-01-30 13:30:12 +0100384
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385/*
386 * DMA map all entries in a scatterlist.
Ingo Molnar05fccb02008-01-30 13:30:12 +0100387 * Merge chunks that have page aligned sizes into a continuous mapping.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 */
FUJITA Tomonori160c1d82009-01-05 23:59:02 +0900389static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
390 enum dma_data_direction dir, struct dma_attrs *attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391{
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200392 struct scatterlist *s, *ps, *start_sg, *sgmap;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100393 int need = 0, nextneed, i, out, start;
394 unsigned long pages = 0;
FUJITA Tomonori42d00282008-02-04 22:27:56 -0800395 unsigned int seg_size;
396 unsigned int max_seg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397
Ingo Molnar05fccb02008-01-30 13:30:12 +0100398 if (nents == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 return 0;
400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 if (!dev)
Joerg Roedel6c505ce2008-08-19 16:32:45 +0200402 dev = &x86_dma_fallback_dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900404 out = 0;
405 start = 0;
406 start_sg = sg;
407 sgmap = sg;
408 seg_size = 0;
409 max_seg_size = dma_get_max_seg_size(dev);
410 ps = NULL; /* shut up gcc */
411
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200412 for_each_sg(sg, s, nents, i) {
Jens Axboe58b053e2007-10-22 20:02:46 +0200413 dma_addr_t addr = sg_phys(s);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414
Ingo Molnar05fccb02008-01-30 13:30:12 +0100415 s->dma_address = addr;
416 BUG_ON(s->length == 0);
417
418 nextneed = need_iommu(dev, addr, s->length);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419
420 /* Handle the previous not yet processed entries */
421 if (i > start) {
Ingo Molnar05fccb02008-01-30 13:30:12 +0100422 /*
423 * Can only merge when the last chunk ends on a
424 * page boundary and the new one doesn't have an
425 * offset.
426 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 if (!iommu_merge || !nextneed || !need || s->offset ||
FUJITA Tomonori42d00282008-02-04 22:27:56 -0800428 (s->length + seg_size > max_seg_size) ||
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200429 (ps->offset + ps->length) % PAGE_SIZE) {
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800430 if (dma_map_cont(dev, start_sg, i - start,
431 sgmap, pages, need) < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 goto error;
433 out++;
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900434
435 seg_size = 0;
436 sgmap = sg_next(sgmap);
437 pages = 0;
438 start = i;
439 start_sg = s;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440 }
441 }
442
FUJITA Tomonori42d00282008-02-04 22:27:56 -0800443 seg_size += s->length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 need = nextneed;
Joerg Roedel1477b8e2008-10-15 22:02:11 -0700445 pages += iommu_num_pages(s->offset, s->length, PAGE_SIZE);
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200446 ps = s;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 }
FUJITA Tomonorifde9a102008-02-04 22:28:11 -0800448 if (dma_map_cont(dev, start_sg, i - start, sgmap, pages, need) < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 goto error;
450 out++;
Andi Kleena32073b2006-06-26 13:56:40 +0200451 flush_gart();
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200452 if (out < nents) {
453 sgmap = sg_next(sgmap);
454 sgmap->dma_length = 0;
455 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 return out;
457
458error:
Andi Kleena32073b2006-06-26 13:56:40 +0200459 flush_gart();
FUJITA Tomonori160c1d82009-01-05 23:59:02 +0900460 gart_unmap_sg(dev, sg, out, dir, NULL);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100461
Kevin VanMarena1002a482006-02-03 21:51:32 +0100462 /* When it was forced or merged try again in a dumb way */
463 if (force_iommu || iommu_merge) {
464 out = dma_map_sg_nonforce(dev, sg, nents, dir);
465 if (out > 0)
466 return out;
467 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 if (panic_on_overflow)
469 panic("dma_map_sg: overflow on %lu pages\n", pages);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100470
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100471 iommu_full(dev, pages << PAGE_SHIFT, dir);
Jens Axboe9ee1bea2007-10-04 09:35:37 +0200472 for_each_sg(sg, s, nents, i)
FUJITA Tomonori42109192009-11-15 21:19:52 +0900473 s->dma_address = bad_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474 return 0;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100475}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476
Joerg Roedel94581092008-08-19 16:32:39 +0200477/* allocate and map a coherent mapping */
478static void *
479gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +0200480 gfp_t flag, struct dma_attrs *attrs)
Joerg Roedel94581092008-08-19 16:32:39 +0200481{
FUJITA Tomonorif6a32a32008-09-11 23:08:48 +0900482 dma_addr_t paddr;
FUJITA Tomonori421076e2008-08-22 16:29:10 +0900483 unsigned long align_mask;
FUJITA Tomonori1d990882008-09-24 20:48:37 +0900484 struct page *page;
Joerg Roedel94581092008-08-19 16:32:39 +0200485
FUJITA Tomonori1d990882008-09-24 20:48:37 +0900486 if (force_iommu && !(flag & GFP_DMA)) {
487 flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
488 page = alloc_pages(flag | __GFP_ZERO, get_order(size));
489 if (!page)
490 return NULL;
Joerg Roedel94581092008-08-19 16:32:39 +0200491
FUJITA Tomonori1d990882008-09-24 20:48:37 +0900492 align_mask = (1UL << get_order(size)) - 1;
493 paddr = dma_map_area(dev, page_to_phys(page), size,
494 DMA_BIDIRECTIONAL, align_mask);
FUJITA Tomonorif6a32a32008-09-11 23:08:48 +0900495
FUJITA Tomonori1d990882008-09-24 20:48:37 +0900496 flush_gart();
FUJITA Tomonori42109192009-11-15 21:19:52 +0900497 if (paddr != bad_dma_addr) {
FUJITA Tomonori1d990882008-09-24 20:48:37 +0900498 *dma_addr = paddr;
499 return page_address(page);
500 }
501 __free_pages(page, get_order(size));
502 } else
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +0200503 return dma_generic_alloc_coherent(dev, size, dma_addr, flag,
504 attrs);
Joerg Roedel94581092008-08-19 16:32:39 +0200505
506 return NULL;
507}
508
Joerg Roedel43a5a5a2008-08-19 16:32:40 +0200509/* free a coherent mapping */
510static void
511gart_free_coherent(struct device *dev, size_t size, void *vaddr,
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +0200512 dma_addr_t dma_addr, struct dma_attrs *attrs)
Joerg Roedel43a5a5a2008-08-19 16:32:40 +0200513{
FUJITA Tomonorid7dff842009-01-05 23:47:28 +0900514 gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, NULL);
Joerg Roedel43a5a5a2008-08-19 16:32:40 +0200515 free_pages((unsigned long)vaddr, get_order(size));
516}
517
FUJITA Tomonori42109192009-11-15 21:19:52 +0900518static int gart_mapping_error(struct device *dev, dma_addr_t dma_addr)
519{
520 return (dma_addr == bad_dma_addr);
521}
522
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100523static int no_agp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524
525static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100526{
527 unsigned long a;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700528
Ingo Molnar05fccb02008-01-30 13:30:12 +0100529 if (!iommu_size) {
530 iommu_size = aper_size;
531 if (!no_agp)
532 iommu_size /= 2;
533 }
534
535 a = aper + iommu_size;
Andi Kleen31422c52008-02-04 16:48:08 +0100536 iommu_size -= round_up(a, PMD_PAGE_SIZE) - a;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537
Ingo Molnar05fccb02008-01-30 13:30:12 +0100538 if (iommu_size < 64*1024*1024) {
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900539 pr_warning(
Ingo Molnar05fccb02008-01-30 13:30:12 +0100540 "PCI-DMA: Warning: Small IOMMU %luMB."
541 " Consider increasing the AGP aperture in BIOS\n",
542 iommu_size >> 20);
543 }
544
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545 return iommu_size;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100546}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547
Ingo Molnar05fccb02008-01-30 13:30:12 +0100548static __init unsigned read_aperture(struct pci_dev *dev, u32 *size)
549{
550 unsigned aper_size = 0, aper_base_32, aper_order;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 u64 aper_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552
Pavel Machek3bb6fbf2008-04-15 12:43:57 +0200553 pci_read_config_dword(dev, AMD64_GARTAPERTUREBASE, &aper_base_32);
554 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &aper_order);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100555 aper_order = (aper_order >> 1) & 7;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700556
Ingo Molnar05fccb02008-01-30 13:30:12 +0100557 aper_base = aper_base_32 & 0x7fff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 aper_base <<= 25;
559
Ingo Molnar05fccb02008-01-30 13:30:12 +0100560 aper_size = (32 * 1024 * 1024) << aper_order;
561 if (aper_base + aper_size > 0x100000000UL || !aper_size)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 aper_base = 0;
563
564 *size = aper_size;
565 return aper_base;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100566}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200568static void enable_gart_translations(void)
569{
570 int i;
571
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200572 if (!amd_nb_has_feature(AMD_NB_GART))
Andreas Herrmann900f9ac2010-09-17 18:02:54 +0200573 return;
574
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200575 for (i = 0; i < amd_nb_num(); i++) {
576 struct pci_dev *dev = node_to_amd_nb(i)->misc;
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200577
578 enable_gart_translation(dev, __pa(agp_gatt_table));
579 }
Joerg Roedel4b838732010-04-07 12:57:35 +0200580
581 /* Flush the GART-TLB to remove stale entries */
Hans Rosenfeldeec1d4f2010-10-29 17:14:30 +0200582 amd_flush_garts();
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200583}
584
585/*
586 * If fix_up_north_bridges is set, the north bridges have to be fixed up on
587 * resume in the same way as they are handled in gart_iommu_hole_init().
588 */
589static bool fix_up_north_bridges;
590static u32 aperture_order;
591static u32 aperture_alloc;
592
593void set_up_gart_resume(u32 aper_order, u32 aper_alloc)
594{
595 fix_up_north_bridges = true;
596 aperture_order = aper_order;
597 aperture_alloc = aper_alloc;
598}
599
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100600static void gart_fixup_northbridges(void)
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900601{
602 int i;
603
604 if (!fix_up_north_bridges)
605 return;
606
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200607 if (!amd_nb_has_feature(AMD_NB_GART))
Andreas Herrmann900f9ac2010-09-17 18:02:54 +0200608 return;
609
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900610 pr_info("PCI-DMA: Restoring GART aperture settings\n");
611
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200612 for (i = 0; i < amd_nb_num(); i++) {
613 struct pci_dev *dev = node_to_amd_nb(i)->misc;
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900614
615 /*
616 * Don't enable translations just yet. That is the next
617 * step. Restore the pre-suspend aperture settings.
618 */
Borislav Petkov260133a2010-09-03 18:39:40 +0200619 gart_set_size_and_enable(dev, aperture_order);
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900620 pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE, aperture_alloc >> 25);
621 }
622}
623
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100624static void gart_resume(void)
Pavel Machekcd763742008-05-29 00:30:21 -0700625{
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900626 pr_info("PCI-DMA: Resuming GART IOMMU\n");
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200627
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100628 gart_fixup_northbridges();
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200629
630 enable_gart_translations();
Pavel Machekcd763742008-05-29 00:30:21 -0700631}
632
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100633static struct syscore_ops gart_syscore_ops = {
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900634 .resume = gart_resume,
Pavel Machekcd763742008-05-29 00:30:21 -0700635
636};
637
Ingo Molnar05fccb02008-01-30 13:30:12 +0100638/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639 * Private Northbridge GATT initialization in case we cannot use the
Ingo Molnar05fccb02008-01-30 13:30:12 +0100640 * AGP driver for some reason.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641 */
Hans Rosenfeldeec1d4f2010-10-29 17:14:30 +0200642static __init int init_amd_gatt(struct agp_kern_info *info)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100643{
644 unsigned aper_size, gatt_size, new_aper_size;
645 unsigned aper_base, new_aper_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 struct pci_dev *dev;
647 void *gatt;
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100648 int i;
Andi Kleena32073b2006-06-26 13:56:40 +0200649
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900650 pr_info("PCI-DMA: Disabling AGP.\n");
651
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 aper_size = aper_base = info->aper_size = 0;
Andi Kleena32073b2006-06-26 13:56:40 +0200653 dev = NULL;
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200654 for (i = 0; i < amd_nb_num(); i++) {
655 dev = node_to_amd_nb(i)->misc;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100656 new_aper_base = read_aperture(dev, &new_aper_size);
657 if (!new_aper_base)
658 goto nommu;
659
660 if (!aper_base) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661 aper_size = new_aper_size;
662 aper_base = new_aper_base;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100663 }
664 if (aper_size != new_aper_size || aper_base != new_aper_base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 goto nommu;
666 }
667 if (!aper_base)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100668 goto nommu;
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900669
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 info->aper_base = aper_base;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100671 info->aper_size = aper_size >> 20;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672
Ingo Molnar05fccb02008-01-30 13:30:12 +0100673 gatt_size = (aper_size >> PAGE_SHIFT) * sizeof(u32);
Joerg Roedel01142672008-09-25 12:42:12 +0200674 gatt = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
675 get_order(gatt_size));
Ingo Molnar05fccb02008-01-30 13:30:12 +0100676 if (!gatt)
Joachim Deguaracf6387d2007-04-24 13:05:36 +0200677 panic("Cannot allocate GATT table");
Arjan van de Ven6d238cc2008-01-30 13:34:06 +0100678 if (set_memory_uc((unsigned long)gatt, gatt_size >> PAGE_SHIFT))
Joachim Deguaracf6387d2007-04-24 13:05:36 +0200679 panic("Could not set GART PTEs to uncacheable pages");
Joachim Deguaracf6387d2007-04-24 13:05:36 +0200680
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 agp_gatt_table = gatt;
Andi Kleena32073b2006-06-26 13:56:40 +0200682
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100683 register_syscore_ops(&gart_syscore_ops);
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200684
Andi Kleena32073b2006-06-26 13:56:40 +0200685 flush_gart();
Ingo Molnar05fccb02008-01-30 13:30:12 +0100686
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900687 pr_info("PCI-DMA: aperture base @ %x size %u KB\n",
Ingo Molnar05fccb02008-01-30 13:30:12 +0100688 aper_base, aper_size>>10);
Yinghai Lu7ab073b2008-07-12 14:30:35 -0700689
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 return 0;
691
692 nommu:
Ingo Molnar05fccb02008-01-30 13:30:12 +0100693 /* Should not happen anymore */
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900694 pr_warning("PCI-DMA: More than 4GB of RAM and no IOMMU\n"
Joe Perchesad361c92009-07-06 13:05:40 -0700695 "falling back to iommu=soft.\n");
Ingo Molnar05fccb02008-01-30 13:30:12 +0100696 return -1;
697}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700698
FUJITA Tomonori160c1d82009-01-05 23:59:02 +0900699static struct dma_map_ops gart_dma_ops = {
Ingo Molnar05fccb02008-01-30 13:30:12 +0100700 .map_sg = gart_map_sg,
701 .unmap_sg = gart_unmap_sg,
FUJITA Tomonori052aedb2009-01-05 23:47:23 +0900702 .map_page = gart_map_page,
703 .unmap_page = gart_unmap_page,
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +0200704 .alloc = gart_alloc_coherent,
705 .free = gart_free_coherent,
FUJITA Tomonori42109192009-11-15 21:19:52 +0900706 .mapping_error = gart_mapping_error,
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100707};
708
FUJITA Tomonori338bac52009-10-27 16:34:44 +0900709static void gart_iommu_shutdown(void)
Yinghai Lubc2cea62007-07-21 17:11:28 +0200710{
711 struct pci_dev *dev;
712 int i;
713
Yinghai Luf3eee542009-12-14 11:52:15 +0900714 /* don't shutdown it if there is AGP installed */
715 if (!no_agp)
Yinghai Lubc2cea62007-07-21 17:11:28 +0200716 return;
717
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200718 if (!amd_nb_has_feature(AMD_NB_GART))
Andreas Herrmann900f9ac2010-09-17 18:02:54 +0200719 return;
720
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200721 for (i = 0; i < amd_nb_num(); i++) {
Ingo Molnar05fccb02008-01-30 13:30:12 +0100722 u32 ctl;
Yinghai Lubc2cea62007-07-21 17:11:28 +0200723
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200724 dev = node_to_amd_nb(i)->misc;
Pavel Machek3bb6fbf2008-04-15 12:43:57 +0200725 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
Yinghai Lubc2cea62007-07-21 17:11:28 +0200726
Pavel Machek3bb6fbf2008-04-15 12:43:57 +0200727 ctl &= ~GARTEN;
Yinghai Lubc2cea62007-07-21 17:11:28 +0200728
Pavel Machek3bb6fbf2008-04-15 12:43:57 +0200729 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100730 }
Yinghai Lubc2cea62007-07-21 17:11:28 +0200731}
732
FUJITA Tomonoride957622009-11-10 19:46:14 +0900733int __init gart_iommu_init(void)
Ingo Molnar05fccb02008-01-30 13:30:12 +0100734{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735 struct agp_kern_info info;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 unsigned long iommu_start;
Yinghai Lud99e9012008-10-04 15:55:12 -0700737 unsigned long aper_base, aper_size;
738 unsigned long start_pfn, end_pfn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 unsigned long scratch;
740 long i;
741
Hans Rosenfeld9653a5c2010-10-29 17:14:31 +0200742 if (!amd_nb_has_feature(AMD_NB_GART))
FUJITA Tomonoride957622009-11-10 19:46:14 +0900743 return 0;
Andi Kleena32073b2006-06-26 13:56:40 +0200744
Linus Torvalds1da177e2005-04-16 15:20:36 -0700745#ifndef CONFIG_AGP_AMD64
Ingo Molnar05fccb02008-01-30 13:30:12 +0100746 no_agp = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747#else
748 /* Makefile puts PCI initialization via subsys_initcall first. */
Hans Rosenfeldeec1d4f2010-10-29 17:14:30 +0200749 /* Add other AMD AGP bridge drivers here */
Ingo Molnar05fccb02008-01-30 13:30:12 +0100750 no_agp = no_agp ||
751 (agp_amd64_init() < 0) ||
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 (agp_copy_info(agp_bridge, &info) < 0);
Ingo Molnar05fccb02008-01-30 13:30:12 +0100753#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754
Linus Torvalds1da177e2005-04-16 15:20:36 -0700755 if (no_iommu ||
Yinghai Luc987d122008-06-24 22:14:09 -0700756 (!force_iommu && max_pfn <= MAX_DMA32_PFN) ||
Joerg Roedel0440d4c2007-10-24 12:49:50 +0200757 !gart_iommu_aperture ||
Hans Rosenfeldeec1d4f2010-10-29 17:14:30 +0200758 (no_agp && init_amd_gatt(&info) < 0)) {
Yinghai Luc987d122008-06-24 22:14:09 -0700759 if (max_pfn > MAX_DMA32_PFN) {
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900760 pr_warning("More than 4GB of memory but GART IOMMU not available.\n");
761 pr_warning("falling back to iommu=soft.\n");
Jon Mason5b7b6442006-02-03 21:51:59 +0100762 }
FUJITA Tomonoride957622009-11-10 19:46:14 +0900763 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 }
765
Yinghai Lud99e9012008-10-04 15:55:12 -0700766 /* need to map that range */
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900767 aper_size = info.aper_size << 20;
768 aper_base = info.aper_base;
769 end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT);
770
Yinghai Lud99e9012008-10-04 15:55:12 -0700771 if (end_pfn > max_low_pfn_mapped) {
772 start_pfn = (aper_base>>PAGE_SHIFT);
773 init_memory_mapping(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
774 }
775
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900776 pr_info("PCI-DMA: using GART IOMMU.\n");
Ingo Molnar05fccb02008-01-30 13:30:12 +0100777 iommu_size = check_iommu_size(info.aper_base, aper_size);
778 iommu_pages = iommu_size >> PAGE_SHIFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779
Joerg Roedel01142672008-09-25 12:42:12 +0200780 iommu_gart_bitmap = (void *) __get_free_pages(GFP_KERNEL | __GFP_ZERO,
Ingo Molnar05fccb02008-01-30 13:30:12 +0100781 get_order(iommu_pages/8));
782 if (!iommu_gart_bitmap)
783 panic("Cannot allocate iommu bitmap\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784
785#ifdef CONFIG_IOMMU_LEAK
Ingo Molnar05fccb02008-01-30 13:30:12 +0100786 if (leak_trace) {
FUJITA Tomonori19c1a6f2009-04-14 09:43:19 +0900787 int ret;
788
789 ret = dma_debug_resize_entries(iommu_pages);
790 if (ret)
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900791 pr_debug("PCI-DMA: Cannot trace all the entries\n");
Ingo Molnar05fccb02008-01-30 13:30:12 +0100792 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700793#endif
794
Ingo Molnar05fccb02008-01-30 13:30:12 +0100795 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796 * Out of IOMMU space handling.
Ingo Molnar05fccb02008-01-30 13:30:12 +0100797 * Reserve some invalid pages at the beginning of the GART.
798 */
Akinobu Mitaa66022c2009-12-15 16:48:28 -0800799 bitmap_set(iommu_gart_bitmap, 0, EMERGENCY_PAGES);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700800
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900801 pr_info("PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
Ingo Molnar05fccb02008-01-30 13:30:12 +0100802 iommu_size >> 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900804 agp_memory_reserved = iommu_size;
805 iommu_start = aper_size - iommu_size;
806 iommu_bus_base = info.aper_base + iommu_start;
807 bad_dma_addr = iommu_bus_base;
808 iommu_gatt_base = agp_gatt_table + (iommu_start>>PAGE_SHIFT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809
Ingo Molnar05fccb02008-01-30 13:30:12 +0100810 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811 * Unmap the IOMMU part of the GART. The alias of the page is
812 * always mapped with cache enabled and there is no full cache
813 * coherency across the GART remapping. The unmapping avoids
814 * automatic prefetches from the CPU allocating cache lines in
815 * there. All CPU accesses are done via the direct mapping to
816 * the backing memory. The GART address is only used by PCI
Ingo Molnar05fccb02008-01-30 13:30:12 +0100817 * devices.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818 */
Andi Kleen28d6ee42008-02-04 16:48:08 +0100819 set_memory_np((unsigned long)__va(iommu_bus_base),
820 iommu_size >> PAGE_SHIFT);
Ingo Molnar184652e2008-02-14 23:30:20 +0100821 /*
822 * Tricky. The GART table remaps the physical memory range,
823 * so the CPU wont notice potential aliases and if the memory
824 * is remapped to UC later on, we might surprise the PCI devices
825 * with a stray writeout of a cacheline. So play it sure and
826 * do an explicit, full-scale wbinvd() _after_ having marked all
827 * the pages as Not-Present:
828 */
829 wbinvd();
Ingo Molnar123bf0e2009-11-15 21:19:52 +0900830
Mark Langsdorffe2245c2009-07-05 15:50:52 -0500831 /*
832 * Now all caches are flushed and we can safely enable
833 * GART hardware. Doing it early leaves the possibility
834 * of stale cache entries that can lead to GART PTE
835 * errors.
836 */
837 enable_gart_translations();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838
Ingo Molnar05fccb02008-01-30 13:30:12 +0100839 /*
Pavel Machekfa3d3192008-06-26 00:25:43 +0200840 * Try to workaround a bug (thanks to BenH):
Ingo Molnar05fccb02008-01-30 13:30:12 +0100841 * Set unmapped entries to a scratch page instead of 0.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842 * Any prefetches that hit unmapped entries won't get an bus abort
Pavel Machekfa3d3192008-06-26 00:25:43 +0200843 * then. (P2P bridge may be prefetching on DMA reads).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 */
Ingo Molnar05fccb02008-01-30 13:30:12 +0100845 scratch = get_zeroed_page(GFP_KERNEL);
846 if (!scratch)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700847 panic("Cannot allocate iommu scratch page");
848 gart_unmapped_entry = GPTE_ENCODE(__pa(scratch));
Ingo Molnar05fccb02008-01-30 13:30:12 +0100849 for (i = EMERGENCY_PAGES; i < iommu_pages; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850 iommu_gatt_base[i] = gart_unmapped_entry;
851
Andi Kleena32073b2006-06-26 13:56:40 +0200852 flush_gart();
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100853 dma_ops = &gart_dma_ops;
FUJITA Tomonori338bac52009-10-27 16:34:44 +0900854 x86_platform.iommu_shutdown = gart_iommu_shutdown;
FUJITA Tomonori75f1cdf2009-11-10 19:46:20 +0900855 swiotlb = 0;
FUJITA Tomonoride957622009-11-10 19:46:14 +0900856
857 return 0;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100858}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700859
Sam Ravnborg43999d92007-03-16 21:07:36 +0100860void __init gart_parse_options(char *p)
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100861{
862 int arg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863
Linus Torvalds1da177e2005-04-16 15:20:36 -0700864#ifdef CONFIG_IOMMU_LEAK
Ingo Molnar05fccb02008-01-30 13:30:12 +0100865 if (!strncmp(p, "leak", 4)) {
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100866 leak_trace = 1;
867 p += 4;
Joerg Roedel237a6222008-09-25 12:13:53 +0200868 if (*p == '=')
869 ++p;
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100870 if (isdigit(*p) && get_option(&p, &arg))
871 iommu_leak_pages = arg;
872 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873#endif
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100874 if (isdigit(*p) && get_option(&p, &arg))
875 iommu_size = arg;
Joe Perches41855b72009-11-09 17:58:50 -0800876 if (!strncmp(p, "fullflush", 9))
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100877 iommu_fullflush = 1;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100878 if (!strncmp(p, "nofullflush", 11))
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100879 iommu_fullflush = 0;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100880 if (!strncmp(p, "noagp", 5))
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100881 no_agp = 1;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100882 if (!strncmp(p, "noaperture", 10))
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100883 fix_aperture = 0;
884 /* duplicated from pci-dma.c */
Ingo Molnar05fccb02008-01-30 13:30:12 +0100885 if (!strncmp(p, "force", 5))
Joerg Roedel0440d4c2007-10-24 12:49:50 +0200886 gart_iommu_aperture_allowed = 1;
Ingo Molnar05fccb02008-01-30 13:30:12 +0100887 if (!strncmp(p, "allowed", 7))
Joerg Roedel0440d4c2007-10-24 12:49:50 +0200888 gart_iommu_aperture_allowed = 1;
Muli Ben-Yehuda17a941d2006-01-11 22:44:42 +0100889 if (!strncmp(p, "memaper", 7)) {
890 fallback_aper_force = 1;
891 p += 7;
892 if (*p == '=') {
893 ++p;
894 if (get_option(&p, &arg))
895 fallback_aper_order = arg;
896 }
897 }
898}
Konrad Rzeszutek Wilk22e6daf2010-08-26 13:58:03 -0400899IOMMU_INIT_POST(gart_iommu_hole_init);