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android-kvm / linux / 5640f7685831e088fe6c2e1f863a6805962f8e81 / . / drivers / staging / vt6655 / baseband.c
blob: e7b93a21e3b20a60e64cf88826e768b872971c92 [file] [log] [blame]
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
Jim Lieb612822f2009-08-12 14:54:03 -0700[diff] [blame]19 *
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]20 * File: baseband.c
21 *
22 * Purpose: Implement functions to access baseband
23 *
24 * Author: Kyle Hsu
25 *
26 * Date: Aug.22, 2002
27 *
28 * Functions:
29 * BBuGetFrameTime - Calculate data frame transmitting time
30 * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
31 * BBbReadEmbeded - Embeded read baseband register via MAC
32 * BBbWriteEmbeded - Embeded write baseband register via MAC
33 * BBbIsRegBitsOn - Test if baseband register bits on
34 * BBbIsRegBitsOff - Test if baseband register bits off
35 * BBbVT3253Init - VIA VT3253 baseband chip init code
36 * BBvReadAllRegs - Read All Baseband Registers
37 * BBvLoopbackOn - Turn on BaseBand Loopback mode
38 * BBvLoopbackOff - Turn off BaseBand Loopback mode
39 *
40 * Revision History:
41 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
42 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
43 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and BBvCaculateParameter().
44 * cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
45 * Add the comments.
46 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
47 * Modified BBvLoopbackOn & BBvLoopbackOff().
Jim Lieb612822f2009-08-12 14:54:03 -0700[diff] [blame]48 *
49 *
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]50 */
51
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]52#include "tmacro.h"
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]53#include "tether.h"
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]54#include "mac.h"
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]55#include "baseband.h"
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]56#include "srom.h"
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]57#include "rf.h"
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]58
59/*--------------------- Static Definitions -------------------------*/
60//static int msglevel =MSG_LEVEL_DEBUG;
61static int msglevel =MSG_LEVEL_INFO;
62
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]63/*--------------------- Static Classes ----------------------------*/
64
65/*--------------------- Static Variables --------------------------*/
Jim Lieb612822f2009-08-12 14:54:03 -0700[diff] [blame]66
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]67/*--------------------- Static Functions --------------------------*/
68
69/*--------------------- Export Variables --------------------------*/
70
71/*--------------------- Static Definitions -------------------------*/
72
73/*--------------------- Static Classes ----------------------------*/
74
75/*--------------------- Static Variables --------------------------*/
76
77
78
79#define CB_VT3253_INIT_FOR_RFMD 446
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]80unsigned char byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]81 {0x00, 0x30},
82 {0x01, 0x00},
83 {0x02, 0x00},
84 {0x03, 0x00},
85 {0x04, 0x00},
86 {0x05, 0x00},
87 {0x06, 0x00},
88 {0x07, 0x00},
89 {0x08, 0x70},
90 {0x09, 0x45},
91 {0x0a, 0x2a},
92 {0x0b, 0x76},
93 {0x0c, 0x00},
94 {0x0d, 0x01},
95 {0x0e, 0x80},
96 {0x0f, 0x00},
97 {0x10, 0x00},
98 {0x11, 0x00},
99 {0x12, 0x00},
100 {0x13, 0x00},
101 {0x14, 0x00},
102 {0x15, 0x00},
103 {0x16, 0x00},
104 {0x17, 0x00},
105 {0x18, 0x00},
106 {0x19, 0x00},
107 {0x1a, 0x00},
108 {0x1b, 0x9d},
109 {0x1c, 0x05},
110 {0x1d, 0x00},
111 {0x1e, 0x00},
112 {0x1f, 0x00},
113 {0x20, 0x00},
114 {0x21, 0x00},
115 {0x22, 0x00},
116 {0x23, 0x00},
117 {0x24, 0x00},
118 {0x25, 0x4a},
119 {0x26, 0x00},
120 {0x27, 0x00},
121 {0x28, 0x00},
122 {0x29, 0x00},
123 {0x2a, 0x00},
124 {0x2b, 0x00},
125 {0x2c, 0x00},
126 {0x2d, 0xa8},
127 {0x2e, 0x1a},
128 {0x2f, 0x0c},
129 {0x30, 0x26},
130 {0x31, 0x5b},
131 {0x32, 0x00},
132 {0x33, 0x00},
133 {0x34, 0x00},
134 {0x35, 0x00},
135 {0x36, 0xaa},
136 {0x37, 0xaa},
137 {0x38, 0xff},
138 {0x39, 0xff},
139 {0x3a, 0x00},
140 {0x3b, 0x00},
141 {0x3c, 0x00},
142 {0x3d, 0x0d},
143 {0x3e, 0x51},
144 {0x3f, 0x04},
145 {0x40, 0x00},
146 {0x41, 0x08},
147 {0x42, 0x00},
148 {0x43, 0x08},
149 {0x44, 0x06},
150 {0x45, 0x14},
151 {0x46, 0x05},
152 {0x47, 0x08},
153 {0x48, 0x00},
154 {0x49, 0x00},
155 {0x4a, 0x00},
156 {0x4b, 0x00},
157 {0x4c, 0x09},
158 {0x4d, 0x80},
159 {0x4e, 0x00},
160 {0x4f, 0xc5},
161 {0x50, 0x14},
162 {0x51, 0x19},
163 {0x52, 0x00},
164 {0x53, 0x00},
165 {0x54, 0x00},
166 {0x55, 0x00},
167 {0x56, 0x00},
168 {0x57, 0x00},
169 {0x58, 0x00},
170 {0x59, 0xb0},
171 {0x5a, 0x00},
172 {0x5b, 0x00},
173 {0x5c, 0x00},
174 {0x5d, 0x00},
175 {0x5e, 0x00},
176 {0x5f, 0x00},
177 {0x60, 0x44},
178 {0x61, 0x04},
179 {0x62, 0x00},
180 {0x63, 0x00},
181 {0x64, 0x00},
182 {0x65, 0x00},
183 {0x66, 0x04},
184 {0x67, 0xb7},
185 {0x68, 0x00},
186 {0x69, 0x00},
187 {0x6a, 0x00},
188 {0x6b, 0x00},
189 {0x6c, 0x00},
190 {0x6d, 0x03},
191 {0x6e, 0x01},
192 {0x6f, 0x00},
193 {0x70, 0x00},
194 {0x71, 0x00},
195 {0x72, 0x00},
196 {0x73, 0x00},
197 {0x74, 0x00},
198 {0x75, 0x00},
199 {0x76, 0x00},
200 {0x77, 0x00},
201 {0x78, 0x00},
202 {0x79, 0x00},
203 {0x7a, 0x00},
204 {0x7b, 0x00},
205 {0x7c, 0x00},
206 {0x7d, 0x00},
207 {0x7e, 0x00},
208 {0x7f, 0x00},
209 {0x80, 0x0b},
210 {0x81, 0x00},
211 {0x82, 0x3c},
212 {0x83, 0x00},
213 {0x84, 0x00},
214 {0x85, 0x00},
215 {0x86, 0x00},
216 {0x87, 0x00},
217 {0x88, 0x08},
218 {0x89, 0x00},
219 {0x8a, 0x08},
220 {0x8b, 0xa6},
221 {0x8c, 0x84},
222 {0x8d, 0x47},
223 {0x8e, 0xbb},
224 {0x8f, 0x02},
225 {0x90, 0x21},
226 {0x91, 0x0c},
227 {0x92, 0x04},
228 {0x93, 0x22},
229 {0x94, 0x00},
230 {0x95, 0x00},
231 {0x96, 0x00},
232 {0x97, 0xeb},
233 {0x98, 0x00},
234 {0x99, 0x00},
235 {0x9a, 0x00},
236 {0x9b, 0x00},
237 {0x9c, 0x00},
238 {0x9d, 0x00},
239 {0x9e, 0x00},
240 {0x9f, 0x00},
241 {0xa0, 0x00},
242 {0xa1, 0x00},
243 {0xa2, 0x00},
244 {0xa3, 0x00},
245 {0xa4, 0x00},
246 {0xa5, 0x00},
247 {0xa6, 0x10},
248 {0xa7, 0x04},
249 {0xa8, 0x10},
250 {0xa9, 0x00},
251 {0xaa, 0x8f},
252 {0xab, 0x00},
253 {0xac, 0x00},
254 {0xad, 0x00},
255 {0xae, 0x00},
256 {0xaf, 0x80},
257 {0xb0, 0x38},
258 {0xb1, 0x00},
259 {0xb2, 0x00},
260 {0xb3, 0x00},
261 {0xb4, 0xee},
262 {0xb5, 0xff},
263 {0xb6, 0x10},
264 {0xb7, 0x00},
265 {0xb8, 0x00},
266 {0xb9, 0x00},
267 {0xba, 0x00},
268 {0xbb, 0x03},
269 {0xbc, 0x00},
270 {0xbd, 0x00},
271 {0xbe, 0x00},
272 {0xbf, 0x00},
273 {0xc0, 0x10},
274 {0xc1, 0x10},
275 {0xc2, 0x18},
276 {0xc3, 0x20},
277 {0xc4, 0x10},
278 {0xc5, 0x00},
279 {0xc6, 0x22},
280 {0xc7, 0x14},
281 {0xc8, 0x0f},
282 {0xc9, 0x08},
283 {0xca, 0xa4},
284 {0xcb, 0xa7},
285 {0xcc, 0x3c},
286 {0xcd, 0x10},
287 {0xce, 0x20},
288 {0xcf, 0x00},
289 {0xd0, 0x00},
290 {0xd1, 0x10},
291 {0xd2, 0x00},
292 {0xd3, 0x00},
293 {0xd4, 0x10},
294 {0xd5, 0x33},
295 {0xd6, 0x70},
296 {0xd7, 0x01},
297 {0xd8, 0x00},
298 {0xd9, 0x00},
299 {0xda, 0x00},
300 {0xdb, 0x00},
301 {0xdc, 0x00},
302 {0xdd, 0x00},
303 {0xde, 0x00},
304 {0xdf, 0x00},
305 {0xe0, 0x00},
306 {0xe1, 0x00},
307 {0xe2, 0xcc},
308 {0xe3, 0x04},
309 {0xe4, 0x08},
310 {0xe5, 0x10},
311 {0xe6, 0x00},
312 {0xe7, 0x0e},
313 {0xe8, 0x88},
314 {0xe9, 0xd4},
315 {0xea, 0x05},
316 {0xeb, 0xf0},
317 {0xec, 0x79},
318 {0xed, 0x0f},
319 {0xee, 0x04},
320 {0xef, 0x04},
321 {0xf0, 0x00},
322 {0xf1, 0x00},
323 {0xf2, 0x00},
324 {0xf3, 0x00},
325 {0xf4, 0x00},
326 {0xf5, 0x00},
327 {0xf6, 0x00},
328 {0xf7, 0x00},
329 {0xf8, 0x00},
330 {0xf9, 0x00},
331 {0xF0, 0x00},
332 {0xF1, 0xF8},
333 {0xF0, 0x80},
334 {0xF0, 0x00},
335 {0xF1, 0xF4},
336 {0xF0, 0x81},
337 {0xF0, 0x01},
338 {0xF1, 0xF0},
339 {0xF0, 0x82},
340 {0xF0, 0x02},
341 {0xF1, 0xEC},
342 {0xF0, 0x83},
343 {0xF0, 0x03},
344 {0xF1, 0xE8},
345 {0xF0, 0x84},
346 {0xF0, 0x04},
347 {0xF1, 0xE4},
348 {0xF0, 0x85},
349 {0xF0, 0x05},
350 {0xF1, 0xE0},
351 {0xF0, 0x86},
352 {0xF0, 0x06},
353 {0xF1, 0xDC},
354 {0xF0, 0x87},
355 {0xF0, 0x07},
356 {0xF1, 0xD8},
357 {0xF0, 0x88},
358 {0xF0, 0x08},
359 {0xF1, 0xD4},
360 {0xF0, 0x89},
361 {0xF0, 0x09},
362 {0xF1, 0xD0},
363 {0xF0, 0x8A},
364 {0xF0, 0x0A},
365 {0xF1, 0xCC},
366 {0xF0, 0x8B},
367 {0xF0, 0x0B},
368 {0xF1, 0xC8},
369 {0xF0, 0x8C},
370 {0xF0, 0x0C},
371 {0xF1, 0xC4},
372 {0xF0, 0x8D},
373 {0xF0, 0x0D},
374 {0xF1, 0xC0},
375 {0xF0, 0x8E},
376 {0xF0, 0x0E},
377 {0xF1, 0xBC},
378 {0xF0, 0x8F},
379 {0xF0, 0x0F},
380 {0xF1, 0xB8},
381 {0xF0, 0x90},
382 {0xF0, 0x10},
383 {0xF1, 0xB4},
384 {0xF0, 0x91},
385 {0xF0, 0x11},
386 {0xF1, 0xB0},
387 {0xF0, 0x92},
388 {0xF0, 0x12},
389 {0xF1, 0xAC},
390 {0xF0, 0x93},
391 {0xF0, 0x13},
392 {0xF1, 0xA8},
393 {0xF0, 0x94},
394 {0xF0, 0x14},
395 {0xF1, 0xA4},
396 {0xF0, 0x95},
397 {0xF0, 0x15},
398 {0xF1, 0xA0},
399 {0xF0, 0x96},
400 {0xF0, 0x16},
401 {0xF1, 0x9C},
402 {0xF0, 0x97},
403 {0xF0, 0x17},
404 {0xF1, 0x98},
405 {0xF0, 0x98},
406 {0xF0, 0x18},
407 {0xF1, 0x94},
408 {0xF0, 0x99},
409 {0xF0, 0x19},
410 {0xF1, 0x90},
411 {0xF0, 0x9A},
412 {0xF0, 0x1A},
413 {0xF1, 0x8C},
414 {0xF0, 0x9B},
415 {0xF0, 0x1B},
416 {0xF1, 0x88},
417 {0xF0, 0x9C},
418 {0xF0, 0x1C},
419 {0xF1, 0x84},
420 {0xF0, 0x9D},
421 {0xF0, 0x1D},
422 {0xF1, 0x80},
423 {0xF0, 0x9E},
424 {0xF0, 0x1E},
425 {0xF1, 0x7C},
426 {0xF0, 0x9F},
427 {0xF0, 0x1F},
428 {0xF1, 0x78},
429 {0xF0, 0xA0},
430 {0xF0, 0x20},
431 {0xF1, 0x74},
432 {0xF0, 0xA1},
433 {0xF0, 0x21},
434 {0xF1, 0x70},
435 {0xF0, 0xA2},
436 {0xF0, 0x22},
437 {0xF1, 0x6C},
438 {0xF0, 0xA3},
439 {0xF0, 0x23},
440 {0xF1, 0x68},
441 {0xF0, 0xA4},
442 {0xF0, 0x24},
443 {0xF1, 0x64},
444 {0xF0, 0xA5},
445 {0xF0, 0x25},
446 {0xF1, 0x60},
447 {0xF0, 0xA6},
448 {0xF0, 0x26},
449 {0xF1, 0x5C},
450 {0xF0, 0xA7},
451 {0xF0, 0x27},
452 {0xF1, 0x58},
453 {0xF0, 0xA8},
454 {0xF0, 0x28},
455 {0xF1, 0x54},
456 {0xF0, 0xA9},
457 {0xF0, 0x29},
458 {0xF1, 0x50},
459 {0xF0, 0xAA},
460 {0xF0, 0x2A},
461 {0xF1, 0x4C},
462 {0xF0, 0xAB},
463 {0xF0, 0x2B},
464 {0xF1, 0x48},
465 {0xF0, 0xAC},
466 {0xF0, 0x2C},
467 {0xF1, 0x44},
468 {0xF0, 0xAD},
469 {0xF0, 0x2D},
470 {0xF1, 0x40},
471 {0xF0, 0xAE},
472 {0xF0, 0x2E},
473 {0xF1, 0x3C},
474 {0xF0, 0xAF},
475 {0xF0, 0x2F},
476 {0xF1, 0x38},
477 {0xF0, 0xB0},
478 {0xF0, 0x30},
479 {0xF1, 0x34},
480 {0xF0, 0xB1},
481 {0xF0, 0x31},
482 {0xF1, 0x30},
483 {0xF0, 0xB2},
484 {0xF0, 0x32},
485 {0xF1, 0x2C},
486 {0xF0, 0xB3},
487 {0xF0, 0x33},
488 {0xF1, 0x28},
489 {0xF0, 0xB4},
490 {0xF0, 0x34},
491 {0xF1, 0x24},
492 {0xF0, 0xB5},
493 {0xF0, 0x35},
494 {0xF1, 0x20},
495 {0xF0, 0xB6},
496 {0xF0, 0x36},
497 {0xF1, 0x1C},
498 {0xF0, 0xB7},
499 {0xF0, 0x37},
500 {0xF1, 0x18},
501 {0xF0, 0xB8},
502 {0xF0, 0x38},
503 {0xF1, 0x14},
504 {0xF0, 0xB9},
505 {0xF0, 0x39},
506 {0xF1, 0x10},
507 {0xF0, 0xBA},
508 {0xF0, 0x3A},
509 {0xF1, 0x0C},
510 {0xF0, 0xBB},
511 {0xF0, 0x3B},
512 {0xF1, 0x08},
513 {0xF0, 0x00},
514 {0xF0, 0x3C},
515 {0xF1, 0x04},
516 {0xF0, 0xBD},
517 {0xF0, 0x3D},
518 {0xF1, 0x00},
519 {0xF0, 0xBE},
520 {0xF0, 0x3E},
521 {0xF1, 0x00},
522 {0xF0, 0xBF},
523 {0xF0, 0x3F},
524 {0xF1, 0x00},
525 {0xF0, 0xC0},
526 {0xF0, 0x00},
527};
528
529#define CB_VT3253B0_INIT_FOR_RFMD 256
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]530unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]531 {0x00, 0x31},
532 {0x01, 0x00},
533 {0x02, 0x00},
534 {0x03, 0x00},
535 {0x04, 0x00},
536 {0x05, 0x81},
537 {0x06, 0x00},
538 {0x07, 0x00},
539 {0x08, 0x38},
540 {0x09, 0x45},
541 {0x0a, 0x2a},
542 {0x0b, 0x76},
543 {0x0c, 0x00},
544 {0x0d, 0x00},
545 {0x0e, 0x80},
546 {0x0f, 0x00},
547 {0x10, 0x00},
548 {0x11, 0x00},
549 {0x12, 0x00},
550 {0x13, 0x00},
551 {0x14, 0x00},
552 {0x15, 0x00},
553 {0x16, 0x00},
554 {0x17, 0x00},
555 {0x18, 0x00},
556 {0x19, 0x00},
557 {0x1a, 0x00},
558 {0x1b, 0x8e},
559 {0x1c, 0x06},
560 {0x1d, 0x00},
561 {0x1e, 0x00},
562 {0x1f, 0x00},
563 {0x20, 0x00},
564 {0x21, 0x00},
565 {0x22, 0x00},
566 {0x23, 0x00},
567 {0x24, 0x00},
568 {0x25, 0x4a},
569 {0x26, 0x00},
570 {0x27, 0x00},
571 {0x28, 0x00},
572 {0x29, 0x00},
573 {0x2a, 0x00},
574 {0x2b, 0x00},
575 {0x2c, 0x00},
576 {0x2d, 0x34},
577 {0x2e, 0x18},
578 {0x2f, 0x0c},
579 {0x30, 0x26},
580 {0x31, 0x5b},
581 {0x32, 0x00},
582 {0x33, 0x00},
583 {0x34, 0x00},
584 {0x35, 0x00},
585 {0x36, 0xaa},
586 {0x37, 0xaa},
587 {0x38, 0xff},
588 {0x39, 0xff},
589 {0x3a, 0xf8},
590 {0x3b, 0x00},
591 {0x3c, 0x00},
592 {0x3d, 0x09},
593 {0x3e, 0x0d},
594 {0x3f, 0x04},
595 {0x40, 0x00},
596 {0x41, 0x08},
597 {0x42, 0x00},
598 {0x43, 0x08},
599 {0x44, 0x08},
600 {0x45, 0x14},
601 {0x46, 0x05},
602 {0x47, 0x08},
603 {0x48, 0x00},
604 {0x49, 0x00},
605 {0x4a, 0x00},
606 {0x4b, 0x00},
607 {0x4c, 0x09},
608 {0x4d, 0x80},
609 {0x4e, 0x00},
610 {0x4f, 0xc5},
611 {0x50, 0x14},
612 {0x51, 0x19},
613 {0x52, 0x00},
614 {0x53, 0x00},
615 {0x54, 0x00},
616 {0x55, 0x00},
617 {0x56, 0x00},
618 {0x57, 0x00},
619 {0x58, 0x00},
620 {0x59, 0xb0},
621 {0x5a, 0x00},
622 {0x5b, 0x00},
623 {0x5c, 0x00},
624 {0x5d, 0x00},
625 {0x5e, 0x00},
626 {0x5f, 0x00},
627 {0x60, 0x39},
628 {0x61, 0x83},
629 {0x62, 0x00},
630 {0x63, 0x00},
631 {0x64, 0x00},
632 {0x65, 0x00},
633 {0x66, 0xc0},
634 {0x67, 0x49},
635 {0x68, 0x00},
636 {0x69, 0x00},
637 {0x6a, 0x00},
638 {0x6b, 0x00},
639 {0x6c, 0x00},
640 {0x6d, 0x03},
641 {0x6e, 0x01},
642 {0x6f, 0x00},
643 {0x70, 0x00},
644 {0x71, 0x00},
645 {0x72, 0x00},
646 {0x73, 0x00},
647 {0x74, 0x00},
648 {0x75, 0x00},
649 {0x76, 0x00},
650 {0x77, 0x00},
651 {0x78, 0x00},
652 {0x79, 0x00},
653 {0x7a, 0x00},
654 {0x7b, 0x00},
655 {0x7c, 0x00},
656 {0x7d, 0x00},
657 {0x7e, 0x00},
658 {0x7f, 0x00},
659 {0x80, 0x89},
660 {0x81, 0x00},
661 {0x82, 0x0e},
662 {0x83, 0x00},
663 {0x84, 0x00},
664 {0x85, 0x00},
665 {0x86, 0x00},
666 {0x87, 0x00},
667 {0x88, 0x08},
668 {0x89, 0x00},
669 {0x8a, 0x0e},
670 {0x8b, 0xa7},
671 {0x8c, 0x88},
672 {0x8d, 0x47},
673 {0x8e, 0xaa},
674 {0x8f, 0x02},
675 {0x90, 0x23},
676 {0x91, 0x0c},
677 {0x92, 0x06},
678 {0x93, 0x08},
679 {0x94, 0x00},
680 {0x95, 0x00},
681 {0x96, 0x00},
682 {0x97, 0xeb},
683 {0x98, 0x00},
684 {0x99, 0x00},
685 {0x9a, 0x00},
686 {0x9b, 0x00},
687 {0x9c, 0x00},
688 {0x9d, 0x00},
689 {0x9e, 0x00},
690 {0x9f, 0x00},
691 {0xa0, 0x00},
692 {0xa1, 0x00},
693 {0xa2, 0x00},
694 {0xa3, 0xcd},
695 {0xa4, 0x07},
696 {0xa5, 0x33},
697 {0xa6, 0x18},
698 {0xa7, 0x00},
699 {0xa8, 0x18},
700 {0xa9, 0x00},
701 {0xaa, 0x28},
702 {0xab, 0x00},
703 {0xac, 0x00},
704 {0xad, 0x00},
705 {0xae, 0x00},
706 {0xaf, 0x18},
707 {0xb0, 0x38},
708 {0xb1, 0x30},
709 {0xb2, 0x00},
710 {0xb3, 0x00},
711 {0xb4, 0x00},
712 {0xb5, 0x00},
713 {0xb6, 0x84},
714 {0xb7, 0xfd},
715 {0xb8, 0x00},
716 {0xb9, 0x00},
717 {0xba, 0x00},
718 {0xbb, 0x03},
719 {0xbc, 0x00},
720 {0xbd, 0x00},
721 {0xbe, 0x00},
722 {0xbf, 0x00},
723 {0xc0, 0x10},
724 {0xc1, 0x20},
725 {0xc2, 0x18},
726 {0xc3, 0x20},
727 {0xc4, 0x10},
728 {0xc5, 0x2c},
729 {0xc6, 0x1e},
730 {0xc7, 0x10},
731 {0xc8, 0x12},
732 {0xc9, 0x01},
733 {0xca, 0x6f},
734 {0xcb, 0xa7},
735 {0xcc, 0x3c},
736 {0xcd, 0x10},
737 {0xce, 0x00},
738 {0xcf, 0x22},
739 {0xd0, 0x00},
740 {0xd1, 0x10},
741 {0xd2, 0x00},
742 {0xd3, 0x00},
743 {0xd4, 0x10},
744 {0xd5, 0x33},
745 {0xd6, 0x80},
746 {0xd7, 0x21},
747 {0xd8, 0x00},
748 {0xd9, 0x00},
749 {0xda, 0x00},
750 {0xdb, 0x00},
751 {0xdc, 0x00},
752 {0xdd, 0x00},
753 {0xde, 0x00},
754 {0xdf, 0x00},
755 {0xe0, 0x00},
756 {0xe1, 0xB3},
757 {0xe2, 0x00},
758 {0xe3, 0x00},
759 {0xe4, 0x00},
760 {0xe5, 0x10},
761 {0xe6, 0x00},
762 {0xe7, 0x18},
763 {0xe8, 0x08},
764 {0xe9, 0xd4},
765 {0xea, 0x00},
766 {0xeb, 0xff},
767 {0xec, 0x79},
768 {0xed, 0x10},
769 {0xee, 0x30},
770 {0xef, 0x02},
771 {0xf0, 0x00},
772 {0xf1, 0x09},
773 {0xf2, 0x00},
774 {0xf3, 0x00},
775 {0xf4, 0x00},
776 {0xf5, 0x00},
777 {0xf6, 0x00},
778 {0xf7, 0x00},
779 {0xf8, 0x00},
780 {0xf9, 0x00},
781 {0xfa, 0x00},
782 {0xfb, 0x00},
783 {0xfc, 0x00},
784 {0xfd, 0x00},
785 {0xfe, 0x00},
786 {0xff, 0x00},
787};
788
789#define CB_VT3253B0_AGC_FOR_RFMD2959 195
790// For RFMD2959
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]791unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]792 {0xF0, 0x00},
793 {0xF1, 0x3E},
794 {0xF0, 0x80},
795 {0xF0, 0x00},
796 {0xF1, 0x3E},
797 {0xF0, 0x81},
798 {0xF0, 0x01},
799 {0xF1, 0x3E},
800 {0xF0, 0x82},
801 {0xF0, 0x02},
802 {0xF1, 0x3E},
803 {0xF0, 0x83},
804 {0xF0, 0x03},
805 {0xF1, 0x3B},
806 {0xF0, 0x84},
807 {0xF0, 0x04},
808 {0xF1, 0x39},
809 {0xF0, 0x85},
810 {0xF0, 0x05},
811 {0xF1, 0x38},
812 {0xF0, 0x86},
813 {0xF0, 0x06},
814 {0xF1, 0x37},
815 {0xF0, 0x87},
816 {0xF0, 0x07},
817 {0xF1, 0x36},
818 {0xF0, 0x88},
819 {0xF0, 0x08},
820 {0xF1, 0x35},
821 {0xF0, 0x89},
822 {0xF0, 0x09},
823 {0xF1, 0x35},
824 {0xF0, 0x8A},
825 {0xF0, 0x0A},
826 {0xF1, 0x34},
827 {0xF0, 0x8B},
828 {0xF0, 0x0B},
829 {0xF1, 0x34},
830 {0xF0, 0x8C},
831 {0xF0, 0x0C},
832 {0xF1, 0x33},
833 {0xF0, 0x8D},
834 {0xF0, 0x0D},
835 {0xF1, 0x32},
836 {0xF0, 0x8E},
837 {0xF0, 0x0E},
838 {0xF1, 0x31},
839 {0xF0, 0x8F},
840 {0xF0, 0x0F},
841 {0xF1, 0x30},
842 {0xF0, 0x90},
843 {0xF0, 0x10},
844 {0xF1, 0x2F},
845 {0xF0, 0x91},
846 {0xF0, 0x11},
847 {0xF1, 0x2F},
848 {0xF0, 0x92},
849 {0xF0, 0x12},
850 {0xF1, 0x2E},
851 {0xF0, 0x93},
852 {0xF0, 0x13},
853 {0xF1, 0x2D},
854 {0xF0, 0x94},
855 {0xF0, 0x14},
856 {0xF1, 0x2C},
857 {0xF0, 0x95},
858 {0xF0, 0x15},
859 {0xF1, 0x2B},
860 {0xF0, 0x96},
861 {0xF0, 0x16},
862 {0xF1, 0x2B},
863 {0xF0, 0x97},
864 {0xF0, 0x17},
865 {0xF1, 0x2A},
866 {0xF0, 0x98},
867 {0xF0, 0x18},
868 {0xF1, 0x29},
869 {0xF0, 0x99},
870 {0xF0, 0x19},
871 {0xF1, 0x28},
872 {0xF0, 0x9A},
873 {0xF0, 0x1A},
874 {0xF1, 0x27},
875 {0xF0, 0x9B},
876 {0xF0, 0x1B},
877 {0xF1, 0x26},
878 {0xF0, 0x9C},
879 {0xF0, 0x1C},
880 {0xF1, 0x25},
881 {0xF0, 0x9D},
882 {0xF0, 0x1D},
883 {0xF1, 0x24},
884 {0xF0, 0x9E},
885 {0xF0, 0x1E},
886 {0xF1, 0x24},
887 {0xF0, 0x9F},
888 {0xF0, 0x1F},
889 {0xF1, 0x23},
890 {0xF0, 0xA0},
891 {0xF0, 0x20},
892 {0xF1, 0x22},
893 {0xF0, 0xA1},
894 {0xF0, 0x21},
895 {0xF1, 0x21},
896 {0xF0, 0xA2},
897 {0xF0, 0x22},
898 {0xF1, 0x20},
899 {0xF0, 0xA3},
900 {0xF0, 0x23},
901 {0xF1, 0x20},
902 {0xF0, 0xA4},
903 {0xF0, 0x24},
904 {0xF1, 0x1F},
905 {0xF0, 0xA5},
906 {0xF0, 0x25},
907 {0xF1, 0x1E},
908 {0xF0, 0xA6},
909 {0xF0, 0x26},
910 {0xF1, 0x1D},
911 {0xF0, 0xA7},
912 {0xF0, 0x27},
913 {0xF1, 0x1C},
914 {0xF0, 0xA8},
915 {0xF0, 0x28},
916 {0xF1, 0x1B},
917 {0xF0, 0xA9},
918 {0xF0, 0x29},
919 {0xF1, 0x1B},
920 {0xF0, 0xAA},
921 {0xF0, 0x2A},
922 {0xF1, 0x1A},
923 {0xF0, 0xAB},
924 {0xF0, 0x2B},
925 {0xF1, 0x1A},
926 {0xF0, 0xAC},
927 {0xF0, 0x2C},
928 {0xF1, 0x19},
929 {0xF0, 0xAD},
930 {0xF0, 0x2D},
931 {0xF1, 0x18},
932 {0xF0, 0xAE},
933 {0xF0, 0x2E},
934 {0xF1, 0x17},
935 {0xF0, 0xAF},
936 {0xF0, 0x2F},
937 {0xF1, 0x16},
938 {0xF0, 0xB0},
939 {0xF0, 0x30},
940 {0xF1, 0x15},
941 {0xF0, 0xB1},
942 {0xF0, 0x31},
943 {0xF1, 0x15},
944 {0xF0, 0xB2},
945 {0xF0, 0x32},
946 {0xF1, 0x15},
947 {0xF0, 0xB3},
948 {0xF0, 0x33},
949 {0xF1, 0x14},
950 {0xF0, 0xB4},
951 {0xF0, 0x34},
952 {0xF1, 0x13},
953 {0xF0, 0xB5},
954 {0xF0, 0x35},
955 {0xF1, 0x12},
956 {0xF0, 0xB6},
957 {0xF0, 0x36},
958 {0xF1, 0x11},
959 {0xF0, 0xB7},
960 {0xF0, 0x37},
961 {0xF1, 0x10},
962 {0xF0, 0xB8},
963 {0xF0, 0x38},
964 {0xF1, 0x0F},
965 {0xF0, 0xB9},
966 {0xF0, 0x39},
967 {0xF1, 0x0E},
968 {0xF0, 0xBA},
969 {0xF0, 0x3A},
970 {0xF1, 0x0D},
971 {0xF0, 0xBB},
972 {0xF0, 0x3B},
973 {0xF1, 0x0C},
974 {0xF0, 0xBC},
975 {0xF0, 0x3C},
976 {0xF1, 0x0B},
977 {0xF0, 0xBD},
978 {0xF0, 0x3D},
979 {0xF1, 0x0B},
980 {0xF0, 0xBE},
981 {0xF0, 0x3E},
982 {0xF1, 0x0A},
983 {0xF0, 0xBF},
984 {0xF0, 0x3F},
985 {0xF1, 0x09},
986 {0xF0, 0x00},
987};
988
989#define CB_VT3253B0_INIT_FOR_AIROHA2230 256
990// For AIROHA
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]991unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]992 {0x00, 0x31},
993 {0x01, 0x00},
994 {0x02, 0x00},
995 {0x03, 0x00},
996 {0x04, 0x00},
997 {0x05, 0x80},
998 {0x06, 0x00},
999 {0x07, 0x00},
1000 {0x08, 0x70},
1001 {0x09, 0x41},
1002 {0x0a, 0x2A},
1003 {0x0b, 0x76},
1004 {0x0c, 0x00},
1005 {0x0d, 0x00},
1006 {0x0e, 0x80},
1007 {0x0f, 0x00},
1008 {0x10, 0x00},
1009 {0x11, 0x00},
1010 {0x12, 0x00},
1011 {0x13, 0x00},
1012 {0x14, 0x00},
1013 {0x15, 0x00},
1014 {0x16, 0x00},
1015 {0x17, 0x00},
1016 {0x18, 0x00},
1017 {0x19, 0x00},
1018 {0x1a, 0x00},
1019 {0x1b, 0x8f},
1020 {0x1c, 0x09},
1021 {0x1d, 0x00},
1022 {0x1e, 0x00},
1023 {0x1f, 0x00},
1024 {0x20, 0x00},
1025 {0x21, 0x00},
1026 {0x22, 0x00},
1027 {0x23, 0x00},
1028 {0x24, 0x00},
1029 {0x25, 0x4a},
1030 {0x26, 0x00},
1031 {0x27, 0x00},
1032 {0x28, 0x00},
1033 {0x29, 0x00},
1034 {0x2a, 0x00},
1035 {0x2b, 0x00},
1036 {0x2c, 0x00},
1037 {0x2d, 0x4a},
1038 {0x2e, 0x00},
1039 {0x2f, 0x0a},
1040 {0x30, 0x26},
1041 {0x31, 0x5b},
1042 {0x32, 0x00},
1043 {0x33, 0x00},
1044 {0x34, 0x00},
1045 {0x35, 0x00},
1046 {0x36, 0xaa},
1047 {0x37, 0xaa},
1048 {0x38, 0xff},
1049 {0x39, 0xff},
1050 {0x3a, 0x79},
1051 {0x3b, 0x00},
1052 {0x3c, 0x00},
1053 {0x3d, 0x0b},
1054 {0x3e, 0x48},
1055 {0x3f, 0x04},
1056 {0x40, 0x00},
1057 {0x41, 0x08},
1058 {0x42, 0x00},
1059 {0x43, 0x08},
1060 {0x44, 0x08},
1061 {0x45, 0x14},
1062 {0x46, 0x05},
1063 {0x47, 0x09},
1064 {0x48, 0x00},
1065 {0x49, 0x00},
1066 {0x4a, 0x00},
1067 {0x4b, 0x00},
1068 {0x4c, 0x09},
1069 {0x4d, 0x73},
1070 {0x4e, 0x00},
1071 {0x4f, 0xc5},
1072 {0x50, 0x15},
1073 {0x51, 0x19},
1074 {0x52, 0x00},
1075 {0x53, 0x00},
1076 {0x54, 0x00},
1077 {0x55, 0x00},
1078 {0x56, 0x00},
1079 {0x57, 0x00},
1080 {0x58, 0x00},
1081 {0x59, 0xb0},
1082 {0x5a, 0x00},
1083 {0x5b, 0x00},
1084 {0x5c, 0x00},
1085 {0x5d, 0x00},
1086 {0x5e, 0x00},
1087 {0x5f, 0x00},
1088 {0x60, 0xe4},
1089 {0x61, 0x80},
1090 {0x62, 0x00},
1091 {0x63, 0x00},
1092 {0x64, 0x00},
1093 {0x65, 0x00},
1094 {0x66, 0x98},
1095 {0x67, 0x0a},
1096 {0x68, 0x00},
1097 {0x69, 0x00},
1098 {0x6a, 0x00},
1099 {0x6b, 0x00},
1100 //{0x6c, 0x80},
1101 {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1102 {0x6d, 0x03},
1103 {0x6e, 0x01},
1104 {0x6f, 0x00},
1105 {0x70, 0x00},
1106 {0x71, 0x00},
1107 {0x72, 0x00},
1108 {0x73, 0x00},
1109 {0x74, 0x00},
1110 {0x75, 0x00},
1111 {0x76, 0x00},
1112 {0x77, 0x00},
1113 {0x78, 0x00},
1114 {0x79, 0x00},
1115 {0x7a, 0x00},
1116 {0x7b, 0x00},
1117 {0x7c, 0x00},
1118 {0x7d, 0x00},
1119 {0x7e, 0x00},
1120 {0x7f, 0x00},
1121 {0x80, 0x8c},
1122 {0x81, 0x01},
1123 {0x82, 0x09},
1124 {0x83, 0x00},
1125 {0x84, 0x00},
1126 {0x85, 0x00},
1127 {0x86, 0x00},
1128 {0x87, 0x00},
1129 {0x88, 0x08},
1130 {0x89, 0x00},
1131 {0x8a, 0x0f},
1132 {0x8b, 0xb7},
1133 {0x8c, 0x88},
1134 {0x8d, 0x47},
1135 {0x8e, 0xaa},
1136 {0x8f, 0x02},
1137 {0x90, 0x22},
1138 {0x91, 0x00},
1139 {0x92, 0x00},
1140 {0x93, 0x00},
1141 {0x94, 0x00},
1142 {0x95, 0x00},
1143 {0x96, 0x00},
1144 {0x97, 0xeb},
1145 {0x98, 0x00},
1146 {0x99, 0x00},
1147 {0x9a, 0x00},
1148 {0x9b, 0x00},
1149 {0x9c, 0x00},
1150 {0x9d, 0x00},
1151 {0x9e, 0x00},
1152 {0x9f, 0x01},
1153 {0xa0, 0x00},
1154 {0xa1, 0x00},
1155 {0xa2, 0x00},
1156 {0xa3, 0x00},
1157 {0xa4, 0x00},
1158 {0xa5, 0x00},
1159 {0xa6, 0x10},
1160 {0xa7, 0x00},
1161 {0xa8, 0x18},
1162 {0xa9, 0x00},
1163 {0xaa, 0x00},
1164 {0xab, 0x00},
1165 {0xac, 0x00},
1166 {0xad, 0x00},
1167 {0xae, 0x00},
1168 {0xaf, 0x18},
1169 {0xb0, 0x38},
1170 {0xb1, 0x30},
1171 {0xb2, 0x00},
1172 {0xb3, 0x00},
1173 {0xb4, 0xff},
1174 {0xb5, 0x0f},
1175 {0xb6, 0xe4},
1176 {0xb7, 0xe2},
1177 {0xb8, 0x00},
1178 {0xb9, 0x00},
1179 {0xba, 0x00},
1180 {0xbb, 0x03},
1181 {0xbc, 0x01},
1182 {0xbd, 0x00},
1183 {0xbe, 0x00},
1184 {0xbf, 0x00},
1185 {0xc0, 0x18},
1186 {0xc1, 0x20},
1187 {0xc2, 0x07},
1188 {0xc3, 0x18},
1189 {0xc4, 0xff},
1190 {0xc5, 0x2c},
1191 {0xc6, 0x0c},
1192 {0xc7, 0x0a},
1193 {0xc8, 0x0e},
1194 {0xc9, 0x01},
1195 {0xca, 0x68},
1196 {0xcb, 0xa7},
1197 {0xcc, 0x3c},
1198 {0xcd, 0x10},
1199 {0xce, 0x00},
1200 {0xcf, 0x25},
1201 {0xd0, 0x40},
1202 {0xd1, 0x12},
1203 {0xd2, 0x00},
1204 {0xd3, 0x00},
1205 {0xd4, 0x10},
1206 {0xd5, 0x28},
1207 {0xd6, 0x80},
1208 {0xd7, 0x2A},
1209 {0xd8, 0x00},
1210 {0xd9, 0x00},
1211 {0xda, 0x00},
1212 {0xdb, 0x00},
1213 {0xdc, 0x00},
1214 {0xdd, 0x00},
1215 {0xde, 0x00},
1216 {0xdf, 0x00},
1217 {0xe0, 0x00},
1218 {0xe1, 0xB3},
1219 {0xe2, 0x00},
1220 {0xe3, 0x00},
1221 {0xe4, 0x00},
1222 {0xe5, 0x10},
1223 {0xe6, 0x00},
1224 {0xe7, 0x1C},
1225 {0xe8, 0x00},
1226 {0xe9, 0xf4},
1227 {0xea, 0x00},
1228 {0xeb, 0xff},
1229 {0xec, 0x79},
1230 {0xed, 0x20},
1231 {0xee, 0x30},
1232 {0xef, 0x01},
1233 {0xf0, 0x00},
1234 {0xf1, 0x3e},
1235 {0xf2, 0x00},
1236 {0xf3, 0x00},
1237 {0xf4, 0x00},
1238 {0xf5, 0x00},
1239 {0xf6, 0x00},
1240 {0xf7, 0x00},
1241 {0xf8, 0x00},
1242 {0xf9, 0x00},
1243 {0xfa, 0x00},
1244 {0xfb, 0x00},
1245 {0xfc, 0x00},
1246 {0xfd, 0x00},
1247 {0xfe, 0x00},
1248 {0xff, 0x00},
1249};
1250
1251
1252
1253#define CB_VT3253B0_INIT_FOR_UW2451 256
1254//For UW2451
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]1255unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1256 {0x00, 0x31},
1257 {0x01, 0x00},
1258 {0x02, 0x00},
1259 {0x03, 0x00},
1260 {0x04, 0x00},
1261 {0x05, 0x81},
1262 {0x06, 0x00},
1263 {0x07, 0x00},
1264 {0x08, 0x38},
1265 {0x09, 0x45},
1266 {0x0a, 0x28},
1267 {0x0b, 0x76},
1268 {0x0c, 0x00},
1269 {0x0d, 0x00},
1270 {0x0e, 0x80},
1271 {0x0f, 0x00},
1272 {0x10, 0x00},
1273 {0x11, 0x00},
1274 {0x12, 0x00},
1275 {0x13, 0x00},
1276 {0x14, 0x00},
1277 {0x15, 0x00},
1278 {0x16, 0x00},
1279 {0x17, 0x00},
1280 {0x18, 0x00},
1281 {0x19, 0x00},
1282 {0x1a, 0x00},
1283 {0x1b, 0x8f},
1284 {0x1c, 0x0f},
1285 {0x1d, 0x00},
1286 {0x1e, 0x00},
1287 {0x1f, 0x00},
1288 {0x20, 0x00},
1289 {0x21, 0x00},
1290 {0x22, 0x00},
1291 {0x23, 0x00},
1292 {0x24, 0x00},
1293 {0x25, 0x4a},
1294 {0x26, 0x00},
1295 {0x27, 0x00},
1296 {0x28, 0x00},
1297 {0x29, 0x00},
1298 {0x2a, 0x00},
1299 {0x2b, 0x00},
1300 {0x2c, 0x00},
1301 {0x2d, 0x18},
1302 {0x2e, 0x00},
1303 {0x2f, 0x0a},
1304 {0x30, 0x26},
1305 {0x31, 0x5b},
1306 {0x32, 0x00},
1307 {0x33, 0x00},
1308 {0x34, 0x00},
1309 {0x35, 0x00},
1310 {0x36, 0xaa},
1311 {0x37, 0xaa},
1312 {0x38, 0xff},
1313 {0x39, 0xff},
1314 {0x3a, 0x00},
1315 {0x3b, 0x00},
1316 {0x3c, 0x00},
1317 {0x3d, 0x03},
1318 {0x3e, 0x1d},
1319 {0x3f, 0x04},
1320 {0x40, 0x00},
1321 {0x41, 0x08},
1322 {0x42, 0x00},
1323 {0x43, 0x08},
1324 {0x44, 0x08},
1325 {0x45, 0x14},
1326 {0x46, 0x05},
1327 {0x47, 0x09},
1328 {0x48, 0x00},
1329 {0x49, 0x00},
1330 {0x4a, 0x00},
1331 {0x4b, 0x00},
1332 {0x4c, 0x09},
1333 {0x4d, 0x90},
1334 {0x4e, 0x00},
1335 {0x4f, 0xc5},
1336 {0x50, 0x15},
1337 {0x51, 0x19},
1338 {0x52, 0x00},
1339 {0x53, 0x00},
1340 {0x54, 0x00},
1341 {0x55, 0x00},
1342 {0x56, 0x00},
1343 {0x57, 0x00},
1344 {0x58, 0x00},
1345 {0x59, 0xb0},
1346 {0x5a, 0x00},
1347 {0x5b, 0x00},
1348 {0x5c, 0x00},
1349 {0x5d, 0x00},
1350 {0x5e, 0x00},
1351 {0x5f, 0x00},
1352 {0x60, 0xb3},
1353 {0x61, 0x81},
1354 {0x62, 0x00},
1355 {0x63, 0x00},
1356 {0x64, 0x00},
1357 {0x65, 0x00},
1358 {0x66, 0x57},
1359 {0x67, 0x6c},
1360 {0x68, 0x00},
1361 {0x69, 0x00},
1362 {0x6a, 0x00},
1363 {0x6b, 0x00},
1364 //{0x6c, 0x80},
1365 {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1366 {0x6d, 0x03},
1367 {0x6e, 0x01},
1368 {0x6f, 0x00},
1369 {0x70, 0x00},
1370 {0x71, 0x00},
1371 {0x72, 0x00},
1372 {0x73, 0x00},
1373 {0x74, 0x00},
1374 {0x75, 0x00},
1375 {0x76, 0x00},
1376 {0x77, 0x00},
1377 {0x78, 0x00},
1378 {0x79, 0x00},
1379 {0x7a, 0x00},
1380 {0x7b, 0x00},
1381 {0x7c, 0x00},
1382 {0x7d, 0x00},
1383 {0x7e, 0x00},
1384 {0x7f, 0x00},
1385 {0x80, 0x8c},
1386 {0x81, 0x00},
1387 {0x82, 0x0e},
1388 {0x83, 0x00},
1389 {0x84, 0x00},
1390 {0x85, 0x00},
1391 {0x86, 0x00},
1392 {0x87, 0x00},
1393 {0x88, 0x08},
1394 {0x89, 0x00},
1395 {0x8a, 0x0e},
1396 {0x8b, 0xa7},
1397 {0x8c, 0x88},
1398 {0x8d, 0x47},
1399 {0x8e, 0xaa},
1400 {0x8f, 0x02},
1401 {0x90, 0x00},
1402 {0x91, 0x00},
1403 {0x92, 0x00},
1404 {0x93, 0x00},
1405 {0x94, 0x00},
1406 {0x95, 0x00},
1407 {0x96, 0x00},
1408 {0x97, 0xe3},
1409 {0x98, 0x00},
1410 {0x99, 0x00},
1411 {0x9a, 0x00},
1412 {0x9b, 0x00},
1413 {0x9c, 0x00},
1414 {0x9d, 0x00},
1415 {0x9e, 0x00},
1416 {0x9f, 0x00},
1417 {0xa0, 0x00},
1418 {0xa1, 0x00},
1419 {0xa2, 0x00},
1420 {0xa3, 0x00},
1421 {0xa4, 0x00},
1422 {0xa5, 0x00},
1423 {0xa6, 0x10},
1424 {0xa7, 0x00},
1425 {0xa8, 0x18},
1426 {0xa9, 0x00},
1427 {0xaa, 0x00},
1428 {0xab, 0x00},
1429 {0xac, 0x00},
1430 {0xad, 0x00},
1431 {0xae, 0x00},
1432 {0xaf, 0x18},
1433 {0xb0, 0x18},
1434 {0xb1, 0x30},
1435 {0xb2, 0x00},
1436 {0xb3, 0x00},
1437 {0xb4, 0x00},
1438 {0xb5, 0x00},
1439 {0xb6, 0x00},
1440 {0xb7, 0x00},
1441 {0xb8, 0x00},
1442 {0xb9, 0x00},
1443 {0xba, 0x00},
1444 {0xbb, 0x03},
1445 {0xbc, 0x01},
1446 {0xbd, 0x00},
1447 {0xbe, 0x00},
1448 {0xbf, 0x00},
1449 {0xc0, 0x10},
1450 {0xc1, 0x20},
1451 {0xc2, 0x00},
1452 {0xc3, 0x20},
1453 {0xc4, 0x00},
1454 {0xc5, 0x2c},
1455 {0xc6, 0x1c},
1456 {0xc7, 0x10},
1457 {0xc8, 0x10},
1458 {0xc9, 0x01},
1459 {0xca, 0x68},
1460 {0xcb, 0xa7},
1461 {0xcc, 0x3c},
1462 {0xcd, 0x09},
1463 {0xce, 0x00},
1464 {0xcf, 0x20},
1465 {0xd0, 0x40},
1466 {0xd1, 0x10},
1467 {0xd2, 0x00},
1468 {0xd3, 0x00},
1469 {0xd4, 0x20},
1470 {0xd5, 0x28},
1471 {0xd6, 0xa0},
1472 {0xd7, 0x2a},
1473 {0xd8, 0x00},
1474 {0xd9, 0x00},
1475 {0xda, 0x00},
1476 {0xdb, 0x00},
1477 {0xdc, 0x00},
1478 {0xdd, 0x00},
1479 {0xde, 0x00},
1480 {0xdf, 0x00},
1481 {0xe0, 0x00},
1482 {0xe1, 0xd3},
1483 {0xe2, 0xc0},
1484 {0xe3, 0x00},
1485 {0xe4, 0x00},
1486 {0xe5, 0x10},
1487 {0xe6, 0x00},
1488 {0xe7, 0x12},
1489 {0xe8, 0x12},
1490 {0xe9, 0x34},
1491 {0xea, 0x00},
1492 {0xeb, 0xff},
1493 {0xec, 0x79},
1494 {0xed, 0x20},
1495 {0xee, 0x30},
1496 {0xef, 0x01},
1497 {0xf0, 0x00},
1498 {0xf1, 0x3e},
1499 {0xf2, 0x00},
1500 {0xf3, 0x00},
1501 {0xf4, 0x00},
1502 {0xf5, 0x00},
1503 {0xf6, 0x00},
1504 {0xf7, 0x00},
1505 {0xf8, 0x00},
1506 {0xf9, 0x00},
1507 {0xfa, 0x00},
1508 {0xfb, 0x00},
1509 {0xfc, 0x00},
1510 {0xfd, 0x00},
1511 {0xfe, 0x00},
1512 {0xff, 0x00},
1513};
1514
1515#define CB_VT3253B0_AGC 193
1516// For AIROHA
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]1517unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1518 {0xF0, 0x00},
1519 {0xF1, 0x00},
1520 {0xF0, 0x80},
1521 {0xF0, 0x01},
1522 {0xF1, 0x00},
1523 {0xF0, 0x81},
1524 {0xF0, 0x02},
1525 {0xF1, 0x02},
1526 {0xF0, 0x82},
1527 {0xF0, 0x03},
1528 {0xF1, 0x04},
1529 {0xF0, 0x83},
1530 {0xF0, 0x03},
1531 {0xF1, 0x04},
1532 {0xF0, 0x84},
1533 {0xF0, 0x04},
1534 {0xF1, 0x06},
1535 {0xF0, 0x85},
1536 {0xF0, 0x05},
1537 {0xF1, 0x06},
1538 {0xF0, 0x86},
1539 {0xF0, 0x06},
1540 {0xF1, 0x06},
1541 {0xF0, 0x87},
1542 {0xF0, 0x07},
1543 {0xF1, 0x08},
1544 {0xF0, 0x88},
1545 {0xF0, 0x08},
1546 {0xF1, 0x08},
1547 {0xF0, 0x89},
1548 {0xF0, 0x09},
1549 {0xF1, 0x0A},
1550 {0xF0, 0x8A},
1551 {0xF0, 0x0A},
1552 {0xF1, 0x0A},
1553 {0xF0, 0x8B},
1554 {0xF0, 0x0B},
1555 {0xF1, 0x0C},
1556 {0xF0, 0x8C},
1557 {0xF0, 0x0C},
1558 {0xF1, 0x0C},
1559 {0xF0, 0x8D},
1560 {0xF0, 0x0D},
1561 {0xF1, 0x0E},
1562 {0xF0, 0x8E},
1563 {0xF0, 0x0E},
1564 {0xF1, 0x0E},
1565 {0xF0, 0x8F},
1566 {0xF0, 0x0F},
1567 {0xF1, 0x10},
1568 {0xF0, 0x90},
1569 {0xF0, 0x10},
1570 {0xF1, 0x10},
1571 {0xF0, 0x91},
1572 {0xF0, 0x11},
1573 {0xF1, 0x12},
1574 {0xF0, 0x92},
1575 {0xF0, 0x12},
1576 {0xF1, 0x12},
1577 {0xF0, 0x93},
1578 {0xF0, 0x13},
1579 {0xF1, 0x14},
1580 {0xF0, 0x94},
1581 {0xF0, 0x14},
1582 {0xF1, 0x14},
1583 {0xF0, 0x95},
1584 {0xF0, 0x15},
1585 {0xF1, 0x16},
1586 {0xF0, 0x96},
1587 {0xF0, 0x16},
1588 {0xF1, 0x16},
1589 {0xF0, 0x97},
1590 {0xF0, 0x17},
1591 {0xF1, 0x18},
1592 {0xF0, 0x98},
1593 {0xF0, 0x18},
1594 {0xF1, 0x18},
1595 {0xF0, 0x99},
1596 {0xF0, 0x19},
1597 {0xF1, 0x1A},
1598 {0xF0, 0x9A},
1599 {0xF0, 0x1A},
1600 {0xF1, 0x1A},
1601 {0xF0, 0x9B},
1602 {0xF0, 0x1B},
1603 {0xF1, 0x1C},
1604 {0xF0, 0x9C},
1605 {0xF0, 0x1C},
1606 {0xF1, 0x1C},
1607 {0xF0, 0x9D},
1608 {0xF0, 0x1D},
1609 {0xF1, 0x1E},
1610 {0xF0, 0x9E},
1611 {0xF0, 0x1E},
1612 {0xF1, 0x1E},
1613 {0xF0, 0x9F},
1614 {0xF0, 0x1F},
1615 {0xF1, 0x20},
1616 {0xF0, 0xA0},
1617 {0xF0, 0x20},
1618 {0xF1, 0x20},
1619 {0xF0, 0xA1},
1620 {0xF0, 0x21},
1621 {0xF1, 0x22},
1622 {0xF0, 0xA2},
1623 {0xF0, 0x22},
1624 {0xF1, 0x22},
1625 {0xF0, 0xA3},
1626 {0xF0, 0x23},
1627 {0xF1, 0x24},
1628 {0xF0, 0xA4},
1629 {0xF0, 0x24},
1630 {0xF1, 0x24},
1631 {0xF0, 0xA5},
1632 {0xF0, 0x25},
1633 {0xF1, 0x26},
1634 {0xF0, 0xA6},
1635 {0xF0, 0x26},
1636 {0xF1, 0x26},
1637 {0xF0, 0xA7},
1638 {0xF0, 0x27},
1639 {0xF1, 0x28},
1640 {0xF0, 0xA8},
1641 {0xF0, 0x28},
1642 {0xF1, 0x28},
1643 {0xF0, 0xA9},
1644 {0xF0, 0x29},
1645 {0xF1, 0x2A},
1646 {0xF0, 0xAA},
1647 {0xF0, 0x2A},
1648 {0xF1, 0x2A},
1649 {0xF0, 0xAB},
1650 {0xF0, 0x2B},
1651 {0xF1, 0x2C},
1652 {0xF0, 0xAC},
1653 {0xF0, 0x2C},
1654 {0xF1, 0x2C},
1655 {0xF0, 0xAD},
1656 {0xF0, 0x2D},
1657 {0xF1, 0x2E},
1658 {0xF0, 0xAE},
1659 {0xF0, 0x2E},
1660 {0xF1, 0x2E},
1661 {0xF0, 0xAF},
1662 {0xF0, 0x2F},
1663 {0xF1, 0x30},
1664 {0xF0, 0xB0},
1665 {0xF0, 0x30},
1666 {0xF1, 0x30},
1667 {0xF0, 0xB1},
1668 {0xF0, 0x31},
1669 {0xF1, 0x32},
1670 {0xF0, 0xB2},
1671 {0xF0, 0x32},
1672 {0xF1, 0x32},
1673 {0xF0, 0xB3},
1674 {0xF0, 0x33},
1675 {0xF1, 0x34},
1676 {0xF0, 0xB4},
1677 {0xF0, 0x34},
1678 {0xF1, 0x34},
1679 {0xF0, 0xB5},
1680 {0xF0, 0x35},
1681 {0xF1, 0x36},
1682 {0xF0, 0xB6},
1683 {0xF0, 0x36},
1684 {0xF1, 0x36},
1685 {0xF0, 0xB7},
1686 {0xF0, 0x37},
1687 {0xF1, 0x38},
1688 {0xF0, 0xB8},
1689 {0xF0, 0x38},
1690 {0xF1, 0x38},
1691 {0xF0, 0xB9},
1692 {0xF0, 0x39},
1693 {0xF1, 0x3A},
1694 {0xF0, 0xBA},
1695 {0xF0, 0x3A},
1696 {0xF1, 0x3A},
1697 {0xF0, 0xBB},
1698 {0xF0, 0x3B},
1699 {0xF1, 0x3C},
1700 {0xF0, 0xBC},
1701 {0xF0, 0x3C},
1702 {0xF1, 0x3C},
1703 {0xF0, 0xBD},
1704 {0xF0, 0x3D},
1705 {0xF1, 0x3E},
1706 {0xF0, 0xBE},
1707 {0xF0, 0x3E},
1708 {0xF1, 0x3E},
1709 {0xF0, 0xBF},
1710 {0xF0, 0x00},
1711};
1712
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]1713const unsigned short awcFrameTime[MAX_RATE] =
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1714{10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216};
1715
1716
1717/*--------------------- Static Functions --------------------------*/
1718
1719static
Charles Clémente3fd16d2010-06-02 09:52:02 -0700[diff] [blame]1720unsigned long
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1721s_ulGetRatio(PSDevice pDevice);
1722
1723static
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]1724void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1725s_vChangeAntenna(
Charles Clément3a215e02010-05-12 20:54:39 -0700[diff] [blame]1726 PSDevice pDevice
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1727 );
1728
1729static
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]1730void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1731s_vChangeAntenna (
Charles Clément3a215e02010-05-12 20:54:39 -0700[diff] [blame]1732 PSDevice pDevice
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1733 )
1734{
1735
1736#ifdef PLICE_DEBUG
1737 //printk("Enter s_vChangeAntenna:original RxMode is %d,TxMode is %d\n",pDevice->byRxAntennaMode,pDevice->byTxAntennaMode);
1738#endif
1739 if ( pDevice->dwRxAntennaSel == 0) {
1740 pDevice->dwRxAntennaSel=1;
Charles Clément1b120682010-08-01 17:15:48 +0200[diff] [blame]1741 if (pDevice->bTxRxAntInv == true)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1742 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1743 else
1744 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1745 } else {
1746 pDevice->dwRxAntennaSel=0;
Charles Clément1b120682010-08-01 17:15:48 +0200[diff] [blame]1747 if (pDevice->bTxRxAntInv == true)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1748 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1749 else
1750 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1751 }
1752 if ( pDevice->dwTxAntennaSel == 0) {
1753 pDevice->dwTxAntennaSel=1;
1754 BBvSetTxAntennaMode(pDevice->PortOffset, ANT_B);
1755 } else {
1756 pDevice->dwTxAntennaSel=0;
1757 BBvSetTxAntennaMode(pDevice->PortOffset, ANT_A);
1758 }
1759}
1760
1761
1762/*--------------------- Export Variables --------------------------*/
1763/*
1764 * Description: Calculate data frame transmitting time
1765 *
1766 * Parameters:
1767 * In:
1768 * byPreambleType - Preamble Type
1769 * byPktType - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1770 * cbFrameLength - Baseband Type
1771 * wRate - Tx Rate
1772 * Out:
1773 *
1774 * Return Value: FrameTime
1775 *
1776 */
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]1777unsigned int
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1778BBuGetFrameTime (
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]1779 unsigned char byPreambleType,
1780 unsigned char byPktType,
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]1781 unsigned int cbFrameLength,
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]1782 unsigned short wRate
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1783 )
1784{
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]1785 unsigned int uFrameTime;
1786 unsigned int uPreamble;
1787 unsigned int uTmp;
1788 unsigned int uRateIdx = (unsigned int) wRate;
1789 unsigned int uRate = 0;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1790
1791
1792 if (uRateIdx > RATE_54M) {
Jim Lieb612822f2009-08-12 14:54:03 -0700[diff] [blame]1793 ASSERT(0);
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1794 return 0;
1795 }
1796
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]1797 uRate = (unsigned int) awcFrameTime[uRateIdx];
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1798
1799 if (uRateIdx <= 3) { //CCK mode
1800
1801 if (byPreambleType == 1) {//Short
1802 uPreamble = 96;
1803 } else {
1804 uPreamble = 192;
1805 }
1806 uFrameTime = (cbFrameLength * 80) / uRate; //?????
1807 uTmp = (uFrameTime * uRate) / 80;
1808 if (cbFrameLength != uTmp) {
1809 uFrameTime ++;
1810 }
1811
1812 return (uPreamble + uFrameTime);
1813 }
1814 else {
1815 uFrameTime = (cbFrameLength * 8 + 22) / uRate; //????????
1816 uTmp = ((uFrameTime * uRate) - 22) / 8;
1817 if(cbFrameLength != uTmp) {
1818 uFrameTime ++;
1819 }
1820 uFrameTime = uFrameTime * 4; //???????
1821 if(byPktType != PK_TYPE_11A) {
1822 uFrameTime += 6; //??????
1823 }
1824 return (20 + uFrameTime); //??????
1825 }
1826}
1827
1828/*
1829 * Description: Caculate Length, Service, and Signal fields of Phy for Tx
1830 *
1831 * Parameters:
1832 * In:
1833 * pDevice - Device Structure
1834 * cbFrameLength - Tx Frame Length
1835 * wRate - Tx Rate
1836 * Out:
1837 * pwPhyLen - pointer to Phy Length field
1838 * pbyPhySrv - pointer to Phy Service field
1839 * pbyPhySgn - pointer to Phy Signal field
1840 *
1841 * Return Value: none
1842 *
1843 */
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]1844void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1845BBvCaculateParameter (
Charles Clément3a215e02010-05-12 20:54:39 -0700[diff] [blame]1846 PSDevice pDevice,
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]1847 unsigned int cbFrameLength,
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]1848 unsigned short wRate,
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]1849 unsigned char byPacketType,
Charles Clément15df6c22010-06-05 15:13:48 -0700[diff] [blame]1850 unsigned short *pwPhyLen,
Charles Clément2989e962010-06-05 15:13:47 -0700[diff] [blame]1851 unsigned char *pbyPhySrv,
1852 unsigned char *pbyPhySgn
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1853 )
1854{
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]1855 unsigned int cbBitCount;
1856 unsigned int cbUsCount = 0;
1857 unsigned int cbTmp;
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]1858 bool bExtBit;
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]1859 unsigned char byPreambleType = pDevice->byPreambleType;
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]1860 bool bCCK = pDevice->bCCK;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1861
1862 cbBitCount = cbFrameLength * 8;
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]1863 bExtBit = false;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1864
1865 switch (wRate) {
1866 case RATE_1M :
1867 cbUsCount = cbBitCount;
1868 *pbyPhySgn = 0x00;
1869 break;
1870
1871 case RATE_2M :
1872 cbUsCount = cbBitCount / 2;
1873 if (byPreambleType == 1)
1874 *pbyPhySgn = 0x09;
1875 else // long preamble
1876 *pbyPhySgn = 0x01;
1877 break;
1878
1879 case RATE_5M :
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]1880 if (bCCK == false)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1881 cbBitCount ++;
1882 cbUsCount = (cbBitCount * 10) / 55;
1883 cbTmp = (cbUsCount * 55) / 10;
1884 if (cbTmp != cbBitCount)
1885 cbUsCount ++;
1886 if (byPreambleType == 1)
1887 *pbyPhySgn = 0x0a;
1888 else // long preamble
1889 *pbyPhySgn = 0x02;
1890 break;
1891
1892 case RATE_11M :
1893
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]1894 if (bCCK == false)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1895 cbBitCount ++;
1896 cbUsCount = cbBitCount / 11;
1897 cbTmp = cbUsCount * 11;
1898 if (cbTmp != cbBitCount) {
1899 cbUsCount ++;
1900 if ((cbBitCount - cbTmp) <= 3)
Charles Clément1b120682010-08-01 17:15:48 +0200[diff] [blame]1901 bExtBit = true;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1902 }
1903 if (byPreambleType == 1)
1904 *pbyPhySgn = 0x0b;
1905 else // long preamble
1906 *pbyPhySgn = 0x03;
1907 break;
1908
1909 case RATE_6M :
1910 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1911 *pbyPhySgn = 0x9B; //1001 1011
1912 }
1913 else {//11g, 2.4GHZ
1914 *pbyPhySgn = 0x8B; //1000 1011
1915 }
1916 break;
1917
1918 case RATE_9M :
1919 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1920 *pbyPhySgn = 0x9F; //1001 1111
1921 }
1922 else {//11g, 2.4GHZ
1923 *pbyPhySgn = 0x8F; //1000 1111
1924 }
1925 break;
1926
1927 case RATE_12M :
1928 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1929 *pbyPhySgn = 0x9A; //1001 1010
1930 }
1931 else {//11g, 2.4GHZ
1932 *pbyPhySgn = 0x8A; //1000 1010
1933 }
1934 break;
1935
1936 case RATE_18M :
1937 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1938 *pbyPhySgn = 0x9E; //1001 1110
1939 }
1940 else {//11g, 2.4GHZ
1941 *pbyPhySgn = 0x8E; //1000 1110
1942 }
1943 break;
1944
1945 case RATE_24M :
1946 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1947 *pbyPhySgn = 0x99; //1001 1001
1948 }
1949 else {//11g, 2.4GHZ
1950 *pbyPhySgn = 0x89; //1000 1001
1951 }
1952 break;
1953
1954 case RATE_36M :
1955 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1956 *pbyPhySgn = 0x9D; //1001 1101
1957 }
1958 else {//11g, 2.4GHZ
1959 *pbyPhySgn = 0x8D; //1000 1101
1960 }
1961 break;
1962
1963 case RATE_48M :
1964 if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1965 *pbyPhySgn = 0x98; //1001 1000
1966 }
1967 else {//11g, 2.4GHZ
1968 *pbyPhySgn = 0x88; //1000 1000
1969 }
1970 break;
1971
1972 case RATE_54M :
1973 if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1974 *pbyPhySgn = 0x9C; //1001 1100
1975 }
1976 else {//11g, 2.4GHZ
1977 *pbyPhySgn = 0x8C; //1000 1100
1978 }
1979 break;
1980
1981 default :
1982 if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1983 *pbyPhySgn = 0x9C; //1001 1100
1984 }
1985 else {//11g, 2.4GHZ
1986 *pbyPhySgn = 0x8C; //1000 1100
1987 }
1988 break;
1989 }
1990
1991 if (byPacketType == PK_TYPE_11B) {
1992 *pbyPhySrv = 0x00;
1993 if (bExtBit)
1994 *pbyPhySrv = *pbyPhySrv | 0x80;
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]1995 *pwPhyLen = (unsigned short)cbUsCount;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]1996 }
1997 else {
1998 *pbyPhySrv = 0x00;
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]1999 *pwPhyLen = (unsigned short)cbFrameLength;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2000 }
2001}
2002
2003/*
2004 * Description: Read a byte from BASEBAND, by embeded programming
2005 *
2006 * Parameters:
2007 * In:
2008 * dwIoBase - I/O base address
2009 * byBBAddr - address of register in Baseband
2010 * Out:
2011 * pbyData - data read
2012 *
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2013 * Return Value: true if succeeded; false if failed.
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2014 *
2015 */
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]2016bool BBbReadEmbeded (unsigned long dwIoBase, unsigned char byBBAddr, unsigned char *pbyData)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2017{
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]2018 unsigned short ww;
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2019 unsigned char byValue;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2020
2021 // BB reg offset
2022 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2023
2024 // turn on REGR
2025 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
2026 // W_MAX_TIMEOUT is the timeout period
2027 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2028 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
Jim Lieb256a8162009-08-12 14:54:16 -0700[diff] [blame]2029 if (byValue & BBREGCTL_DONE)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2030 break;
2031 }
2032
2033 // get BB data
2034 VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
2035
2036 if (ww == W_MAX_TIMEOUT) {
2037 DBG_PORT80(0x30);
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2038 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x30)\n");
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2039 return false;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2040 }
Charles Clément1b120682010-08-01 17:15:48 +0200[diff] [blame]2041 return true;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2042}
2043
2044
2045/*
2046 * Description: Write a Byte to BASEBAND, by embeded programming
2047 *
2048 * Parameters:
2049 * In:
2050 * dwIoBase - I/O base address
2051 * byBBAddr - address of register in Baseband
2052 * byData - data to write
2053 * Out:
2054 * none
2055 *
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2056 * Return Value: true if succeeded; false if failed.
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2057 *
2058 */
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]2059bool BBbWriteEmbeded (unsigned long dwIoBase, unsigned char byBBAddr, unsigned char byData)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2060{
Charles Clément2986db52010-06-24 11:02:26 -0700[diff] [blame]2061 unsigned short ww;
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2062 unsigned char byValue;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2063
2064 // BB reg offset
2065 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2066 // set BB data
2067 VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
2068
2069 // turn on BBREGCTL_REGW
2070 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
2071 // W_MAX_TIMEOUT is the timeout period
2072 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2073 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
Jim Lieb256a8162009-08-12 14:54:16 -0700[diff] [blame]2074 if (byValue & BBREGCTL_DONE)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2075 break;
2076 }
2077
2078 if (ww == W_MAX_TIMEOUT) {
2079 DBG_PORT80(0x31);
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2080 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x31)\n");
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2081 return false;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2082 }
Charles Clément1b120682010-08-01 17:15:48 +0200[diff] [blame]2083 return true;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2084}
2085
2086
2087/*
2088 * Description: Test if all bits are set for the Baseband register
2089 *
2090 * Parameters:
2091 * In:
2092 * dwIoBase - I/O base address
2093 * byBBAddr - address of register in Baseband
2094 * byTestBits - TestBits
2095 * Out:
2096 * none
2097 *
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2098 * Return Value: true if all TestBits are set; false otherwise.
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2099 *
2100 */
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]2101bool BBbIsRegBitsOn (unsigned long dwIoBase, unsigned char byBBAddr, unsigned char byTestBits)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2102{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2103 unsigned char byOrgData;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2104
2105 BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
Jim Lieb256a8162009-08-12 14:54:16 -0700[diff] [blame]2106 return (byOrgData & byTestBits) == byTestBits;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2107}
2108
2109
2110/*
2111 * Description: Test if all bits are clear for the Baseband register
2112 *
2113 * Parameters:
2114 * In:
2115 * dwIoBase - I/O base address
2116 * byBBAddr - address of register in Baseband
2117 * byTestBits - TestBits
2118 * Out:
2119 * none
2120 *
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2121 * Return Value: true if all TestBits are clear; false otherwise.
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2122 *
2123 */
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]2124bool BBbIsRegBitsOff (unsigned long dwIoBase, unsigned char byBBAddr, unsigned char byTestBits)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2125{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2126 unsigned char byOrgData;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2127
2128 BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
Jim Lieb256a8162009-08-12 14:54:16 -0700[diff] [blame]2129 return (byOrgData & byTestBits) == 0;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2130}
2131
2132/*
2133 * Description: VIA VT3253 Baseband chip init function
2134 *
2135 * Parameters:
2136 * In:
2137 * dwIoBase - I/O base address
2138 * byRevId - Revision ID
2139 * byRFType - RF type
2140 * Out:
2141 * none
2142 *
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2143 * Return Value: true if succeeded; false if failed.
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2144 *
2145 */
2146
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]2147bool BBbVT3253Init (PSDevice pDevice)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2148{
Charles Clément7b6a0012010-08-01 17:15:50 +0200[diff] [blame]2149 bool bResult = true;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2150 int ii;
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2151 unsigned long dwIoBase = pDevice->PortOffset;
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2152 unsigned char byRFType = pDevice->byRFType;
2153 unsigned char byLocalID = pDevice->byLocalID;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2154
2155 if (byRFType == RF_RFMD2959) {
2156 if (byLocalID <= REV_ID_VT3253_A1) {
2157 for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) {
2158 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253InitTab_RFMD[ii][0],byVT3253InitTab_RFMD[ii][1]);
2159 }
2160 } else {
2161 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) {
2162 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_RFMD[ii][0],byVT3253B0_RFMD[ii][1]);
2163 }
2164 for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) {
2165 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC4_RFMD2959[ii][0],byVT3253B0_AGC4_RFMD2959[ii][1]);
2166 }
2167 VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2168 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2169 }
2170 pDevice->abyBBVGA[0] = 0x18;
2171 pDevice->abyBBVGA[1] = 0x0A;
2172 pDevice->abyBBVGA[2] = 0x0;
2173 pDevice->abyBBVGA[3] = 0x0;
2174 pDevice->ldBmThreshold[0] = -70;
2175 pDevice->ldBmThreshold[1] = -50;
2176 pDevice->ldBmThreshold[2] = 0;
2177 pDevice->ldBmThreshold[3] = 0;
2178 } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S) ) {
2179 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2180 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2181 }
2182 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2183 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2184 }
2185 pDevice->abyBBVGA[0] = 0x1C;
2186 pDevice->abyBBVGA[1] = 0x10;
2187 pDevice->abyBBVGA[2] = 0x0;
2188 pDevice->abyBBVGA[3] = 0x0;
2189 pDevice->ldBmThreshold[0] = -70;
2190 pDevice->ldBmThreshold[1] = -48;
2191 pDevice->ldBmThreshold[2] = 0;
2192 pDevice->ldBmThreshold[3] = 0;
2193 } else if (byRFType == RF_UW2451) {
2194 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2195 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2196 }
2197 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2198 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2199 }
2200 VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2201 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2202
2203 pDevice->abyBBVGA[0] = 0x14;
2204 pDevice->abyBBVGA[1] = 0x0A;
2205 pDevice->abyBBVGA[2] = 0x0;
2206 pDevice->abyBBVGA[3] = 0x0;
2207 pDevice->ldBmThreshold[0] = -60;
2208 pDevice->ldBmThreshold[1] = -50;
2209 pDevice->ldBmThreshold[2] = 0;
2210 pDevice->ldBmThreshold[3] = 0;
2211 } else if (byRFType == RF_UW2452) {
2212 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2213 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2214 }
2215 // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2216 //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2217 // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2218 //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2219 // Select VC1/VC2, CR215 = 0x02->0x06
2220 bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2221
2222 //{{RobertYu:20050125, request by Jack
2223 bResult &= BBbWriteEmbeded(dwIoBase,0x90,0x20);
2224 bResult &= BBbWriteEmbeded(dwIoBase,0x97,0xeb);
2225 //}}
2226
2227 //{{RobertYu:20050221, request by Jack
2228 bResult &= BBbWriteEmbeded(dwIoBase,0xa6,0x00);
2229 bResult &= BBbWriteEmbeded(dwIoBase,0xa8,0x30);
2230 //}}
2231 bResult &= BBbWriteEmbeded(dwIoBase,0xb0,0x58);
2232
2233 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2234 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2235 }
2236 //VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23); // RobertYu: 20050104, 20050131 disable PA_Delay
2237 //MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0); // RobertYu: 20050104, 20050131 disable PA_Delay
2238
2239 pDevice->abyBBVGA[0] = 0x14;
2240 pDevice->abyBBVGA[1] = 0x0A;
2241 pDevice->abyBBVGA[2] = 0x0;
2242 pDevice->abyBBVGA[3] = 0x0;
2243 pDevice->ldBmThreshold[0] = -60;
2244 pDevice->ldBmThreshold[1] = -50;
2245 pDevice->ldBmThreshold[2] = 0;
2246 pDevice->ldBmThreshold[3] = 0;
2247 //}} RobertYu
2248
2249 } else if (byRFType == RF_VT3226) {
2250 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2251 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2252 }
2253 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2254 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2255 }
2256 pDevice->abyBBVGA[0] = 0x1C;
2257 pDevice->abyBBVGA[1] = 0x10;
2258 pDevice->abyBBVGA[2] = 0x0;
2259 pDevice->abyBBVGA[3] = 0x0;
2260 pDevice->ldBmThreshold[0] = -70;
2261 pDevice->ldBmThreshold[1] = -48;
2262 pDevice->ldBmThreshold[2] = 0;
2263 pDevice->ldBmThreshold[3] = 0;
2264 // Fix VT3226 DFC system timing issue
2265 MACvSetRFLE_LatchBase(dwIoBase);
2266 //{{ RobertYu: 20050104
2267 } else if (byRFType == RF_AIROHA7230) {
2268 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2269 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2270 }
2271
2272 //{{ RobertYu:20050223, request by JerryChung
2273 // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2274 //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2275 // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2276 //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2277 // Select VC1/VC2, CR215 = 0x02->0x06
2278 bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2279 //}}
2280
2281 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2282 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2283 }
2284 pDevice->abyBBVGA[0] = 0x1C;
2285 pDevice->abyBBVGA[1] = 0x10;
2286 pDevice->abyBBVGA[2] = 0x0;
2287 pDevice->abyBBVGA[3] = 0x0;
2288 pDevice->ldBmThreshold[0] = -70;
2289 pDevice->ldBmThreshold[1] = -48;
2290 pDevice->ldBmThreshold[2] = 0;
2291 pDevice->ldBmThreshold[3] = 0;
2292 //}} RobertYu
2293 } else {
2294 // No VGA Table now
Charles Clément5a5a2a62010-08-01 17:15:49 +0200[diff] [blame]2295 pDevice->bUpdateBBVGA = false;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2296 pDevice->abyBBVGA[0] = 0x1C;
2297 }
2298
2299 if (byLocalID > REV_ID_VT3253_A1) {
2300 BBbWriteEmbeded(dwIoBase, 0x04, 0x7F);
2301 BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);
2302 }
2303
2304 return bResult;
2305}
2306
2307
2308
2309/*
2310 * Description: Read All Baseband Registers
2311 *
2312 * Parameters:
2313 * In:
2314 * dwIoBase - I/O base address
2315 * pbyBBRegs - Point to struct that stores Baseband Registers
2316 * Out:
2317 * none
2318 *
2319 * Return Value: none
2320 *
2321 */
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2322void BBvReadAllRegs (unsigned long dwIoBase, unsigned char *pbyBBRegs)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2323{
2324 int ii;
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2325 unsigned char byBase = 1;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2326 for (ii = 0; ii < BB_MAX_CONTEXT_SIZE; ii++) {
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2327 BBbReadEmbeded(dwIoBase, (unsigned char)(ii*byBase), pbyBBRegs);
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2328 pbyBBRegs += byBase;
2329 }
2330}
2331
2332/*
2333 * Description: Turn on BaseBand Loopback mode
2334 *
2335 * Parameters:
2336 * In:
2337 * dwIoBase - I/O base address
2338 * bCCK - If CCK is set
2339 * Out:
2340 * none
2341 *
2342 * Return Value: none
2343 *
2344 */
2345
2346
2347void BBvLoopbackOn (PSDevice pDevice)
2348{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2349 unsigned char byData;
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2350 unsigned long dwIoBase = pDevice->PortOffset;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2351
2352 //CR C9 = 0x00
2353 BBbReadEmbeded(dwIoBase, 0xC9, &pDevice->byBBCRc9);//CR201
2354 BBbWriteEmbeded(dwIoBase, 0xC9, 0);
2355 BBbReadEmbeded(dwIoBase, 0x4D, &pDevice->byBBCR4d);//CR77
2356 BBbWriteEmbeded(dwIoBase, 0x4D, 0x90);
2357
2358 //CR 88 = 0x02(CCK), 0x03(OFDM)
2359 BBbReadEmbeded(dwIoBase, 0x88, &pDevice->byBBCR88);//CR136
2360
2361 if (pDevice->uConnectionRate <= RATE_11M) { //CCK
2362 // Enable internal digital loopback: CR33 |= 0000 0001
2363 BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2364 BBbWriteEmbeded(dwIoBase, 0x21, (unsigned char)(byData | 0x01));//CR33
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2365 // CR154 = 0x00
2366 BBbWriteEmbeded(dwIoBase, 0x9A, 0); //CR154
2367
2368 BBbWriteEmbeded(dwIoBase, 0x88, 0x02);//CR239
2369 }
2370 else { //OFDM
2371 // Enable internal digital loopback:CR154 |= 0000 0001
2372 BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2373 BBbWriteEmbeded(dwIoBase, 0x9A, (unsigned char)(byData | 0x01));//CR154
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2374 // CR33 = 0x00
2375 BBbWriteEmbeded(dwIoBase, 0x21, 0); //CR33
2376
2377 BBbWriteEmbeded(dwIoBase, 0x88, 0x03);//CR239
2378 }
2379
2380 //CR14 = 0x00
2381 BBbWriteEmbeded(dwIoBase, 0x0E, 0);//CR14
2382
2383 // Disable TX_IQUN
2384 BBbReadEmbeded(pDevice->PortOffset, 0x09, &pDevice->byBBCR09);
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2385 BBbWriteEmbeded(pDevice->PortOffset, 0x09, (unsigned char)(pDevice->byBBCR09 & 0xDE));
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2386}
2387
2388/*
2389 * Description: Turn off BaseBand Loopback mode
2390 *
2391 * Parameters:
2392 * In:
2393 * pDevice - Device Structure
2394 *
2395 * Out:
2396 * none
2397 *
2398 * Return Value: none
2399 *
2400 */
2401void BBvLoopbackOff (PSDevice pDevice)
2402{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2403 unsigned char byData;
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2404 unsigned long dwIoBase = pDevice->PortOffset;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2405
2406 BBbWriteEmbeded(dwIoBase, 0xC9, pDevice->byBBCRc9);//CR201
2407 BBbWriteEmbeded(dwIoBase, 0x88, pDevice->byBBCR88);//CR136
2408 BBbWriteEmbeded(dwIoBase, 0x09, pDevice->byBBCR09);//CR136
2409 BBbWriteEmbeded(dwIoBase, 0x4D, pDevice->byBBCR4d);//CR77
2410
2411 if (pDevice->uConnectionRate <= RATE_11M) { // CCK
2412 // Set the CR33 Bit2 to disable internal Loopback.
2413 BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2414 BBbWriteEmbeded(dwIoBase, 0x21, (unsigned char)(byData & 0xFE));//CR33
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2415 }
2416 else { // OFDM
2417 BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2418 BBbWriteEmbeded(dwIoBase, 0x9A, (unsigned char)(byData & 0xFE));//CR154
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2419 }
2420 BBbReadEmbeded(dwIoBase, 0x0E, &byData);//CR14
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2421 BBbWriteEmbeded(dwIoBase, 0x0E, (unsigned char)(byData | 0x80));//CR14
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2422
2423}
2424
2425
2426
2427/*
2428 * Description: Set ShortSlotTime mode
2429 *
2430 * Parameters:
2431 * In:
2432 * pDevice - Device Structure
2433 * Out:
2434 * none
2435 *
2436 * Return Value: none
2437 *
2438 */
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2439void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2440BBvSetShortSlotTime (PSDevice pDevice)
2441{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2442 unsigned char byBBRxConf=0;
2443 unsigned char byBBVGA=0;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2444
2445 BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2446
2447 if (pDevice->bShortSlotTime) {
2448 byBBRxConf &= 0xDF;//1101 1111
2449 } else {
2450 byBBRxConf |= 0x20;//0010 0000
2451 }
2452
2453 // patch for 3253B0 Baseband with Cardbus module
2454 BBbReadEmbeded(pDevice->PortOffset, 0xE7, &byBBVGA);
2455 if (byBBVGA == pDevice->abyBBVGA[0]) {
2456 byBBRxConf |= 0x20;//0010 0000
2457 }
2458
2459 BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2460
2461}
2462
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2463void BBvSetVGAGainOffset(PSDevice pDevice, unsigned char byData)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2464{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2465 unsigned char byBBRxConf=0;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2466
2467 BBbWriteEmbeded(pDevice->PortOffset, 0xE7, byData);
2468
2469 BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2470 // patch for 3253B0 Baseband with Cardbus module
2471 if (byData == pDevice->abyBBVGA[0]) {
2472 byBBRxConf |= 0x20;//0010 0000
2473 } else if (pDevice->bShortSlotTime) {
2474 byBBRxConf &= 0xDF;//1101 1111
2475 } else {
2476 byBBRxConf |= 0x20;//0010 0000
2477 }
2478 pDevice->byBBVGACurrent = byData;
2479 BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2480}
2481
2482
2483/*
2484 * Description: Baseband SoftwareReset
2485 *
2486 * Parameters:
2487 * In:
2488 * dwIoBase - I/O base address
2489 * Out:
2490 * none
2491 *
2492 * Return Value: none
2493 *
2494 */
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2495void
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2496BBvSoftwareReset (unsigned long dwIoBase)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2497{
2498 BBbWriteEmbeded(dwIoBase, 0x50, 0x40);
2499 BBbWriteEmbeded(dwIoBase, 0x50, 0);
2500 BBbWriteEmbeded(dwIoBase, 0x9C, 0x01);
2501 BBbWriteEmbeded(dwIoBase, 0x9C, 0);
2502}
2503
2504/*
2505 * Description: Baseband Power Save Mode ON
2506 *
2507 * Parameters:
2508 * In:
2509 * dwIoBase - I/O base address
2510 * Out:
2511 * none
2512 *
2513 * Return Value: none
2514 *
2515 */
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2516void
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2517BBvPowerSaveModeON (unsigned long dwIoBase)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2518{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2519 unsigned char byOrgData;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2520
2521 BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2522 byOrgData |= BIT0;
2523 BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2524}
2525
2526/*
2527 * Description: Baseband Power Save Mode OFF
2528 *
2529 * Parameters:
2530 * In:
2531 * dwIoBase - I/O base address
2532 * Out:
2533 * none
2534 *
2535 * Return Value: none
2536 *
2537 */
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2538void
Charles Clément412b2d02010-06-22 08:54:42 -0700[diff] [blame]2539BBvPowerSaveModeOFF (unsigned long dwIoBase)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2540{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2541 unsigned char byOrgData;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2542
2543 BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2544 byOrgData &= ~(BIT0);
2545 BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2546}
2547
2548/*
2549 * Description: Set Tx Antenna mode
2550 *
2551 * Parameters:
2552 * In:
2553 * pDevice - Device Structure
2554 * byAntennaMode - Antenna Mode
2555 * Out:
2556 * none
2557 *
2558 * Return Value: none
2559 *
2560 */
2561
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2562void
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2563BBvSetTxAntennaMode (unsigned long dwIoBase, unsigned char byAntennaMode)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2564{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2565 unsigned char byBBTxConf;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2566
2567#ifdef PLICE_DEBUG
2568 //printk("Enter BBvSetTxAntennaMode\n");
2569#endif
2570 BBbReadEmbeded(dwIoBase, 0x09, &byBBTxConf);//CR09
2571 if (byAntennaMode == ANT_DIVERSITY) {
2572 // bit 1 is diversity
2573 byBBTxConf |= 0x02;
2574 } else if (byAntennaMode == ANT_A) {
2575 // bit 2 is ANTSEL
2576 byBBTxConf &= 0xF9; // 1111 1001
2577 } else if (byAntennaMode == ANT_B) {
2578#ifdef PLICE_DEBUG
2579 //printk("BBvSetTxAntennaMode:ANT_B\n");
2580#endif
2581 byBBTxConf &= 0xFD; // 1111 1101
2582 byBBTxConf |= 0x04;
2583 }
2584 BBbWriteEmbeded(dwIoBase, 0x09, byBBTxConf);//CR09
2585}
2586
2587
2588
2589
2590/*
2591 * Description: Set Rx Antenna mode
2592 *
2593 * Parameters:
2594 * In:
2595 * pDevice - Device Structure
2596 * byAntennaMode - Antenna Mode
2597 * Out:
2598 * none
2599 *
2600 * Return Value: none
2601 *
2602 */
2603
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2604void
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2605BBvSetRxAntennaMode (unsigned long dwIoBase, unsigned char byAntennaMode)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2606{
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2607 unsigned char byBBRxConf;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2608
2609 BBbReadEmbeded(dwIoBase, 0x0A, &byBBRxConf);//CR10
2610 if (byAntennaMode == ANT_DIVERSITY) {
2611 byBBRxConf |= 0x01;
2612
2613 } else if (byAntennaMode == ANT_A) {
2614 byBBRxConf &= 0xFC; // 1111 1100
2615 } else if (byAntennaMode == ANT_B) {
2616 byBBRxConf &= 0xFE; // 1111 1110
2617 byBBRxConf |= 0x02;
2618 }
2619 BBbWriteEmbeded(dwIoBase, 0x0A, byBBRxConf);//CR10
2620}
2621
2622
2623/*
2624 * Description: BBvSetDeepSleep
2625 *
2626 * Parameters:
2627 * In:
2628 * pDevice - Device Structure
2629 * Out:
2630 * none
2631 *
2632 * Return Value: none
2633 *
2634 */
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2635void
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2636BBvSetDeepSleep (unsigned long dwIoBase, unsigned char byLocalID)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2637{
2638 BBbWriteEmbeded(dwIoBase, 0x0C, 0x17);//CR12
2639 BBbWriteEmbeded(dwIoBase, 0x0D, 0xB9);//CR13
2640}
2641
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2642void
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2643BBvExitDeepSleep (unsigned long dwIoBase, unsigned char byLocalID)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2644{
2645 BBbWriteEmbeded(dwIoBase, 0x0C, 0x00);//CR12
2646 BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);//CR13
2647}
2648
2649
2650
2651static
Charles Clémente3fd16d2010-06-02 09:52:02 -0700[diff] [blame]2652unsigned long
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2653s_ulGetRatio (PSDevice pDevice)
2654{
Charles Clémente3fd16d2010-06-02 09:52:02 -0700[diff] [blame]2655unsigned long ulRatio = 0;
2656unsigned long ulMaxPacket;
2657unsigned long ulPacketNum;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2658
2659 //This is a thousand-ratio
2660 ulMaxPacket = pDevice->uNumSQ3[RATE_54M];
2661 if ( pDevice->uNumSQ3[RATE_54M] != 0 ) {
2662 ulPacketNum = pDevice->uNumSQ3[RATE_54M];
2663 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2664 //ulRatio = (pDevice->uNumSQ3[RATE_54M] * 1000 / pDevice->uDiversityCnt);
2665 ulRatio += TOP_RATE_54M;
2666 }
2667 if ( pDevice->uNumSQ3[RATE_48M] > ulMaxPacket ) {
2668 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M];
2669 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2670 //ulRatio = (pDevice->uNumSQ3[RATE_48M] * 1000 / pDevice->uDiversityCnt);
2671 ulRatio += TOP_RATE_48M;
2672 ulMaxPacket = pDevice->uNumSQ3[RATE_48M];
2673 }
2674 if ( pDevice->uNumSQ3[RATE_36M] > ulMaxPacket ) {
2675 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2676 pDevice->uNumSQ3[RATE_36M];
2677 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2678 //ulRatio = (pDevice->uNumSQ3[RATE_36M] * 1000 / pDevice->uDiversityCnt);
2679 ulRatio += TOP_RATE_36M;
2680 ulMaxPacket = pDevice->uNumSQ3[RATE_36M];
2681 }
2682 if ( pDevice->uNumSQ3[RATE_24M] > ulMaxPacket ) {
2683 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2684 pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M];
2685 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2686 //ulRatio = (pDevice->uNumSQ3[RATE_24M] * 1000 / pDevice->uDiversityCnt);
2687 ulRatio += TOP_RATE_24M;
2688 ulMaxPacket = pDevice->uNumSQ3[RATE_24M];
2689 }
2690 if ( pDevice->uNumSQ3[RATE_18M] > ulMaxPacket ) {
2691 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2692 pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2693 pDevice->uNumSQ3[RATE_18M];
2694 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2695 //ulRatio = (pDevice->uNumSQ3[RATE_18M] * 1000 / pDevice->uDiversityCnt);
2696 ulRatio += TOP_RATE_18M;
2697 ulMaxPacket = pDevice->uNumSQ3[RATE_18M];
2698 }
2699 if ( pDevice->uNumSQ3[RATE_12M] > ulMaxPacket ) {
2700 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2701 pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2702 pDevice->uNumSQ3[RATE_18M] + pDevice->uNumSQ3[RATE_12M];
2703 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2704 //ulRatio = (pDevice->uNumSQ3[RATE_12M] * 1000 / pDevice->uDiversityCnt);
2705 ulRatio += TOP_RATE_12M;
2706 ulMaxPacket = pDevice->uNumSQ3[RATE_12M];
2707 }
2708 if ( pDevice->uNumSQ3[RATE_11M] > ulMaxPacket ) {
2709 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2710 pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2711 pDevice->uNumSQ3[RATE_6M] - pDevice->uNumSQ3[RATE_9M];
2712 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2713 //ulRatio = (pDevice->uNumSQ3[RATE_11M] * 1000 / pDevice->uDiversityCnt);
2714 ulRatio += TOP_RATE_11M;
2715 ulMaxPacket = pDevice->uNumSQ3[RATE_11M];
2716 }
2717 if ( pDevice->uNumSQ3[RATE_9M] > ulMaxPacket ) {
2718 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2719 pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2720 pDevice->uNumSQ3[RATE_6M];
2721 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2722 //ulRatio = (pDevice->uNumSQ3[RATE_9M] * 1000 / pDevice->uDiversityCnt);
2723 ulRatio += TOP_RATE_9M;
2724 ulMaxPacket = pDevice->uNumSQ3[RATE_9M];
2725 }
2726 if ( pDevice->uNumSQ3[RATE_6M] > ulMaxPacket ) {
2727 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2728 pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M];
2729 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2730 //ulRatio = (pDevice->uNumSQ3[RATE_6M] * 1000 / pDevice->uDiversityCnt);
2731 ulRatio += TOP_RATE_6M;
2732 ulMaxPacket = pDevice->uNumSQ3[RATE_6M];
2733 }
2734 if ( pDevice->uNumSQ3[RATE_5M] > ulMaxPacket ) {
2735 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2736 pDevice->uNumSQ3[RATE_2M];
2737 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2738 //ulRatio = (pDevice->uNumSQ3[RATE_5M] * 1000 / pDevice->uDiversityCnt);
2739 ulRatio += TOP_RATE_55M;
2740 ulMaxPacket = pDevice->uNumSQ3[RATE_5M];
2741 }
2742 if ( pDevice->uNumSQ3[RATE_2M] > ulMaxPacket ) {
2743 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M];
2744 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2745 //ulRatio = (pDevice->uNumSQ3[RATE_2M] * 1000 / pDevice->uDiversityCnt);
2746 ulRatio += TOP_RATE_2M;
2747 ulMaxPacket = pDevice->uNumSQ3[RATE_2M];
2748 }
2749 if ( pDevice->uNumSQ3[RATE_1M] > ulMaxPacket ) {
2750 ulPacketNum = pDevice->uDiversityCnt;
2751 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2752 //ulRatio = (pDevice->uNumSQ3[RATE_1M] * 1000 / pDevice->uDiversityCnt);
2753 ulRatio += TOP_RATE_1M;
2754 }
2755
2756 return ulRatio;
2757}
2758
2759
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2760void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2761BBvClearAntDivSQ3Value (PSDevice pDevice)
2762{
Charles Clémentb6e95cd2010-06-02 09:52:01 -0700[diff] [blame]2763 unsigned int ii;
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2764
2765 pDevice->uDiversityCnt = 0;
2766 for (ii = 0; ii < MAX_RATE; ii++) {
2767 pDevice->uNumSQ3[ii] = 0;
2768 }
2769}
2770
2771
2772/*
2773 * Description: Antenna Diversity
2774 *
2775 * Parameters:
2776 * In:
2777 * pDevice - Device Structure
2778 * byRSR - RSR from received packet
2779 * bySQ3 - SQ3 value from received packet
2780 * Out:
2781 * none
2782 *
2783 * Return Value: none
2784 *
2785 */
2786
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2787void
Charles Clément3fc9b582010-06-24 11:02:27 -0700[diff] [blame]2788BBvAntennaDiversity (PSDevice pDevice, unsigned char byRxRate, unsigned char bySQ3)
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2789{
2790
2791 if ((byRxRate >= MAX_RATE) || (pDevice->wAntDiversityMaxRate >= MAX_RATE)) {
2792 return;
2793 }
2794 pDevice->uDiversityCnt++;
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2795 // DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pDevice->uDiversityCnt = %d\n", (int)pDevice->uDiversityCnt);
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2796
2797 pDevice->uNumSQ3[byRxRate]++;
2798
2799 if (pDevice->byAntennaState == 0) {
2800
2801 if (pDevice->uDiversityCnt > pDevice->ulDiversityNValue) {
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2802 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ulDiversityNValue=[%d],54M-[%d]\n",
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2803 (int)pDevice->ulDiversityNValue, (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate]);
2804
2805 if (pDevice->uNumSQ3[pDevice->wAntDiversityMaxRate] < pDevice->uDiversityCnt/2) {
2806
2807 pDevice->ulRatio_State0 = s_ulGetRatio(pDevice);
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2808 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State0, rate = [%08x]\n", (int)pDevice->ulRatio_State0);
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2809
2810 if ( pDevice->byTMax == 0 )
2811 return;
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2812 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1.[%08x], uNumSQ3[%d]=%d, %d\n",
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2813 (int)pDevice->ulRatio_State0, (int)pDevice->wAntDiversityMaxRate,
2814 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2815#ifdef PLICE_DEBUG
2816 //printk("BBvAntennaDiversity1:call s_vChangeAntenna\n");
2817#endif
2818 s_vChangeAntenna(pDevice);
2819 pDevice->byAntennaState = 1;
2820 del_timer(&pDevice->TimerSQ3Tmax3);
2821 del_timer(&pDevice->TimerSQ3Tmax2);
2822 pDevice->TimerSQ3Tmax1.expires = RUN_AT(pDevice->byTMax * HZ);
2823 add_timer(&pDevice->TimerSQ3Tmax1);
2824
2825 } else {
2826
2827 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2828 add_timer(&pDevice->TimerSQ3Tmax3);
2829 }
2830 BBvClearAntDivSQ3Value(pDevice);
2831
2832 }
2833 } else { //byAntennaState == 1
2834
2835 if (pDevice->uDiversityCnt > pDevice->ulDiversityMValue) {
2836
2837 del_timer(&pDevice->TimerSQ3Tmax1);
2838
2839 pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2840 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"RX:SQ3_State1, rate0 = %08x,rate1 = %08x\n",
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2841 (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2842
2843 if (pDevice->ulRatio_State1 < pDevice->ulRatio_State0) {
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2844 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2845 (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2846 (int)pDevice->wAntDiversityMaxRate,
2847 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2848#ifdef PLICE_DEBUG
2849 //printk("BBvAntennaDiversity2:call s_vChangeAntenna\n");
2850#endif
2851 s_vChangeAntenna(pDevice);
2852 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2853 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2854 add_timer(&pDevice->TimerSQ3Tmax3);
2855 add_timer(&pDevice->TimerSQ3Tmax2);
2856 }
2857 pDevice->byAntennaState = 0;
2858 BBvClearAntDivSQ3Value(pDevice);
2859 }
2860 } //byAntennaState
2861}
2862
2863/*+
2864 *
2865 * Description:
2866 * Timer for SQ3 antenna diversity
2867 *
2868 * Parameters:
2869 * In:
2870 * Out:
2871 * none
2872 *
2873 * Return Value: none
2874 *
2875-*/
2876
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2877void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2878TimerSQ3CallBack (
Charles Clément3a215e02010-05-12 20:54:39 -0700[diff] [blame]2879 void *hDeviceContext
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2880 )
2881{
2882 PSDevice pDevice = (PSDevice)hDeviceContext;
2883
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2884 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerSQ3CallBack...");
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2885 spin_lock_irq(&pDevice->lock);
2886
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2887 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.[%08x][%08x], %d\n",(int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1, (int)pDevice->uDiversityCnt);
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2888#ifdef PLICE_DEBUG
2889 //printk("TimerSQ3CallBack1:call s_vChangeAntenna\n");
2890#endif
2891
2892 s_vChangeAntenna(pDevice);
2893 pDevice->byAntennaState = 0;
2894 BBvClearAntDivSQ3Value(pDevice);
2895
2896 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2897 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2898 add_timer(&pDevice->TimerSQ3Tmax3);
2899 add_timer(&pDevice->TimerSQ3Tmax2);
2900
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2901
Jim Lieb612822f2009-08-12 14:54:03 -0700[diff] [blame]2902 spin_unlock_irq(&pDevice->lock);
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2903 return;
2904}
2905
2906
2907/*+
2908 *
2909 * Description:
2910 * Timer for SQ3 antenna diversity
2911 *
2912 * Parameters:
2913 * In:
2914 * pvSysSpec1
2915 * hDeviceContext - Pointer to the adapter
2916 * pvSysSpec2
2917 * pvSysSpec3
2918 * Out:
2919 * none
2920 *
2921 * Return Value: none
2922 *
2923-*/
2924
Charles Clément6b35b7b2010-05-07 12:30:19 -0700[diff] [blame]2925void
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2926TimerState1CallBack (
Charles Clément3a215e02010-05-12 20:54:39 -0700[diff] [blame]2927 void *hDeviceContext
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2928 )
2929{
2930 PSDevice pDevice = (PSDevice)hDeviceContext;
2931
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2932 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerState1CallBack...");
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2933
2934 spin_lock_irq(&pDevice->lock);
2935 if (pDevice->uDiversityCnt < pDevice->ulDiversityMValue/100) {
2936#ifdef PLICE_DEBUG
2937 //printk("TimerSQ3CallBack2:call s_vChangeAntenna\n");
2938#endif
2939
2940 s_vChangeAntenna(pDevice);
2941 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2942 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2943 add_timer(&pDevice->TimerSQ3Tmax3);
2944 add_timer(&pDevice->TimerSQ3Tmax2);
2945 } else {
2946 pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2947 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State1, rate0 = %08x,rate1 = %08x\n",
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2948 (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2949
2950 if ( pDevice->ulRatio_State1 < pDevice->ulRatio_State0 ) {
Jim Lieb7e809a92009-07-30 10:27:21 -0700[diff] [blame]2951 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
Forest Bond5449c682009-04-25 10:30:44 -0400[diff] [blame]2952 (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2953 (int)pDevice->wAntDiversityMaxRate,
2954 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2955#ifdef PLICE_DEBUG
2956 //printk("TimerSQ3CallBack3:call s_vChangeAntenna\n");
2957#endif
2958
2959 s_vChangeAntenna(pDevice);
2960
2961 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2962 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2963 add_timer(&pDevice->TimerSQ3Tmax3);
2964 add_timer(&pDevice->TimerSQ3Tmax2);
2965 }
2966 }
2967 pDevice->byAntennaState = 0;
2968 BBvClearAntDivSQ3Value(pDevice);
2969 spin_unlock_irq(&pDevice->lock);
2970
2971 return;
2972}
2973