blob: fc002c155bc3e0ddfa24ddf915578ccaef40cd33 [file] [log] [blame]
Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Jerome Brunet7b5c5722020-08-28 17:47:35 +02002menu "Clock support for Amlogic platforms"
3 depends on ARCH_MESON || COMPILE_TEST
4
Jerome Brunet889c2b72019-02-01 13:58:41 +01005config COMMON_CLK_MESON_REGMAP
6 tristate
Jerome Brunetea11dda2018-02-12 15:58:32 +01007 select REGMAP
8
Jerome Brunet889c2b72019-02-01 13:58:41 +01009config COMMON_CLK_MESON_DUALDIV
10 tristate
11 select COMMON_CLK_MESON_REGMAP
12
13config COMMON_CLK_MESON_MPLL
14 tristate
15 select COMMON_CLK_MESON_REGMAP
16
17config COMMON_CLK_MESON_PHASE
18 tristate
19 select COMMON_CLK_MESON_REGMAP
20
21config COMMON_CLK_MESON_PLL
22 tristate
23 select COMMON_CLK_MESON_REGMAP
24
25config COMMON_CLK_MESON_SCLK_DIV
26 tristate
27 select COMMON_CLK_MESON_REGMAP
28
29config COMMON_CLK_MESON_VID_PLL_DIV
30 tristate
31 select COMMON_CLK_MESON_REGMAP
32
33config COMMON_CLK_MESON_AO_CLKC
34 tristate
35 select COMMON_CLK_MESON_REGMAP
Jerome Brunet889c2b72019-02-01 13:58:41 +010036 select RESET_CONTROLLER
37
Jerome Brunet6682bd42019-02-01 15:53:45 +010038config COMMON_CLK_MESON_EE_CLKC
39 tristate
40 select COMMON_CLK_MESON_REGMAP
Jerome Brunet6682bd42019-02-01 15:53:45 +010041
Neil Armstrong26d34432019-07-31 10:40:17 +020042config COMMON_CLK_MESON_CPU_DYNDIV
43 tristate
44 select COMMON_CLK_MESON_REGMAP
45
Michael Turquettecb7c47d2016-05-23 14:29:13 -070046config COMMON_CLK_MESON8B
Jerome Brunet7b5c5722020-08-28 17:47:35 +020047 bool "Meson8 SoC Clock controller support"
48 depends on ARM
49 default y
Jerome Brunet889c2b72019-02-01 13:58:41 +010050 select COMMON_CLK_MESON_REGMAP
51 select COMMON_CLK_MESON_MPLL
52 select COMMON_CLK_MESON_PLL
53 select MFD_SYSCON
Martin Blumenstingl18962172017-07-28 23:13:12 +020054 select RESET_CONTROLLER
Michael Turquettecb7c47d2016-05-23 14:29:13 -070055 help
Martin Blumenstingl855f06a2017-06-04 20:33:39 +020056 Support for the clock controller on AmLogic S802 (Meson8),
57 S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you
58 want peripherals and CPU frequency scaling to work.
Michael Turquette738f66d2016-05-23 15:44:26 -070059
60config COMMON_CLK_GXBB
Kevin Hilman20425f62020-11-18 11:14:05 -080061 tristate "GXBB and GXL SoC clock controllers support"
Jerome Brunet7b5c5722020-08-28 17:47:35 +020062 depends on ARM64
63 default y
Jerome Brunet889c2b72019-02-01 13:58:41 +010064 select COMMON_CLK_MESON_REGMAP
65 select COMMON_CLK_MESON_DUALDIV
66 select COMMON_CLK_MESON_VID_PLL_DIV
67 select COMMON_CLK_MESON_MPLL
68 select COMMON_CLK_MESON_PLL
69 select COMMON_CLK_MESON_AO_CLKC
Jerome Brunet6682bd42019-02-01 15:53:45 +010070 select COMMON_CLK_MESON_EE_CLKC
Jerome Brunet4162dd5b2018-02-12 15:58:46 +010071 select MFD_SYSCON
Michael Turquette738f66d2016-05-23 15:44:26 -070072 help
73 Support for the clock controller on AmLogic S905 devices, aka gxbb.
74 Say Y if you want peripherals and CPU frequency scaling to work.
Qiufang Dai78b4af32017-12-11 22:13:46 +080075
76config COMMON_CLK_AXG
Kevin Hilman20425f62020-11-18 11:14:05 -080077 tristate "AXG SoC clock controllers support"
Jerome Brunet7b5c5722020-08-28 17:47:35 +020078 depends on ARM64
79 default y
Jerome Brunet889c2b72019-02-01 13:58:41 +010080 select COMMON_CLK_MESON_REGMAP
81 select COMMON_CLK_MESON_DUALDIV
82 select COMMON_CLK_MESON_MPLL
83 select COMMON_CLK_MESON_PLL
84 select COMMON_CLK_MESON_AO_CLKC
Jerome Brunet6682bd42019-02-01 15:53:45 +010085 select COMMON_CLK_MESON_EE_CLKC
Jerome Brunet4162dd5b2018-02-12 15:58:46 +010086 select MFD_SYSCON
Qiufang Dai78b4af32017-12-11 22:13:46 +080087 help
88 Support for the clock controller on AmLogic A113D devices, aka axg.
89 Say Y if you want peripherals and CPU frequency scaling to work.
Jerome Brunet1cd50182018-05-22 18:34:57 +020090
91config COMMON_CLK_AXG_AUDIO
92 tristate "Meson AXG Audio Clock Controller Driver"
Jerome Brunet7b5c5722020-08-28 17:47:35 +020093 depends on ARM64
Jerome Brunet889c2b72019-02-01 13:58:41 +010094 select COMMON_CLK_MESON_REGMAP
95 select COMMON_CLK_MESON_PHASE
96 select COMMON_CLK_MESON_SCLK_DIV
Jerome Brunetcb78ba72019-02-01 13:58:40 +010097 select REGMAP_MMIO
Jerome Brunet1cd50182018-05-22 18:34:57 +020098 help
99 Support for the audio clock controller on AmLogic A113D devices,
100 aka axg, Say Y if you want audio subsystem to work.
Jian Hu085a4ea2019-02-01 15:53:44 +0100101
102config COMMON_CLK_G12A
Kevin Hilman20425f62020-11-18 11:14:05 -0800103 tristate "G12 and SM1 SoC clock controllers support"
Jerome Brunet7b5c5722020-08-28 17:47:35 +0200104 depends on ARM64
105 default y
Jian Hu085a4ea2019-02-01 15:53:44 +0100106 select COMMON_CLK_MESON_REGMAP
Neil Armstrong042f01b2019-02-12 17:28:59 +0100107 select COMMON_CLK_MESON_DUALDIV
Jian Hu085a4ea2019-02-01 15:53:44 +0100108 select COMMON_CLK_MESON_MPLL
109 select COMMON_CLK_MESON_PLL
Neil Armstrong042f01b2019-02-12 17:28:59 +0100110 select COMMON_CLK_MESON_AO_CLKC
Jerome Brunet6682bd42019-02-01 15:53:45 +0100111 select COMMON_CLK_MESON_EE_CLKC
Neil Armstrong26d34432019-07-31 10:40:17 +0200112 select COMMON_CLK_MESON_CPU_DYNDIV
Kevin Hilmanbae69bf2020-11-18 11:09:30 -0800113 select COMMON_CLK_MESON_VID_PLL_DIV
Jian Hu085a4ea2019-02-01 15:53:44 +0100114 select MFD_SYSCON
115 help
116 Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
117 devices, aka g12a. Say Y if you want peripherals to work.
Jerome Brunet7b5c5722020-08-28 17:47:35 +0200118endmenu