Alexander Shishkin | 50352fa | 2018-03-28 18:46:15 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 2 | /* |
| 3 | * Intel(R) Trace Hub pci driver |
| 4 | * |
| 5 | * Copyright (C) 2014-2015 Intel Corporation. |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 9 | |
| 10 | #include <linux/types.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/device.h> |
| 13 | #include <linux/sysfs.h> |
| 14 | #include <linux/pci.h> |
| 15 | |
| 16 | #include "intel_th.h" |
| 17 | |
| 18 | #define DRIVER_NAME "intel_th_pci" |
| 19 | |
Alexander Shishkin | db73a05 | 2019-05-03 11:44:36 +0300 | [diff] [blame] | 20 | enum { |
| 21 | TH_PCI_CONFIG_BAR = 0, |
| 22 | TH_PCI_STH_SW_BAR = 2, |
Alexander Shishkin | fc027f4 | 2019-05-03 11:44:38 +0300 | [diff] [blame] | 23 | TH_PCI_RTIT_BAR = 4, |
Alexander Shishkin | db73a05 | 2019-05-03 11:44:36 +0300 | [diff] [blame] | 24 | }; |
| 25 | |
| 26 | #define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR)) |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 27 | |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 28 | #define PCI_REG_NPKDSC 0x80 |
| 29 | #define NPKDSC_TSACT BIT(5) |
| 30 | |
| 31 | static int intel_th_pci_activate(struct intel_th *th) |
| 32 | { |
| 33 | struct pci_dev *pdev = to_pci_dev(th->dev); |
| 34 | u32 npkdsc; |
| 35 | int err; |
| 36 | |
| 37 | if (!INTEL_TH_CAP(th, tscu_enable)) |
| 38 | return 0; |
| 39 | |
| 40 | err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc); |
| 41 | if (!err) { |
| 42 | npkdsc |= NPKDSC_TSACT; |
| 43 | err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc); |
| 44 | } |
| 45 | |
| 46 | if (err) |
| 47 | dev_err(&pdev->dev, "failed to read NPKDSC register\n"); |
| 48 | |
| 49 | return err; |
| 50 | } |
| 51 | |
| 52 | static void intel_th_pci_deactivate(struct intel_th *th) |
| 53 | { |
| 54 | struct pci_dev *pdev = to_pci_dev(th->dev); |
| 55 | u32 npkdsc; |
| 56 | int err; |
| 57 | |
| 58 | if (!INTEL_TH_CAP(th, tscu_enable)) |
| 59 | return; |
| 60 | |
| 61 | err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc); |
| 62 | if (!err) { |
| 63 | npkdsc |= NPKDSC_TSACT; |
| 64 | err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc); |
| 65 | } |
| 66 | |
| 67 | if (err) |
| 68 | dev_err(&pdev->dev, "failed to read NPKDSC register\n"); |
| 69 | } |
| 70 | |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 71 | static int intel_th_pci_probe(struct pci_dev *pdev, |
| 72 | const struct pci_device_id *id) |
| 73 | { |
Alexander Shishkin | a525ed1 | 2021-04-14 20:12:47 +0300 | [diff] [blame] | 74 | const struct intel_th_drvdata *drvdata = (void *)id->driver_data; |
Alexander Shishkin | 7b7036d | 2019-05-03 11:44:40 +0300 | [diff] [blame] | 75 | struct resource resource[TH_MMIO_END + TH_NVEC_MAX] = { |
Alexander Shishkin | db73a05 | 2019-05-03 11:44:36 +0300 | [diff] [blame] | 76 | [TH_MMIO_CONFIG] = pdev->resource[TH_PCI_CONFIG_BAR], |
| 77 | [TH_MMIO_SW] = pdev->resource[TH_PCI_STH_SW_BAR], |
| 78 | }; |
Alexander Shishkin | 7b7036d | 2019-05-03 11:44:40 +0300 | [diff] [blame] | 79 | int err, r = TH_MMIO_SW + 1, i; |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 80 | struct intel_th *th; |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 81 | |
| 82 | err = pcim_enable_device(pdev); |
| 83 | if (err) |
| 84 | return err; |
| 85 | |
| 86 | err = pcim_iomap_regions_request_all(pdev, BAR_MASK, DRIVER_NAME); |
| 87 | if (err) |
| 88 | return err; |
| 89 | |
Alexander Shishkin | fc027f4 | 2019-05-03 11:44:38 +0300 | [diff] [blame] | 90 | if (pdev->resource[TH_PCI_RTIT_BAR].start) { |
| 91 | resource[TH_MMIO_RTIT] = pdev->resource[TH_PCI_RTIT_BAR]; |
| 92 | r++; |
| 93 | } |
| 94 | |
Alexander Shishkin | 7b7036d | 2019-05-03 11:44:40 +0300 | [diff] [blame] | 95 | err = pci_alloc_irq_vectors(pdev, 1, 8, PCI_IRQ_ALL_TYPES); |
| 96 | if (err > 0) |
| 97 | for (i = 0; i < err; i++, r++) { |
| 98 | resource[r].flags = IORESOURCE_IRQ; |
| 99 | resource[r].start = pci_irq_vector(pdev, i); |
| 100 | } |
Alexander Shishkin | 62a5930 | 2019-05-03 11:44:39 +0300 | [diff] [blame] | 101 | |
| 102 | th = intel_th_alloc(&pdev->dev, drvdata, resource, r); |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 103 | if (IS_ERR(th)) |
| 104 | return PTR_ERR(th); |
| 105 | |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 106 | th->activate = intel_th_pci_activate; |
| 107 | th->deactivate = intel_th_pci_deactivate; |
| 108 | |
Alexander Shishkin | e9b2b3e | 2017-08-10 11:10:58 +0300 | [diff] [blame] | 109 | pci_set_master(pdev); |
| 110 | |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 111 | return 0; |
| 112 | } |
| 113 | |
| 114 | static void intel_th_pci_remove(struct pci_dev *pdev) |
| 115 | { |
| 116 | struct intel_th *th = pci_get_drvdata(pdev); |
| 117 | |
| 118 | intel_th_free(th); |
Alexander Shishkin | 7b7036d | 2019-05-03 11:44:40 +0300 | [diff] [blame] | 119 | |
| 120 | pci_free_irq_vectors(pdev); |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 121 | } |
| 122 | |
Alexander Shishkin | 397c772 | 2020-03-17 08:22:10 +0200 | [diff] [blame] | 123 | static const struct intel_th_drvdata intel_th_1x_multi_is_broken = { |
| 124 | .multi_is_broken = 1, |
| 125 | }; |
| 126 | |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 127 | static const struct intel_th_drvdata intel_th_2x = { |
| 128 | .tscu_enable = 1, |
Alexander Shishkin | 4c5bb6e | 2019-05-03 11:44:42 +0300 | [diff] [blame] | 129 | .has_mintctl = 1, |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 130 | }; |
| 131 | |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 132 | static const struct pci_device_id intel_th_pci_id_table[] = { |
| 133 | { |
| 134 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9d26), |
| 135 | .driver_data = (kernel_ulong_t)0, |
| 136 | }, |
| 137 | { |
| 138 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa126), |
| 139 | .driver_data = (kernel_ulong_t)0, |
| 140 | }, |
Alexander Shishkin | 6396b91 | 2015-12-22 17:25:22 +0200 | [diff] [blame] | 141 | { |
| 142 | /* Apollo Lake */ |
| 143 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a8e), |
| 144 | .driver_data = (kernel_ulong_t)0, |
| 145 | }, |
Alexander Shishkin | 3f04088 | 2015-12-22 17:25:23 +0200 | [diff] [blame] | 146 | { |
| 147 | /* Broxton */ |
| 148 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a80), |
| 149 | .driver_data = (kernel_ulong_t)0, |
| 150 | }, |
Alexander Shishkin | aaa3ca8 | 2016-04-08 18:26:52 +0300 | [diff] [blame] | 151 | { |
| 152 | /* Broxton B-step */ |
| 153 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1a8e), |
| 154 | .driver_data = (kernel_ulong_t)0, |
| 155 | }, |
Alexander Shishkin | 7a1a47c | 2016-06-28 18:55:23 +0300 | [diff] [blame] | 156 | { |
| 157 | /* Kaby Lake PCH-H */ |
| 158 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa2a6), |
Alexander Shishkin | 397c772 | 2020-03-17 08:22:10 +0200 | [diff] [blame] | 159 | .driver_data = (kernel_ulong_t)&intel_th_1x_multi_is_broken, |
Alexander Shishkin | 7a1a47c | 2016-06-28 18:55:23 +0300 | [diff] [blame] | 160 | }, |
Alexander Shishkin | 5118ccd | 2015-09-08 14:03:55 +0300 | [diff] [blame] | 161 | { |
| 162 | /* Denverton */ |
| 163 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x19e1), |
| 164 | .driver_data = (kernel_ulong_t)0, |
| 165 | }, |
Alexander Shishkin | 340837f | 2016-06-30 16:10:51 +0300 | [diff] [blame] | 166 | { |
Alexander Shishkin | 2460084 | 2017-09-19 18:47:42 +0300 | [diff] [blame] | 167 | /* Lewisburg PCH */ |
| 168 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa1a6), |
| 169 | .driver_data = (kernel_ulong_t)0, |
| 170 | }, |
| 171 | { |
Alexander Shishkin | 164eb56 | 2019-08-21 10:49:54 +0300 | [diff] [blame] | 172 | /* Lewisburg PCH */ |
| 173 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa226), |
| 174 | .driver_data = (kernel_ulong_t)0, |
| 175 | }, |
| 176 | { |
Alexander Shishkin | 340837f | 2016-06-30 16:10:51 +0300 | [diff] [blame] | 177 | /* Gemini Lake */ |
| 178 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x318e), |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 179 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
Alexander Shishkin | 340837f | 2016-06-30 16:10:51 +0300 | [diff] [blame] | 180 | }, |
Alexander Shishkin | 84331e1 | 2016-06-30 16:11:13 +0300 | [diff] [blame] | 181 | { |
| 182 | /* Cannon Lake H */ |
| 183 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa326), |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 184 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
Alexander Shishkin | 84331e1 | 2016-06-30 16:11:13 +0300 | [diff] [blame] | 185 | }, |
Alexander Shishkin | efb3669 | 2016-06-30 16:11:31 +0300 | [diff] [blame] | 186 | { |
| 187 | /* Cannon Lake LP */ |
| 188 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9da6), |
Alexander Shishkin | a0e7df3 | 2017-02-24 16:09:40 +0200 | [diff] [blame] | 189 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
Alexander Shishkin | efb3669 | 2016-06-30 16:11:31 +0300 | [diff] [blame] | 190 | }, |
Alexander Shishkin | 920ce7c | 2017-09-19 18:47:41 +0300 | [diff] [blame] | 191 | { |
| 192 | /* Cedar Fork PCH */ |
| 193 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x18e1), |
| 194 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 195 | }, |
Alexander Shishkin | 59d08d00 | 2018-09-18 16:10:49 +0300 | [diff] [blame] | 196 | { |
| 197 | /* Ice Lake PCH */ |
| 198 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x34a6), |
| 199 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 200 | }, |
Alexander Shishkin | e60e9a4 | 2019-04-17 10:35:36 +0300 | [diff] [blame] | 201 | { |
| 202 | /* Comet Lake */ |
| 203 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x02a6), |
| 204 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 205 | }, |
Alexander Shishkin | 4aa5aed | 2019-06-21 19:19:30 +0300 | [diff] [blame] | 206 | { |
Alexander Shishkin | 3adbb57 | 2019-10-28 09:06:50 +0200 | [diff] [blame] | 207 | /* Comet Lake PCH */ |
| 208 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x06a6), |
| 209 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 210 | }, |
| 211 | { |
Alexander Shishkin | e4de2a5 | 2019-12-17 13:55:24 +0200 | [diff] [blame] | 212 | /* Comet Lake PCH-V */ |
| 213 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa3a6), |
Alexander Shishkin | 397c772 | 2020-03-17 08:22:10 +0200 | [diff] [blame] | 214 | .driver_data = (kernel_ulong_t)&intel_th_1x_multi_is_broken, |
Alexander Shishkin | e4de2a5 | 2019-12-17 13:55:24 +0200 | [diff] [blame] | 215 | }, |
| 216 | { |
Alexander Shishkin | 4aa5aed | 2019-06-21 19:19:30 +0300 | [diff] [blame] | 217 | /* Ice Lake NNPI */ |
| 218 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x45c5), |
| 219 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 220 | }, |
Alexander Shishkin | 9c78255 | 2019-08-21 10:49:55 +0300 | [diff] [blame] | 221 | { |
Alexander Shishkin | 6a17434 | 2019-11-20 15:08:05 +0200 | [diff] [blame] | 222 | /* Ice Lake CPU */ |
| 223 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8a29), |
| 224 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 225 | }, |
| 226 | { |
Alexander Shishkin | 6e6c18b | 2019-11-20 15:08:06 +0200 | [diff] [blame] | 227 | /* Tiger Lake CPU */ |
| 228 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9a33), |
| 229 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 230 | }, |
| 231 | { |
Alexander Shishkin | 9c78255 | 2019-08-21 10:49:55 +0300 | [diff] [blame] | 232 | /* Tiger Lake PCH */ |
| 233 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6), |
| 234 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 235 | }, |
Alexander Shishkin | 9d55499 | 2019-10-28 09:06:51 +0200 | [diff] [blame] | 236 | { |
Alexander Shishkin | 6227585 | 2020-07-06 19:13:37 +0300 | [diff] [blame] | 237 | /* Tiger Lake PCH-H */ |
| 238 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x43a6), |
| 239 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 240 | }, |
| 241 | { |
Alexander Shishkin | 9d55499 | 2019-10-28 09:06:51 +0200 | [diff] [blame] | 242 | /* Jasper Lake PCH */ |
| 243 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4da6), |
| 244 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 245 | }, |
Alexander Shishkin | 8838586 | 2019-12-17 13:55:25 +0200 | [diff] [blame] | 246 | { |
Alexander Shishkin | 203c1f6 | 2020-07-06 19:13:36 +0300 | [diff] [blame] | 247 | /* Jasper Lake CPU */ |
| 248 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4e29), |
| 249 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 250 | }, |
| 251 | { |
Alexander Shishkin | add492d | 2020-03-17 08:22:15 +0200 | [diff] [blame] | 252 | /* Elkhart Lake CPU */ |
| 253 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4529), |
| 254 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 255 | }, |
| 256 | { |
Alexander Shishkin | 8838586 | 2019-12-17 13:55:25 +0200 | [diff] [blame] | 257 | /* Elkhart Lake */ |
| 258 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4b26), |
| 259 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 260 | }, |
Alexander Shishkin | fd73d74 | 2020-07-06 19:13:38 +0300 | [diff] [blame] | 261 | { |
| 262 | /* Emmitsburg PCH */ |
| 263 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1bcc), |
| 264 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 265 | }, |
Alexander Shishkin | 951e4d7 | 2020-10-05 10:13:18 +0300 | [diff] [blame] | 266 | { |
| 267 | /* Alder Lake */ |
| 268 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x7aa6), |
| 269 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 270 | }, |
Alexander Shishkin | 9f126c5 | 2020-10-05 10:13:19 +0300 | [diff] [blame] | 271 | { |
Alexander Shishkin | cb5c681 | 2021-01-15 22:59:17 +0300 | [diff] [blame] | 272 | /* Alder Lake-P */ |
| 273 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x51a6), |
| 274 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 275 | }, |
| 276 | { |
Alexander Shishkin | 48cb175 | 2021-04-14 20:12:51 +0300 | [diff] [blame] | 277 | /* Alder Lake-M */ |
| 278 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x54a6), |
| 279 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 280 | }, |
| 281 | { |
Alexander Shishkin | 9f126c5 | 2020-10-05 10:13:19 +0300 | [diff] [blame] | 282 | /* Alder Lake CPU */ |
| 283 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x466f), |
| 284 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 285 | }, |
Alexander Shishkin | 9f7f2a5 | 2021-04-14 20:12:50 +0300 | [diff] [blame] | 286 | { |
| 287 | /* Rocket Lake CPU */ |
| 288 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c19), |
| 289 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 290 | }, |
Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 291 | { 0 }, |
| 292 | }; |
| 293 | |
| 294 | MODULE_DEVICE_TABLE(pci, intel_th_pci_id_table); |
| 295 | |
| 296 | static struct pci_driver intel_th_pci_driver = { |
| 297 | .name = DRIVER_NAME, |
| 298 | .id_table = intel_th_pci_id_table, |
| 299 | .probe = intel_th_pci_probe, |
| 300 | .remove = intel_th_pci_remove, |
| 301 | }; |
| 302 | |
| 303 | module_pci_driver(intel_th_pci_driver); |
| 304 | |
| 305 | MODULE_LICENSE("GPL v2"); |
| 306 | MODULE_DESCRIPTION("Intel(R) Trace Hub PCI controller driver"); |
| 307 | MODULE_AUTHOR("Alexander Shishkin <alexander.shishkin@intel.com>"); |