Thomas Gleixner | 5b497af | 2019-05-29 07:18:09 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2 | /* |
| 3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 4 | */ |
| 5 | #include <linux/list_sort.h> |
| 6 | #include <linux/libnvdimm.h> |
| 7 | #include <linux/module.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 8 | #include <linux/mutex.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 9 | #include <linux/ndctl.h> |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 10 | #include <linux/sysfs.h> |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 11 | #include <linux/delay.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 12 | #include <linux/list.h> |
| 13 | #include <linux/acpi.h> |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 14 | #include <linux/sort.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 15 | #include <linux/io.h> |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 16 | #include <linux/nd.h> |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 17 | #include <asm/cacheflush.h> |
Tony Luck | 23222f8 | 2018-03-12 11:24:28 -0700 | [diff] [blame] | 18 | #include <acpi/nfit.h> |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 19 | #include "intel.h" |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 20 | #include "nfit.h" |
| 21 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 22 | /* |
| 23 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 24 | * irrelevant. |
| 25 | */ |
Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 26 | #include <linux/io-64-nonatomic-hi-lo.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 27 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 28 | static bool force_enable_dimms; |
| 29 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 30 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 31 | |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 32 | static bool disable_vendor_specific; |
| 33 | module_param(disable_vendor_specific, bool, S_IRUGO); |
| 34 | MODULE_PARM_DESC(disable_vendor_specific, |
Linda Knippers | f2668fa | 2017-03-07 16:35:14 -0500 | [diff] [blame] | 35 | "Limit commands to the publicly specified set"); |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 36 | |
Linda Knippers | 095ab4b | 2017-03-07 16:35:12 -0500 | [diff] [blame] | 37 | static unsigned long override_dsm_mask; |
| 38 | module_param(override_dsm_mask, ulong, S_IRUGO); |
| 39 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); |
| 40 | |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 41 | static int default_dsm_family = -1; |
| 42 | module_param(default_dsm_family, int, S_IRUGO); |
| 43 | MODULE_PARM_DESC(default_dsm_family, |
| 44 | "Try this DSM type first when identifying NVDIMM family"); |
| 45 | |
Dan Williams | bca811a | 2018-04-02 15:28:03 -0700 | [diff] [blame] | 46 | static bool no_init_ars; |
| 47 | module_param(no_init_ars, bool, 0644); |
| 48 | MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time"); |
| 49 | |
Dan Williams | 0171b6b | 2019-02-03 11:17:27 -0800 | [diff] [blame] | 50 | static bool force_labels; |
| 51 | module_param(force_labels, bool, 0444); |
| 52 | MODULE_PARM_DESC(force_labels, "Opt-in to labels despite missing methods"); |
| 53 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 54 | LIST_HEAD(acpi_descs); |
| 55 | DEFINE_MUTEX(acpi_desc_lock); |
| 56 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 57 | static struct workqueue_struct *nfit_wq; |
| 58 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 59 | struct nfit_table_prev { |
| 60 | struct list_head spas; |
| 61 | struct list_head memdevs; |
| 62 | struct list_head dcrs; |
| 63 | struct list_head bdws; |
| 64 | struct list_head idts; |
| 65 | struct list_head flushes; |
| 66 | }; |
| 67 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 68 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 69 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 70 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 71 | { |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 72 | return &nfit_uuid[id]; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 73 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 74 | EXPORT_SYMBOL(to_nfit_uuid); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 75 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 76 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 77 | { |
| 78 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 79 | |
| 80 | /* |
| 81 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 82 | * acpi_device. |
| 83 | */ |
| 84 | if (!nd_desc->provider_name |
| 85 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 86 | return NULL; |
| 87 | |
| 88 | return to_acpi_device(acpi_desc->dev); |
| 89 | } |
| 90 | |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 91 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 92 | { |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 93 | struct nd_cmd_clear_error *clear_err; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 94 | struct nd_cmd_ars_status *ars_status; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 95 | u16 flags; |
| 96 | |
| 97 | switch (cmd) { |
| 98 | case ND_CMD_ARS_CAP: |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 99 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 100 | return -ENOTTY; |
| 101 | |
| 102 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 103 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 104 | return -EIO; |
| 105 | |
| 106 | /* No supported scan types for this range */ |
| 107 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 108 | if ((status >> 16 & flags) == 0) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 109 | return -ENOTTY; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 110 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 111 | case ND_CMD_ARS_START: |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 112 | /* ARS is in progress */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 113 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 114 | return -EBUSY; |
| 115 | |
| 116 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 117 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 118 | return -EIO; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 119 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 120 | case ND_CMD_ARS_STATUS: |
| 121 | ars_status = buf; |
| 122 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 123 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 124 | return -EIO; |
| 125 | /* Check extended status (Upper two bytes) */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 126 | if (status == NFIT_ARS_STATUS_DONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 127 | return 0; |
| 128 | |
| 129 | /* ARS is in progress */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 130 | if (status == NFIT_ARS_STATUS_BUSY) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 131 | return -EBUSY; |
| 132 | |
| 133 | /* No ARS performed for the current boot */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 134 | if (status == NFIT_ARS_STATUS_NONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 135 | return -EAGAIN; |
| 136 | |
| 137 | /* |
| 138 | * ARS interrupted, either we overflowed or some other |
| 139 | * agent wants the scan to stop. If we didn't overflow |
| 140 | * then just continue with the returned results. |
| 141 | */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 142 | if (status == NFIT_ARS_STATUS_INTR) { |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 143 | if (ars_status->out_length >= 40 && (ars_status->flags |
| 144 | & NFIT_ARS_F_OVERFLOW)) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 145 | return -ENOSPC; |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | /* Unknown status */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 150 | if (status >> 16) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 151 | return -EIO; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 152 | return 0; |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 153 | case ND_CMD_CLEAR_ERROR: |
| 154 | clear_err = buf; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 155 | if (status & 0xffff) |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 156 | return -EIO; |
| 157 | if (!clear_err->cleared) |
| 158 | return -EIO; |
| 159 | if (clear_err->length > clear_err->cleared) |
| 160 | return clear_err->cleared; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 161 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 162 | default: |
| 163 | break; |
| 164 | } |
| 165 | |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 166 | /* all other non-zero status results in an error */ |
| 167 | if (status) |
| 168 | return -EIO; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 169 | return 0; |
| 170 | } |
| 171 | |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 172 | #define ACPI_LABELS_LOCKED 3 |
| 173 | |
| 174 | static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
| 175 | u32 status) |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 176 | { |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 177 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 178 | |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 179 | switch (cmd) { |
| 180 | case ND_CMD_GET_CONFIG_SIZE: |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 181 | /* |
| 182 | * In the _LSI, _LSR, _LSW case the locked status is |
| 183 | * communicated via the read/write commands |
| 184 | */ |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 185 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 186 | break; |
| 187 | |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 188 | if (status >> 16 & ND_CONFIG_LOCKED) |
| 189 | return -EACCES; |
| 190 | break; |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 191 | case ND_CMD_GET_CONFIG_DATA: |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 192 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) |
| 193 | && status == ACPI_LABELS_LOCKED) |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 194 | return -EACCES; |
| 195 | break; |
| 196 | case ND_CMD_SET_CONFIG_DATA: |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 197 | if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags) |
| 198 | && status == ACPI_LABELS_LOCKED) |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 199 | return -EACCES; |
| 200 | break; |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 201 | default: |
| 202 | break; |
| 203 | } |
| 204 | |
| 205 | /* all other non-zero status results in an error */ |
| 206 | if (status) |
| 207 | return -EIO; |
| 208 | return 0; |
| 209 | } |
| 210 | |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 211 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
| 212 | u32 status) |
| 213 | { |
| 214 | if (!nvdimm) |
| 215 | return xlat_bus_status(buf, cmd, status); |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 216 | return xlat_nvdimm_status(nvdimm, buf, cmd, status); |
| 217 | } |
| 218 | |
| 219 | /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */ |
| 220 | static union acpi_object *pkg_to_buf(union acpi_object *pkg) |
| 221 | { |
| 222 | int i; |
| 223 | void *dst; |
| 224 | size_t size = 0; |
| 225 | union acpi_object *buf = NULL; |
| 226 | |
| 227 | if (pkg->type != ACPI_TYPE_PACKAGE) { |
| 228 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 229 | pkg->type); |
| 230 | goto err; |
| 231 | } |
| 232 | |
| 233 | for (i = 0; i < pkg->package.count; i++) { |
| 234 | union acpi_object *obj = &pkg->package.elements[i]; |
| 235 | |
| 236 | if (obj->type == ACPI_TYPE_INTEGER) |
| 237 | size += 4; |
| 238 | else if (obj->type == ACPI_TYPE_BUFFER) |
| 239 | size += obj->buffer.length; |
| 240 | else { |
| 241 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 242 | obj->type); |
| 243 | goto err; |
| 244 | } |
| 245 | } |
| 246 | |
| 247 | buf = ACPI_ALLOCATE(sizeof(*buf) + size); |
| 248 | if (!buf) |
| 249 | goto err; |
| 250 | |
| 251 | dst = buf + 1; |
| 252 | buf->type = ACPI_TYPE_BUFFER; |
| 253 | buf->buffer.length = size; |
| 254 | buf->buffer.pointer = dst; |
| 255 | for (i = 0; i < pkg->package.count; i++) { |
| 256 | union acpi_object *obj = &pkg->package.elements[i]; |
| 257 | |
| 258 | if (obj->type == ACPI_TYPE_INTEGER) { |
| 259 | memcpy(dst, &obj->integer.value, 4); |
| 260 | dst += 4; |
| 261 | } else if (obj->type == ACPI_TYPE_BUFFER) { |
| 262 | memcpy(dst, obj->buffer.pointer, obj->buffer.length); |
| 263 | dst += obj->buffer.length; |
| 264 | } |
| 265 | } |
| 266 | err: |
| 267 | ACPI_FREE(pkg); |
| 268 | return buf; |
| 269 | } |
| 270 | |
| 271 | static union acpi_object *int_to_buf(union acpi_object *integer) |
| 272 | { |
| 273 | union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4); |
| 274 | void *dst = NULL; |
| 275 | |
| 276 | if (!buf) |
| 277 | goto err; |
| 278 | |
| 279 | if (integer->type != ACPI_TYPE_INTEGER) { |
| 280 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 281 | integer->type); |
| 282 | goto err; |
| 283 | } |
| 284 | |
| 285 | dst = buf + 1; |
| 286 | buf->type = ACPI_TYPE_BUFFER; |
| 287 | buf->buffer.length = 4; |
| 288 | buf->buffer.pointer = dst; |
| 289 | memcpy(dst, &integer->integer.value, 4); |
| 290 | err: |
| 291 | ACPI_FREE(integer); |
| 292 | return buf; |
| 293 | } |
| 294 | |
| 295 | static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset, |
| 296 | u32 len, void *data) |
| 297 | { |
| 298 | acpi_status rc; |
| 299 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 300 | struct acpi_object_list input = { |
| 301 | .count = 3, |
| 302 | .pointer = (union acpi_object []) { |
| 303 | [0] = { |
| 304 | .integer.type = ACPI_TYPE_INTEGER, |
| 305 | .integer.value = offset, |
| 306 | }, |
| 307 | [1] = { |
| 308 | .integer.type = ACPI_TYPE_INTEGER, |
| 309 | .integer.value = len, |
| 310 | }, |
| 311 | [2] = { |
| 312 | .buffer.type = ACPI_TYPE_BUFFER, |
| 313 | .buffer.pointer = data, |
| 314 | .buffer.length = len, |
| 315 | }, |
| 316 | }, |
| 317 | }; |
| 318 | |
| 319 | rc = acpi_evaluate_object(handle, "_LSW", &input, &buf); |
| 320 | if (ACPI_FAILURE(rc)) |
| 321 | return NULL; |
| 322 | return int_to_buf(buf.pointer); |
| 323 | } |
| 324 | |
| 325 | static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset, |
| 326 | u32 len) |
| 327 | { |
| 328 | acpi_status rc; |
| 329 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 330 | struct acpi_object_list input = { |
| 331 | .count = 2, |
| 332 | .pointer = (union acpi_object []) { |
| 333 | [0] = { |
| 334 | .integer.type = ACPI_TYPE_INTEGER, |
| 335 | .integer.value = offset, |
| 336 | }, |
| 337 | [1] = { |
| 338 | .integer.type = ACPI_TYPE_INTEGER, |
| 339 | .integer.value = len, |
| 340 | }, |
| 341 | }, |
| 342 | }; |
| 343 | |
| 344 | rc = acpi_evaluate_object(handle, "_LSR", &input, &buf); |
| 345 | if (ACPI_FAILURE(rc)) |
| 346 | return NULL; |
| 347 | return pkg_to_buf(buf.pointer); |
| 348 | } |
| 349 | |
| 350 | static union acpi_object *acpi_label_info(acpi_handle handle) |
| 351 | { |
| 352 | acpi_status rc; |
| 353 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 354 | |
| 355 | rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf); |
| 356 | if (ACPI_FAILURE(rc)) |
| 357 | return NULL; |
| 358 | return pkg_to_buf(buf.pointer); |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 359 | } |
| 360 | |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 361 | static u8 nfit_dsm_revid(unsigned family, unsigned func) |
| 362 | { |
Dan Carpenter | 01091c4 | 2020-02-25 19:20:06 +0300 | [diff] [blame] | 363 | static const u8 revid_table[NVDIMM_FAMILY_MAX+1][NVDIMM_CMD_MAX+1] = { |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 364 | [NVDIMM_FAMILY_INTEL] = { |
| 365 | [NVDIMM_INTEL_GET_MODES] = 2, |
| 366 | [NVDIMM_INTEL_GET_FWINFO] = 2, |
| 367 | [NVDIMM_INTEL_START_FWUPDATE] = 2, |
| 368 | [NVDIMM_INTEL_SEND_FWUPDATE] = 2, |
| 369 | [NVDIMM_INTEL_FINISH_FWUPDATE] = 2, |
| 370 | [NVDIMM_INTEL_QUERY_FWUPDATE] = 2, |
| 371 | [NVDIMM_INTEL_SET_THRESHOLD] = 2, |
| 372 | [NVDIMM_INTEL_INJECT_ERROR] = 2, |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 373 | [NVDIMM_INTEL_GET_SECURITY_STATE] = 2, |
| 374 | [NVDIMM_INTEL_SET_PASSPHRASE] = 2, |
| 375 | [NVDIMM_INTEL_DISABLE_PASSPHRASE] = 2, |
| 376 | [NVDIMM_INTEL_UNLOCK_UNIT] = 2, |
| 377 | [NVDIMM_INTEL_FREEZE_LOCK] = 2, |
| 378 | [NVDIMM_INTEL_SECURE_ERASE] = 2, |
| 379 | [NVDIMM_INTEL_OVERWRITE] = 2, |
| 380 | [NVDIMM_INTEL_QUERY_OVERWRITE] = 2, |
Dave Jiang | 89fa9d8 | 2018-12-10 10:53:22 -0700 | [diff] [blame] | 381 | [NVDIMM_INTEL_SET_MASTER_PASSPHRASE] = 2, |
| 382 | [NVDIMM_INTEL_MASTER_SECURE_ERASE] = 2, |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 383 | }, |
| 384 | }; |
| 385 | u8 id; |
| 386 | |
| 387 | if (family > NVDIMM_FAMILY_MAX) |
| 388 | return 0; |
Dan Carpenter | 01091c4 | 2020-02-25 19:20:06 +0300 | [diff] [blame] | 389 | if (func > NVDIMM_CMD_MAX) |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 390 | return 0; |
| 391 | id = revid_table[family][func]; |
| 392 | if (id == 0) |
| 393 | return 1; /* default */ |
| 394 | return id; |
| 395 | } |
| 396 | |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 397 | static bool payload_dumpable(struct nvdimm *nvdimm, unsigned int func) |
| 398 | { |
| 399 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 400 | |
| 401 | if (nfit_mem && nfit_mem->family == NVDIMM_FAMILY_INTEL |
| 402 | && func >= NVDIMM_INTEL_GET_SECURITY_STATE |
| 403 | && func <= NVDIMM_INTEL_MASTER_SECURE_ERASE) |
| 404 | return IS_ENABLED(CONFIG_NFIT_SECURITY_DEBUG); |
| 405 | return true; |
| 406 | } |
| 407 | |
Dan Williams | 11189c1 | 2019-01-19 10:55:04 -0800 | [diff] [blame] | 408 | static int cmd_to_func(struct nfit_mem *nfit_mem, unsigned int cmd, |
| 409 | struct nd_cmd_pkg *call_pkg) |
| 410 | { |
| 411 | if (call_pkg) { |
| 412 | int i; |
| 413 | |
Dan Williams | ebe9f6f | 2019-02-07 14:56:50 -0800 | [diff] [blame] | 414 | if (nfit_mem && nfit_mem->family != call_pkg->nd_family) |
Dan Williams | 11189c1 | 2019-01-19 10:55:04 -0800 | [diff] [blame] | 415 | return -ENOTTY; |
| 416 | |
| 417 | for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++) |
| 418 | if (call_pkg->nd_reserved2[i]) |
| 419 | return -EINVAL; |
| 420 | return call_pkg->nd_command; |
| 421 | } |
| 422 | |
Dan Williams | ebe9f6f | 2019-02-07 14:56:50 -0800 | [diff] [blame] | 423 | /* In the !call_pkg case, bus commands == bus functions */ |
| 424 | if (!nfit_mem) |
| 425 | return cmd; |
| 426 | |
Dan Williams | 11189c1 | 2019-01-19 10:55:04 -0800 | [diff] [blame] | 427 | /* Linux ND commands == NVDIMM_FAMILY_INTEL function numbers */ |
| 428 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) |
| 429 | return cmd; |
| 430 | |
| 431 | /* |
| 432 | * Force function number validation to fail since 0 is never |
| 433 | * published as a valid function in dsm_mask. |
| 434 | */ |
| 435 | return 0; |
| 436 | } |
| 437 | |
Dan Williams | a7de92d | 2016-12-05 13:43:25 -0800 | [diff] [blame] | 438 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
| 439 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 440 | { |
Xiaochun Lee | 8a7f02f | 2019-01-05 16:08:38 +0800 | [diff] [blame] | 441 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 442 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 443 | union acpi_object in_obj, in_buf, *out_obj; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 444 | const struct nd_cmd_desc *desc = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 445 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 446 | struct nd_cmd_pkg *call_pkg = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 447 | const char *cmd_name, *dimm_name; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 448 | unsigned long cmd_mask, dsm_mask; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 449 | u32 offset, fw_status = 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 450 | acpi_handle handle; |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 451 | const guid_t *guid; |
Dan Williams | 11189c1 | 2019-01-19 10:55:04 -0800 | [diff] [blame] | 452 | int func, rc, i; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 453 | |
Dave Jiang | ee6581c | 2018-07-11 10:10:11 -0700 | [diff] [blame] | 454 | if (cmd_rc) |
| 455 | *cmd_rc = -EINVAL; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 456 | |
Dan Williams | ebe9f6f | 2019-02-07 14:56:50 -0800 | [diff] [blame] | 457 | if (cmd == ND_CMD_CALL) |
| 458 | call_pkg = buf; |
| 459 | func = cmd_to_func(nfit_mem, cmd, call_pkg); |
| 460 | if (func < 0) |
| 461 | return func; |
| 462 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 463 | if (nvdimm) { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 464 | struct acpi_device *adev = nfit_mem->adev; |
| 465 | |
| 466 | if (!adev) |
| 467 | return -ENOTTY; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 468 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 469 | dimm_name = nvdimm_name(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 470 | cmd_name = nvdimm_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 471 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 472 | dsm_mask = nfit_mem->dsm_mask; |
| 473 | desc = nd_cmd_dimm_desc(cmd); |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 474 | guid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 475 | handle = adev->handle; |
| 476 | } else { |
| 477 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 478 | |
| 479 | cmd_name = nvdimm_bus_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 480 | cmd_mask = nd_desc->cmd_mask; |
Dan Williams | ebe9f6f | 2019-02-07 14:56:50 -0800 | [diff] [blame] | 481 | dsm_mask = nd_desc->bus_dsm_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 482 | desc = nd_cmd_bus_desc(cmd); |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 483 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 484 | handle = adev->handle; |
| 485 | dimm_name = "bus"; |
| 486 | } |
| 487 | |
| 488 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 489 | return -ENOTTY; |
| 490 | |
Dan Williams | 11189c1 | 2019-01-19 10:55:04 -0800 | [diff] [blame] | 491 | /* |
| 492 | * Check for a valid command. For ND_CMD_CALL, we also have to |
| 493 | * make sure that the DSM function is supported. |
| 494 | */ |
Dan Carpenter | 01091c4 | 2020-02-25 19:20:06 +0300 | [diff] [blame] | 495 | if (cmd == ND_CMD_CALL && |
| 496 | (func > NVDIMM_CMD_MAX || !test_bit(func, &dsm_mask))) |
Dan Williams | 11189c1 | 2019-01-19 10:55:04 -0800 | [diff] [blame] | 497 | return -ENOTTY; |
| 498 | else if (!test_bit(cmd, &cmd_mask)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 499 | return -ENOTTY; |
| 500 | |
| 501 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 502 | in_obj.package.count = 1; |
| 503 | in_obj.package.elements = &in_buf; |
| 504 | in_buf.type = ACPI_TYPE_BUFFER; |
| 505 | in_buf.buffer.pointer = buf; |
| 506 | in_buf.buffer.length = 0; |
| 507 | |
| 508 | /* libnvdimm has already validated the input envelope */ |
| 509 | for (i = 0; i < desc->in_num; i++) |
| 510 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 511 | i, buf); |
| 512 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 513 | if (call_pkg) { |
| 514 | /* skip over package wrapper */ |
| 515 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; |
| 516 | in_buf.buffer.length = call_pkg->nd_size_in; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 517 | } |
| 518 | |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 519 | dev_dbg(dev, "%s cmd: %d: func: %d input length: %d\n", |
| 520 | dimm_name, cmd, func, in_buf.buffer.length); |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 521 | if (payload_dumpable(nvdimm, func)) |
| 522 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, |
| 523 | in_buf.buffer.pointer, |
| 524 | min_t(u32, 256, in_buf.buffer.length), true); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 525 | |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 526 | /* call the BIOS, prefer the named methods over _DSM if available */ |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 527 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE |
| 528 | && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 529 | out_obj = acpi_label_info(handle); |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 530 | else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA |
| 531 | && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) { |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 532 | struct nd_cmd_get_config_data_hdr *p = buf; |
| 533 | |
| 534 | out_obj = acpi_label_read(handle, p->in_offset, p->in_length); |
Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 535 | } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 536 | && test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) { |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 537 | struct nd_cmd_set_config_hdr *p = buf; |
| 538 | |
| 539 | out_obj = acpi_label_write(handle, p->in_offset, p->in_length, |
| 540 | p->in_buf); |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 541 | } else { |
| 542 | u8 revid; |
| 543 | |
Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 544 | if (nvdimm) |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 545 | revid = nfit_dsm_revid(nfit_mem->family, func); |
| 546 | else |
| 547 | revid = 1; |
| 548 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); |
| 549 | } |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 550 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 551 | if (!out_obj) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 552 | dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 553 | return -EINVAL; |
| 554 | } |
| 555 | |
Dexuan Cui | 43f8987 | 2019-01-30 01:23:01 +0000 | [diff] [blame] | 556 | if (out_obj->type != ACPI_TYPE_BUFFER) { |
| 557 | dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n", |
| 558 | dimm_name, cmd_name, out_obj->type); |
| 559 | rc = -EINVAL; |
| 560 | goto out; |
| 561 | } |
| 562 | |
Dan Williams | 351f339 | 2019-03-12 12:28:03 -0700 | [diff] [blame] | 563 | dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name, |
| 564 | cmd_name, out_obj->buffer.length); |
| 565 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, |
| 566 | out_obj->buffer.pointer, |
| 567 | min_t(u32, 128, out_obj->buffer.length), true); |
| 568 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 569 | if (call_pkg) { |
| 570 | call_pkg->nd_fw_size = out_obj->buffer.length; |
| 571 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, |
| 572 | out_obj->buffer.pointer, |
| 573 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); |
| 574 | |
| 575 | ACPI_FREE(out_obj); |
| 576 | /* |
| 577 | * Need to support FW function w/o known size in advance. |
| 578 | * Caller can determine required size based upon nd_fw_size. |
| 579 | * If we return an error (like elsewhere) then caller wouldn't |
| 580 | * be able to rely upon data returned to make calculation. |
| 581 | */ |
Dave Jiang | ee6581c | 2018-07-11 10:10:11 -0700 | [diff] [blame] | 582 | if (cmd_rc) |
| 583 | *cmd_rc = 0; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 584 | return 0; |
| 585 | } |
| 586 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 587 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 588 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
Dan Williams | efda1b5d | 2016-12-06 09:10:12 -0800 | [diff] [blame] | 589 | (u32 *) out_obj->buffer.pointer, |
| 590 | out_obj->buffer.length - offset); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 591 | |
| 592 | if (offset + out_size > out_obj->buffer.length) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 593 | dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n", |
| 594 | dimm_name, cmd_name, i); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 595 | break; |
| 596 | } |
| 597 | |
| 598 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 599 | dev_dbg(dev, "%s output overrun cmd: %s field: %d\n", |
| 600 | dimm_name, cmd_name, i); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 601 | rc = -ENXIO; |
| 602 | goto out; |
| 603 | } |
| 604 | memcpy(buf + in_buf.buffer.length + offset, |
| 605 | out_obj->buffer.pointer + offset, out_size); |
| 606 | offset += out_size; |
| 607 | } |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 608 | |
| 609 | /* |
| 610 | * Set fw_status for all the commands with a known format to be |
| 611 | * later interpreted by xlat_status(). |
| 612 | */ |
Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 613 | if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP |
| 614 | && cmd <= ND_CMD_CLEAR_ERROR) |
| 615 | || (nvdimm && cmd >= ND_CMD_SMART |
| 616 | && cmd <= ND_CMD_VENDOR))) |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 617 | fw_status = *(u32 *) out_obj->buffer.pointer; |
| 618 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 619 | if (offset + in_buf.buffer.length < buf_len) { |
| 620 | if (i >= 1) { |
| 621 | /* |
| 622 | * status valid, return the number of bytes left |
| 623 | * unfilled in the output buffer |
| 624 | */ |
| 625 | rc = buf_len - offset - in_buf.buffer.length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 626 | if (cmd_rc) |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 627 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
| 628 | fw_status); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 629 | } else { |
| 630 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 631 | __func__, dimm_name, cmd_name, buf_len, |
| 632 | offset); |
| 633 | rc = -ENXIO; |
| 634 | } |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 635 | } else { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 636 | rc = 0; |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 637 | if (cmd_rc) |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 638 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 639 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 640 | |
| 641 | out: |
| 642 | ACPI_FREE(out_obj); |
| 643 | |
| 644 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 645 | } |
Dan Williams | a7de92d | 2016-12-05 13:43:25 -0800 | [diff] [blame] | 646 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 647 | |
| 648 | static const char *spa_type_name(u16 type) |
| 649 | { |
| 650 | static const char *to_name[] = { |
| 651 | [NFIT_SPA_VOLATILE] = "volatile", |
| 652 | [NFIT_SPA_PM] = "pmem", |
| 653 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 654 | [NFIT_SPA_BDW] = "block-data-window", |
| 655 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 656 | [NFIT_SPA_VCD] = "volatile-cd", |
| 657 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 658 | [NFIT_SPA_PCD] = "persistent-cd", |
| 659 | |
| 660 | }; |
| 661 | |
| 662 | if (type > NFIT_SPA_PCD) |
| 663 | return "unknown"; |
| 664 | |
| 665 | return to_name[type]; |
| 666 | } |
| 667 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 668 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 669 | { |
| 670 | int i; |
| 671 | |
| 672 | for (i = 0; i < NFIT_UUID_MAX; i++) |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 673 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 674 | return i; |
| 675 | return -1; |
| 676 | } |
| 677 | |
| 678 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 679 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 680 | struct acpi_nfit_system_address *spa) |
| 681 | { |
| 682 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 683 | struct nfit_spa *nfit_spa; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 684 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 685 | if (spa->header.length != sizeof(*spa)) |
| 686 | return false; |
| 687 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 688 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 689 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 690 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 691 | return true; |
| 692 | } |
| 693 | } |
| 694 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 695 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
| 696 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 697 | if (!nfit_spa) |
| 698 | return false; |
| 699 | INIT_LIST_HEAD(&nfit_spa->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 700 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 701 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 702 | dev_dbg(dev, "spa index: %d type: %s\n", |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 703 | spa->range_index, |
| 704 | spa_type_name(nfit_spa_type(spa))); |
| 705 | return true; |
| 706 | } |
| 707 | |
| 708 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 709 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 710 | struct acpi_nfit_memory_map *memdev) |
| 711 | { |
| 712 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 713 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 714 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 715 | if (memdev->header.length != sizeof(*memdev)) |
| 716 | return false; |
| 717 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 718 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 719 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 720 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 721 | return true; |
| 722 | } |
| 723 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 724 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
| 725 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 726 | if (!nfit_memdev) |
| 727 | return false; |
| 728 | INIT_LIST_HEAD(&nfit_memdev->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 729 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 730 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 731 | dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
| 732 | memdev->device_handle, memdev->range_index, |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 733 | memdev->region_index, memdev->flags); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 734 | return true; |
| 735 | } |
| 736 | |
Tony Luck | 23222f8 | 2018-03-12 11:24:28 -0700 | [diff] [blame] | 737 | int nfit_get_smbios_id(u32 device_handle, u16 *flags) |
| 738 | { |
| 739 | struct acpi_nfit_memory_map *memdev; |
| 740 | struct acpi_nfit_desc *acpi_desc; |
| 741 | struct nfit_mem *nfit_mem; |
Tony Luck | 0919871 | 2019-01-11 14:46:37 -0800 | [diff] [blame] | 742 | u16 physical_id; |
Tony Luck | 23222f8 | 2018-03-12 11:24:28 -0700 | [diff] [blame] | 743 | |
| 744 | mutex_lock(&acpi_desc_lock); |
| 745 | list_for_each_entry(acpi_desc, &acpi_descs, list) { |
| 746 | mutex_lock(&acpi_desc->init_mutex); |
| 747 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| 748 | memdev = __to_nfit_memdev(nfit_mem); |
| 749 | if (memdev->device_handle == device_handle) { |
Tony Luck | 0919871 | 2019-01-11 14:46:37 -0800 | [diff] [blame] | 750 | *flags = memdev->flags; |
| 751 | physical_id = memdev->physical_id; |
Tony Luck | 23222f8 | 2018-03-12 11:24:28 -0700 | [diff] [blame] | 752 | mutex_unlock(&acpi_desc->init_mutex); |
| 753 | mutex_unlock(&acpi_desc_lock); |
Tony Luck | 0919871 | 2019-01-11 14:46:37 -0800 | [diff] [blame] | 754 | return physical_id; |
Tony Luck | 23222f8 | 2018-03-12 11:24:28 -0700 | [diff] [blame] | 755 | } |
| 756 | } |
| 757 | mutex_unlock(&acpi_desc->init_mutex); |
| 758 | } |
| 759 | mutex_unlock(&acpi_desc_lock); |
| 760 | |
| 761 | return -ENODEV; |
| 762 | } |
| 763 | EXPORT_SYMBOL_GPL(nfit_get_smbios_id); |
| 764 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 765 | /* |
| 766 | * An implementation may provide a truncated control region if no block windows |
| 767 | * are defined. |
| 768 | */ |
| 769 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) |
| 770 | { |
| 771 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, |
| 772 | window_size)) |
| 773 | return 0; |
| 774 | if (dcr->windows) |
| 775 | return sizeof(*dcr); |
| 776 | return offsetof(struct acpi_nfit_control_region, window_size); |
| 777 | } |
| 778 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 779 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 780 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 781 | struct acpi_nfit_control_region *dcr) |
| 782 | { |
| 783 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 784 | struct nfit_dcr *nfit_dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 785 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 786 | if (!sizeof_dcr(dcr)) |
| 787 | return false; |
| 788 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 789 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 790 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 791 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 792 | return true; |
| 793 | } |
| 794 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 795 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
| 796 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 797 | if (!nfit_dcr) |
| 798 | return false; |
| 799 | INIT_LIST_HEAD(&nfit_dcr->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 800 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 801 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 802 | dev_dbg(dev, "dcr index: %d windows: %d\n", |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 803 | dcr->region_index, dcr->windows); |
| 804 | return true; |
| 805 | } |
| 806 | |
| 807 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 808 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 809 | struct acpi_nfit_data_region *bdw) |
| 810 | { |
| 811 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 812 | struct nfit_bdw *nfit_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 813 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 814 | if (bdw->header.length != sizeof(*bdw)) |
| 815 | return false; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 816 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 817 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 818 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 819 | return true; |
| 820 | } |
| 821 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 822 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
| 823 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 824 | if (!nfit_bdw) |
| 825 | return false; |
| 826 | INIT_LIST_HEAD(&nfit_bdw->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 827 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 828 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 829 | dev_dbg(dev, "bdw dcr: %d windows: %d\n", |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 830 | bdw->region_index, bdw->windows); |
| 831 | return true; |
| 832 | } |
| 833 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 834 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
| 835 | { |
| 836 | if (idt->header.length < sizeof(*idt)) |
| 837 | return 0; |
| 838 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); |
| 839 | } |
| 840 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 841 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 842 | struct nfit_table_prev *prev, |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 843 | struct acpi_nfit_interleave *idt) |
| 844 | { |
| 845 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 846 | struct nfit_idt *nfit_idt; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 847 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 848 | if (!sizeof_idt(idt)) |
| 849 | return false; |
| 850 | |
| 851 | list_for_each_entry(nfit_idt, &prev->idts, list) { |
| 852 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) |
| 853 | continue; |
| 854 | |
| 855 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 856 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 857 | return true; |
| 858 | } |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 859 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 860 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 861 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
| 862 | GFP_KERNEL); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 863 | if (!nfit_idt) |
| 864 | return false; |
| 865 | INIT_LIST_HEAD(&nfit_idt->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 866 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 867 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 868 | dev_dbg(dev, "idt index: %d num_lines: %d\n", |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 869 | idt->interleave_index, idt->line_count); |
| 870 | return true; |
| 871 | } |
| 872 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 873 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
| 874 | { |
| 875 | if (flush->header.length < sizeof(*flush)) |
| 876 | return 0; |
| 877 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); |
| 878 | } |
| 879 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 880 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 881 | struct nfit_table_prev *prev, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 882 | struct acpi_nfit_flush_address *flush) |
| 883 | { |
| 884 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 885 | struct nfit_flush *nfit_flush; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 886 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 887 | if (!sizeof_flush(flush)) |
| 888 | return false; |
| 889 | |
| 890 | list_for_each_entry(nfit_flush, &prev->flushes, list) { |
| 891 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) |
| 892 | continue; |
| 893 | |
| 894 | if (memcmp(nfit_flush->flush, flush, |
| 895 | sizeof_flush(flush)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 896 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 897 | return true; |
| 898 | } |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 899 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 900 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 901 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
| 902 | + sizeof_flush(flush), GFP_KERNEL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 903 | if (!nfit_flush) |
| 904 | return false; |
| 905 | INIT_LIST_HEAD(&nfit_flush->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 906 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 907 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 908 | dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n", |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 909 | flush->device_handle, flush->hint_count); |
| 910 | return true; |
| 911 | } |
| 912 | |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 913 | static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc, |
| 914 | struct acpi_nfit_capabilities *pcap) |
| 915 | { |
| 916 | struct device *dev = acpi_desc->dev; |
| 917 | u32 mask; |
| 918 | |
| 919 | mask = (1 << (pcap->highest_capability + 1)) - 1; |
| 920 | acpi_desc->platform_cap = pcap->capabilities & mask; |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 921 | dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap); |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 922 | return true; |
| 923 | } |
| 924 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 925 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 926 | struct nfit_table_prev *prev, void *table, const void *end) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 927 | { |
| 928 | struct device *dev = acpi_desc->dev; |
| 929 | struct acpi_nfit_header *hdr; |
| 930 | void *err = ERR_PTR(-ENOMEM); |
| 931 | |
| 932 | if (table >= end) |
| 933 | return NULL; |
| 934 | |
| 935 | hdr = table; |
Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 936 | if (!hdr->length) { |
| 937 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 938 | hdr->type); |
| 939 | return NULL; |
| 940 | } |
| 941 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 942 | switch (hdr->type) { |
| 943 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 944 | if (!add_spa(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 945 | return err; |
| 946 | break; |
| 947 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 948 | if (!add_memdev(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 949 | return err; |
| 950 | break; |
| 951 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 952 | if (!add_dcr(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 953 | return err; |
| 954 | break; |
| 955 | case ACPI_NFIT_TYPE_DATA_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 956 | if (!add_bdw(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 957 | return err; |
| 958 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 959 | case ACPI_NFIT_TYPE_INTERLEAVE: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 960 | if (!add_idt(acpi_desc, prev, table)) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 961 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 962 | break; |
| 963 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 964 | if (!add_flush(acpi_desc, prev, table)) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 965 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 966 | break; |
| 967 | case ACPI_NFIT_TYPE_SMBIOS: |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 968 | dev_dbg(dev, "smbios\n"); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 969 | break; |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 970 | case ACPI_NFIT_TYPE_CAPABILITIES: |
| 971 | if (!add_platform_cap(acpi_desc, table)) |
| 972 | return err; |
| 973 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 974 | default: |
| 975 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 976 | break; |
| 977 | } |
| 978 | |
| 979 | return table + hdr->length; |
| 980 | } |
| 981 | |
| 982 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 983 | struct nfit_mem *nfit_mem) |
| 984 | { |
| 985 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 986 | u16 dcr = nfit_mem->dcr->region_index; |
| 987 | struct nfit_spa *nfit_spa; |
| 988 | |
| 989 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 990 | u16 range_index = nfit_spa->spa->range_index; |
| 991 | int type = nfit_spa_type(nfit_spa->spa); |
| 992 | struct nfit_memdev *nfit_memdev; |
| 993 | |
| 994 | if (type != NFIT_SPA_BDW) |
| 995 | continue; |
| 996 | |
| 997 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 998 | if (nfit_memdev->memdev->range_index != range_index) |
| 999 | continue; |
| 1000 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 1001 | continue; |
| 1002 | if (nfit_memdev->memdev->region_index != dcr) |
| 1003 | continue; |
| 1004 | |
| 1005 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 1006 | return; |
| 1007 | } |
| 1008 | } |
| 1009 | |
| 1010 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 1011 | nfit_mem->spa_dcr->range_index); |
| 1012 | nfit_mem->bdw = NULL; |
| 1013 | } |
| 1014 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1015 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1016 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 1017 | { |
| 1018 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1019 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1020 | struct nfit_bdw *nfit_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1021 | struct nfit_idt *nfit_idt; |
| 1022 | u16 idt_idx, range_index; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1023 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1024 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 1025 | if (nfit_bdw->bdw->region_index != dcr) |
| 1026 | continue; |
| 1027 | nfit_mem->bdw = nfit_bdw->bdw; |
| 1028 | break; |
| 1029 | } |
| 1030 | |
| 1031 | if (!nfit_mem->bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1032 | return; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1033 | |
| 1034 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1035 | |
| 1036 | if (!nfit_mem->spa_bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1037 | return; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1038 | |
| 1039 | range_index = nfit_mem->spa_bdw->range_index; |
| 1040 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1041 | if (nfit_memdev->memdev->range_index != range_index || |
| 1042 | nfit_memdev->memdev->region_index != dcr) |
| 1043 | continue; |
| 1044 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 1045 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 1046 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 1047 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 1048 | continue; |
| 1049 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 1050 | break; |
| 1051 | } |
| 1052 | break; |
| 1053 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1054 | } |
| 1055 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1056 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1057 | struct acpi_nfit_system_address *spa) |
| 1058 | { |
| 1059 | struct nfit_mem *nfit_mem, *found; |
| 1060 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1061 | int type = spa ? nfit_spa_type(spa) : 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1062 | |
| 1063 | switch (type) { |
| 1064 | case NFIT_SPA_DCR: |
| 1065 | case NFIT_SPA_PM: |
| 1066 | break; |
| 1067 | default: |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1068 | if (spa) |
| 1069 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1070 | } |
| 1071 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1072 | /* |
| 1073 | * This loop runs in two modes, when a dimm is mapped the loop |
| 1074 | * adds memdev associations to an existing dimm, or creates a |
| 1075 | * dimm. In the unmapped dimm case this loop sweeps for memdev |
| 1076 | * instances with an invalid / zero range_index and adds those |
| 1077 | * dimms without spa associations. |
| 1078 | */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1079 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1080 | struct nfit_flush *nfit_flush; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1081 | struct nfit_dcr *nfit_dcr; |
| 1082 | u32 device_handle; |
| 1083 | u16 dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1084 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1085 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
| 1086 | continue; |
| 1087 | if (!spa && nfit_memdev->memdev->range_index) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1088 | continue; |
| 1089 | found = NULL; |
| 1090 | dcr = nfit_memdev->memdev->region_index; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1091 | device_handle = nfit_memdev->memdev->device_handle; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1092 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1093 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 1094 | == device_handle) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1095 | found = nfit_mem; |
| 1096 | break; |
| 1097 | } |
| 1098 | |
| 1099 | if (found) |
| 1100 | nfit_mem = found; |
| 1101 | else { |
| 1102 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 1103 | sizeof(*nfit_mem), GFP_KERNEL); |
| 1104 | if (!nfit_mem) |
| 1105 | return -ENOMEM; |
| 1106 | INIT_LIST_HEAD(&nfit_mem->list); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1107 | nfit_mem->acpi_desc = acpi_desc; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1108 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 1109 | } |
| 1110 | |
| 1111 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 1112 | if (nfit_dcr->dcr->region_index != dcr) |
| 1113 | continue; |
| 1114 | /* |
| 1115 | * Record the control region for the dimm. For |
| 1116 | * the ACPI 6.1 case, where there are separate |
| 1117 | * control regions for the pmem vs blk |
| 1118 | * interfaces, be sure to record the extended |
| 1119 | * blk details. |
| 1120 | */ |
| 1121 | if (!nfit_mem->dcr) |
| 1122 | nfit_mem->dcr = nfit_dcr->dcr; |
| 1123 | else if (nfit_mem->dcr->windows == 0 |
| 1124 | && nfit_dcr->dcr->windows) |
| 1125 | nfit_mem->dcr = nfit_dcr->dcr; |
| 1126 | break; |
| 1127 | } |
| 1128 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1129 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1130 | struct acpi_nfit_flush_address *flush; |
| 1131 | u16 i; |
| 1132 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1133 | if (nfit_flush->flush->device_handle != device_handle) |
| 1134 | continue; |
| 1135 | nfit_mem->nfit_flush = nfit_flush; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1136 | flush = nfit_flush->flush; |
Kees Cook | a86854d | 2018-06-12 14:07:58 -0700 | [diff] [blame] | 1137 | nfit_mem->flush_wpq = devm_kcalloc(acpi_desc->dev, |
| 1138 | flush->hint_count, |
| 1139 | sizeof(struct resource), |
| 1140 | GFP_KERNEL); |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1141 | if (!nfit_mem->flush_wpq) |
| 1142 | return -ENOMEM; |
| 1143 | for (i = 0; i < flush->hint_count; i++) { |
| 1144 | struct resource *res = &nfit_mem->flush_wpq[i]; |
| 1145 | |
| 1146 | res->start = flush->hint_address[i]; |
| 1147 | res->end = res->start + 8 - 1; |
| 1148 | } |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1149 | break; |
| 1150 | } |
| 1151 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1152 | if (dcr && !nfit_mem->dcr) { |
| 1153 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 1154 | spa->range_index, dcr); |
| 1155 | return -ENODEV; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1156 | } |
| 1157 | |
| 1158 | if (type == NFIT_SPA_DCR) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1159 | struct nfit_idt *nfit_idt; |
| 1160 | u16 idt_idx; |
| 1161 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1162 | /* multiple dimms may share a SPA when interleaved */ |
| 1163 | nfit_mem->spa_dcr = spa; |
| 1164 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1165 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 1166 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 1167 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 1168 | continue; |
| 1169 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 1170 | break; |
| 1171 | } |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1172 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1173 | } else if (type == NFIT_SPA_PM) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1174 | /* |
| 1175 | * A single dimm may belong to multiple SPA-PM |
| 1176 | * ranges, record at least one in addition to |
| 1177 | * any SPA-DCR range. |
| 1178 | */ |
| 1179 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1180 | } else |
| 1181 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1182 | } |
| 1183 | |
| 1184 | return 0; |
| 1185 | } |
| 1186 | |
| 1187 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 1188 | { |
| 1189 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 1190 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 1191 | u32 handleA, handleB; |
| 1192 | |
| 1193 | handleA = __to_nfit_memdev(a)->device_handle; |
| 1194 | handleB = __to_nfit_memdev(b)->device_handle; |
| 1195 | if (handleA < handleB) |
| 1196 | return -1; |
| 1197 | else if (handleA > handleB) |
| 1198 | return 1; |
| 1199 | return 0; |
| 1200 | } |
| 1201 | |
| 1202 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 1203 | { |
| 1204 | struct nfit_spa *nfit_spa; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1205 | int rc; |
| 1206 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1207 | |
| 1208 | /* |
| 1209 | * For each SPA-DCR or SPA-PMEM address range find its |
| 1210 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 1211 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 1212 | * try to find a SPA-BDW and a corresponding BDW that references |
| 1213 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 1214 | * BDWs are optional. |
| 1215 | */ |
| 1216 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1217 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1218 | if (rc) |
| 1219 | return rc; |
| 1220 | } |
| 1221 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1222 | /* |
| 1223 | * If a DIMM has failed to be mapped into SPA there will be no |
| 1224 | * SPA entries above. Find and register all the unmapped DIMMs |
| 1225 | * for reporting and recovery purposes. |
| 1226 | */ |
| 1227 | rc = __nfit_mem_init(acpi_desc, NULL); |
| 1228 | if (rc) |
| 1229 | return rc; |
| 1230 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1231 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 1232 | |
| 1233 | return 0; |
| 1234 | } |
| 1235 | |
Jerry Hoemann | 41f95db | 2017-06-30 20:41:28 -0700 | [diff] [blame] | 1236 | static ssize_t bus_dsm_mask_show(struct device *dev, |
| 1237 | struct device_attribute *attr, char *buf) |
| 1238 | { |
| 1239 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1240 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1241 | |
| 1242 | return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask); |
| 1243 | } |
| 1244 | static struct device_attribute dev_attr_bus_dsm_mask = |
| 1245 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); |
| 1246 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1247 | static ssize_t revision_show(struct device *dev, |
| 1248 | struct device_attribute *attr, char *buf) |
| 1249 | { |
| 1250 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1251 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1252 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1253 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 1254 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1255 | } |
| 1256 | static DEVICE_ATTR_RO(revision); |
| 1257 | |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1258 | static ssize_t hw_error_scrub_show(struct device *dev, |
| 1259 | struct device_attribute *attr, char *buf) |
| 1260 | { |
| 1261 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1262 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1263 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1264 | |
| 1265 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); |
| 1266 | } |
| 1267 | |
| 1268 | /* |
| 1269 | * The 'hw_error_scrub' attribute can have the following values written to it: |
| 1270 | * '0': Switch to the default mode where an exception will only insert |
| 1271 | * the address of the memory error into the poison and badblocks lists. |
| 1272 | * '1': Enable a full scrub to happen if an exception for a memory error is |
| 1273 | * received. |
| 1274 | */ |
| 1275 | static ssize_t hw_error_scrub_store(struct device *dev, |
| 1276 | struct device_attribute *attr, const char *buf, size_t size) |
| 1277 | { |
| 1278 | struct nvdimm_bus_descriptor *nd_desc; |
| 1279 | ssize_t rc; |
| 1280 | long val; |
| 1281 | |
| 1282 | rc = kstrtol(buf, 0, &val); |
| 1283 | if (rc) |
| 1284 | return rc; |
| 1285 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1286 | nfit_device_lock(dev); |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1287 | nd_desc = dev_get_drvdata(dev); |
| 1288 | if (nd_desc) { |
| 1289 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1290 | |
| 1291 | switch (val) { |
| 1292 | case HW_ERROR_SCRUB_ON: |
| 1293 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; |
| 1294 | break; |
| 1295 | case HW_ERROR_SCRUB_OFF: |
| 1296 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; |
| 1297 | break; |
| 1298 | default: |
| 1299 | rc = -EINVAL; |
| 1300 | break; |
| 1301 | } |
| 1302 | } |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1303 | nfit_device_unlock(dev); |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1304 | if (rc) |
| 1305 | return rc; |
| 1306 | return size; |
| 1307 | } |
| 1308 | static DEVICE_ATTR_RW(hw_error_scrub); |
| 1309 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1310 | /* |
| 1311 | * This shows the number of full Address Range Scrubs that have been |
| 1312 | * completed since driver load time. Userspace can wait on this using |
| 1313 | * select/poll etc. A '+' at the end indicates an ARS is in progress |
| 1314 | */ |
| 1315 | static ssize_t scrub_show(struct device *dev, |
| 1316 | struct device_attribute *attr, char *buf) |
| 1317 | { |
| 1318 | struct nvdimm_bus_descriptor *nd_desc; |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 1319 | struct acpi_nfit_desc *acpi_desc; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1320 | ssize_t rc = -ENXIO; |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 1321 | bool busy; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1322 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1323 | nfit_device_lock(dev); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1324 | nd_desc = dev_get_drvdata(dev); |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 1325 | if (!nd_desc) { |
Dan Carpenter | edffc70 | 2019-10-18 15:35:34 +0300 | [diff] [blame] | 1326 | nfit_device_unlock(dev); |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 1327 | return rc; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1328 | } |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 1329 | acpi_desc = to_acpi_desc(nd_desc); |
| 1330 | |
| 1331 | mutex_lock(&acpi_desc->init_mutex); |
| 1332 | busy = test_bit(ARS_BUSY, &acpi_desc->scrub_flags) |
| 1333 | && !test_bit(ARS_CANCEL, &acpi_desc->scrub_flags); |
| 1334 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, busy ? "+\n" : "\n"); |
Dan Williams | 5479b27 | 2019-02-13 09:04:07 -0800 | [diff] [blame] | 1335 | /* Allow an admin to poll the busy state at a higher rate */ |
| 1336 | if (busy && capable(CAP_SYS_RAWIO) && !test_and_set_bit(ARS_POLL, |
| 1337 | &acpi_desc->scrub_flags)) { |
| 1338 | acpi_desc->scrub_tmo = 1; |
| 1339 | mod_delayed_work(nfit_wq, &acpi_desc->dwork, HZ); |
| 1340 | } |
| 1341 | |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 1342 | mutex_unlock(&acpi_desc->init_mutex); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1343 | nfit_device_unlock(dev); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1344 | return rc; |
| 1345 | } |
| 1346 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1347 | static ssize_t scrub_store(struct device *dev, |
| 1348 | struct device_attribute *attr, const char *buf, size_t size) |
| 1349 | { |
| 1350 | struct nvdimm_bus_descriptor *nd_desc; |
| 1351 | ssize_t rc; |
| 1352 | long val; |
| 1353 | |
| 1354 | rc = kstrtol(buf, 0, &val); |
| 1355 | if (rc) |
| 1356 | return rc; |
| 1357 | if (val != 1) |
| 1358 | return -EINVAL; |
| 1359 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1360 | nfit_device_lock(dev); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1361 | nd_desc = dev_get_drvdata(dev); |
| 1362 | if (nd_desc) { |
| 1363 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1364 | |
Dan Williams | b5fd2e0 | 2018-12-03 10:30:25 -0800 | [diff] [blame] | 1365 | rc = acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1366 | } |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1367 | nfit_device_unlock(dev); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1368 | if (rc) |
| 1369 | return rc; |
| 1370 | return size; |
| 1371 | } |
| 1372 | static DEVICE_ATTR_RW(scrub); |
| 1373 | |
| 1374 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) |
| 1375 | { |
| 1376 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1377 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START |
| 1378 | | 1 << ND_CMD_ARS_STATUS; |
| 1379 | |
| 1380 | return (nd_desc->cmd_mask & mask) == mask; |
| 1381 | } |
| 1382 | |
| 1383 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) |
| 1384 | { |
| 1385 | struct device *dev = container_of(kobj, struct device, kobj); |
| 1386 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1387 | |
| 1388 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) |
| 1389 | return 0; |
| 1390 | return a->mode; |
| 1391 | } |
| 1392 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1393 | static struct attribute *acpi_nfit_attributes[] = { |
| 1394 | &dev_attr_revision.attr, |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1395 | &dev_attr_scrub.attr, |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1396 | &dev_attr_hw_error_scrub.attr, |
Jerry Hoemann | 41f95db | 2017-06-30 20:41:28 -0700 | [diff] [blame] | 1397 | &dev_attr_bus_dsm_mask.attr, |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1398 | NULL, |
| 1399 | }; |
| 1400 | |
Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1401 | static const struct attribute_group acpi_nfit_attribute_group = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1402 | .name = "nfit", |
| 1403 | .attrs = acpi_nfit_attributes, |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1404 | .is_visible = nfit_visible, |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1405 | }; |
| 1406 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 1407 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1408 | &acpi_nfit_attribute_group, |
| 1409 | NULL, |
| 1410 | }; |
| 1411 | |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1412 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 1413 | { |
| 1414 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1415 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1416 | |
| 1417 | return __to_nfit_memdev(nfit_mem); |
| 1418 | } |
| 1419 | |
| 1420 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 1421 | { |
| 1422 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1423 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1424 | |
| 1425 | return nfit_mem->dcr; |
| 1426 | } |
| 1427 | |
| 1428 | static ssize_t handle_show(struct device *dev, |
| 1429 | struct device_attribute *attr, char *buf) |
| 1430 | { |
| 1431 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1432 | |
| 1433 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 1434 | } |
| 1435 | static DEVICE_ATTR_RO(handle); |
| 1436 | |
| 1437 | static ssize_t phys_id_show(struct device *dev, |
| 1438 | struct device_attribute *attr, char *buf) |
| 1439 | { |
| 1440 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1441 | |
| 1442 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 1443 | } |
| 1444 | static DEVICE_ATTR_RO(phys_id); |
| 1445 | |
| 1446 | static ssize_t vendor_show(struct device *dev, |
| 1447 | struct device_attribute *attr, char *buf) |
| 1448 | { |
| 1449 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1450 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1451 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1452 | } |
| 1453 | static DEVICE_ATTR_RO(vendor); |
| 1454 | |
| 1455 | static ssize_t rev_id_show(struct device *dev, |
| 1456 | struct device_attribute *attr, char *buf) |
| 1457 | { |
| 1458 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1459 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1460 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1461 | } |
| 1462 | static DEVICE_ATTR_RO(rev_id); |
| 1463 | |
| 1464 | static ssize_t device_show(struct device *dev, |
| 1465 | struct device_attribute *attr, char *buf) |
| 1466 | { |
| 1467 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1468 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1469 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1470 | } |
| 1471 | static DEVICE_ATTR_RO(device); |
| 1472 | |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1473 | static ssize_t subsystem_vendor_show(struct device *dev, |
| 1474 | struct device_attribute *attr, char *buf) |
| 1475 | { |
| 1476 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1477 | |
| 1478 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); |
| 1479 | } |
| 1480 | static DEVICE_ATTR_RO(subsystem_vendor); |
| 1481 | |
| 1482 | static ssize_t subsystem_rev_id_show(struct device *dev, |
| 1483 | struct device_attribute *attr, char *buf) |
| 1484 | { |
| 1485 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1486 | |
| 1487 | return sprintf(buf, "0x%04x\n", |
| 1488 | be16_to_cpu(dcr->subsystem_revision_id)); |
| 1489 | } |
| 1490 | static DEVICE_ATTR_RO(subsystem_rev_id); |
| 1491 | |
| 1492 | static ssize_t subsystem_device_show(struct device *dev, |
| 1493 | struct device_attribute *attr, char *buf) |
| 1494 | { |
| 1495 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1496 | |
| 1497 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); |
| 1498 | } |
| 1499 | static DEVICE_ATTR_RO(subsystem_device); |
| 1500 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1501 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
| 1502 | { |
| 1503 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1504 | int formats = 0; |
| 1505 | |
| 1506 | if (nfit_mem->memdev_pmem) |
| 1507 | formats++; |
| 1508 | if (nfit_mem->memdev_bdw) |
| 1509 | formats++; |
| 1510 | return formats; |
| 1511 | } |
| 1512 | |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1513 | static ssize_t format_show(struct device *dev, |
| 1514 | struct device_attribute *attr, char *buf) |
| 1515 | { |
| 1516 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1517 | |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1518 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1519 | } |
| 1520 | static DEVICE_ATTR_RO(format); |
| 1521 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1522 | static ssize_t format1_show(struct device *dev, |
| 1523 | struct device_attribute *attr, char *buf) |
| 1524 | { |
| 1525 | u32 handle; |
| 1526 | ssize_t rc = -ENXIO; |
| 1527 | struct nfit_mem *nfit_mem; |
| 1528 | struct nfit_memdev *nfit_memdev; |
| 1529 | struct acpi_nfit_desc *acpi_desc; |
| 1530 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1531 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1532 | |
| 1533 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1534 | acpi_desc = nfit_mem->acpi_desc; |
| 1535 | handle = to_nfit_memdev(dev)->device_handle; |
| 1536 | |
| 1537 | /* assumes DIMMs have at most 2 published interface codes */ |
| 1538 | mutex_lock(&acpi_desc->init_mutex); |
| 1539 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1540 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 1541 | struct nfit_dcr *nfit_dcr; |
| 1542 | |
| 1543 | if (memdev->device_handle != handle) |
| 1544 | continue; |
| 1545 | |
| 1546 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 1547 | if (nfit_dcr->dcr->region_index != memdev->region_index) |
| 1548 | continue; |
| 1549 | if (nfit_dcr->dcr->code == dcr->code) |
| 1550 | continue; |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1551 | rc = sprintf(buf, "0x%04x\n", |
| 1552 | le16_to_cpu(nfit_dcr->dcr->code)); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1553 | break; |
| 1554 | } |
| 1555 | if (rc != ENXIO) |
| 1556 | break; |
| 1557 | } |
| 1558 | mutex_unlock(&acpi_desc->init_mutex); |
| 1559 | return rc; |
| 1560 | } |
| 1561 | static DEVICE_ATTR_RO(format1); |
| 1562 | |
| 1563 | static ssize_t formats_show(struct device *dev, |
| 1564 | struct device_attribute *attr, char *buf) |
| 1565 | { |
| 1566 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1567 | |
| 1568 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); |
| 1569 | } |
| 1570 | static DEVICE_ATTR_RO(formats); |
| 1571 | |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1572 | static ssize_t serial_show(struct device *dev, |
| 1573 | struct device_attribute *attr, char *buf) |
| 1574 | { |
| 1575 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1576 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1577 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1578 | } |
| 1579 | static DEVICE_ATTR_RO(serial); |
| 1580 | |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1581 | static ssize_t family_show(struct device *dev, |
| 1582 | struct device_attribute *attr, char *buf) |
| 1583 | { |
| 1584 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1585 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1586 | |
| 1587 | if (nfit_mem->family < 0) |
| 1588 | return -ENXIO; |
| 1589 | return sprintf(buf, "%d\n", nfit_mem->family); |
| 1590 | } |
| 1591 | static DEVICE_ATTR_RO(family); |
| 1592 | |
| 1593 | static ssize_t dsm_mask_show(struct device *dev, |
| 1594 | struct device_attribute *attr, char *buf) |
| 1595 | { |
| 1596 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1597 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1598 | |
| 1599 | if (nfit_mem->family < 0) |
| 1600 | return -ENXIO; |
| 1601 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); |
| 1602 | } |
| 1603 | static DEVICE_ATTR_RO(dsm_mask); |
| 1604 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1605 | static ssize_t flags_show(struct device *dev, |
| 1606 | struct device_attribute *attr, char *buf) |
| 1607 | { |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1608 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1609 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1610 | u16 flags = __to_nfit_memdev(nfit_mem)->flags; |
| 1611 | |
| 1612 | if (test_bit(NFIT_MEM_DIRTY, &nfit_mem->flags)) |
| 1613 | flags |= ACPI_NFIT_MEM_FLUSH_FAILED; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1614 | |
Dan Williams | ffab938 | 2017-04-13 15:05:30 -0700 | [diff] [blame] | 1615 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1616 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 1617 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 1618 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1619 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
Dan Williams | ffab938 | 2017-04-13 15:05:30 -0700 | [diff] [blame] | 1620 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
| 1621 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", |
| 1622 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1623 | } |
| 1624 | static DEVICE_ATTR_RO(flags); |
| 1625 | |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1626 | static ssize_t id_show(struct device *dev, |
| 1627 | struct device_attribute *attr, char *buf) |
| 1628 | { |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 1629 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1630 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1631 | |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 1632 | return sprintf(buf, "%s\n", nfit_mem->id); |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1633 | } |
| 1634 | static DEVICE_ATTR_RO(id); |
| 1635 | |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1636 | static ssize_t dirty_shutdown_show(struct device *dev, |
| 1637 | struct device_attribute *attr, char *buf) |
| 1638 | { |
| 1639 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1640 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1641 | |
| 1642 | return sprintf(buf, "%d\n", nfit_mem->dirty_shutdown); |
| 1643 | } |
| 1644 | static DEVICE_ATTR_RO(dirty_shutdown); |
| 1645 | |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1646 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 1647 | &dev_attr_handle.attr, |
| 1648 | &dev_attr_phys_id.attr, |
| 1649 | &dev_attr_vendor.attr, |
| 1650 | &dev_attr_device.attr, |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1651 | &dev_attr_rev_id.attr, |
| 1652 | &dev_attr_subsystem_vendor.attr, |
| 1653 | &dev_attr_subsystem_device.attr, |
| 1654 | &dev_attr_subsystem_rev_id.attr, |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1655 | &dev_attr_format.attr, |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1656 | &dev_attr_formats.attr, |
| 1657 | &dev_attr_format1.attr, |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1658 | &dev_attr_serial.attr, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1659 | &dev_attr_flags.attr, |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1660 | &dev_attr_id.attr, |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1661 | &dev_attr_family.attr, |
| 1662 | &dev_attr_dsm_mask.attr, |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1663 | &dev_attr_dirty_shutdown.attr, |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1664 | NULL, |
| 1665 | }; |
| 1666 | |
| 1667 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 1668 | struct attribute *a, int n) |
| 1669 | { |
| 1670 | struct device *dev = container_of(kobj, struct device, kobj); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1671 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1672 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1673 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1674 | if (!to_nfit_dcr(dev)) { |
| 1675 | /* Without a dcr only the memdev attributes can be surfaced */ |
| 1676 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr |
| 1677 | || a == &dev_attr_flags.attr |
| 1678 | || a == &dev_attr_family.attr |
| 1679 | || a == &dev_attr_dsm_mask.attr) |
| 1680 | return a->mode; |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1681 | return 0; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1682 | } |
| 1683 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1684 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
| 1685 | return 0; |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1686 | |
| 1687 | if (!test_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags) |
| 1688 | && a == &dev_attr_dirty_shutdown.attr) |
| 1689 | return 0; |
| 1690 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1691 | return a->mode; |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1692 | } |
| 1693 | |
Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1694 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1695 | .name = "nfit", |
| 1696 | .attrs = acpi_nfit_dimm_attributes, |
| 1697 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 1698 | }; |
| 1699 | |
| 1700 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
| 1701 | &acpi_nfit_dimm_attribute_group, |
| 1702 | NULL, |
| 1703 | }; |
| 1704 | |
| 1705 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 1706 | u32 device_handle) |
| 1707 | { |
| 1708 | struct nfit_mem *nfit_mem; |
| 1709 | |
| 1710 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 1711 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 1712 | return nfit_mem->nvdimm; |
| 1713 | |
| 1714 | return NULL; |
| 1715 | } |
| 1716 | |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1717 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1718 | { |
| 1719 | struct nfit_mem *nfit_mem; |
| 1720 | struct acpi_nfit_desc *acpi_desc; |
| 1721 | |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 1722 | dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev), |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1723 | event); |
| 1724 | |
| 1725 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { |
| 1726 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), |
| 1727 | event); |
| 1728 | return; |
| 1729 | } |
| 1730 | |
| 1731 | acpi_desc = dev_get_drvdata(dev->parent); |
| 1732 | if (!acpi_desc) |
| 1733 | return; |
| 1734 | |
| 1735 | /* |
| 1736 | * If we successfully retrieved acpi_desc, then we know nfit_mem data |
| 1737 | * is still valid. |
| 1738 | */ |
| 1739 | nfit_mem = dev_get_drvdata(dev); |
| 1740 | if (nfit_mem && nfit_mem->flags_attr) |
| 1741 | sysfs_notify_dirent(nfit_mem->flags_attr); |
| 1742 | } |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1743 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1744 | |
| 1745 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) |
| 1746 | { |
| 1747 | struct acpi_device *adev = data; |
| 1748 | struct device *dev = &adev->dev; |
| 1749 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1750 | nfit_device_lock(dev->parent); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1751 | __acpi_nvdimm_notify(dev, event); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 1752 | nfit_device_unlock(dev->parent); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1753 | } |
| 1754 | |
Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1755 | static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) |
| 1756 | { |
| 1757 | acpi_handle handle; |
| 1758 | acpi_status status; |
| 1759 | |
| 1760 | status = acpi_get_handle(adev->handle, method, &handle); |
| 1761 | |
| 1762 | if (ACPI_SUCCESS(status)) |
| 1763 | return true; |
| 1764 | return false; |
| 1765 | } |
| 1766 | |
Dan Williams | f110176 | 2018-10-17 10:47:19 -0700 | [diff] [blame] | 1767 | __weak void nfit_intel_shutdown_status(struct nfit_mem *nfit_mem) |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1768 | { |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1769 | struct device *dev = &nfit_mem->adev->dev; |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1770 | struct nd_intel_smart smart = { 0 }; |
| 1771 | union acpi_object in_buf = { |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1772 | .buffer.type = ACPI_TYPE_BUFFER, |
| 1773 | .buffer.length = 0, |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1774 | }; |
| 1775 | union acpi_object in_obj = { |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1776 | .package.type = ACPI_TYPE_PACKAGE, |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1777 | .package.count = 1, |
| 1778 | .package.elements = &in_buf, |
| 1779 | }; |
| 1780 | const u8 func = ND_INTEL_SMART; |
| 1781 | const guid_t *guid = to_nfit_uuid(nfit_mem->family); |
| 1782 | u8 revid = nfit_dsm_revid(nfit_mem->family, func); |
| 1783 | struct acpi_device *adev = nfit_mem->adev; |
| 1784 | acpi_handle handle = adev->handle; |
| 1785 | union acpi_object *out_obj; |
| 1786 | |
| 1787 | if ((nfit_mem->dsm_mask & (1 << func)) == 0) |
| 1788 | return; |
| 1789 | |
| 1790 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1791 | if (!out_obj || out_obj->type != ACPI_TYPE_BUFFER |
| 1792 | || out_obj->buffer.length < sizeof(smart)) { |
| 1793 | dev_dbg(dev->parent, "%s: failed to retrieve initial health\n", |
| 1794 | dev_name(dev)); |
| 1795 | ACPI_FREE(out_obj); |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1796 | return; |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1797 | } |
| 1798 | memcpy(&smart, out_obj->buffer.pointer, sizeof(smart)); |
| 1799 | ACPI_FREE(out_obj); |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1800 | |
| 1801 | if (smart.flags & ND_INTEL_SMART_SHUTDOWN_VALID) { |
| 1802 | if (smart.shutdown_state) |
| 1803 | set_bit(NFIT_MEM_DIRTY, &nfit_mem->flags); |
| 1804 | } |
| 1805 | |
| 1806 | if (smart.flags & ND_INTEL_SMART_SHUTDOWN_COUNT_VALID) { |
| 1807 | set_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags); |
| 1808 | nfit_mem->dirty_shutdown = smart.shutdown_count; |
| 1809 | } |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1810 | } |
| 1811 | |
| 1812 | static void populate_shutdown_status(struct nfit_mem *nfit_mem) |
| 1813 | { |
| 1814 | /* |
| 1815 | * For DIMMs that provide a dynamic facility to retrieve a |
| 1816 | * dirty-shutdown status and/or a dirty-shutdown count, cache |
| 1817 | * these values in nfit_mem. |
| 1818 | */ |
| 1819 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) |
| 1820 | nfit_intel_shutdown_status(nfit_mem); |
| 1821 | } |
| 1822 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1823 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 1824 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 1825 | { |
| 1826 | struct acpi_device *adev, *adev_dimm; |
| 1827 | struct device *dev = acpi_desc->dev; |
Dan Williams | 099b07a | 2018-06-13 09:06:52 -0700 | [diff] [blame] | 1828 | unsigned long dsm_mask, label_mask; |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1829 | const guid_t *guid; |
Linda Knippers | 60e95f43 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1830 | int i; |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1831 | int family = -1; |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 1832 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1833 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1834 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
| 1835 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1836 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 1837 | |
| 1838 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) |
| 1839 | sprintf(nfit_mem->id, "%04x-%02x-%04x-%08x", |
| 1840 | be16_to_cpu(dcr->vendor_id), |
| 1841 | dcr->manufacturing_location, |
| 1842 | be16_to_cpu(dcr->manufacturing_date), |
| 1843 | be32_to_cpu(dcr->serial_number)); |
| 1844 | else |
| 1845 | sprintf(nfit_mem->id, "%04x-%08x", |
| 1846 | be16_to_cpu(dcr->vendor_id), |
| 1847 | be32_to_cpu(dcr->serial_number)); |
| 1848 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1849 | adev = to_acpi_dev(acpi_desc); |
Dan Williams | f110176 | 2018-10-17 10:47:19 -0700 | [diff] [blame] | 1850 | if (!adev) { |
| 1851 | /* unit test case */ |
| 1852 | populate_shutdown_status(nfit_mem); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1853 | return 0; |
Dan Williams | f110176 | 2018-10-17 10:47:19 -0700 | [diff] [blame] | 1854 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1855 | |
| 1856 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 1857 | nfit_mem->adev = adev_dimm; |
| 1858 | if (!adev_dimm) { |
| 1859 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 1860 | device_handle); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1861 | return force_enable_dimms ? 0 : -ENODEV; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1862 | } |
| 1863 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1864 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
| 1865 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { |
| 1866 | dev_err(dev, "%s: notification registration failed\n", |
| 1867 | dev_name(&adev_dimm->dev)); |
| 1868 | return -ENXIO; |
| 1869 | } |
Dan Williams | adf6895 | 2017-11-30 19:42:52 -0800 | [diff] [blame] | 1870 | /* |
| 1871 | * Record nfit_mem for the notification path to track back to |
| 1872 | * the nfit sysfs attributes for this dimm device object. |
| 1873 | */ |
| 1874 | dev_set_drvdata(&adev_dimm->dev, nfit_mem); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1875 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1876 | /* |
Dexuan Cui | 1194c413 | 2019-01-29 00:56:17 +0000 | [diff] [blame] | 1877 | * There are 4 "legacy" NVDIMM command sets |
| 1878 | * (NVDIMM_FAMILY_{INTEL,MSFT,HPE1,HPE2}) that were created before |
| 1879 | * an EFI working group was established to constrain this |
| 1880 | * proliferation. The nfit driver probes for the supported command |
| 1881 | * set by GUID. Note, if you're a platform developer looking to add |
| 1882 | * a new command set to this probe, consider using an existing set, |
| 1883 | * or otherwise seek approval to publish the command set at |
| 1884 | * http://www.uefi.org/RFIC_LIST. |
| 1885 | * |
| 1886 | * Note, that checking for function0 (bit0) tells us if any commands |
| 1887 | * are reachable through this GUID. |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1888 | */ |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 1889 | for (i = 0; i <= NVDIMM_FAMILY_MAX; i++) |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1890 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1891 | if (family < 0 || i == default_dsm_family) |
| 1892 | family = i; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1893 | |
| 1894 | /* limit the supported commands to those that are publicly documented */ |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1895 | nfit_mem->family = family; |
Linda Knippers | 095ab4b | 2017-03-07 16:35:12 -0500 | [diff] [blame] | 1896 | if (override_dsm_mask && !disable_vendor_specific) |
| 1897 | dsm_mask = override_dsm_mask; |
| 1898 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 1899 | dsm_mask = NVDIMM_INTEL_CMDMASK; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1900 | if (disable_vendor_specific) |
| 1901 | dsm_mask &= ~(1 << ND_CMD_VENDOR); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1902 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1903 | dsm_mask = 0x1c3c76; |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1904 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1905 | dsm_mask = 0x1fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1906 | if (disable_vendor_specific) |
| 1907 | dsm_mask &= ~(1 << 8); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1908 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
| 1909 | dsm_mask = 0xffffffff; |
Dexuan Cui | 1194c413 | 2019-01-29 00:56:17 +0000 | [diff] [blame] | 1910 | } else if (nfit_mem->family == NVDIMM_FAMILY_HYPERV) { |
| 1911 | dsm_mask = 0x1f; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1912 | } else { |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1913 | dev_dbg(dev, "unknown dimm command family\n"); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1914 | nfit_mem->family = -1; |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1915 | /* DSMs are optional, continue loading the driver... */ |
| 1916 | return 0; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1917 | } |
| 1918 | |
Dan Williams | 5e9e38d | 2019-01-14 14:07:19 -0800 | [diff] [blame] | 1919 | /* |
| 1920 | * Function 0 is the command interrogation function, don't |
| 1921 | * export it to potential userspace use, and enable it to be |
| 1922 | * used as an error value in acpi_nfit_ctl(). |
| 1923 | */ |
| 1924 | dsm_mask &= ~1UL; |
| 1925 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1926 | guid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1927 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 1928 | if (acpi_check_dsm(adev_dimm->handle, guid, |
| 1929 | nfit_dsm_revid(nfit_mem->family, i), |
| 1930 | 1ULL << i)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1931 | set_bit(i, &nfit_mem->dsm_mask); |
| 1932 | |
Dan Williams | 099b07a | 2018-06-13 09:06:52 -0700 | [diff] [blame] | 1933 | /* |
| 1934 | * Prefer the NVDIMM_FAMILY_INTEL label read commands if present |
| 1935 | * due to their better semantics handling locked capacity. |
| 1936 | */ |
| 1937 | label_mask = 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA |
| 1938 | | 1 << ND_CMD_SET_CONFIG_DATA; |
| 1939 | if (family == NVDIMM_FAMILY_INTEL |
| 1940 | && (dsm_mask & label_mask) == label_mask) |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1941 | /* skip _LS{I,R,W} enabling */; |
| 1942 | else { |
| 1943 | if (acpi_nvdimm_has_method(adev_dimm, "_LSI") |
| 1944 | && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { |
| 1945 | dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); |
| 1946 | set_bit(NFIT_MEM_LSR, &nfit_mem->flags); |
| 1947 | } |
Dan Williams | 099b07a | 2018-06-13 09:06:52 -0700 | [diff] [blame] | 1948 | |
Dan Williams | f596c88 | 2019-01-29 22:06:41 -0800 | [diff] [blame] | 1949 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) |
| 1950 | && acpi_nvdimm_has_method(adev_dimm, "_LSW")) { |
| 1951 | dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); |
| 1952 | set_bit(NFIT_MEM_LSW, &nfit_mem->flags); |
| 1953 | } |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1954 | |
Dan Williams | 0171b6b | 2019-02-03 11:17:27 -0800 | [diff] [blame] | 1955 | /* |
| 1956 | * Quirk read-only label configurations to preserve |
| 1957 | * access to label-less namespaces by default. |
| 1958 | */ |
| 1959 | if (!test_bit(NFIT_MEM_LSW, &nfit_mem->flags) |
| 1960 | && !force_labels) { |
| 1961 | dev_dbg(dev, "%s: No _LSW, disable labels\n", |
| 1962 | dev_name(&adev_dimm->dev)); |
| 1963 | clear_bit(NFIT_MEM_LSR, &nfit_mem->flags); |
| 1964 | } else |
| 1965 | dev_dbg(dev, "%s: Force enable labels\n", |
| 1966 | dev_name(&adev_dimm->dev)); |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1967 | } |
| 1968 | |
Dan Williams | 0ead111 | 2018-09-26 10:47:15 -0700 | [diff] [blame] | 1969 | populate_shutdown_status(nfit_mem); |
| 1970 | |
Linda Knippers | 60e95f43 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1971 | return 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1972 | } |
| 1973 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1974 | static void shutdown_dimm_notify(void *data) |
| 1975 | { |
| 1976 | struct acpi_nfit_desc *acpi_desc = data; |
| 1977 | struct nfit_mem *nfit_mem; |
| 1978 | |
| 1979 | mutex_lock(&acpi_desc->init_mutex); |
| 1980 | /* |
| 1981 | * Clear out the nfit_mem->flags_attr and shut down dimm event |
| 1982 | * notifications. |
| 1983 | */ |
| 1984 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1985 | struct acpi_device *adev_dimm = nfit_mem->adev; |
| 1986 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1987 | if (nfit_mem->flags_attr) { |
| 1988 | sysfs_put(nfit_mem->flags_attr); |
| 1989 | nfit_mem->flags_attr = NULL; |
| 1990 | } |
Dan Williams | adf6895 | 2017-11-30 19:42:52 -0800 | [diff] [blame] | 1991 | if (adev_dimm) { |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1992 | acpi_remove_notify_handler(adev_dimm->handle, |
| 1993 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); |
Dan Williams | adf6895 | 2017-11-30 19:42:52 -0800 | [diff] [blame] | 1994 | dev_set_drvdata(&adev_dimm->dev, NULL); |
| 1995 | } |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1996 | } |
| 1997 | mutex_unlock(&acpi_desc->init_mutex); |
| 1998 | } |
| 1999 | |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 2000 | static const struct nvdimm_security_ops *acpi_nfit_get_security_ops(int family) |
| 2001 | { |
| 2002 | switch (family) { |
| 2003 | case NVDIMM_FAMILY_INTEL: |
| 2004 | return intel_security_ops; |
| 2005 | default: |
| 2006 | return NULL; |
| 2007 | } |
| 2008 | } |
| 2009 | |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2010 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 2011 | { |
| 2012 | struct nfit_mem *nfit_mem; |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 2013 | int dimm_count = 0, rc; |
| 2014 | struct nvdimm *nvdimm; |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2015 | |
| 2016 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 2017 | struct acpi_nfit_flush_address *flush; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2018 | unsigned long flags = 0, cmd_mask; |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 2019 | struct nfit_memdev *nfit_memdev; |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2020 | u32 device_handle; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 2021 | u16 mem_flags; |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2022 | |
| 2023 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 2024 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 2025 | if (nvdimm) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2026 | dimm_count++; |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2027 | continue; |
| 2028 | } |
| 2029 | |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 2030 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) { |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 2031 | set_bit(NDD_ALIASING, &flags); |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 2032 | set_bit(NDD_LABELING, &flags); |
| 2033 | } |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2034 | |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 2035 | /* collate flags across all memdevs for this dimm */ |
| 2036 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 2037 | struct acpi_nfit_memory_map *dimm_memdev; |
| 2038 | |
| 2039 | dimm_memdev = __to_nfit_memdev(nfit_mem); |
| 2040 | if (dimm_memdev->device_handle |
| 2041 | != nfit_memdev->memdev->device_handle) |
| 2042 | continue; |
| 2043 | dimm_memdev->flags |= nfit_memdev->memdev->flags; |
| 2044 | } |
| 2045 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 2046 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 2047 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 2048 | set_bit(NDD_UNARMED, &flags); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 2049 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2050 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 2051 | if (rc) |
| 2052 | continue; |
| 2053 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 2054 | /* |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2055 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
| 2056 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the |
| 2057 | * userspace interface. |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 2058 | */ |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2059 | cmd_mask = 1UL << ND_CMD_CALL; |
Dan Williams | b9b1504 | 2017-10-29 12:13:07 -0700 | [diff] [blame] | 2060 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
| 2061 | /* |
| 2062 | * These commands have a 1:1 correspondence |
| 2063 | * between DSM payload and libnvdimm ioctl |
| 2064 | * payload format. |
| 2065 | */ |
| 2066 | cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK; |
| 2067 | } |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2068 | |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 2069 | /* Quirk to ignore LOCAL for labels on HYPERV DIMMs */ |
| 2070 | if (nfit_mem->family == NVDIMM_FAMILY_HYPERV) |
| 2071 | set_bit(NDD_NOBLK, &flags); |
| 2072 | |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 2073 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) { |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 2074 | set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 2075 | set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); |
Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 2076 | } |
Dan Williams | 6f07f86 | 2018-09-26 10:48:38 -0700 | [diff] [blame] | 2077 | if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 2078 | set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); |
| 2079 | |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 2080 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
| 2081 | : NULL; |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 2082 | nvdimm = __nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2083 | acpi_nfit_dimm_attribute_groups, |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 2084 | flags, cmd_mask, flush ? flush->hint_count : 0, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 2085 | nfit_mem->flush_wpq, &nfit_mem->id[0], |
| 2086 | acpi_nfit_get_security_ops(nfit_mem->family)); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2087 | if (!nvdimm) |
| 2088 | return -ENOMEM; |
| 2089 | |
| 2090 | nfit_mem->nvdimm = nvdimm; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 2091 | dimm_count++; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 2092 | |
| 2093 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 2094 | continue; |
| 2095 | |
Toshi Kani | 5c9d62d | 2019-02-28 13:12:18 -0700 | [diff] [blame] | 2096 | dev_err(acpi_desc->dev, "Error found in NVDIMM %s flags:%s%s%s%s%s\n", |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 2097 | nvdimm_name(nvdimm), |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 2098 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 2099 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 2100 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 2101 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
| 2102 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 2103 | |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2104 | } |
| 2105 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 2106 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
| 2107 | if (rc) |
| 2108 | return rc; |
| 2109 | |
| 2110 | /* |
| 2111 | * Now that dimms are successfully registered, and async registration |
| 2112 | * is flushed, attempt to enable event notification. |
| 2113 | */ |
| 2114 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| 2115 | struct kernfs_node *nfit_kernfs; |
| 2116 | |
| 2117 | nvdimm = nfit_mem->nvdimm; |
Toshi Kani | 23fbd7c | 2018-02-02 14:00:36 -0700 | [diff] [blame] | 2118 | if (!nvdimm) |
| 2119 | continue; |
| 2120 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 2121 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
| 2122 | if (nfit_kernfs) |
| 2123 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, |
| 2124 | "flags"); |
| 2125 | sysfs_put(nfit_kernfs); |
| 2126 | if (!nfit_mem->flags_attr) |
| 2127 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", |
| 2128 | nvdimm_name(nvdimm)); |
| 2129 | } |
| 2130 | |
| 2131 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, |
| 2132 | acpi_desc); |
Dan Williams | e6dfb2de | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2133 | } |
| 2134 | |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 2135 | /* |
| 2136 | * These constants are private because there are no kernel consumers of |
| 2137 | * these commands. |
| 2138 | */ |
| 2139 | enum nfit_aux_cmds { |
| 2140 | NFIT_CMD_TRANSLATE_SPA = 5, |
| 2141 | NFIT_CMD_ARS_INJECT_SET = 7, |
| 2142 | NFIT_CMD_ARS_INJECT_CLEAR = 8, |
| 2143 | NFIT_CMD_ARS_INJECT_GET = 9, |
| 2144 | }; |
| 2145 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2146 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 2147 | { |
| 2148 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 2149 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2150 | struct acpi_device *adev; |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 2151 | unsigned long dsm_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2152 | int i; |
| 2153 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 2154 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
Yasunori Goto | b37b3fd | 2017-09-22 16:47:40 +0900 | [diff] [blame] | 2155 | nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2156 | adev = to_acpi_dev(acpi_desc); |
| 2157 | if (!adev) |
| 2158 | return; |
| 2159 | |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 2160 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
Andy Shevchenko | 94116f8 | 2017-06-05 19:40:46 +0300 | [diff] [blame] | 2161 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 2162 | set_bit(i, &nd_desc->cmd_mask); |
Jerry Hoemann | 37d7484 | 2017-06-30 20:41:24 -0700 | [diff] [blame] | 2163 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 2164 | |
| 2165 | dsm_mask = |
| 2166 | (1 << ND_CMD_ARS_CAP) | |
| 2167 | (1 << ND_CMD_ARS_START) | |
| 2168 | (1 << ND_CMD_ARS_STATUS) | |
| 2169 | (1 << ND_CMD_CLEAR_ERROR) | |
| 2170 | (1 << NFIT_CMD_TRANSLATE_SPA) | |
| 2171 | (1 << NFIT_CMD_ARS_INJECT_SET) | |
| 2172 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | |
| 2173 | (1 << NFIT_CMD_ARS_INJECT_GET); |
| 2174 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
| 2175 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
| 2176 | set_bit(i, &nd_desc->bus_dsm_mask); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 2177 | } |
| 2178 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2179 | static ssize_t range_index_show(struct device *dev, |
| 2180 | struct device_attribute *attr, char *buf) |
| 2181 | { |
| 2182 | struct nd_region *nd_region = to_nd_region(dev); |
| 2183 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 2184 | |
| 2185 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 2186 | } |
| 2187 | static DEVICE_ATTR_RO(range_index); |
| 2188 | |
| 2189 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 2190 | &dev_attr_range_index.attr, |
| 2191 | NULL, |
| 2192 | }; |
| 2193 | |
Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 2194 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2195 | .name = "nfit", |
| 2196 | .attrs = acpi_nfit_region_attributes, |
| 2197 | }; |
| 2198 | |
| 2199 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2200 | &acpi_nfit_region_attribute_group, |
| 2201 | NULL, |
| 2202 | }; |
| 2203 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2204 | /* enough info to uniquely specify an interleave set */ |
| 2205 | struct nfit_set_info { |
| 2206 | struct nfit_set_info_map { |
| 2207 | u64 region_offset; |
| 2208 | u32 serial_number; |
| 2209 | u32 pad; |
| 2210 | } mapping[0]; |
| 2211 | }; |
| 2212 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2213 | struct nfit_set_info2 { |
| 2214 | struct nfit_set_info_map2 { |
| 2215 | u64 region_offset; |
| 2216 | u32 serial_number; |
| 2217 | u16 vendor_id; |
| 2218 | u16 manufacturing_date; |
| 2219 | u8 manufacturing_location; |
| 2220 | u8 reserved[31]; |
| 2221 | } mapping[0]; |
| 2222 | }; |
| 2223 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2224 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 2225 | { |
| 2226 | return sizeof(struct nfit_set_info) |
| 2227 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 2228 | } |
| 2229 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2230 | static size_t sizeof_nfit_set_info2(int num_mappings) |
| 2231 | { |
| 2232 | return sizeof(struct nfit_set_info2) |
| 2233 | + num_mappings * sizeof(struct nfit_set_info_map2); |
| 2234 | } |
| 2235 | |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2236 | static int cmp_map_compat(const void *m0, const void *m1) |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2237 | { |
| 2238 | const struct nfit_set_info_map *map0 = m0; |
| 2239 | const struct nfit_set_info_map *map1 = m1; |
| 2240 | |
| 2241 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 2242 | sizeof(u64)); |
| 2243 | } |
| 2244 | |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2245 | static int cmp_map(const void *m0, const void *m1) |
| 2246 | { |
| 2247 | const struct nfit_set_info_map *map0 = m0; |
| 2248 | const struct nfit_set_info_map *map1 = m1; |
| 2249 | |
Dan Williams | b03b99a | 2017-03-27 21:53:38 -0700 | [diff] [blame] | 2250 | if (map0->region_offset < map1->region_offset) |
| 2251 | return -1; |
| 2252 | else if (map0->region_offset > map1->region_offset) |
| 2253 | return 1; |
| 2254 | return 0; |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2255 | } |
| 2256 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2257 | static int cmp_map2(const void *m0, const void *m1) |
| 2258 | { |
| 2259 | const struct nfit_set_info_map2 *map0 = m0; |
| 2260 | const struct nfit_set_info_map2 *map1 = m1; |
| 2261 | |
| 2262 | if (map0->region_offset < map1->region_offset) |
| 2263 | return -1; |
| 2264 | else if (map0->region_offset > map1->region_offset) |
| 2265 | return 1; |
| 2266 | return 0; |
| 2267 | } |
| 2268 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2269 | /* Retrieve the nth entry referencing this spa */ |
| 2270 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 2271 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 2272 | { |
| 2273 | struct nfit_memdev *nfit_memdev; |
| 2274 | |
| 2275 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 2276 | if (nfit_memdev->memdev->range_index == range_index) |
| 2277 | if (n-- == 0) |
| 2278 | return nfit_memdev->memdev; |
| 2279 | return NULL; |
| 2280 | } |
| 2281 | |
| 2282 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 2283 | struct nd_region_desc *ndr_desc, |
| 2284 | struct acpi_nfit_system_address *spa) |
| 2285 | { |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2286 | struct device *dev = acpi_desc->dev; |
| 2287 | struct nd_interleave_set *nd_set; |
| 2288 | u16 nr = ndr_desc->num_mappings; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2289 | struct nfit_set_info2 *info2; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2290 | struct nfit_set_info *info; |
Dan Williams | 8f2bc24 | 2017-06-06 11:39:30 -0700 | [diff] [blame] | 2291 | int i; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2292 | |
Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2293 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 2294 | if (!nd_set) |
| 2295 | return -ENOMEM; |
Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2296 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); |
| 2297 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2298 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 2299 | if (!info) |
| 2300 | return -ENOMEM; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2301 | |
| 2302 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); |
| 2303 | if (!info2) |
| 2304 | return -ENOMEM; |
| 2305 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2306 | for (i = 0; i < nr; i++) { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2307 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2308 | struct nfit_set_info_map *map = &info->mapping[i]; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2309 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2310 | struct nvdimm *nvdimm = mapping->nvdimm; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2311 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 2312 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 2313 | spa->range_index, i); |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2314 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2315 | |
| 2316 | if (!memdev || !nfit_mem->dcr) { |
| 2317 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 2318 | return -ENODEV; |
| 2319 | } |
| 2320 | |
| 2321 | map->region_offset = memdev->region_offset; |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2322 | map->serial_number = dcr->serial_number; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2323 | |
| 2324 | map2->region_offset = memdev->region_offset; |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2325 | map2->serial_number = dcr->serial_number; |
| 2326 | map2->vendor_id = dcr->vendor_id; |
| 2327 | map2->manufacturing_date = dcr->manufacturing_date; |
| 2328 | map2->manufacturing_location = dcr->manufacturing_location; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2329 | } |
| 2330 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2331 | /* v1.1 namespaces */ |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2332 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 2333 | cmp_map, NULL); |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2334 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2335 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2336 | /* v1.2 namespaces */ |
| 2337 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), |
| 2338 | cmp_map2, NULL); |
| 2339 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); |
| 2340 | |
| 2341 | /* support v1.1 namespaces created with the wrong sort order */ |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2342 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 2343 | cmp_map_compat, NULL); |
| 2344 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 2345 | |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2346 | /* record the result of the sort for the mapping position */ |
| 2347 | for (i = 0; i < nr; i++) { |
| 2348 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
| 2349 | int j; |
| 2350 | |
| 2351 | for (j = 0; j < nr; j++) { |
| 2352 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; |
| 2353 | struct nvdimm *nvdimm = mapping->nvdimm; |
| 2354 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2355 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2356 | |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2357 | if (map2->serial_number == dcr->serial_number && |
| 2358 | map2->vendor_id == dcr->vendor_id && |
| 2359 | map2->manufacturing_date == dcr->manufacturing_date && |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2360 | map2->manufacturing_location |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2361 | == dcr->manufacturing_location) { |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2362 | mapping->position = i; |
| 2363 | break; |
| 2364 | } |
| 2365 | } |
| 2366 | } |
| 2367 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2368 | ndr_desc->nd_set = nd_set; |
| 2369 | devm_kfree(dev, info); |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2370 | devm_kfree(dev, info2); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2371 | |
| 2372 | return 0; |
| 2373 | } |
| 2374 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2375 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 2376 | { |
| 2377 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 2378 | u32 sub_line_offset, line_index, line_offset; |
| 2379 | u64 line_no, table_skip_count, table_offset; |
| 2380 | |
| 2381 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 2382 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 2383 | line_offset = idt->line_offset[line_index] |
| 2384 | * mmio->line_size; |
| 2385 | table_offset = table_skip_count * mmio->table_size; |
| 2386 | |
| 2387 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 2388 | } |
| 2389 | |
Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 2390 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2391 | { |
| 2392 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 2393 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 2394 | const u32 STATUS_MASK = 0x80000037; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2395 | |
| 2396 | if (mmio->num_lines) |
| 2397 | offset = to_interleave_offset(offset, mmio); |
| 2398 | |
Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 2399 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2400 | } |
| 2401 | |
| 2402 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 2403 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 2404 | { |
| 2405 | u64 cmd, offset; |
| 2406 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 2407 | |
| 2408 | enum { |
| 2409 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 2410 | BCW_LEN_SHIFT = 48, |
| 2411 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 2412 | BCW_CMD_SHIFT = 56, |
| 2413 | }; |
| 2414 | |
| 2415 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 2416 | len = len >> L1_CACHE_SHIFT; |
| 2417 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 2418 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 2419 | |
| 2420 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 2421 | if (mmio->num_lines) |
| 2422 | offset = to_interleave_offset(offset, mmio); |
| 2423 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2424 | writeq(cmd, mmio->addr.base + offset); |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 2425 | nvdimm_flush(nfit_blk->nd_region, NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2426 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2427 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2428 | readq(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2429 | } |
| 2430 | |
| 2431 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 2432 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 2433 | unsigned int lane) |
| 2434 | { |
| 2435 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 2436 | unsigned int copied = 0; |
| 2437 | u64 base_offset; |
| 2438 | int rc; |
| 2439 | |
| 2440 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 2441 | + lane * mmio->size; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2442 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 2443 | while (len) { |
| 2444 | unsigned int c; |
| 2445 | u64 offset; |
| 2446 | |
| 2447 | if (mmio->num_lines) { |
| 2448 | u32 line_offset; |
| 2449 | |
| 2450 | offset = to_interleave_offset(base_offset + copied, |
| 2451 | mmio); |
| 2452 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 2453 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 2454 | } else { |
| 2455 | offset = base_offset + nfit_blk->bdw_offset; |
| 2456 | c = len; |
| 2457 | } |
| 2458 | |
| 2459 | if (rw) |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 2460 | memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2461 | else { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2462 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
Robin Murphy | 5deb67f | 2017-08-31 12:27:09 +0100 | [diff] [blame] | 2463 | arch_invalidate_pmem((void __force *) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2464 | mmio->addr.aperture + offset, c); |
| 2465 | |
Dan Williams | 6abccd1 | 2017-01-13 14:14:23 -0800 | [diff] [blame] | 2466 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2467 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2468 | |
| 2469 | copied += c; |
| 2470 | len -= c; |
| 2471 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2472 | |
| 2473 | if (rw) |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 2474 | nvdimm_flush(nfit_blk->nd_region, NULL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2475 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2476 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 2477 | return rc; |
| 2478 | } |
| 2479 | |
| 2480 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 2481 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 2482 | { |
| 2483 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 2484 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 2485 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 2486 | unsigned int lane, copied = 0; |
| 2487 | int rc = 0; |
| 2488 | |
| 2489 | lane = nd_region_acquire_lane(nd_region); |
| 2490 | while (len) { |
| 2491 | u64 c = min(len, mmio->size); |
| 2492 | |
| 2493 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 2494 | iobuf + copied, c, rw, lane); |
| 2495 | if (rc) |
| 2496 | break; |
| 2497 | |
| 2498 | copied += c; |
| 2499 | len -= c; |
| 2500 | } |
| 2501 | nd_region_release_lane(nd_region, lane); |
| 2502 | |
| 2503 | return rc; |
| 2504 | } |
| 2505 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2506 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 2507 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 2508 | { |
| 2509 | if (idt) { |
| 2510 | mmio->num_lines = idt->line_count; |
| 2511 | mmio->line_size = idt->line_size; |
| 2512 | if (interleave_ways == 0) |
| 2513 | return -ENXIO; |
| 2514 | mmio->table_size = mmio->num_lines * interleave_ways |
| 2515 | * mmio->line_size; |
| 2516 | } |
| 2517 | |
| 2518 | return 0; |
| 2519 | } |
| 2520 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2521 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 2522 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 2523 | { |
| 2524 | struct nd_cmd_dimm_flags flags; |
| 2525 | int rc; |
| 2526 | |
| 2527 | memset(&flags, 0, sizeof(flags)); |
| 2528 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2529 | sizeof(flags), NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2530 | |
| 2531 | if (rc >= 0 && flags.status == 0) |
| 2532 | nfit_blk->dimm_flags = flags.flags; |
| 2533 | else if (rc == -ENOTTY) { |
| 2534 | /* fall back to a conservative default */ |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2535 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2536 | rc = 0; |
| 2537 | } else |
| 2538 | rc = -ENXIO; |
| 2539 | |
| 2540 | return rc; |
| 2541 | } |
| 2542 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2543 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 2544 | struct device *dev) |
| 2545 | { |
| 2546 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2547 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 2548 | struct nfit_blk_mmio *mmio; |
| 2549 | struct nfit_blk *nfit_blk; |
| 2550 | struct nfit_mem *nfit_mem; |
| 2551 | struct nvdimm *nvdimm; |
| 2552 | int rc; |
| 2553 | |
| 2554 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 2555 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2556 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2557 | dev_dbg(dev, "missing%s%s%s\n", |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2558 | nfit_mem ? "" : " nfit_mem", |
Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 2559 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 2560 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2561 | return -ENXIO; |
| 2562 | } |
| 2563 | |
| 2564 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 2565 | if (!nfit_blk) |
| 2566 | return -ENOMEM; |
| 2567 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 2568 | nfit_blk->nd_region = to_nd_region(dev); |
| 2569 | |
| 2570 | /* map block aperture memory */ |
| 2571 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 2572 | mmio = &nfit_blk->mmio[BDW]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 2573 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
Dan Williams | ca6a4657 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 2574 | nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr)); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2575 | if (!mmio->addr.base) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2576 | dev_dbg(dev, "%s failed to map bdw\n", |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2577 | nvdimm_name(nvdimm)); |
| 2578 | return -ENOMEM; |
| 2579 | } |
| 2580 | mmio->size = nfit_mem->bdw->size; |
| 2581 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 2582 | mmio->idt = nfit_mem->idt_bdw; |
| 2583 | mmio->spa = nfit_mem->spa_bdw; |
| 2584 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 2585 | nfit_mem->memdev_bdw->interleave_ways); |
| 2586 | if (rc) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2587 | dev_dbg(dev, "%s failed to init bdw interleave\n", |
| 2588 | nvdimm_name(nvdimm)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2589 | return rc; |
| 2590 | } |
| 2591 | |
| 2592 | /* map block control memory */ |
| 2593 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 2594 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 2595 | mmio = &nfit_blk->mmio[DCR]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 2596 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
| 2597 | nfit_mem->spa_dcr->length); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2598 | if (!mmio->addr.base) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2599 | dev_dbg(dev, "%s failed to map dcr\n", |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2600 | nvdimm_name(nvdimm)); |
| 2601 | return -ENOMEM; |
| 2602 | } |
| 2603 | mmio->size = nfit_mem->dcr->window_size; |
| 2604 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 2605 | mmio->idt = nfit_mem->idt_dcr; |
| 2606 | mmio->spa = nfit_mem->spa_dcr; |
| 2607 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 2608 | nfit_mem->memdev_dcr->interleave_ways); |
| 2609 | if (rc) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2610 | dev_dbg(dev, "%s failed to init dcr interleave\n", |
| 2611 | nvdimm_name(nvdimm)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2612 | return rc; |
| 2613 | } |
| 2614 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2615 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 2616 | if (rc < 0) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2617 | dev_dbg(dev, "%s failed get DIMM flags\n", |
| 2618 | nvdimm_name(nvdimm)); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2619 | return rc; |
| 2620 | } |
| 2621 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2622 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2623 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 2624 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2625 | if (mmio->line_size == 0) |
| 2626 | return 0; |
| 2627 | |
| 2628 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 2629 | + 8 > mmio->line_size) { |
| 2630 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 2631 | return -ENXIO; |
| 2632 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 2633 | + 8 > mmio->line_size) { |
| 2634 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 2635 | return -ENXIO; |
| 2636 | } |
| 2637 | |
| 2638 | return 0; |
| 2639 | } |
| 2640 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2641 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2642 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2643 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2644 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2645 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2646 | int cmd_rc, rc; |
| 2647 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2648 | cmd->address = spa->address; |
| 2649 | cmd->length = spa->length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2650 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 2651 | sizeof(*cmd), &cmd_rc); |
| 2652 | if (rc < 0) |
| 2653 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2654 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2655 | } |
| 2656 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 2657 | static int ars_start(struct acpi_nfit_desc *acpi_desc, |
| 2658 | struct nfit_spa *nfit_spa, enum nfit_ars_state req_type) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2659 | { |
| 2660 | int rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2661 | int cmd_rc; |
| 2662 | struct nd_cmd_ars_start ars_start; |
| 2663 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2664 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2665 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2666 | memset(&ars_start, 0, sizeof(ars_start)); |
| 2667 | ars_start.address = spa->address; |
| 2668 | ars_start.length = spa->length; |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 2669 | if (req_type == ARS_REQ_SHORT) |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2670 | ars_start.flags = ND_ARS_RETURN_PREV_DATA; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2671 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
| 2672 | ars_start.type = ND_ARS_PERSISTENT; |
| 2673 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) |
| 2674 | ars_start.type = ND_ARS_VOLATILE; |
| 2675 | else |
| 2676 | return -ENOTTY; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2677 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2678 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 2679 | sizeof(ars_start), &cmd_rc); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2680 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2681 | if (rc < 0) |
| 2682 | return rc; |
Dan Williams | 78153dd | 2019-02-13 09:28:40 -0800 | [diff] [blame] | 2683 | if (cmd_rc < 0) |
| 2684 | return cmd_rc; |
| 2685 | set_bit(ARS_VALID, &acpi_desc->scrub_flags); |
| 2686 | return 0; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2687 | } |
| 2688 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2689 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2690 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2691 | int rc, cmd_rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2692 | struct nd_cmd_ars_start ars_start; |
| 2693 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 2694 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2695 | |
Dan Williams | 317a992 | 2019-02-13 09:34:00 -0800 | [diff] [blame] | 2696 | ars_start = (struct nd_cmd_ars_start) { |
| 2697 | .address = ars_status->restart_address, |
| 2698 | .length = ars_status->restart_length, |
| 2699 | .type = ars_status->type, |
| 2700 | }; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2701 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 2702 | sizeof(ars_start), &cmd_rc); |
| 2703 | if (rc < 0) |
| 2704 | return rc; |
| 2705 | return cmd_rc; |
| 2706 | } |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2707 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2708 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
| 2709 | { |
| 2710 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 2711 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 2712 | int rc, cmd_rc; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2713 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2714 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2715 | acpi_desc->max_ars, &cmd_rc); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2716 | if (rc < 0) |
| 2717 | return rc; |
| 2718 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2719 | } |
| 2720 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2721 | static void ars_complete(struct acpi_nfit_desc *acpi_desc, |
| 2722 | struct nfit_spa *nfit_spa) |
| 2723 | { |
| 2724 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 2725 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2726 | struct nd_region *nd_region = nfit_spa->nd_region; |
| 2727 | struct device *dev; |
| 2728 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 2729 | lockdep_assert_held(&acpi_desc->init_mutex); |
| 2730 | /* |
| 2731 | * Only advance the ARS state for ARS runs initiated by the |
| 2732 | * kernel, ignore ARS results from BIOS initiated runs for scrub |
| 2733 | * completion tracking. |
| 2734 | */ |
| 2735 | if (acpi_desc->scrub_spa != nfit_spa) |
| 2736 | return; |
| 2737 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2738 | if ((ars_status->address >= spa->address && ars_status->address |
| 2739 | < spa->address + spa->length) |
| 2740 | || (ars_status->address < spa->address)) { |
| 2741 | /* |
| 2742 | * Assume that if a scrub starts at an offset from the |
| 2743 | * start of nfit_spa that we are in the continuation |
| 2744 | * case. |
| 2745 | * |
| 2746 | * Otherwise, if the scrub covers the spa range, mark |
| 2747 | * any pending request complete. |
| 2748 | */ |
| 2749 | if (ars_status->address + ars_status->length |
| 2750 | >= spa->address + spa->length) |
| 2751 | /* complete */; |
| 2752 | else |
| 2753 | return; |
| 2754 | } else |
| 2755 | return; |
| 2756 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 2757 | acpi_desc->scrub_spa = NULL; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2758 | if (nd_region) { |
| 2759 | dev = nd_region_dev(nd_region); |
| 2760 | nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON); |
| 2761 | } else |
| 2762 | dev = acpi_desc->dev; |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 2763 | dev_dbg(dev, "ARS: range %d complete\n", spa->range_index); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2764 | } |
| 2765 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2766 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2767 | { |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2768 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2769 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2770 | int rc; |
| 2771 | u32 i; |
| 2772 | |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2773 | /* |
| 2774 | * First record starts at 44 byte offset from the start of the |
| 2775 | * payload. |
| 2776 | */ |
| 2777 | if (ars_status->out_length < 44) |
| 2778 | return 0; |
Dan Williams | 78153dd | 2019-02-13 09:28:40 -0800 | [diff] [blame] | 2779 | |
| 2780 | /* |
| 2781 | * Ignore potentially stale results that are only refreshed |
| 2782 | * after a start-ARS event. |
| 2783 | */ |
| 2784 | if (!test_and_clear_bit(ARS_VALID, &acpi_desc->scrub_flags)) { |
| 2785 | dev_dbg(acpi_desc->dev, "skip %d stale records\n", |
| 2786 | ars_status->num_records); |
| 2787 | return 0; |
| 2788 | } |
| 2789 | |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2790 | for (i = 0; i < ars_status->num_records; i++) { |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2791 | /* only process full records */ |
| 2792 | if (ars_status->out_length |
| 2793 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) |
| 2794 | break; |
Dave Jiang | aa9ad44 | 2017-08-23 12:48:26 -0700 | [diff] [blame] | 2795 | rc = nvdimm_bus_add_badrange(nvdimm_bus, |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2796 | ars_status->records[i].err_address, |
| 2797 | ars_status->records[i].length); |
| 2798 | if (rc) |
| 2799 | return rc; |
| 2800 | } |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2801 | if (i < ars_status->num_records) |
| 2802 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2803 | |
| 2804 | return 0; |
| 2805 | } |
| 2806 | |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2807 | static void acpi_nfit_remove_resource(void *data) |
| 2808 | { |
| 2809 | struct resource *res = data; |
| 2810 | |
| 2811 | remove_resource(res); |
| 2812 | } |
| 2813 | |
| 2814 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, |
| 2815 | struct nd_region_desc *ndr_desc) |
| 2816 | { |
| 2817 | struct resource *res, *nd_res = ndr_desc->res; |
| 2818 | int is_pmem, ret; |
| 2819 | |
| 2820 | /* No operation if the region is already registered as PMEM */ |
| 2821 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), |
| 2822 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); |
| 2823 | if (is_pmem == REGION_INTERSECTS) |
| 2824 | return 0; |
| 2825 | |
| 2826 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); |
| 2827 | if (!res) |
| 2828 | return -ENOMEM; |
| 2829 | |
| 2830 | res->name = "Persistent Memory"; |
| 2831 | res->start = nd_res->start; |
| 2832 | res->end = nd_res->end; |
| 2833 | res->flags = IORESOURCE_MEM; |
| 2834 | res->desc = IORES_DESC_PERSISTENT_MEMORY; |
| 2835 | |
| 2836 | ret = insert_resource(&iomem_resource, res); |
| 2837 | if (ret) |
| 2838 | return ret; |
| 2839 | |
Sajjan, Vikas C | d932dd2 | 2016-07-04 10:02:51 +0530 | [diff] [blame] | 2840 | ret = devm_add_action_or_reset(acpi_desc->dev, |
| 2841 | acpi_nfit_remove_resource, |
| 2842 | res); |
| 2843 | if (ret) |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2844 | return ret; |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2845 | |
| 2846 | return 0; |
| 2847 | } |
| 2848 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2849 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2850 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2851 | struct acpi_nfit_memory_map *memdev, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2852 | struct nfit_spa *nfit_spa) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2853 | { |
| 2854 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 2855 | memdev->device_handle); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2856 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2857 | struct nd_blk_region_desc *ndbr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2858 | struct nfit_mem *nfit_mem; |
Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2859 | int rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2860 | |
| 2861 | if (!nvdimm) { |
| 2862 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 2863 | spa->range_index, memdev->device_handle); |
| 2864 | return -ENODEV; |
| 2865 | } |
| 2866 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2867 | mapping->nvdimm = nvdimm; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2868 | switch (nfit_spa_type(spa)) { |
| 2869 | case NFIT_SPA_PM: |
| 2870 | case NFIT_SPA_VOLATILE: |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2871 | mapping->start = memdev->address; |
| 2872 | mapping->size = memdev->region_size; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2873 | break; |
| 2874 | case NFIT_SPA_DCR: |
| 2875 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2876 | if (!nfit_mem || !nfit_mem->bdw) { |
| 2877 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 2878 | spa->range_index, nvdimm_name(nvdimm)); |
Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2879 | break; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2880 | } |
| 2881 | |
Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2882 | mapping->size = nfit_mem->bdw->capacity; |
| 2883 | mapping->start = nfit_mem->bdw->start_address; |
| 2884 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2885 | ndr_desc->mapping = mapping; |
Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2886 | ndr_desc->num_mappings = 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2887 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 2888 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 2889 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2890 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
| 2891 | if (rc) |
| 2892 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2893 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
| 2894 | ndr_desc); |
| 2895 | if (!nfit_spa->nd_region) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2896 | return -ENOMEM; |
| 2897 | break; |
| 2898 | } |
| 2899 | |
| 2900 | return 0; |
| 2901 | } |
| 2902 | |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2903 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
| 2904 | { |
| 2905 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2906 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2907 | nfit_spa_type(spa) == NFIT_SPA_PDISK || |
| 2908 | nfit_spa_type(spa) == NFIT_SPA_PCD); |
| 2909 | } |
| 2910 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 2911 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
| 2912 | { |
| 2913 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2914 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2915 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); |
| 2916 | } |
| 2917 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2918 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 2919 | struct nfit_spa *nfit_spa) |
| 2920 | { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2921 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2922 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2923 | struct nd_blk_region_desc ndbr_desc; |
| 2924 | struct nd_region_desc *ndr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2925 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2926 | struct nvdimm_bus *nvdimm_bus; |
| 2927 | struct resource res; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2928 | int count = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2929 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2930 | if (nfit_spa->nd_region) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2931 | return 0; |
| 2932 | |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2933 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2934 | dev_dbg(acpi_desc->dev, "detected invalid spa index\n"); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2935 | return 0; |
| 2936 | } |
| 2937 | |
| 2938 | memset(&res, 0, sizeof(res)); |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2939 | memset(&mappings, 0, sizeof(mappings)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2940 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2941 | res.start = spa->address; |
| 2942 | res.end = res.start + spa->length - 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2943 | ndr_desc = &ndbr_desc.ndr_desc; |
| 2944 | ndr_desc->res = &res; |
| 2945 | ndr_desc->provider_data = nfit_spa; |
| 2946 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
Dan Williams | 8fc5c73 | 2018-11-09 12:43:07 -0800 | [diff] [blame] | 2947 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) { |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2948 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 2949 | spa->proximity_domain); |
Dan Williams | 8fc5c73 | 2018-11-09 12:43:07 -0800 | [diff] [blame] | 2950 | ndr_desc->target_node = acpi_map_pxm_to_node( |
| 2951 | spa->proximity_domain); |
| 2952 | } else { |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2953 | ndr_desc->numa_node = NUMA_NO_NODE; |
Dan Williams | 8fc5c73 | 2018-11-09 12:43:07 -0800 | [diff] [blame] | 2954 | ndr_desc->target_node = NUMA_NO_NODE; |
| 2955 | } |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2956 | |
Dan Williams | fe9a552 | 2018-03-21 15:12:07 -0700 | [diff] [blame] | 2957 | /* |
| 2958 | * Persistence domain bits are hierarchical, if |
| 2959 | * ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then |
| 2960 | * ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied. |
| 2961 | */ |
| 2962 | if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH) |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 2963 | set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags); |
Dan Williams | fe9a552 | 2018-03-21 15:12:07 -0700 | [diff] [blame] | 2964 | else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH) |
Dave Jiang | 30e6d7b | 2018-01-31 12:45:43 -0700 | [diff] [blame] | 2965 | set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags); |
| 2966 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2967 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 2968 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2969 | struct nd_mapping_desc *mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2970 | |
| 2971 | if (memdev->range_index != spa->range_index) |
| 2972 | continue; |
| 2973 | if (count >= ND_MAX_MAPPINGS) { |
| 2974 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 2975 | spa->range_index, ND_MAX_MAPPINGS); |
| 2976 | return -ENXIO; |
| 2977 | } |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2978 | mapping = &mappings[count++]; |
| 2979 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2980 | memdev, nfit_spa); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2981 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2982 | goto out; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2983 | } |
| 2984 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2985 | ndr_desc->mapping = mappings; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2986 | ndr_desc->num_mappings = count; |
| 2987 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2988 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2989 | goto out; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2990 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2991 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 2992 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2993 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2994 | if (rc) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2995 | dev_warn(acpi_desc->dev, |
| 2996 | "failed to insert pmem resource to iomem: %d\n", |
| 2997 | rc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2998 | goto out; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2999 | } |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 3000 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3001 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 3002 | ndr_desc); |
| 3003 | if (!nfit_spa->nd_region) |
| 3004 | rc = -ENOMEM; |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 3005 | } else if (nfit_spa_is_volatile(spa)) { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3006 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
| 3007 | ndr_desc); |
| 3008 | if (!nfit_spa->nd_region) |
| 3009 | rc = -ENOMEM; |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 3010 | } else if (nfit_spa_is_virtual(spa)) { |
| 3011 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 3012 | ndr_desc); |
| 3013 | if (!nfit_spa->nd_region) |
| 3014 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3015 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3016 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3017 | out: |
| 3018 | if (rc) |
| 3019 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", |
| 3020 | nfit_spa->spa->range_index); |
| 3021 | return rc; |
| 3022 | } |
| 3023 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3024 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3025 | { |
| 3026 | struct device *dev = acpi_desc->dev; |
| 3027 | struct nd_cmd_ars_status *ars_status; |
| 3028 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3029 | if (acpi_desc->ars_status) { |
| 3030 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3031 | return 0; |
| 3032 | } |
| 3033 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3034 | ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3035 | if (!ars_status) |
| 3036 | return -ENOMEM; |
| 3037 | acpi_desc->ars_status = ars_status; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3038 | return 0; |
| 3039 | } |
| 3040 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3041 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3042 | { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3043 | int rc; |
| 3044 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3045 | if (ars_status_alloc(acpi_desc)) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3046 | return -ENOMEM; |
| 3047 | |
| 3048 | rc = ars_get_status(acpi_desc); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3049 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3050 | if (rc < 0 && rc != -ENOSPC) |
| 3051 | return rc; |
| 3052 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3053 | if (ars_status_process_records(acpi_desc)) |
Dan Williams | 3fa58dc | 2018-11-01 00:30:22 -0700 | [diff] [blame] | 3054 | dev_err(acpi_desc->dev, "Failed to process ARS records\n"); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3055 | |
Dan Williams | 3fa58dc | 2018-11-01 00:30:22 -0700 | [diff] [blame] | 3056 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3057 | } |
| 3058 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3059 | static int ars_register(struct acpi_nfit_desc *acpi_desc, |
| 3060 | struct nfit_spa *nfit_spa) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3061 | { |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3062 | int rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3063 | |
Dan Williams | fa3ed4d | 2019-02-13 09:01:13 -0800 | [diff] [blame] | 3064 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
Dan Williams | bca811a | 2018-04-02 15:28:03 -0700 | [diff] [blame] | 3065 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3066 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3067 | set_bit(ARS_REQ_SHORT, &nfit_spa->ars_state); |
Dan Williams | fa3ed4d | 2019-02-13 09:01:13 -0800 | [diff] [blame] | 3068 | if (!no_init_ars) |
| 3069 | set_bit(ARS_REQ_LONG, &nfit_spa->ars_state); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3070 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3071 | switch (acpi_nfit_query_poison(acpi_desc)) { |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3072 | case 0: |
Dan Williams | c6c5df2 | 2019-02-13 08:58:40 -0800 | [diff] [blame] | 3073 | case -ENOSPC: |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3074 | case -EAGAIN: |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3075 | rc = ars_start(acpi_desc, nfit_spa, ARS_REQ_SHORT); |
| 3076 | /* shouldn't happen, try again later */ |
| 3077 | if (rc == -EBUSY) |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3078 | break; |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3079 | if (rc) { |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3080 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3081 | break; |
| 3082 | } |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3083 | clear_bit(ARS_REQ_SHORT, &nfit_spa->ars_state); |
| 3084 | rc = acpi_nfit_query_poison(acpi_desc); |
| 3085 | if (rc) |
| 3086 | break; |
| 3087 | acpi_desc->scrub_spa = nfit_spa; |
| 3088 | ars_complete(acpi_desc, nfit_spa); |
| 3089 | /* |
| 3090 | * If ars_complete() says we didn't complete the |
| 3091 | * short scrub, we'll try again with a long |
| 3092 | * request. |
| 3093 | */ |
| 3094 | acpi_desc->scrub_spa = NULL; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3095 | break; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3096 | case -EBUSY: |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3097 | case -ENOMEM: |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3098 | /* |
| 3099 | * BIOS was using ARS, wait for it to complete (or |
| 3100 | * resources to become available) and then perform our |
| 3101 | * own scrubs. |
| 3102 | */ |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3103 | break; |
| 3104 | default: |
| 3105 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
| 3106 | break; |
| 3107 | } |
| 3108 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3109 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 3110 | } |
| 3111 | |
| 3112 | static void ars_complete_all(struct acpi_nfit_desc *acpi_desc) |
| 3113 | { |
| 3114 | struct nfit_spa *nfit_spa; |
| 3115 | |
| 3116 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 3117 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
| 3118 | continue; |
| 3119 | ars_complete(acpi_desc, nfit_spa); |
| 3120 | } |
| 3121 | } |
| 3122 | |
| 3123 | static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc, |
| 3124 | int query_rc) |
| 3125 | { |
| 3126 | unsigned int tmo = acpi_desc->scrub_tmo; |
| 3127 | struct device *dev = acpi_desc->dev; |
| 3128 | struct nfit_spa *nfit_spa; |
| 3129 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3130 | lockdep_assert_held(&acpi_desc->init_mutex); |
| 3131 | |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 3132 | if (test_bit(ARS_CANCEL, &acpi_desc->scrub_flags)) |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3133 | return 0; |
| 3134 | |
| 3135 | if (query_rc == -EBUSY) { |
| 3136 | dev_dbg(dev, "ARS: ARS busy\n"); |
| 3137 | return min(30U * 60U, tmo * 2); |
| 3138 | } |
| 3139 | if (query_rc == -ENOSPC) { |
| 3140 | dev_dbg(dev, "ARS: ARS continue\n"); |
| 3141 | ars_continue(acpi_desc); |
| 3142 | return 1; |
| 3143 | } |
| 3144 | if (query_rc && query_rc != -EAGAIN) { |
| 3145 | unsigned long long addr, end; |
| 3146 | |
| 3147 | addr = acpi_desc->ars_status->address; |
| 3148 | end = addr + acpi_desc->ars_status->length; |
| 3149 | dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end, |
| 3150 | query_rc); |
| 3151 | } |
| 3152 | |
| 3153 | ars_complete_all(acpi_desc); |
| 3154 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3155 | enum nfit_ars_state req_type; |
| 3156 | int rc; |
| 3157 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3158 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
| 3159 | continue; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3160 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3161 | /* prefer short ARS requests first */ |
| 3162 | if (test_bit(ARS_REQ_SHORT, &nfit_spa->ars_state)) |
| 3163 | req_type = ARS_REQ_SHORT; |
| 3164 | else if (test_bit(ARS_REQ_LONG, &nfit_spa->ars_state)) |
| 3165 | req_type = ARS_REQ_LONG; |
| 3166 | else |
| 3167 | continue; |
| 3168 | rc = ars_start(acpi_desc, nfit_spa, req_type); |
| 3169 | |
| 3170 | dev = nd_region_dev(nfit_spa->nd_region); |
| 3171 | dev_dbg(dev, "ARS: range %d ARS start %s (%d)\n", |
| 3172 | nfit_spa->spa->range_index, |
| 3173 | req_type == ARS_REQ_SHORT ? "short" : "long", |
| 3174 | rc); |
| 3175 | /* |
| 3176 | * Hmm, we raced someone else starting ARS? Try again in |
| 3177 | * a bit. |
| 3178 | */ |
| 3179 | if (rc == -EBUSY) |
| 3180 | return 1; |
| 3181 | if (rc == 0) { |
| 3182 | dev_WARN_ONCE(dev, acpi_desc->scrub_spa, |
| 3183 | "scrub start while range %d active\n", |
| 3184 | acpi_desc->scrub_spa->spa->range_index); |
| 3185 | clear_bit(req_type, &nfit_spa->ars_state); |
| 3186 | acpi_desc->scrub_spa = nfit_spa; |
| 3187 | /* |
| 3188 | * Consider this spa last for future scrub |
| 3189 | * requests |
| 3190 | */ |
| 3191 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 3192 | return 1; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3193 | } |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3194 | |
| 3195 | dev_err(dev, "ARS: range %d ARS failed (%d)\n", |
| 3196 | nfit_spa->spa->range_index, rc); |
| 3197 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3198 | } |
| 3199 | return 0; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3200 | } |
| 3201 | |
Dan Williams | 33cc2c9 | 2018-07-05 14:58:49 -0700 | [diff] [blame] | 3202 | static void __sched_ars(struct acpi_nfit_desc *acpi_desc, unsigned int tmo) |
| 3203 | { |
| 3204 | lockdep_assert_held(&acpi_desc->init_mutex); |
| 3205 | |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 3206 | set_bit(ARS_BUSY, &acpi_desc->scrub_flags); |
Dan Williams | 33cc2c9 | 2018-07-05 14:58:49 -0700 | [diff] [blame] | 3207 | /* note this should only be set from within the workqueue */ |
| 3208 | if (tmo) |
| 3209 | acpi_desc->scrub_tmo = tmo; |
| 3210 | queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ); |
| 3211 | } |
| 3212 | |
| 3213 | static void sched_ars(struct acpi_nfit_desc *acpi_desc) |
| 3214 | { |
| 3215 | __sched_ars(acpi_desc, 0); |
| 3216 | } |
| 3217 | |
| 3218 | static void notify_ars_done(struct acpi_nfit_desc *acpi_desc) |
| 3219 | { |
| 3220 | lockdep_assert_held(&acpi_desc->init_mutex); |
| 3221 | |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 3222 | clear_bit(ARS_BUSY, &acpi_desc->scrub_flags); |
Dan Williams | 33cc2c9 | 2018-07-05 14:58:49 -0700 | [diff] [blame] | 3223 | acpi_desc->scrub_count++; |
| 3224 | if (acpi_desc->scrub_count_state) |
| 3225 | sysfs_notify_dirent(acpi_desc->scrub_count_state); |
| 3226 | } |
| 3227 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3228 | static void acpi_nfit_scrub(struct work_struct *work) |
| 3229 | { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3230 | struct acpi_nfit_desc *acpi_desc; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3231 | unsigned int tmo; |
| 3232 | int query_rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3233 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3234 | acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3235 | mutex_lock(&acpi_desc->init_mutex); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3236 | query_rc = acpi_nfit_query_poison(acpi_desc); |
| 3237 | tmo = __acpi_nfit_scrub(acpi_desc, query_rc); |
Dan Williams | 33cc2c9 | 2018-07-05 14:58:49 -0700 | [diff] [blame] | 3238 | if (tmo) |
| 3239 | __sched_ars(acpi_desc, tmo); |
| 3240 | else |
| 3241 | notify_ars_done(acpi_desc); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3242 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); |
Dan Williams | 5479b27 | 2019-02-13 09:04:07 -0800 | [diff] [blame] | 3243 | clear_bit(ARS_POLL, &acpi_desc->scrub_flags); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3244 | mutex_unlock(&acpi_desc->init_mutex); |
| 3245 | } |
| 3246 | |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3247 | static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc, |
| 3248 | struct nfit_spa *nfit_spa) |
| 3249 | { |
| 3250 | int type = nfit_spa_type(nfit_spa->spa); |
| 3251 | struct nd_cmd_ars_cap ars_cap; |
| 3252 | int rc; |
| 3253 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3254 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3255 | memset(&ars_cap, 0, sizeof(ars_cap)); |
| 3256 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); |
| 3257 | if (rc < 0) |
| 3258 | return; |
| 3259 | /* check that the supported scrub types match the spa type */ |
| 3260 | if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16) |
| 3261 | & ND_ARS_VOLATILE) == 0) |
| 3262 | return; |
| 3263 | if (type == NFIT_SPA_PM && ((ars_cap.status >> 16) |
| 3264 | & ND_ARS_PERSISTENT) == 0) |
| 3265 | return; |
| 3266 | |
| 3267 | nfit_spa->max_ars = ars_cap.max_ars_out; |
| 3268 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; |
| 3269 | acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3270 | clear_bit(ARS_FAILED, &nfit_spa->ars_state); |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3271 | } |
| 3272 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3273 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 3274 | { |
| 3275 | struct nfit_spa *nfit_spa; |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3276 | int rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3277 | |
Dan Williams | 78153dd | 2019-02-13 09:28:40 -0800 | [diff] [blame] | 3278 | set_bit(ARS_VALID, &acpi_desc->scrub_flags); |
Dan Williams | 8d0d8ed | 2018-04-02 16:49:30 -0700 | [diff] [blame] | 3279 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3280 | switch (nfit_spa_type(nfit_spa->spa)) { |
| 3281 | case NFIT_SPA_VOLATILE: |
| 3282 | case NFIT_SPA_PM: |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3283 | acpi_nfit_init_ars(acpi_desc, nfit_spa); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3284 | break; |
Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 3285 | } |
Dan Williams | 8d0d8ed | 2018-04-02 16:49:30 -0700 | [diff] [blame] | 3286 | } |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3287 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3288 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3289 | switch (nfit_spa_type(nfit_spa->spa)) { |
| 3290 | case NFIT_SPA_VOLATILE: |
| 3291 | case NFIT_SPA_PM: |
| 3292 | /* register regions and kick off initial ARS run */ |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3293 | rc = ars_register(acpi_desc, nfit_spa); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3294 | if (rc) |
| 3295 | return rc; |
| 3296 | break; |
| 3297 | case NFIT_SPA_BDW: |
| 3298 | /* nothing to register */ |
| 3299 | break; |
| 3300 | case NFIT_SPA_DCR: |
| 3301 | case NFIT_SPA_VDISK: |
| 3302 | case NFIT_SPA_VCD: |
| 3303 | case NFIT_SPA_PDISK: |
| 3304 | case NFIT_SPA_PCD: |
| 3305 | /* register known regions that don't support ARS */ |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3306 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 3307 | if (rc) |
| 3308 | return rc; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3309 | break; |
| 3310 | default: |
| 3311 | /* don't register unknown regions */ |
| 3312 | break; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3313 | } |
| 3314 | |
Dan Williams | 33cc2c9 | 2018-07-05 14:58:49 -0700 | [diff] [blame] | 3315 | sched_ars(acpi_desc); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3316 | return 0; |
| 3317 | } |
| 3318 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3319 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 3320 | struct nfit_table_prev *prev) |
| 3321 | { |
| 3322 | struct device *dev = acpi_desc->dev; |
| 3323 | |
| 3324 | if (!list_empty(&prev->spas) || |
| 3325 | !list_empty(&prev->memdevs) || |
| 3326 | !list_empty(&prev->dcrs) || |
| 3327 | !list_empty(&prev->bdws) || |
| 3328 | !list_empty(&prev->idts) || |
| 3329 | !list_empty(&prev->flushes)) { |
| 3330 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 3331 | return -ENXIO; |
| 3332 | } |
| 3333 | return 0; |
| 3334 | } |
| 3335 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3336 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
| 3337 | { |
| 3338 | struct device *dev = acpi_desc->dev; |
| 3339 | struct kernfs_node *nfit; |
| 3340 | struct device *bus_dev; |
| 3341 | |
| 3342 | if (!ars_supported(acpi_desc->nvdimm_bus)) |
| 3343 | return 0; |
| 3344 | |
| 3345 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 3346 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); |
| 3347 | if (!nfit) { |
| 3348 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); |
| 3349 | return -ENODEV; |
| 3350 | } |
| 3351 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); |
| 3352 | sysfs_put(nfit); |
| 3353 | if (!acpi_desc->scrub_count_state) { |
| 3354 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); |
| 3355 | return -ENODEV; |
| 3356 | } |
| 3357 | |
| 3358 | return 0; |
| 3359 | } |
| 3360 | |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3361 | static void acpi_nfit_unregister(void *data) |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3362 | { |
| 3363 | struct acpi_nfit_desc *acpi_desc = data; |
| 3364 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3365 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3366 | } |
| 3367 | |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3368 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3369 | { |
| 3370 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3371 | struct nfit_table_prev prev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3372 | const void *end; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3373 | int rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3374 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3375 | if (!acpi_desc->nvdimm_bus) { |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3376 | acpi_nfit_init_dsms(acpi_desc); |
| 3377 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3378 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
| 3379 | &acpi_desc->nd_desc); |
| 3380 | if (!acpi_desc->nvdimm_bus) |
| 3381 | return -ENOMEM; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3382 | |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3383 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3384 | acpi_desc); |
| 3385 | if (rc) |
| 3386 | return rc; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3387 | |
| 3388 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); |
| 3389 | if (rc) |
| 3390 | return rc; |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3391 | |
| 3392 | /* register this acpi_desc for mce notifications */ |
| 3393 | mutex_lock(&acpi_desc_lock); |
| 3394 | list_add_tail(&acpi_desc->list, &acpi_descs); |
| 3395 | mutex_unlock(&acpi_desc_lock); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3396 | } |
| 3397 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3398 | mutex_lock(&acpi_desc->init_mutex); |
| 3399 | |
| 3400 | INIT_LIST_HEAD(&prev.spas); |
| 3401 | INIT_LIST_HEAD(&prev.memdevs); |
| 3402 | INIT_LIST_HEAD(&prev.dcrs); |
| 3403 | INIT_LIST_HEAD(&prev.bdws); |
| 3404 | INIT_LIST_HEAD(&prev.idts); |
| 3405 | INIT_LIST_HEAD(&prev.flushes); |
| 3406 | |
| 3407 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 3408 | acpi_desc->spas.prev); |
| 3409 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 3410 | acpi_desc->memdevs.prev); |
| 3411 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 3412 | acpi_desc->dcrs.prev); |
| 3413 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 3414 | acpi_desc->bdws.prev); |
| 3415 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 3416 | acpi_desc->idts.prev); |
| 3417 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 3418 | acpi_desc->flushes.prev); |
| 3419 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3420 | end = data + sz; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3421 | while (!IS_ERR_OR_NULL(data)) |
| 3422 | data = add_table(acpi_desc, &prev, data, end); |
| 3423 | |
| 3424 | if (IS_ERR(data)) { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3425 | dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data)); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3426 | rc = PTR_ERR(data); |
| 3427 | goto out_unlock; |
| 3428 | } |
| 3429 | |
| 3430 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 3431 | if (rc) |
| 3432 | goto out_unlock; |
| 3433 | |
Dan Williams | 81ed4e3 | 2016-06-10 18:20:53 -0700 | [diff] [blame] | 3434 | rc = nfit_mem_init(acpi_desc); |
| 3435 | if (rc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3436 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3437 | |
| 3438 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 3439 | if (rc) |
| 3440 | goto out_unlock; |
| 3441 | |
| 3442 | rc = acpi_nfit_register_regions(acpi_desc); |
| 3443 | |
| 3444 | out_unlock: |
| 3445 | mutex_unlock(&acpi_desc->init_mutex); |
| 3446 | return rc; |
| 3447 | } |
| 3448 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 3449 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3450 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
| 3451 | { |
Xiaochun Lee | 8a7f02f | 2019-01-05 16:08:38 +0800 | [diff] [blame] | 3452 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3453 | struct device *dev = acpi_desc->dev; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3454 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3455 | /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 3456 | nfit_device_lock(dev); |
| 3457 | nfit_device_unlock(dev); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3458 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3459 | /* Bounce the init_mutex to complete initial registration */ |
Dan Williams | 9ccaed4 | 2017-04-13 22:48:46 -0700 | [diff] [blame] | 3460 | mutex_lock(&acpi_desc->init_mutex); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3461 | mutex_unlock(&acpi_desc->init_mutex); |
Dan Williams | e471486 | 2017-02-02 10:31:00 -0800 | [diff] [blame] | 3462 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3463 | return 0; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3464 | } |
| 3465 | |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 3466 | static int __acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3467 | struct nvdimm *nvdimm, unsigned int cmd) |
| 3468 | { |
Xiaochun Lee | 8a7f02f | 2019-01-05 16:08:38 +0800 | [diff] [blame] | 3469 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3470 | |
| 3471 | if (nvdimm) |
| 3472 | return 0; |
| 3473 | if (cmd != ND_CMD_ARS_START) |
| 3474 | return 0; |
| 3475 | |
| 3476 | /* |
| 3477 | * The kernel and userspace may race to initiate a scrub, but |
| 3478 | * the scrub thread is prepared to lose that initial race. It |
Dan Williams | 5948612 | 2018-10-15 12:57:31 -0700 | [diff] [blame] | 3479 | * just needs guarantees that any ARS it initiates are not |
| 3480 | * interrupted by any intervening start requests from userspace. |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3481 | */ |
Dan Williams | 2121db0 | 2018-11-03 17:53:09 -0700 | [diff] [blame] | 3482 | if (work_busy(&acpi_desc->dwork.work)) |
| 3483 | return -EBUSY; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3484 | |
Dan Williams | 2121db0 | 2018-11-03 17:53:09 -0700 | [diff] [blame] | 3485 | return 0; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3486 | } |
| 3487 | |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 3488 | /* prevent security commands from being issued via ioctl */ |
| 3489 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
| 3490 | struct nvdimm *nvdimm, unsigned int cmd, void *buf) |
| 3491 | { |
| 3492 | struct nd_cmd_pkg *call_pkg = buf; |
| 3493 | unsigned int func; |
| 3494 | |
| 3495 | if (nvdimm && cmd == ND_CMD_CALL && |
| 3496 | call_pkg->nd_family == NVDIMM_FAMILY_INTEL) { |
| 3497 | func = call_pkg->nd_command; |
Dan Carpenter | 01091c4 | 2020-02-25 19:20:06 +0300 | [diff] [blame] | 3498 | if (func > NVDIMM_CMD_MAX || |
| 3499 | (1 << func) & NVDIMM_INTEL_SECURITY_CMDMASK) |
Dave Jiang | b3ed2ce | 2018-12-04 10:31:11 -0800 | [diff] [blame] | 3500 | return -EOPNOTSUPP; |
| 3501 | } |
| 3502 | |
| 3503 | return __acpi_nfit_clear_to_send(nd_desc, nvdimm, cmd); |
| 3504 | } |
| 3505 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3506 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, |
| 3507 | enum nfit_ars_state req_type) |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3508 | { |
| 3509 | struct device *dev = acpi_desc->dev; |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3510 | int scheduled = 0, busy = 0; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3511 | struct nfit_spa *nfit_spa; |
| 3512 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3513 | mutex_lock(&acpi_desc->init_mutex); |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 3514 | if (test_bit(ARS_CANCEL, &acpi_desc->scrub_flags)) { |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3515 | mutex_unlock(&acpi_desc->init_mutex); |
| 3516 | return 0; |
| 3517 | } |
| 3518 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3519 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3520 | int type = nfit_spa_type(nfit_spa->spa); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3521 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3522 | if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE) |
| 3523 | continue; |
| 3524 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3525 | continue; |
| 3526 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3527 | if (test_and_set_bit(req_type, &nfit_spa->ars_state)) |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3528 | busy++; |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3529 | else |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3530 | scheduled++; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3531 | } |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3532 | if (scheduled) { |
Dan Williams | 33cc2c9 | 2018-07-05 14:58:49 -0700 | [diff] [blame] | 3533 | sched_ars(acpi_desc); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3534 | dev_dbg(dev, "ars_scan triggered\n"); |
| 3535 | } |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3536 | mutex_unlock(&acpi_desc->init_mutex); |
| 3537 | |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3538 | if (scheduled) |
| 3539 | return 0; |
| 3540 | if (busy) |
| 3541 | return -EBUSY; |
| 3542 | return -ENOTTY; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3543 | } |
| 3544 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3545 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3546 | { |
| 3547 | struct nvdimm_bus_descriptor *nd_desc; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3548 | |
| 3549 | dev_set_drvdata(dev, acpi_desc); |
| 3550 | acpi_desc->dev = dev; |
| 3551 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 3552 | nd_desc = &acpi_desc->nd_desc; |
| 3553 | nd_desc->provider_name = "ACPI.NFIT"; |
Dan Williams | bc9775d | 2016-07-21 20:03:19 -0700 | [diff] [blame] | 3554 | nd_desc->module = THIS_MODULE; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3555 | nd_desc->ndctl = acpi_nfit_ctl; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3556 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3557 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3558 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 3559 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3560 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 3561 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 3562 | INIT_LIST_HEAD(&acpi_desc->bdws); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 3563 | INIT_LIST_HEAD(&acpi_desc->idts); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 3564 | INIT_LIST_HEAD(&acpi_desc->flushes); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3565 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 3566 | INIT_LIST_HEAD(&acpi_desc->dimms); |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3567 | INIT_LIST_HEAD(&acpi_desc->list); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3568 | mutex_init(&acpi_desc->init_mutex); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3569 | acpi_desc->scrub_tmo = 1; |
| 3570 | INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3571 | } |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3572 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3573 | |
Dan Williams | 3c87f37 | 2017-04-03 13:52:14 -0700 | [diff] [blame] | 3574 | static void acpi_nfit_put_table(void *table) |
| 3575 | { |
| 3576 | acpi_put_table(table); |
| 3577 | } |
| 3578 | |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3579 | void acpi_nfit_shutdown(void *data) |
| 3580 | { |
| 3581 | struct acpi_nfit_desc *acpi_desc = data; |
| 3582 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 3583 | |
| 3584 | /* |
| 3585 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not |
| 3586 | * race teardown |
| 3587 | */ |
| 3588 | mutex_lock(&acpi_desc_lock); |
| 3589 | list_del(&acpi_desc->list); |
| 3590 | mutex_unlock(&acpi_desc_lock); |
| 3591 | |
| 3592 | mutex_lock(&acpi_desc->init_mutex); |
Dan Williams | e34b825 | 2019-02-13 09:57:22 -0800 | [diff] [blame] | 3593 | set_bit(ARS_CANCEL, &acpi_desc->scrub_flags); |
Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3594 | cancel_delayed_work_sync(&acpi_desc->dwork); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3595 | mutex_unlock(&acpi_desc->init_mutex); |
| 3596 | |
| 3597 | /* |
| 3598 | * Bounce the nvdimm bus lock to make sure any in-flight |
| 3599 | * acpi_nfit_ars_rescan() submissions have had a chance to |
| 3600 | * either submit or see ->cancel set. |
| 3601 | */ |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 3602 | nfit_device_lock(bus_dev); |
| 3603 | nfit_device_unlock(bus_dev); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3604 | |
| 3605 | flush_workqueue(nfit_wq); |
| 3606 | } |
| 3607 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); |
| 3608 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3609 | static int acpi_nfit_add(struct acpi_device *adev) |
| 3610 | { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3611 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3612 | struct acpi_nfit_desc *acpi_desc; |
| 3613 | struct device *dev = &adev->dev; |
| 3614 | struct acpi_table_header *tbl; |
| 3615 | acpi_status status = AE_OK; |
| 3616 | acpi_size sz; |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3617 | int rc = 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3618 | |
Lv Zheng | 6b11d1d | 2016-12-14 15:04:39 +0800 | [diff] [blame] | 3619 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3620 | if (ACPI_FAILURE(status)) { |
Ocean He | 9f619d4 | 2018-08-07 02:15:31 -0400 | [diff] [blame] | 3621 | /* The NVDIMM root device allows OS to trigger enumeration of |
| 3622 | * NVDIMMs through NFIT at boot time and re-enumeration at |
| 3623 | * root level via the _FIT method during runtime. |
| 3624 | * This is ok to return 0 here, we could have an nvdimm |
| 3625 | * hotplugged later and evaluate _FIT method which returns |
| 3626 | * data in the format of a series of NFIT Structures. |
| 3627 | */ |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3628 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 3629 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3630 | } |
Dan Williams | 3c87f37 | 2017-04-03 13:52:14 -0700 | [diff] [blame] | 3631 | |
| 3632 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); |
| 3633 | if (rc) |
| 3634 | return rc; |
Lv Zheng | 6b11d1d | 2016-12-14 15:04:39 +0800 | [diff] [blame] | 3635 | sz = tbl->length; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3636 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3637 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 3638 | if (!acpi_desc) |
| 3639 | return -ENOMEM; |
| 3640 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3641 | |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3642 | /* Save the acpi header for exporting the revision via sysfs */ |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3643 | acpi_desc->acpi_header = *tbl; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3644 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3645 | /* Evaluate _FIT and override with that if present */ |
| 3646 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 3647 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3648 | union acpi_object *obj = buf.pointer; |
| 3649 | |
| 3650 | if (obj->type == ACPI_TYPE_BUFFER) |
| 3651 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 3652 | obj->buffer.length); |
| 3653 | else |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3654 | dev_dbg(dev, "invalid type %d, ignoring _FIT\n", |
| 3655 | (int) obj->type); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3656 | kfree(buf.pointer); |
| 3657 | } else |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3658 | /* skip over the lead-in header table */ |
| 3659 | rc = acpi_nfit_init(acpi_desc, (void *) tbl |
| 3660 | + sizeof(struct acpi_table_nfit), |
| 3661 | sz - sizeof(struct acpi_table_nfit)); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3662 | |
| 3663 | if (rc) |
| 3664 | return rc; |
| 3665 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3666 | } |
| 3667 | |
| 3668 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 3669 | { |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3670 | /* see acpi_nfit_unregister */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3671 | return 0; |
| 3672 | } |
| 3673 | |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3674 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3675 | { |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3676 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3677 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3678 | union acpi_object *obj; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3679 | acpi_status status; |
| 3680 | int ret; |
| 3681 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3682 | if (!dev->driver) { |
| 3683 | /* dev->driver may be null if we're being removed */ |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3684 | dev_dbg(dev, "no driver found for dev\n"); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3685 | return; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3686 | } |
| 3687 | |
| 3688 | if (!acpi_desc) { |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3689 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 3690 | if (!acpi_desc) |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3691 | return; |
| 3692 | acpi_nfit_desc_init(acpi_desc, dev); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3693 | } else { |
| 3694 | /* |
| 3695 | * Finish previous registration before considering new |
| 3696 | * regions. |
| 3697 | */ |
| 3698 | flush_workqueue(nfit_wq); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3699 | } |
| 3700 | |
| 3701 | /* Evaluate _FIT */ |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3702 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3703 | if (ACPI_FAILURE(status)) { |
| 3704 | dev_err(dev, "failed to evaluate _FIT\n"); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3705 | return; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3706 | } |
| 3707 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3708 | obj = buf.pointer; |
| 3709 | if (obj->type == ACPI_TYPE_BUFFER) { |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3710 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 3711 | obj->buffer.length); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3712 | if (ret) |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3713 | dev_err(dev, "failed to merge updated NFIT\n"); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3714 | } else |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3715 | dev_err(dev, "Invalid _FIT\n"); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3716 | kfree(buf.pointer); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3717 | } |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3718 | |
| 3719 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) |
| 3720 | { |
| 3721 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
| 3722 | |
Dan Williams | d3abaf4 | 2018-10-13 20:32:17 -0700 | [diff] [blame] | 3723 | if (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) |
| 3724 | acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); |
| 3725 | else |
| 3726 | acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_SHORT); |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3727 | } |
| 3728 | |
| 3729 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) |
| 3730 | { |
Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3731 | dev_dbg(dev, "event: 0x%x\n", event); |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3732 | |
| 3733 | switch (event) { |
| 3734 | case NFIT_NOTIFY_UPDATE: |
| 3735 | return acpi_nfit_update_notify(dev, handle); |
| 3736 | case NFIT_NOTIFY_UC_MEMORY_ERROR: |
| 3737 | return acpi_nfit_uc_error_notify(dev, handle); |
| 3738 | default: |
| 3739 | return; |
| 3740 | } |
| 3741 | } |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3742 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3743 | |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3744 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 3745 | { |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 3746 | nfit_device_lock(&adev->dev); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3747 | __acpi_nfit_notify(&adev->dev, adev->handle, event); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 3748 | nfit_device_unlock(&adev->dev); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3749 | } |
| 3750 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3751 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 3752 | { "ACPI0012", 0 }, |
| 3753 | { "", 0 }, |
| 3754 | }; |
| 3755 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 3756 | |
| 3757 | static struct acpi_driver acpi_nfit_driver = { |
| 3758 | .name = KBUILD_MODNAME, |
| 3759 | .ids = acpi_nfit_ids, |
| 3760 | .ops = { |
| 3761 | .add = acpi_nfit_add, |
| 3762 | .remove = acpi_nfit_remove, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3763 | .notify = acpi_nfit_notify, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3764 | }, |
| 3765 | }; |
| 3766 | |
| 3767 | static __init int nfit_init(void) |
| 3768 | { |
Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3769 | int ret; |
| 3770 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3771 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 3772 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 3773 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 3774 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 3775 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 3776 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 3777 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 3778 | BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3779 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 3780 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
| 3781 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); |
| 3782 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); |
| 3783 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); |
| 3784 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); |
| 3785 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); |
| 3786 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); |
| 3787 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); |
| 3788 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); |
| 3789 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); |
| 3790 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
| 3791 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); |
| 3792 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); |
Dexuan Cui | 1194c413 | 2019-01-29 00:56:17 +0000 | [diff] [blame] | 3793 | guid_parse(UUID_NFIT_DIMM_N_HYPERV, &nfit_uuid[NFIT_DEV_DIMM_N_HYPERV]); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3794 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3795 | nfit_wq = create_singlethread_workqueue("nfit"); |
| 3796 | if (!nfit_wq) |
| 3797 | return -ENOMEM; |
| 3798 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3799 | nfit_mce_register(); |
Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3800 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
| 3801 | if (ret) { |
| 3802 | nfit_mce_unregister(); |
| 3803 | destroy_workqueue(nfit_wq); |
| 3804 | } |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3805 | |
Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3806 | return ret; |
| 3807 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3808 | } |
| 3809 | |
| 3810 | static __exit void nfit_exit(void) |
| 3811 | { |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3812 | nfit_mce_unregister(); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3813 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3814 | destroy_workqueue(nfit_wq); |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3815 | WARN_ON(!list_empty(&acpi_descs)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3816 | } |
| 3817 | |
| 3818 | module_init(nfit_init); |
| 3819 | module_exit(nfit_exit); |
| 3820 | MODULE_LICENSE("GPL v2"); |
| 3821 | MODULE_AUTHOR("Intel Corporation"); |