Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2 | /* |
Mika Westerberg | 15c6784 | 2018-10-01 12:31:22 +0300 | [diff] [blame] | 3 | * Thunderbolt driver - switch/port utility functions |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 4 | * |
| 5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> |
Mika Westerberg | 15c6784 | 2018-10-01 12:31:22 +0300 | [diff] [blame] | 6 | * Copyright (C) 2018, Intel Corporation |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/delay.h> |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 10 | #include <linux/idr.h> |
| 11 | #include <linux/nvmem-provider.h> |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 12 | #include <linux/pm_runtime.h> |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 13 | #include <linux/sched/signal.h> |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 14 | #include <linux/sizes.h> |
Sachin Kamat | 10fefe5 | 2014-06-20 14:32:30 +0530 | [diff] [blame] | 15 | #include <linux/slab.h> |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 16 | |
| 17 | #include "tb.h" |
| 18 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 19 | /* Switch NVM support */ |
| 20 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 21 | #define NVM_CSS 0x10 |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 22 | |
| 23 | struct nvm_auth_status { |
| 24 | struct list_head list; |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 25 | uuid_t uuid; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 26 | u32 status; |
| 27 | }; |
| 28 | |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 29 | enum nvm_write_ops { |
| 30 | WRITE_AND_AUTHENTICATE = 1, |
| 31 | WRITE_ONLY = 2, |
| 32 | }; |
| 33 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 34 | /* |
| 35 | * Hold NVM authentication failure status per switch This information |
| 36 | * needs to stay around even when the switch gets power cycled so we |
| 37 | * keep it separately. |
| 38 | */ |
| 39 | static LIST_HEAD(nvm_auth_status_cache); |
| 40 | static DEFINE_MUTEX(nvm_auth_status_lock); |
| 41 | |
| 42 | static struct nvm_auth_status *__nvm_get_auth_status(const struct tb_switch *sw) |
| 43 | { |
| 44 | struct nvm_auth_status *st; |
| 45 | |
| 46 | list_for_each_entry(st, &nvm_auth_status_cache, list) { |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 47 | if (uuid_equal(&st->uuid, sw->uuid)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 48 | return st; |
| 49 | } |
| 50 | |
| 51 | return NULL; |
| 52 | } |
| 53 | |
| 54 | static void nvm_get_auth_status(const struct tb_switch *sw, u32 *status) |
| 55 | { |
| 56 | struct nvm_auth_status *st; |
| 57 | |
| 58 | mutex_lock(&nvm_auth_status_lock); |
| 59 | st = __nvm_get_auth_status(sw); |
| 60 | mutex_unlock(&nvm_auth_status_lock); |
| 61 | |
| 62 | *status = st ? st->status : 0; |
| 63 | } |
| 64 | |
| 65 | static void nvm_set_auth_status(const struct tb_switch *sw, u32 status) |
| 66 | { |
| 67 | struct nvm_auth_status *st; |
| 68 | |
| 69 | if (WARN_ON(!sw->uuid)) |
| 70 | return; |
| 71 | |
| 72 | mutex_lock(&nvm_auth_status_lock); |
| 73 | st = __nvm_get_auth_status(sw); |
| 74 | |
| 75 | if (!st) { |
| 76 | st = kzalloc(sizeof(*st), GFP_KERNEL); |
| 77 | if (!st) |
| 78 | goto unlock; |
| 79 | |
| 80 | memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); |
| 81 | INIT_LIST_HEAD(&st->list); |
| 82 | list_add_tail(&st->list, &nvm_auth_status_cache); |
| 83 | } |
| 84 | |
| 85 | st->status = status; |
| 86 | unlock: |
| 87 | mutex_unlock(&nvm_auth_status_lock); |
| 88 | } |
| 89 | |
| 90 | static void nvm_clear_auth_status(const struct tb_switch *sw) |
| 91 | { |
| 92 | struct nvm_auth_status *st; |
| 93 | |
| 94 | mutex_lock(&nvm_auth_status_lock); |
| 95 | st = __nvm_get_auth_status(sw); |
| 96 | if (st) { |
| 97 | list_del(&st->list); |
| 98 | kfree(st); |
| 99 | } |
| 100 | mutex_unlock(&nvm_auth_status_lock); |
| 101 | } |
| 102 | |
| 103 | static int nvm_validate_and_write(struct tb_switch *sw) |
| 104 | { |
| 105 | unsigned int image_size, hdr_size; |
| 106 | const u8 *buf = sw->nvm->buf; |
| 107 | u16 ds_size; |
| 108 | int ret; |
| 109 | |
| 110 | if (!buf) |
| 111 | return -EINVAL; |
| 112 | |
| 113 | image_size = sw->nvm->buf_data_size; |
| 114 | if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE) |
| 115 | return -EINVAL; |
| 116 | |
| 117 | /* |
| 118 | * FARB pointer must point inside the image and must at least |
| 119 | * contain parts of the digital section we will be reading here. |
| 120 | */ |
| 121 | hdr_size = (*(u32 *)buf) & 0xffffff; |
| 122 | if (hdr_size + NVM_DEVID + 2 >= image_size) |
| 123 | return -EINVAL; |
| 124 | |
| 125 | /* Digital section start should be aligned to 4k page */ |
| 126 | if (!IS_ALIGNED(hdr_size, SZ_4K)) |
| 127 | return -EINVAL; |
| 128 | |
| 129 | /* |
| 130 | * Read digital section size and check that it also fits inside |
| 131 | * the image. |
| 132 | */ |
| 133 | ds_size = *(u16 *)(buf + hdr_size); |
| 134 | if (ds_size >= image_size) |
| 135 | return -EINVAL; |
| 136 | |
| 137 | if (!sw->safe_mode) { |
| 138 | u16 device_id; |
| 139 | |
| 140 | /* |
| 141 | * Make sure the device ID in the image matches the one |
| 142 | * we read from the switch config space. |
| 143 | */ |
| 144 | device_id = *(u16 *)(buf + hdr_size + NVM_DEVID); |
| 145 | if (device_id != sw->config.device_id) |
| 146 | return -EINVAL; |
| 147 | |
| 148 | if (sw->generation < 3) { |
| 149 | /* Write CSS headers first */ |
| 150 | ret = dma_port_flash_write(sw->dma_port, |
| 151 | DMA_PORT_CSS_ADDRESS, buf + NVM_CSS, |
| 152 | DMA_PORT_CSS_MAX_SIZE); |
| 153 | if (ret) |
| 154 | return ret; |
| 155 | } |
| 156 | |
| 157 | /* Skip headers in the image */ |
| 158 | buf += hdr_size; |
| 159 | image_size -= hdr_size; |
| 160 | } |
| 161 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 162 | if (tb_switch_is_usb4(sw)) |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 163 | ret = usb4_switch_nvm_write(sw, 0, buf, image_size); |
| 164 | else |
| 165 | ret = dma_port_flash_write(sw->dma_port, 0, buf, image_size); |
| 166 | if (!ret) |
| 167 | sw->nvm->flushed = true; |
| 168 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 169 | } |
| 170 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 171 | static int nvm_authenticate_host_dma_port(struct tb_switch *sw) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 172 | { |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 173 | int ret = 0; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 174 | |
| 175 | /* |
| 176 | * Root switch NVM upgrade requires that we disconnect the |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 177 | * existing paths first (in case it is not in safe mode |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 178 | * already). |
| 179 | */ |
| 180 | if (!sw->safe_mode) { |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 181 | u32 status; |
| 182 | |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 183 | ret = tb_domain_disconnect_all_paths(sw->tb); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 184 | if (ret) |
| 185 | return ret; |
| 186 | /* |
| 187 | * The host controller goes away pretty soon after this if |
| 188 | * everything goes well so getting timeout is expected. |
| 189 | */ |
| 190 | ret = dma_port_flash_update_auth(sw->dma_port); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 191 | if (!ret || ret == -ETIMEDOUT) |
| 192 | return 0; |
| 193 | |
| 194 | /* |
| 195 | * Any error from update auth operation requires power |
| 196 | * cycling of the host router. |
| 197 | */ |
| 198 | tb_sw_warn(sw, "failed to authenticate NVM, power cycling\n"); |
| 199 | if (dma_port_flash_update_auth_status(sw->dma_port, &status) > 0) |
| 200 | nvm_set_auth_status(sw, status); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 201 | } |
| 202 | |
| 203 | /* |
| 204 | * From safe mode we can get out by just power cycling the |
| 205 | * switch. |
| 206 | */ |
| 207 | dma_port_power_cycle(sw->dma_port); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 208 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 209 | } |
| 210 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 211 | static int nvm_authenticate_device_dma_port(struct tb_switch *sw) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 212 | { |
| 213 | int ret, retries = 10; |
| 214 | |
| 215 | ret = dma_port_flash_update_auth(sw->dma_port); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 216 | switch (ret) { |
| 217 | case 0: |
| 218 | case -ETIMEDOUT: |
| 219 | case -EACCES: |
| 220 | case -EINVAL: |
| 221 | /* Power cycle is required */ |
| 222 | break; |
| 223 | default: |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 224 | return ret; |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 225 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 226 | |
| 227 | /* |
| 228 | * Poll here for the authentication status. It takes some time |
| 229 | * for the device to respond (we get timeout for a while). Once |
| 230 | * we get response the device needs to be power cycled in order |
| 231 | * to the new NVM to be taken into use. |
| 232 | */ |
| 233 | do { |
| 234 | u32 status; |
| 235 | |
| 236 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); |
| 237 | if (ret < 0 && ret != -ETIMEDOUT) |
| 238 | return ret; |
| 239 | if (ret > 0) { |
| 240 | if (status) { |
| 241 | tb_sw_warn(sw, "failed to authenticate NVM\n"); |
| 242 | nvm_set_auth_status(sw, status); |
| 243 | } |
| 244 | |
| 245 | tb_sw_info(sw, "power cycling the switch now\n"); |
| 246 | dma_port_power_cycle(sw->dma_port); |
| 247 | return 0; |
| 248 | } |
| 249 | |
| 250 | msleep(500); |
| 251 | } while (--retries); |
| 252 | |
| 253 | return -ETIMEDOUT; |
| 254 | } |
| 255 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 256 | static void nvm_authenticate_start_dma_port(struct tb_switch *sw) |
| 257 | { |
| 258 | struct pci_dev *root_port; |
| 259 | |
| 260 | /* |
| 261 | * During host router NVM upgrade we should not allow root port to |
| 262 | * go into D3cold because some root ports cannot trigger PME |
| 263 | * itself. To be on the safe side keep the root port in D0 during |
| 264 | * the whole upgrade process. |
| 265 | */ |
Yicong Yang | 6ae72bf | 2020-05-09 18:19:28 +0800 | [diff] [blame] | 266 | root_port = pcie_find_root_port(sw->tb->nhi->pdev); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 267 | if (root_port) |
| 268 | pm_runtime_get_noresume(&root_port->dev); |
| 269 | } |
| 270 | |
| 271 | static void nvm_authenticate_complete_dma_port(struct tb_switch *sw) |
| 272 | { |
| 273 | struct pci_dev *root_port; |
| 274 | |
Yicong Yang | 6ae72bf | 2020-05-09 18:19:28 +0800 | [diff] [blame] | 275 | root_port = pcie_find_root_port(sw->tb->nhi->pdev); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 276 | if (root_port) |
| 277 | pm_runtime_put(&root_port->dev); |
| 278 | } |
| 279 | |
| 280 | static inline bool nvm_readable(struct tb_switch *sw) |
| 281 | { |
| 282 | if (tb_switch_is_usb4(sw)) { |
| 283 | /* |
| 284 | * USB4 devices must support NVM operations but it is |
| 285 | * optional for hosts. Therefore we query the NVM sector |
| 286 | * size here and if it is supported assume NVM |
| 287 | * operations are implemented. |
| 288 | */ |
| 289 | return usb4_switch_nvm_sector_size(sw) > 0; |
| 290 | } |
| 291 | |
| 292 | /* Thunderbolt 2 and 3 devices support NVM through DMA port */ |
| 293 | return !!sw->dma_port; |
| 294 | } |
| 295 | |
| 296 | static inline bool nvm_upgradeable(struct tb_switch *sw) |
| 297 | { |
| 298 | if (sw->no_nvm_upgrade) |
| 299 | return false; |
| 300 | return nvm_readable(sw); |
| 301 | } |
| 302 | |
| 303 | static inline int nvm_read(struct tb_switch *sw, unsigned int address, |
| 304 | void *buf, size_t size) |
| 305 | { |
| 306 | if (tb_switch_is_usb4(sw)) |
| 307 | return usb4_switch_nvm_read(sw, address, buf, size); |
| 308 | return dma_port_flash_read(sw->dma_port, address, buf, size); |
| 309 | } |
| 310 | |
| 311 | static int nvm_authenticate(struct tb_switch *sw) |
| 312 | { |
| 313 | int ret; |
| 314 | |
| 315 | if (tb_switch_is_usb4(sw)) |
| 316 | return usb4_switch_nvm_authenticate(sw); |
| 317 | |
| 318 | if (!tb_route(sw)) { |
| 319 | nvm_authenticate_start_dma_port(sw); |
| 320 | ret = nvm_authenticate_host_dma_port(sw); |
| 321 | } else { |
| 322 | ret = nvm_authenticate_device_dma_port(sw); |
| 323 | } |
| 324 | |
| 325 | return ret; |
| 326 | } |
| 327 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 328 | static int tb_switch_nvm_read(void *priv, unsigned int offset, void *val, |
| 329 | size_t bytes) |
| 330 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 331 | struct tb_nvm *nvm = priv; |
| 332 | struct tb_switch *sw = tb_to_switch(nvm->dev); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 333 | int ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 334 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 335 | pm_runtime_get_sync(&sw->dev); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 336 | |
| 337 | if (!mutex_trylock(&sw->tb->lock)) { |
| 338 | ret = restart_syscall(); |
| 339 | goto out; |
| 340 | } |
| 341 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 342 | ret = nvm_read(sw, offset, val, bytes); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 343 | mutex_unlock(&sw->tb->lock); |
| 344 | |
| 345 | out: |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 346 | pm_runtime_mark_last_busy(&sw->dev); |
| 347 | pm_runtime_put_autosuspend(&sw->dev); |
| 348 | |
| 349 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 350 | } |
| 351 | |
| 352 | static int tb_switch_nvm_write(void *priv, unsigned int offset, void *val, |
| 353 | size_t bytes) |
| 354 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 355 | struct tb_nvm *nvm = priv; |
| 356 | struct tb_switch *sw = tb_to_switch(nvm->dev); |
| 357 | int ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 358 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 359 | if (!mutex_trylock(&sw->tb->lock)) |
| 360 | return restart_syscall(); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 361 | |
| 362 | /* |
| 363 | * Since writing the NVM image might require some special steps, |
| 364 | * for example when CSS headers are written, we cache the image |
| 365 | * locally here and handle the special cases when the user asks |
| 366 | * us to authenticate the image. |
| 367 | */ |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 368 | ret = tb_nvm_write_buf(nvm, offset, val, bytes); |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 369 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 370 | |
| 371 | return ret; |
| 372 | } |
| 373 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 374 | static int tb_switch_nvm_add(struct tb_switch *sw) |
| 375 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 376 | struct tb_nvm *nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 377 | u32 val; |
| 378 | int ret; |
| 379 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 380 | if (!nvm_readable(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 381 | return 0; |
| 382 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 383 | /* |
| 384 | * The NVM format of non-Intel hardware is not known so |
| 385 | * currently restrict NVM upgrade for Intel hardware. We may |
| 386 | * relax this in the future when we learn other NVM formats. |
| 387 | */ |
Mika Westerberg | 83d1703 | 2020-05-08 11:49:47 +0300 | [diff] [blame] | 388 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL && |
| 389 | sw->config.vendor_id != 0x8087) { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 390 | dev_info(&sw->dev, |
| 391 | "NVM format of vendor %#x is not known, disabling NVM upgrade\n", |
| 392 | sw->config.vendor_id); |
| 393 | return 0; |
| 394 | } |
| 395 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 396 | nvm = tb_nvm_alloc(&sw->dev); |
| 397 | if (IS_ERR(nvm)) |
| 398 | return PTR_ERR(nvm); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 399 | |
| 400 | /* |
| 401 | * If the switch is in safe-mode the only accessible portion of |
| 402 | * the NVM is the non-active one where userspace is expected to |
| 403 | * write new functional NVM. |
| 404 | */ |
| 405 | if (!sw->safe_mode) { |
| 406 | u32 nvm_size, hdr_size; |
| 407 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 408 | ret = nvm_read(sw, NVM_FLASH_SIZE, &val, sizeof(val)); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 409 | if (ret) |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 410 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 411 | |
| 412 | hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K; |
| 413 | nvm_size = (SZ_1M << (val & 7)) / 8; |
| 414 | nvm_size = (nvm_size - hdr_size) / 2; |
| 415 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 416 | ret = nvm_read(sw, NVM_VERSION, &val, sizeof(val)); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 417 | if (ret) |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 418 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 419 | |
| 420 | nvm->major = val >> 16; |
| 421 | nvm->minor = val >> 8; |
| 422 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 423 | ret = tb_nvm_add_active(nvm, nvm_size, tb_switch_nvm_read); |
| 424 | if (ret) |
| 425 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 426 | } |
| 427 | |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 428 | if (!sw->no_nvm_upgrade) { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 429 | ret = tb_nvm_add_non_active(nvm, NVM_MAX_SIZE, |
| 430 | tb_switch_nvm_write); |
| 431 | if (ret) |
| 432 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 433 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 434 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 435 | sw->nvm = nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 436 | return 0; |
| 437 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 438 | err_nvm: |
| 439 | tb_nvm_free(nvm); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 440 | return ret; |
| 441 | } |
| 442 | |
| 443 | static void tb_switch_nvm_remove(struct tb_switch *sw) |
| 444 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 445 | struct tb_nvm *nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 446 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 447 | nvm = sw->nvm; |
| 448 | sw->nvm = NULL; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 449 | |
| 450 | if (!nvm) |
| 451 | return; |
| 452 | |
| 453 | /* Remove authentication status in case the switch is unplugged */ |
| 454 | if (!nvm->authenticating) |
| 455 | nvm_clear_auth_status(sw); |
| 456 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 457 | tb_nvm_free(nvm); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 458 | } |
| 459 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 460 | /* port utility functions */ |
| 461 | |
| 462 | static const char *tb_port_type(struct tb_regs_port_header *port) |
| 463 | { |
| 464 | switch (port->type >> 16) { |
| 465 | case 0: |
| 466 | switch ((u8) port->type) { |
| 467 | case 0: |
| 468 | return "Inactive"; |
| 469 | case 1: |
| 470 | return "Port"; |
| 471 | case 2: |
| 472 | return "NHI"; |
| 473 | default: |
| 474 | return "unknown"; |
| 475 | } |
| 476 | case 0x2: |
| 477 | return "Ethernet"; |
| 478 | case 0x8: |
| 479 | return "SATA"; |
| 480 | case 0xe: |
| 481 | return "DP/HDMI"; |
| 482 | case 0x10: |
| 483 | return "PCIe"; |
| 484 | case 0x20: |
| 485 | return "USB"; |
| 486 | default: |
| 487 | return "unknown"; |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | static void tb_dump_port(struct tb *tb, struct tb_regs_port_header *port) |
| 492 | { |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 493 | tb_dbg(tb, |
| 494 | " Port %d: %x:%x (Revision: %d, TB Version: %d, Type: %s (%#x))\n", |
| 495 | port->port_number, port->vendor_id, port->device_id, |
| 496 | port->revision, port->thunderbolt_version, tb_port_type(port), |
| 497 | port->type); |
| 498 | tb_dbg(tb, " Max hop id (in/out): %d/%d\n", |
| 499 | port->max_in_hop_id, port->max_out_hop_id); |
| 500 | tb_dbg(tb, " Max counters: %d\n", port->max_counters); |
| 501 | tb_dbg(tb, " NFC Credits: %#x\n", port->nfc_credits); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 502 | } |
| 503 | |
| 504 | /** |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 505 | * tb_port_state() - get connectedness state of a port |
Isaac Hazan | 5cc0df9 | 2020-09-24 11:44:01 +0300 | [diff] [blame] | 506 | * @port: the port to check |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 507 | * |
| 508 | * The port must have a TB_CAP_PHY (i.e. it should be a real port). |
| 509 | * |
| 510 | * Return: Returns an enum tb_port_state on success or an error code on failure. |
| 511 | */ |
Isaac Hazan | 5cc0df9 | 2020-09-24 11:44:01 +0300 | [diff] [blame] | 512 | int tb_port_state(struct tb_port *port) |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 513 | { |
| 514 | struct tb_cap_phy phy; |
| 515 | int res; |
| 516 | if (port->cap_phy == 0) { |
| 517 | tb_port_WARN(port, "does not have a PHY\n"); |
| 518 | return -EINVAL; |
| 519 | } |
| 520 | res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2); |
| 521 | if (res) |
| 522 | return res; |
| 523 | return phy.state; |
| 524 | } |
| 525 | |
| 526 | /** |
| 527 | * tb_wait_for_port() - wait for a port to become ready |
Mika Westerberg | 5c6b471 | 2021-01-28 13:51:03 +0300 | [diff] [blame^] | 528 | * @port: Port to wait |
| 529 | * @wait_if_unplugged: Wait also when port is unplugged |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 530 | * |
| 531 | * Wait up to 1 second for a port to reach state TB_PORT_UP. If |
| 532 | * wait_if_unplugged is set then we also wait if the port is in state |
| 533 | * TB_PORT_UNPLUGGED (it takes a while for the device to be registered after |
| 534 | * switch resume). Otherwise we only wait if a device is registered but the link |
| 535 | * has not yet been established. |
| 536 | * |
| 537 | * Return: Returns an error code on failure. Returns 0 if the port is not |
| 538 | * connected or failed to reach state TB_PORT_UP within one second. Returns 1 |
| 539 | * if the port is connected and in state TB_PORT_UP. |
| 540 | */ |
| 541 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged) |
| 542 | { |
| 543 | int retries = 10; |
| 544 | int state; |
| 545 | if (!port->cap_phy) { |
| 546 | tb_port_WARN(port, "does not have PHY\n"); |
| 547 | return -EINVAL; |
| 548 | } |
| 549 | if (tb_is_upstream_port(port)) { |
| 550 | tb_port_WARN(port, "is the upstream port\n"); |
| 551 | return -EINVAL; |
| 552 | } |
| 553 | |
| 554 | while (retries--) { |
| 555 | state = tb_port_state(port); |
| 556 | if (state < 0) |
| 557 | return state; |
| 558 | if (state == TB_PORT_DISABLED) { |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 559 | tb_port_dbg(port, "is disabled (state: 0)\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 560 | return 0; |
| 561 | } |
| 562 | if (state == TB_PORT_UNPLUGGED) { |
| 563 | if (wait_if_unplugged) { |
| 564 | /* used during resume */ |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 565 | tb_port_dbg(port, |
| 566 | "is unplugged (state: 7), retrying...\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 567 | msleep(100); |
| 568 | continue; |
| 569 | } |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 570 | tb_port_dbg(port, "is unplugged (state: 7)\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 571 | return 0; |
| 572 | } |
| 573 | if (state == TB_PORT_UP) { |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 574 | tb_port_dbg(port, "is connected, link is up (state: 2)\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 575 | return 1; |
| 576 | } |
| 577 | |
| 578 | /* |
| 579 | * After plug-in the state is TB_PORT_CONNECTING. Give it some |
| 580 | * time. |
| 581 | */ |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 582 | tb_port_dbg(port, |
| 583 | "is connected, link is not up (state: %d), retrying...\n", |
| 584 | state); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 585 | msleep(100); |
| 586 | } |
| 587 | tb_port_warn(port, |
| 588 | "failed to reach state TB_PORT_UP. Ignoring port...\n"); |
| 589 | return 0; |
| 590 | } |
| 591 | |
| 592 | /** |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 593 | * tb_port_add_nfc_credits() - add/remove non flow controlled credits to port |
Mika Westerberg | 5c6b471 | 2021-01-28 13:51:03 +0300 | [diff] [blame^] | 594 | * @port: Port to add/remove NFC credits |
| 595 | * @credits: Credits to add/remove |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 596 | * |
| 597 | * Change the number of NFC credits allocated to @port by @credits. To remove |
| 598 | * NFC credits pass a negative amount of credits. |
| 599 | * |
| 600 | * Return: Returns 0 on success or an error code on failure. |
| 601 | */ |
| 602 | int tb_port_add_nfc_credits(struct tb_port *port, int credits) |
| 603 | { |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 604 | u32 nfc_credits; |
| 605 | |
| 606 | if (credits == 0 || port->sw->is_unplugged) |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 607 | return 0; |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 608 | |
Mika Westerberg | edfbd68 | 2020-08-18 17:10:00 +0300 | [diff] [blame] | 609 | /* |
| 610 | * USB4 restricts programming NFC buffers to lane adapters only |
| 611 | * so skip other ports. |
| 612 | */ |
| 613 | if (tb_switch_is_usb4(port->sw) && !tb_port_is_null(port)) |
| 614 | return 0; |
| 615 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 616 | nfc_credits = port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK; |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 617 | nfc_credits += credits; |
| 618 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 619 | tb_port_dbg(port, "adding %d NFC credits to %lu", credits, |
| 620 | port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK); |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 621 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 622 | port->config.nfc_credits &= ~ADP_CS_4_NFC_BUFFERS_MASK; |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 623 | port->config.nfc_credits |= nfc_credits; |
| 624 | |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 625 | return tb_port_write(port, &port->config.nfc_credits, |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 626 | TB_CFG_PORT, ADP_CS_4, 1); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | /** |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 630 | * tb_port_set_initial_credits() - Set initial port link credits allocated |
| 631 | * @port: Port to set the initial credits |
| 632 | * @credits: Number of credits to to allocate |
| 633 | * |
| 634 | * Set initial credits value to be used for ingress shared buffering. |
| 635 | */ |
| 636 | int tb_port_set_initial_credits(struct tb_port *port, u32 credits) |
| 637 | { |
| 638 | u32 data; |
| 639 | int ret; |
| 640 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 641 | ret = tb_port_read(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 642 | if (ret) |
| 643 | return ret; |
| 644 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 645 | data &= ~ADP_CS_5_LCA_MASK; |
| 646 | data |= (credits << ADP_CS_5_LCA_SHIFT) & ADP_CS_5_LCA_MASK; |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 647 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 648 | return tb_port_write(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 649 | } |
| 650 | |
| 651 | /** |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 652 | * tb_port_clear_counter() - clear a counter in TB_CFG_COUNTER |
Mika Westerberg | 5c6b471 | 2021-01-28 13:51:03 +0300 | [diff] [blame^] | 653 | * @port: Port whose counters to clear |
| 654 | * @counter: Counter index to clear |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 655 | * |
| 656 | * Return: Returns 0 on success or an error code on failure. |
| 657 | */ |
| 658 | int tb_port_clear_counter(struct tb_port *port, int counter) |
| 659 | { |
| 660 | u32 zero[3] = { 0, 0, 0 }; |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 661 | tb_port_dbg(port, "clearing counter %d\n", counter); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 662 | return tb_port_write(port, zero, TB_CFG_COUNTERS, 3 * counter, 3); |
| 663 | } |
| 664 | |
| 665 | /** |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 666 | * tb_port_unlock() - Unlock downstream port |
| 667 | * @port: Port to unlock |
| 668 | * |
| 669 | * Needed for USB4 but can be called for any CIO/USB4 ports. Makes the |
| 670 | * downstream router accessible for CM. |
| 671 | */ |
| 672 | int tb_port_unlock(struct tb_port *port) |
| 673 | { |
| 674 | if (tb_switch_is_icm(port->sw)) |
| 675 | return 0; |
| 676 | if (!tb_port_is_null(port)) |
| 677 | return -EINVAL; |
| 678 | if (tb_switch_is_usb4(port->sw)) |
| 679 | return usb4_port_unlock(port); |
| 680 | return 0; |
| 681 | } |
| 682 | |
Mika Westerberg | 341d451 | 2020-02-21 12:11:54 +0200 | [diff] [blame] | 683 | static int __tb_port_enable(struct tb_port *port, bool enable) |
| 684 | { |
| 685 | int ret; |
| 686 | u32 phy; |
| 687 | |
| 688 | if (!tb_port_is_null(port)) |
| 689 | return -EINVAL; |
| 690 | |
| 691 | ret = tb_port_read(port, &phy, TB_CFG_PORT, |
| 692 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 693 | if (ret) |
| 694 | return ret; |
| 695 | |
| 696 | if (enable) |
| 697 | phy &= ~LANE_ADP_CS_1_LD; |
| 698 | else |
| 699 | phy |= LANE_ADP_CS_1_LD; |
| 700 | |
| 701 | return tb_port_write(port, &phy, TB_CFG_PORT, |
| 702 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 703 | } |
| 704 | |
| 705 | /** |
| 706 | * tb_port_enable() - Enable lane adapter |
| 707 | * @port: Port to enable (can be %NULL) |
| 708 | * |
| 709 | * This is used for lane 0 and 1 adapters to enable it. |
| 710 | */ |
| 711 | int tb_port_enable(struct tb_port *port) |
| 712 | { |
| 713 | return __tb_port_enable(port, true); |
| 714 | } |
| 715 | |
| 716 | /** |
| 717 | * tb_port_disable() - Disable lane adapter |
| 718 | * @port: Port to disable (can be %NULL) |
| 719 | * |
| 720 | * This is used for lane 0 and 1 adapters to disable it. |
| 721 | */ |
| 722 | int tb_port_disable(struct tb_port *port) |
| 723 | { |
| 724 | return __tb_port_enable(port, false); |
| 725 | } |
| 726 | |
Lee Jones | 47ba5ae | 2021-01-27 11:25:51 +0000 | [diff] [blame] | 727 | /* |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 728 | * tb_init_port() - initialize a port |
| 729 | * |
| 730 | * This is a helper method for tb_switch_alloc. Does not check or initialize |
| 731 | * any downstream switches. |
| 732 | * |
| 733 | * Return: Returns 0 on success or an error code on failure. |
| 734 | */ |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 735 | static int tb_init_port(struct tb_port *port) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 736 | { |
| 737 | int res; |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 738 | int cap; |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 739 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 740 | res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8); |
Mika Westerberg | d94dcbb | 2018-07-04 08:50:01 +0300 | [diff] [blame] | 741 | if (res) { |
| 742 | if (res == -ENODEV) { |
| 743 | tb_dbg(port->sw->tb, " Port %d: not implemented\n", |
| 744 | port->port); |
Nikunj A. Dadhania | 8824d19 | 2020-07-21 17:05:23 +0530 | [diff] [blame] | 745 | port->disabled = true; |
Mika Westerberg | d94dcbb | 2018-07-04 08:50:01 +0300 | [diff] [blame] | 746 | return 0; |
| 747 | } |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 748 | return res; |
Mika Westerberg | d94dcbb | 2018-07-04 08:50:01 +0300 | [diff] [blame] | 749 | } |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 750 | |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 751 | /* Port 0 is the switch itself and has no PHY. */ |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 752 | if (port->config.type == TB_TYPE_PORT && port->port != 0) { |
Mika Westerberg | da2da04 | 2017-06-06 15:24:58 +0300 | [diff] [blame] | 753 | cap = tb_port_find_cap(port, TB_PORT_CAP_PHY); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 754 | |
| 755 | if (cap > 0) |
| 756 | port->cap_phy = cap; |
| 757 | else |
| 758 | tb_port_WARN(port, "non switch port without a PHY\n"); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 759 | |
| 760 | cap = tb_port_find_cap(port, TB_PORT_CAP_USB4); |
| 761 | if (cap > 0) |
| 762 | port->cap_usb4 = cap; |
Mika Westerberg | 56183c8 | 2017-02-19 10:39:34 +0200 | [diff] [blame] | 763 | } else if (port->port != 0) { |
| 764 | cap = tb_port_find_cap(port, TB_PORT_CAP_ADAP); |
| 765 | if (cap > 0) |
| 766 | port->cap_adap = cap; |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 767 | } |
| 768 | |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 769 | tb_dump_port(port->sw->tb, &port->config); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 770 | |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 771 | /* Control port does not need HopID allocation */ |
| 772 | if (port->port) { |
| 773 | ida_init(&port->in_hopids); |
| 774 | ida_init(&port->out_hopids); |
| 775 | } |
| 776 | |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 777 | INIT_LIST_HEAD(&port->list); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 778 | return 0; |
| 779 | |
| 780 | } |
| 781 | |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 782 | static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid, |
| 783 | int max_hopid) |
| 784 | { |
| 785 | int port_max_hopid; |
| 786 | struct ida *ida; |
| 787 | |
| 788 | if (in) { |
| 789 | port_max_hopid = port->config.max_in_hop_id; |
| 790 | ida = &port->in_hopids; |
| 791 | } else { |
| 792 | port_max_hopid = port->config.max_out_hop_id; |
| 793 | ida = &port->out_hopids; |
| 794 | } |
| 795 | |
Mika Westerberg | 1267642 | 2020-06-01 12:47:07 +0300 | [diff] [blame] | 796 | /* |
| 797 | * NHI can use HopIDs 1-max for other adapters HopIDs 0-7 are |
| 798 | * reserved. |
| 799 | */ |
Mika Westerberg | a3cfebd | 2020-07-25 10:32:46 +0300 | [diff] [blame] | 800 | if (!tb_port_is_nhi(port) && min_hopid < TB_PATH_MIN_HOPID) |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 801 | min_hopid = TB_PATH_MIN_HOPID; |
| 802 | |
| 803 | if (max_hopid < 0 || max_hopid > port_max_hopid) |
| 804 | max_hopid = port_max_hopid; |
| 805 | |
| 806 | return ida_simple_get(ida, min_hopid, max_hopid + 1, GFP_KERNEL); |
| 807 | } |
| 808 | |
| 809 | /** |
| 810 | * tb_port_alloc_in_hopid() - Allocate input HopID from port |
| 811 | * @port: Port to allocate HopID for |
| 812 | * @min_hopid: Minimum acceptable input HopID |
| 813 | * @max_hopid: Maximum acceptable input HopID |
| 814 | * |
| 815 | * Return: HopID between @min_hopid and @max_hopid or negative errno in |
| 816 | * case of error. |
| 817 | */ |
| 818 | int tb_port_alloc_in_hopid(struct tb_port *port, int min_hopid, int max_hopid) |
| 819 | { |
| 820 | return tb_port_alloc_hopid(port, true, min_hopid, max_hopid); |
| 821 | } |
| 822 | |
| 823 | /** |
| 824 | * tb_port_alloc_out_hopid() - Allocate output HopID from port |
| 825 | * @port: Port to allocate HopID for |
| 826 | * @min_hopid: Minimum acceptable output HopID |
| 827 | * @max_hopid: Maximum acceptable output HopID |
| 828 | * |
| 829 | * Return: HopID between @min_hopid and @max_hopid or negative errno in |
| 830 | * case of error. |
| 831 | */ |
| 832 | int tb_port_alloc_out_hopid(struct tb_port *port, int min_hopid, int max_hopid) |
| 833 | { |
| 834 | return tb_port_alloc_hopid(port, false, min_hopid, max_hopid); |
| 835 | } |
| 836 | |
| 837 | /** |
| 838 | * tb_port_release_in_hopid() - Release allocated input HopID from port |
| 839 | * @port: Port whose HopID to release |
| 840 | * @hopid: HopID to release |
| 841 | */ |
| 842 | void tb_port_release_in_hopid(struct tb_port *port, int hopid) |
| 843 | { |
| 844 | ida_simple_remove(&port->in_hopids, hopid); |
| 845 | } |
| 846 | |
| 847 | /** |
| 848 | * tb_port_release_out_hopid() - Release allocated output HopID from port |
| 849 | * @port: Port whose HopID to release |
| 850 | * @hopid: HopID to release |
| 851 | */ |
| 852 | void tb_port_release_out_hopid(struct tb_port *port, int hopid) |
| 853 | { |
| 854 | ida_simple_remove(&port->out_hopids, hopid); |
| 855 | } |
| 856 | |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 857 | static inline bool tb_switch_is_reachable(const struct tb_switch *parent, |
| 858 | const struct tb_switch *sw) |
| 859 | { |
| 860 | u64 mask = (1ULL << parent->config.depth * 8) - 1; |
| 861 | return (tb_route(parent) & mask) == (tb_route(sw) & mask); |
| 862 | } |
| 863 | |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 864 | /** |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 865 | * tb_next_port_on_path() - Return next port for given port on a path |
| 866 | * @start: Start port of the walk |
| 867 | * @end: End port of the walk |
| 868 | * @prev: Previous port (%NULL if this is the first) |
| 869 | * |
| 870 | * This function can be used to walk from one port to another if they |
| 871 | * are connected through zero or more switches. If the @prev is dual |
| 872 | * link port, the function follows that link and returns another end on |
| 873 | * that same link. |
| 874 | * |
| 875 | * If the @end port has been reached, return %NULL. |
| 876 | * |
| 877 | * Domain tb->lock must be held when this function is called. |
| 878 | */ |
| 879 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, |
| 880 | struct tb_port *prev) |
| 881 | { |
| 882 | struct tb_port *next; |
| 883 | |
| 884 | if (!prev) |
| 885 | return start; |
| 886 | |
| 887 | if (prev->sw == end->sw) { |
| 888 | if (prev == end) |
| 889 | return NULL; |
| 890 | return end; |
| 891 | } |
| 892 | |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 893 | if (tb_switch_is_reachable(prev->sw, end->sw)) { |
| 894 | next = tb_port_at(tb_route(end->sw), prev->sw); |
| 895 | /* Walk down the topology if next == prev */ |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 896 | if (prev->remote && |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 897 | (next == prev || next->dual_link_port == prev)) |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 898 | next = prev->remote; |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 899 | } else { |
| 900 | if (tb_is_upstream_port(prev)) { |
| 901 | next = prev->remote; |
| 902 | } else { |
| 903 | next = tb_upstream_port(prev->sw); |
| 904 | /* |
| 905 | * Keep the same link if prev and next are both |
| 906 | * dual link ports. |
| 907 | */ |
| 908 | if (next->dual_link_port && |
| 909 | next->link_nr != prev->link_nr) { |
| 910 | next = next->dual_link_port; |
| 911 | } |
| 912 | } |
| 913 | } |
| 914 | |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 915 | return next != prev ? next : NULL; |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 916 | } |
| 917 | |
Mika Westerberg | 5b7b8c0 | 2020-05-08 12:41:34 +0300 | [diff] [blame] | 918 | /** |
| 919 | * tb_port_get_link_speed() - Get current link speed |
| 920 | * @port: Port to check (USB4 or CIO) |
| 921 | * |
| 922 | * Returns link speed in Gb/s or negative errno in case of failure. |
| 923 | */ |
| 924 | int tb_port_get_link_speed(struct tb_port *port) |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 925 | { |
| 926 | u32 val, speed; |
| 927 | int ret; |
| 928 | |
| 929 | if (!port->cap_phy) |
| 930 | return -EINVAL; |
| 931 | |
| 932 | ret = tb_port_read(port, &val, TB_CFG_PORT, |
| 933 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 934 | if (ret) |
| 935 | return ret; |
| 936 | |
| 937 | speed = (val & LANE_ADP_CS_1_CURRENT_SPEED_MASK) >> |
| 938 | LANE_ADP_CS_1_CURRENT_SPEED_SHIFT; |
| 939 | return speed == LANE_ADP_CS_1_CURRENT_SPEED_GEN3 ? 20 : 10; |
| 940 | } |
| 941 | |
Isaac Hazan | 4210d50 | 2020-09-24 11:43:58 +0300 | [diff] [blame] | 942 | /** |
| 943 | * tb_port_get_link_width() - Get current link width |
| 944 | * @port: Port to check (USB4 or CIO) |
| 945 | * |
| 946 | * Returns link width. Return values can be 1 (Single-Lane), 2 (Dual-Lane) |
| 947 | * or negative errno in case of failure. |
| 948 | */ |
| 949 | int tb_port_get_link_width(struct tb_port *port) |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 950 | { |
| 951 | u32 val; |
| 952 | int ret; |
| 953 | |
| 954 | if (!port->cap_phy) |
| 955 | return -EINVAL; |
| 956 | |
| 957 | ret = tb_port_read(port, &val, TB_CFG_PORT, |
| 958 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 959 | if (ret) |
| 960 | return ret; |
| 961 | |
| 962 | return (val & LANE_ADP_CS_1_CURRENT_WIDTH_MASK) >> |
| 963 | LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT; |
| 964 | } |
| 965 | |
| 966 | static bool tb_port_is_width_supported(struct tb_port *port, int width) |
| 967 | { |
| 968 | u32 phy, widths; |
| 969 | int ret; |
| 970 | |
| 971 | if (!port->cap_phy) |
| 972 | return false; |
| 973 | |
| 974 | ret = tb_port_read(port, &phy, TB_CFG_PORT, |
| 975 | port->cap_phy + LANE_ADP_CS_0, 1); |
| 976 | if (ret) |
Dan Carpenter | e9d0e75 | 2020-03-03 13:17:16 +0300 | [diff] [blame] | 977 | return false; |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 978 | |
| 979 | widths = (phy & LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK) >> |
| 980 | LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT; |
| 981 | |
| 982 | return !!(widths & width); |
| 983 | } |
| 984 | |
| 985 | static int tb_port_set_link_width(struct tb_port *port, unsigned int width) |
| 986 | { |
| 987 | u32 val; |
| 988 | int ret; |
| 989 | |
| 990 | if (!port->cap_phy) |
| 991 | return -EINVAL; |
| 992 | |
| 993 | ret = tb_port_read(port, &val, TB_CFG_PORT, |
| 994 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 995 | if (ret) |
| 996 | return ret; |
| 997 | |
| 998 | val &= ~LANE_ADP_CS_1_TARGET_WIDTH_MASK; |
| 999 | switch (width) { |
| 1000 | case 1: |
| 1001 | val |= LANE_ADP_CS_1_TARGET_WIDTH_SINGLE << |
| 1002 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; |
| 1003 | break; |
| 1004 | case 2: |
| 1005 | val |= LANE_ADP_CS_1_TARGET_WIDTH_DUAL << |
| 1006 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; |
| 1007 | break; |
| 1008 | default: |
| 1009 | return -EINVAL; |
| 1010 | } |
| 1011 | |
| 1012 | val |= LANE_ADP_CS_1_LB; |
| 1013 | |
| 1014 | return tb_port_write(port, &val, TB_CFG_PORT, |
| 1015 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 1016 | } |
| 1017 | |
Isaac Hazan | 5cc0df9 | 2020-09-24 11:44:01 +0300 | [diff] [blame] | 1018 | /** |
| 1019 | * tb_port_lane_bonding_enable() - Enable bonding on port |
| 1020 | * @port: port to enable |
| 1021 | * |
| 1022 | * Enable bonding by setting the link width of the port and the |
| 1023 | * other port in case of dual link port. |
| 1024 | * |
| 1025 | * Return: %0 in case of success and negative errno in case of error |
| 1026 | */ |
| 1027 | int tb_port_lane_bonding_enable(struct tb_port *port) |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1028 | { |
| 1029 | int ret; |
| 1030 | |
| 1031 | /* |
| 1032 | * Enable lane bonding for both links if not already enabled by |
| 1033 | * for example the boot firmware. |
| 1034 | */ |
| 1035 | ret = tb_port_get_link_width(port); |
| 1036 | if (ret == 1) { |
| 1037 | ret = tb_port_set_link_width(port, 2); |
| 1038 | if (ret) |
| 1039 | return ret; |
| 1040 | } |
| 1041 | |
| 1042 | ret = tb_port_get_link_width(port->dual_link_port); |
| 1043 | if (ret == 1) { |
| 1044 | ret = tb_port_set_link_width(port->dual_link_port, 2); |
| 1045 | if (ret) { |
| 1046 | tb_port_set_link_width(port, 1); |
| 1047 | return ret; |
| 1048 | } |
| 1049 | } |
| 1050 | |
| 1051 | port->bonded = true; |
| 1052 | port->dual_link_port->bonded = true; |
| 1053 | |
| 1054 | return 0; |
| 1055 | } |
| 1056 | |
Isaac Hazan | 5cc0df9 | 2020-09-24 11:44:01 +0300 | [diff] [blame] | 1057 | /** |
| 1058 | * tb_port_lane_bonding_disable() - Disable bonding on port |
| 1059 | * @port: port to disable |
| 1060 | * |
| 1061 | * Disable bonding by setting the link width of the port and the |
| 1062 | * other port in case of dual link port. |
| 1063 | * |
| 1064 | */ |
| 1065 | void tb_port_lane_bonding_disable(struct tb_port *port) |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1066 | { |
| 1067 | port->dual_link_port->bonded = false; |
| 1068 | port->bonded = false; |
| 1069 | |
| 1070 | tb_port_set_link_width(port->dual_link_port, 1); |
| 1071 | tb_port_set_link_width(port, 1); |
| 1072 | } |
| 1073 | |
Mika Westerberg | fdb0887 | 2020-11-26 12:52:43 +0300 | [diff] [blame] | 1074 | static int tb_port_start_lane_initialization(struct tb_port *port) |
| 1075 | { |
| 1076 | int ret; |
| 1077 | |
| 1078 | if (tb_switch_is_usb4(port->sw)) |
| 1079 | return 0; |
| 1080 | |
| 1081 | ret = tb_lc_start_lane_initialization(port); |
| 1082 | return ret == -EINVAL ? 0 : ret; |
| 1083 | } |
| 1084 | |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 1085 | /** |
Mika Westerberg | e78db6f | 2017-10-12 16:45:50 +0300 | [diff] [blame] | 1086 | * tb_port_is_enabled() - Is the adapter port enabled |
| 1087 | * @port: Port to check |
| 1088 | */ |
| 1089 | bool tb_port_is_enabled(struct tb_port *port) |
| 1090 | { |
| 1091 | switch (port->config.type) { |
| 1092 | case TB_TYPE_PCIE_UP: |
| 1093 | case TB_TYPE_PCIE_DOWN: |
| 1094 | return tb_pci_port_is_enabled(port); |
| 1095 | |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1096 | case TB_TYPE_DP_HDMI_IN: |
| 1097 | case TB_TYPE_DP_HDMI_OUT: |
| 1098 | return tb_dp_port_is_enabled(port); |
| 1099 | |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 1100 | case TB_TYPE_USB3_UP: |
| 1101 | case TB_TYPE_USB3_DOWN: |
| 1102 | return tb_usb3_port_is_enabled(port); |
| 1103 | |
Mika Westerberg | e78db6f | 2017-10-12 16:45:50 +0300 | [diff] [blame] | 1104 | default: |
| 1105 | return false; |
| 1106 | } |
| 1107 | } |
| 1108 | |
| 1109 | /** |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 1110 | * tb_usb3_port_is_enabled() - Is the USB3 adapter port enabled |
| 1111 | * @port: USB3 adapter port to check |
| 1112 | */ |
| 1113 | bool tb_usb3_port_is_enabled(struct tb_port *port) |
| 1114 | { |
| 1115 | u32 data; |
| 1116 | |
| 1117 | if (tb_port_read(port, &data, TB_CFG_PORT, |
| 1118 | port->cap_adap + ADP_USB3_CS_0, 1)) |
| 1119 | return false; |
| 1120 | |
| 1121 | return !!(data & ADP_USB3_CS_0_PE); |
| 1122 | } |
| 1123 | |
| 1124 | /** |
| 1125 | * tb_usb3_port_enable() - Enable USB3 adapter port |
| 1126 | * @port: USB3 adapter port to enable |
| 1127 | * @enable: Enable/disable the USB3 adapter |
| 1128 | */ |
| 1129 | int tb_usb3_port_enable(struct tb_port *port, bool enable) |
| 1130 | { |
| 1131 | u32 word = enable ? (ADP_USB3_CS_0_PE | ADP_USB3_CS_0_V) |
| 1132 | : ADP_USB3_CS_0_V; |
| 1133 | |
| 1134 | if (!port->cap_adap) |
| 1135 | return -ENXIO; |
| 1136 | return tb_port_write(port, &word, TB_CFG_PORT, |
| 1137 | port->cap_adap + ADP_USB3_CS_0, 1); |
| 1138 | } |
| 1139 | |
| 1140 | /** |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1141 | * tb_pci_port_is_enabled() - Is the PCIe adapter port enabled |
| 1142 | * @port: PCIe port to check |
| 1143 | */ |
| 1144 | bool tb_pci_port_is_enabled(struct tb_port *port) |
| 1145 | { |
| 1146 | u32 data; |
| 1147 | |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1148 | if (tb_port_read(port, &data, TB_CFG_PORT, |
| 1149 | port->cap_adap + ADP_PCIE_CS_0, 1)) |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1150 | return false; |
| 1151 | |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1152 | return !!(data & ADP_PCIE_CS_0_PE); |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1153 | } |
| 1154 | |
| 1155 | /** |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1156 | * tb_pci_port_enable() - Enable PCIe adapter port |
| 1157 | * @port: PCIe port to enable |
| 1158 | * @enable: Enable/disable the PCIe adapter |
| 1159 | */ |
| 1160 | int tb_pci_port_enable(struct tb_port *port, bool enable) |
| 1161 | { |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1162 | u32 word = enable ? ADP_PCIE_CS_0_PE : 0x0; |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1163 | if (!port->cap_adap) |
| 1164 | return -ENXIO; |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1165 | return tb_port_write(port, &word, TB_CFG_PORT, |
| 1166 | port->cap_adap + ADP_PCIE_CS_0, 1); |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1167 | } |
| 1168 | |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1169 | /** |
| 1170 | * tb_dp_port_hpd_is_active() - Is HPD already active |
| 1171 | * @port: DP out port to check |
| 1172 | * |
| 1173 | * Checks if the DP OUT adapter port has HDP bit already set. |
| 1174 | */ |
| 1175 | int tb_dp_port_hpd_is_active(struct tb_port *port) |
| 1176 | { |
| 1177 | u32 data; |
| 1178 | int ret; |
| 1179 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1180 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
| 1181 | port->cap_adap + ADP_DP_CS_2, 1); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1182 | if (ret) |
| 1183 | return ret; |
| 1184 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1185 | return !!(data & ADP_DP_CS_2_HDP); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1186 | } |
| 1187 | |
| 1188 | /** |
| 1189 | * tb_dp_port_hpd_clear() - Clear HPD from DP IN port |
| 1190 | * @port: Port to clear HPD |
| 1191 | * |
| 1192 | * If the DP IN port has HDP set, this function can be used to clear it. |
| 1193 | */ |
| 1194 | int tb_dp_port_hpd_clear(struct tb_port *port) |
| 1195 | { |
| 1196 | u32 data; |
| 1197 | int ret; |
| 1198 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1199 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
| 1200 | port->cap_adap + ADP_DP_CS_3, 1); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1201 | if (ret) |
| 1202 | return ret; |
| 1203 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1204 | data |= ADP_DP_CS_3_HDPC; |
| 1205 | return tb_port_write(port, &data, TB_CFG_PORT, |
| 1206 | port->cap_adap + ADP_DP_CS_3, 1); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1207 | } |
| 1208 | |
| 1209 | /** |
| 1210 | * tb_dp_port_set_hops() - Set video/aux Hop IDs for DP port |
| 1211 | * @port: DP IN/OUT port to set hops |
| 1212 | * @video: Video Hop ID |
| 1213 | * @aux_tx: AUX TX Hop ID |
| 1214 | * @aux_rx: AUX RX Hop ID |
| 1215 | * |
| 1216 | * Programs specified Hop IDs for DP IN/OUT port. |
| 1217 | */ |
| 1218 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, |
| 1219 | unsigned int aux_tx, unsigned int aux_rx) |
| 1220 | { |
| 1221 | u32 data[2]; |
| 1222 | int ret; |
| 1223 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1224 | ret = tb_port_read(port, data, TB_CFG_PORT, |
| 1225 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1226 | if (ret) |
| 1227 | return ret; |
| 1228 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1229 | data[0] &= ~ADP_DP_CS_0_VIDEO_HOPID_MASK; |
| 1230 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; |
| 1231 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1232 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1233 | data[0] |= (video << ADP_DP_CS_0_VIDEO_HOPID_SHIFT) & |
| 1234 | ADP_DP_CS_0_VIDEO_HOPID_MASK; |
| 1235 | data[1] |= aux_tx & ADP_DP_CS_1_AUX_TX_HOPID_MASK; |
| 1236 | data[1] |= (aux_rx << ADP_DP_CS_1_AUX_RX_HOPID_SHIFT) & |
| 1237 | ADP_DP_CS_1_AUX_RX_HOPID_MASK; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1238 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1239 | return tb_port_write(port, data, TB_CFG_PORT, |
| 1240 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1241 | } |
| 1242 | |
| 1243 | /** |
| 1244 | * tb_dp_port_is_enabled() - Is DP adapter port enabled |
| 1245 | * @port: DP adapter port to check |
| 1246 | */ |
| 1247 | bool tb_dp_port_is_enabled(struct tb_port *port) |
| 1248 | { |
Mika Westerberg | fd5c46b | 2019-09-19 14:55:23 +0300 | [diff] [blame] | 1249 | u32 data[2]; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1250 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1251 | if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap + ADP_DP_CS_0, |
Mika Westerberg | fd5c46b | 2019-09-19 14:55:23 +0300 | [diff] [blame] | 1252 | ARRAY_SIZE(data))) |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1253 | return false; |
| 1254 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1255 | return !!(data[0] & (ADP_DP_CS_0_VE | ADP_DP_CS_0_AE)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1256 | } |
| 1257 | |
| 1258 | /** |
| 1259 | * tb_dp_port_enable() - Enables/disables DP paths of a port |
| 1260 | * @port: DP IN/OUT port |
| 1261 | * @enable: Enable/disable DP path |
| 1262 | * |
| 1263 | * Once Hop IDs are programmed DP paths can be enabled or disabled by |
| 1264 | * calling this function. |
| 1265 | */ |
| 1266 | int tb_dp_port_enable(struct tb_port *port, bool enable) |
| 1267 | { |
Mika Westerberg | fd5c46b | 2019-09-19 14:55:23 +0300 | [diff] [blame] | 1268 | u32 data[2]; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1269 | int ret; |
| 1270 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1271 | ret = tb_port_read(port, data, TB_CFG_PORT, |
| 1272 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1273 | if (ret) |
| 1274 | return ret; |
| 1275 | |
| 1276 | if (enable) |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1277 | data[0] |= ADP_DP_CS_0_VE | ADP_DP_CS_0_AE; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1278 | else |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1279 | data[0] &= ~(ADP_DP_CS_0_VE | ADP_DP_CS_0_AE); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1280 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1281 | return tb_port_write(port, data, TB_CFG_PORT, |
| 1282 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1283 | } |
| 1284 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1285 | /* switch utility functions */ |
| 1286 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1287 | static const char *tb_switch_generation_name(const struct tb_switch *sw) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1288 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1289 | switch (sw->generation) { |
| 1290 | case 1: |
| 1291 | return "Thunderbolt 1"; |
| 1292 | case 2: |
| 1293 | return "Thunderbolt 2"; |
| 1294 | case 3: |
| 1295 | return "Thunderbolt 3"; |
| 1296 | case 4: |
| 1297 | return "USB4"; |
| 1298 | default: |
| 1299 | return "Unknown"; |
| 1300 | } |
| 1301 | } |
| 1302 | |
| 1303 | static void tb_dump_switch(const struct tb *tb, const struct tb_switch *sw) |
| 1304 | { |
| 1305 | const struct tb_regs_switch_header *regs = &sw->config; |
| 1306 | |
| 1307 | tb_dbg(tb, " %s Switch: %x:%x (Revision: %d, TB Version: %d)\n", |
| 1308 | tb_switch_generation_name(sw), regs->vendor_id, regs->device_id, |
| 1309 | regs->revision, regs->thunderbolt_version); |
| 1310 | tb_dbg(tb, " Max Port Number: %d\n", regs->max_port_number); |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1311 | tb_dbg(tb, " Config:\n"); |
| 1312 | tb_dbg(tb, |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1313 | " Upstream Port Number: %d Depth: %d Route String: %#llx Enabled: %d, PlugEventsDelay: %dms\n", |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1314 | regs->upstream_port_number, regs->depth, |
| 1315 | (((u64) regs->route_hi) << 32) | regs->route_lo, |
| 1316 | regs->enabled, regs->plug_events_delay); |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1317 | tb_dbg(tb, " unknown1: %#x unknown4: %#x\n", |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1318 | regs->__unknown1, regs->__unknown4); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1319 | } |
| 1320 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1321 | /** |
Lee Jones | 2c2a232 | 2021-01-27 11:25:54 +0000 | [diff] [blame] | 1322 | * tb_switch_reset() - reconfigure route, enable and send TB_CFG_PKG_RESET |
Mika Westerberg | 356b6c4 | 2019-09-19 15:25:30 +0300 | [diff] [blame] | 1323 | * @sw: Switch to reset |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1324 | * |
| 1325 | * Return: Returns 0 on success or an error code on failure. |
| 1326 | */ |
Mika Westerberg | 356b6c4 | 2019-09-19 15:25:30 +0300 | [diff] [blame] | 1327 | int tb_switch_reset(struct tb_switch *sw) |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1328 | { |
| 1329 | struct tb_cfg_result res; |
Mika Westerberg | 356b6c4 | 2019-09-19 15:25:30 +0300 | [diff] [blame] | 1330 | |
| 1331 | if (sw->generation > 1) |
| 1332 | return 0; |
| 1333 | |
| 1334 | tb_sw_dbg(sw, "resetting switch\n"); |
| 1335 | |
| 1336 | res.err = tb_sw_write(sw, ((u32 *) &sw->config) + 2, |
| 1337 | TB_CFG_SWITCH, 2, 2); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1338 | if (res.err) |
| 1339 | return res.err; |
Mika Westerberg | 356b6c4 | 2019-09-19 15:25:30 +0300 | [diff] [blame] | 1340 | res = tb_cfg_reset(sw->tb->ctl, tb_route(sw), TB_CFG_DEFAULT_TIMEOUT); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1341 | if (res.err > 0) |
| 1342 | return -EIO; |
| 1343 | return res.err; |
| 1344 | } |
| 1345 | |
Lee Jones | 47ba5ae | 2021-01-27 11:25:51 +0000 | [diff] [blame] | 1346 | /* |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1347 | * tb_plug_events_active() - enable/disable plug events on a switch |
| 1348 | * |
| 1349 | * Also configures a sane plug_events_delay of 255ms. |
| 1350 | * |
| 1351 | * Return: Returns 0 on success or an error code on failure. |
| 1352 | */ |
| 1353 | static int tb_plug_events_active(struct tb_switch *sw, bool active) |
| 1354 | { |
| 1355 | u32 data; |
| 1356 | int res; |
| 1357 | |
Mika Westerberg | 5cb6ed31 | 2020-04-02 12:24:48 +0300 | [diff] [blame] | 1358 | if (tb_switch_is_icm(sw) || tb_switch_is_usb4(sw)) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1359 | return 0; |
| 1360 | |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1361 | sw->config.plug_events_delay = 0xff; |
| 1362 | res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); |
| 1363 | if (res) |
| 1364 | return res; |
| 1365 | |
| 1366 | res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); |
| 1367 | if (res) |
| 1368 | return res; |
| 1369 | |
| 1370 | if (active) { |
| 1371 | data = data & 0xFFFFFF83; |
| 1372 | switch (sw->config.device_id) { |
Lukas Wunner | 1d11140 | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 1373 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
| 1374 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: |
| 1375 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1376 | break; |
| 1377 | default: |
| 1378 | data |= 4; |
| 1379 | } |
| 1380 | } else { |
| 1381 | data = data | 0x7c; |
| 1382 | } |
| 1383 | return tb_sw_write(sw, &data, TB_CFG_SWITCH, |
| 1384 | sw->cap_plug_events + 1, 1); |
| 1385 | } |
| 1386 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1387 | static ssize_t authorized_show(struct device *dev, |
| 1388 | struct device_attribute *attr, |
| 1389 | char *buf) |
| 1390 | { |
| 1391 | struct tb_switch *sw = tb_to_switch(dev); |
| 1392 | |
| 1393 | return sprintf(buf, "%u\n", sw->authorized); |
| 1394 | } |
| 1395 | |
Mika Westerberg | 3da88be | 2020-11-10 11:47:14 +0300 | [diff] [blame] | 1396 | static int disapprove_switch(struct device *dev, void *not_used) |
| 1397 | { |
| 1398 | struct tb_switch *sw; |
| 1399 | |
| 1400 | sw = tb_to_switch(dev); |
| 1401 | if (sw && sw->authorized) { |
| 1402 | int ret; |
| 1403 | |
| 1404 | /* First children */ |
| 1405 | ret = device_for_each_child_reverse(&sw->dev, NULL, disapprove_switch); |
| 1406 | if (ret) |
| 1407 | return ret; |
| 1408 | |
| 1409 | ret = tb_domain_disapprove_switch(sw->tb, sw); |
| 1410 | if (ret) |
| 1411 | return ret; |
| 1412 | |
| 1413 | sw->authorized = 0; |
| 1414 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); |
| 1415 | } |
| 1416 | |
| 1417 | return 0; |
| 1418 | } |
| 1419 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1420 | static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) |
| 1421 | { |
| 1422 | int ret = -EINVAL; |
| 1423 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1424 | if (!mutex_trylock(&sw->tb->lock)) |
| 1425 | return restart_syscall(); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1426 | |
Mika Westerberg | 3da88be | 2020-11-10 11:47:14 +0300 | [diff] [blame] | 1427 | if (!!sw->authorized == !!val) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1428 | goto unlock; |
| 1429 | |
| 1430 | switch (val) { |
Mika Westerberg | 3da88be | 2020-11-10 11:47:14 +0300 | [diff] [blame] | 1431 | /* Disapprove switch */ |
| 1432 | case 0: |
| 1433 | if (tb_route(sw)) { |
| 1434 | ret = disapprove_switch(&sw->dev, NULL); |
| 1435 | goto unlock; |
| 1436 | } |
| 1437 | break; |
| 1438 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1439 | /* Approve switch */ |
| 1440 | case 1: |
| 1441 | if (sw->key) |
| 1442 | ret = tb_domain_approve_switch_key(sw->tb, sw); |
| 1443 | else |
| 1444 | ret = tb_domain_approve_switch(sw->tb, sw); |
| 1445 | break; |
| 1446 | |
| 1447 | /* Challenge switch */ |
| 1448 | case 2: |
| 1449 | if (sw->key) |
| 1450 | ret = tb_domain_challenge_switch_key(sw->tb, sw); |
| 1451 | break; |
| 1452 | |
| 1453 | default: |
| 1454 | break; |
| 1455 | } |
| 1456 | |
| 1457 | if (!ret) { |
| 1458 | sw->authorized = val; |
| 1459 | /* Notify status change to the userspace */ |
| 1460 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); |
| 1461 | } |
| 1462 | |
| 1463 | unlock: |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1464 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1465 | return ret; |
| 1466 | } |
| 1467 | |
| 1468 | static ssize_t authorized_store(struct device *dev, |
| 1469 | struct device_attribute *attr, |
| 1470 | const char *buf, size_t count) |
| 1471 | { |
| 1472 | struct tb_switch *sw = tb_to_switch(dev); |
| 1473 | unsigned int val; |
| 1474 | ssize_t ret; |
| 1475 | |
| 1476 | ret = kstrtouint(buf, 0, &val); |
| 1477 | if (ret) |
| 1478 | return ret; |
| 1479 | if (val > 2) |
| 1480 | return -EINVAL; |
| 1481 | |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1482 | pm_runtime_get_sync(&sw->dev); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1483 | ret = tb_switch_set_authorized(sw, val); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1484 | pm_runtime_mark_last_busy(&sw->dev); |
| 1485 | pm_runtime_put_autosuspend(&sw->dev); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1486 | |
| 1487 | return ret ? ret : count; |
| 1488 | } |
| 1489 | static DEVICE_ATTR_RW(authorized); |
| 1490 | |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 1491 | static ssize_t boot_show(struct device *dev, struct device_attribute *attr, |
| 1492 | char *buf) |
| 1493 | { |
| 1494 | struct tb_switch *sw = tb_to_switch(dev); |
| 1495 | |
| 1496 | return sprintf(buf, "%u\n", sw->boot); |
| 1497 | } |
| 1498 | static DEVICE_ATTR_RO(boot); |
| 1499 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1500 | static ssize_t device_show(struct device *dev, struct device_attribute *attr, |
| 1501 | char *buf) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1502 | { |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1503 | struct tb_switch *sw = tb_to_switch(dev); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1504 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1505 | return sprintf(buf, "%#x\n", sw->device); |
| 1506 | } |
| 1507 | static DEVICE_ATTR_RO(device); |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1508 | |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1509 | static ssize_t |
| 1510 | device_name_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1511 | { |
| 1512 | struct tb_switch *sw = tb_to_switch(dev); |
| 1513 | |
| 1514 | return sprintf(buf, "%s\n", sw->device_name ? sw->device_name : ""); |
| 1515 | } |
| 1516 | static DEVICE_ATTR_RO(device_name); |
| 1517 | |
Christian Kellner | b406357 | 2019-10-03 19:32:40 +0200 | [diff] [blame] | 1518 | static ssize_t |
| 1519 | generation_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1520 | { |
| 1521 | struct tb_switch *sw = tb_to_switch(dev); |
| 1522 | |
| 1523 | return sprintf(buf, "%u\n", sw->generation); |
| 1524 | } |
| 1525 | static DEVICE_ATTR_RO(generation); |
| 1526 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1527 | static ssize_t key_show(struct device *dev, struct device_attribute *attr, |
| 1528 | char *buf) |
| 1529 | { |
| 1530 | struct tb_switch *sw = tb_to_switch(dev); |
| 1531 | ssize_t ret; |
| 1532 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1533 | if (!mutex_trylock(&sw->tb->lock)) |
| 1534 | return restart_syscall(); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1535 | |
| 1536 | if (sw->key) |
| 1537 | ret = sprintf(buf, "%*phN\n", TB_SWITCH_KEY_SIZE, sw->key); |
| 1538 | else |
| 1539 | ret = sprintf(buf, "\n"); |
| 1540 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1541 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1542 | return ret; |
| 1543 | } |
| 1544 | |
| 1545 | static ssize_t key_store(struct device *dev, struct device_attribute *attr, |
| 1546 | const char *buf, size_t count) |
| 1547 | { |
| 1548 | struct tb_switch *sw = tb_to_switch(dev); |
| 1549 | u8 key[TB_SWITCH_KEY_SIZE]; |
| 1550 | ssize_t ret = count; |
Bernat, Yehezkel | e545f0d | 2017-08-15 08:19:20 +0300 | [diff] [blame] | 1551 | bool clear = false; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1552 | |
Bernat, Yehezkel | e545f0d | 2017-08-15 08:19:20 +0300 | [diff] [blame] | 1553 | if (!strcmp(buf, "\n")) |
| 1554 | clear = true; |
| 1555 | else if (hex2bin(key, buf, sizeof(key))) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1556 | return -EINVAL; |
| 1557 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1558 | if (!mutex_trylock(&sw->tb->lock)) |
| 1559 | return restart_syscall(); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1560 | |
| 1561 | if (sw->authorized) { |
| 1562 | ret = -EBUSY; |
| 1563 | } else { |
| 1564 | kfree(sw->key); |
Bernat, Yehezkel | e545f0d | 2017-08-15 08:19:20 +0300 | [diff] [blame] | 1565 | if (clear) { |
| 1566 | sw->key = NULL; |
| 1567 | } else { |
| 1568 | sw->key = kmemdup(key, sizeof(key), GFP_KERNEL); |
| 1569 | if (!sw->key) |
| 1570 | ret = -ENOMEM; |
| 1571 | } |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1572 | } |
| 1573 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1574 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1575 | return ret; |
| 1576 | } |
Bernat, Yehezkel | 0956e41 | 2017-08-15 08:19:12 +0300 | [diff] [blame] | 1577 | static DEVICE_ATTR(key, 0600, key_show, key_store); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1578 | |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1579 | static ssize_t speed_show(struct device *dev, struct device_attribute *attr, |
| 1580 | char *buf) |
| 1581 | { |
| 1582 | struct tb_switch *sw = tb_to_switch(dev); |
| 1583 | |
| 1584 | return sprintf(buf, "%u.0 Gb/s\n", sw->link_speed); |
| 1585 | } |
| 1586 | |
| 1587 | /* |
| 1588 | * Currently all lanes must run at the same speed but we expose here |
| 1589 | * both directions to allow possible asymmetric links in the future. |
| 1590 | */ |
| 1591 | static DEVICE_ATTR(rx_speed, 0444, speed_show, NULL); |
| 1592 | static DEVICE_ATTR(tx_speed, 0444, speed_show, NULL); |
| 1593 | |
| 1594 | static ssize_t lanes_show(struct device *dev, struct device_attribute *attr, |
| 1595 | char *buf) |
| 1596 | { |
| 1597 | struct tb_switch *sw = tb_to_switch(dev); |
| 1598 | |
| 1599 | return sprintf(buf, "%u\n", sw->link_width); |
| 1600 | } |
| 1601 | |
| 1602 | /* |
| 1603 | * Currently link has same amount of lanes both directions (1 or 2) but |
| 1604 | * expose them separately to allow possible asymmetric links in the future. |
| 1605 | */ |
| 1606 | static DEVICE_ATTR(rx_lanes, 0444, lanes_show, NULL); |
| 1607 | static DEVICE_ATTR(tx_lanes, 0444, lanes_show, NULL); |
| 1608 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1609 | static ssize_t nvm_authenticate_show(struct device *dev, |
| 1610 | struct device_attribute *attr, char *buf) |
| 1611 | { |
| 1612 | struct tb_switch *sw = tb_to_switch(dev); |
| 1613 | u32 status; |
| 1614 | |
| 1615 | nvm_get_auth_status(sw, &status); |
| 1616 | return sprintf(buf, "%#x\n", status); |
| 1617 | } |
| 1618 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1619 | static ssize_t nvm_authenticate_sysfs(struct device *dev, const char *buf, |
| 1620 | bool disconnect) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1621 | { |
| 1622 | struct tb_switch *sw = tb_to_switch(dev); |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1623 | int val; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1624 | int ret; |
| 1625 | |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1626 | pm_runtime_get_sync(&sw->dev); |
| 1627 | |
| 1628 | if (!mutex_trylock(&sw->tb->lock)) { |
| 1629 | ret = restart_syscall(); |
| 1630 | goto exit_rpm; |
| 1631 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1632 | |
| 1633 | /* If NVMem devices are not yet added */ |
| 1634 | if (!sw->nvm) { |
| 1635 | ret = -EAGAIN; |
| 1636 | goto exit_unlock; |
| 1637 | } |
| 1638 | |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1639 | ret = kstrtoint(buf, 10, &val); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1640 | if (ret) |
| 1641 | goto exit_unlock; |
| 1642 | |
| 1643 | /* Always clear the authentication status */ |
| 1644 | nvm_clear_auth_status(sw); |
| 1645 | |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1646 | if (val > 0) { |
| 1647 | if (!sw->nvm->flushed) { |
| 1648 | if (!sw->nvm->buf) { |
| 1649 | ret = -EINVAL; |
| 1650 | goto exit_unlock; |
| 1651 | } |
| 1652 | |
| 1653 | ret = nvm_validate_and_write(sw); |
| 1654 | if (ret || val == WRITE_ONLY) |
| 1655 | goto exit_unlock; |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1656 | } |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1657 | if (val == WRITE_AND_AUTHENTICATE) { |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1658 | if (disconnect) { |
| 1659 | ret = tb_lc_force_power(sw); |
| 1660 | } else { |
| 1661 | sw->nvm->authenticating = true; |
| 1662 | ret = nvm_authenticate(sw); |
| 1663 | } |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1664 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1665 | } |
| 1666 | |
| 1667 | exit_unlock: |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1668 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1669 | exit_rpm: |
| 1670 | pm_runtime_mark_last_busy(&sw->dev); |
| 1671 | pm_runtime_put_autosuspend(&sw->dev); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1672 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1673 | return ret; |
| 1674 | } |
| 1675 | |
| 1676 | static ssize_t nvm_authenticate_store(struct device *dev, |
| 1677 | struct device_attribute *attr, const char *buf, size_t count) |
| 1678 | { |
| 1679 | int ret = nvm_authenticate_sysfs(dev, buf, false); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1680 | if (ret) |
| 1681 | return ret; |
| 1682 | return count; |
| 1683 | } |
| 1684 | static DEVICE_ATTR_RW(nvm_authenticate); |
| 1685 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1686 | static ssize_t nvm_authenticate_on_disconnect_show(struct device *dev, |
| 1687 | struct device_attribute *attr, char *buf) |
| 1688 | { |
| 1689 | return nvm_authenticate_show(dev, attr, buf); |
| 1690 | } |
| 1691 | |
| 1692 | static ssize_t nvm_authenticate_on_disconnect_store(struct device *dev, |
| 1693 | struct device_attribute *attr, const char *buf, size_t count) |
| 1694 | { |
| 1695 | int ret; |
| 1696 | |
| 1697 | ret = nvm_authenticate_sysfs(dev, buf, true); |
| 1698 | return ret ? ret : count; |
| 1699 | } |
| 1700 | static DEVICE_ATTR_RW(nvm_authenticate_on_disconnect); |
| 1701 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1702 | static ssize_t nvm_version_show(struct device *dev, |
| 1703 | struct device_attribute *attr, char *buf) |
| 1704 | { |
| 1705 | struct tb_switch *sw = tb_to_switch(dev); |
| 1706 | int ret; |
| 1707 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1708 | if (!mutex_trylock(&sw->tb->lock)) |
| 1709 | return restart_syscall(); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1710 | |
| 1711 | if (sw->safe_mode) |
| 1712 | ret = -ENODATA; |
| 1713 | else if (!sw->nvm) |
| 1714 | ret = -EAGAIN; |
| 1715 | else |
| 1716 | ret = sprintf(buf, "%x.%x\n", sw->nvm->major, sw->nvm->minor); |
| 1717 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1718 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1719 | |
| 1720 | return ret; |
| 1721 | } |
| 1722 | static DEVICE_ATTR_RO(nvm_version); |
| 1723 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1724 | static ssize_t vendor_show(struct device *dev, struct device_attribute *attr, |
| 1725 | char *buf) |
| 1726 | { |
| 1727 | struct tb_switch *sw = tb_to_switch(dev); |
| 1728 | |
| 1729 | return sprintf(buf, "%#x\n", sw->vendor); |
| 1730 | } |
| 1731 | static DEVICE_ATTR_RO(vendor); |
| 1732 | |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1733 | static ssize_t |
| 1734 | vendor_name_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1735 | { |
| 1736 | struct tb_switch *sw = tb_to_switch(dev); |
| 1737 | |
| 1738 | return sprintf(buf, "%s\n", sw->vendor_name ? sw->vendor_name : ""); |
| 1739 | } |
| 1740 | static DEVICE_ATTR_RO(vendor_name); |
| 1741 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1742 | static ssize_t unique_id_show(struct device *dev, struct device_attribute *attr, |
| 1743 | char *buf) |
| 1744 | { |
| 1745 | struct tb_switch *sw = tb_to_switch(dev); |
| 1746 | |
| 1747 | return sprintf(buf, "%pUb\n", sw->uuid); |
| 1748 | } |
| 1749 | static DEVICE_ATTR_RO(unique_id); |
| 1750 | |
| 1751 | static struct attribute *switch_attrs[] = { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1752 | &dev_attr_authorized.attr, |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 1753 | &dev_attr_boot.attr, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1754 | &dev_attr_device.attr, |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1755 | &dev_attr_device_name.attr, |
Christian Kellner | b406357 | 2019-10-03 19:32:40 +0200 | [diff] [blame] | 1756 | &dev_attr_generation.attr, |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1757 | &dev_attr_key.attr, |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1758 | &dev_attr_nvm_authenticate.attr, |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1759 | &dev_attr_nvm_authenticate_on_disconnect.attr, |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1760 | &dev_attr_nvm_version.attr, |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1761 | &dev_attr_rx_speed.attr, |
| 1762 | &dev_attr_rx_lanes.attr, |
| 1763 | &dev_attr_tx_speed.attr, |
| 1764 | &dev_attr_tx_lanes.attr, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1765 | &dev_attr_vendor.attr, |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1766 | &dev_attr_vendor_name.attr, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1767 | &dev_attr_unique_id.attr, |
| 1768 | NULL, |
| 1769 | }; |
| 1770 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1771 | static umode_t switch_attr_is_visible(struct kobject *kobj, |
| 1772 | struct attribute *attr, int n) |
| 1773 | { |
Tian Tao | fff15f2 | 2020-09-01 16:27:17 +0800 | [diff] [blame] | 1774 | struct device *dev = kobj_to_dev(kobj); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1775 | struct tb_switch *sw = tb_to_switch(dev); |
| 1776 | |
Mika Westerberg | 58f414f | 2018-09-11 15:34:23 +0300 | [diff] [blame] | 1777 | if (attr == &dev_attr_device.attr) { |
| 1778 | if (!sw->device) |
| 1779 | return 0; |
| 1780 | } else if (attr == &dev_attr_device_name.attr) { |
| 1781 | if (!sw->device_name) |
| 1782 | return 0; |
| 1783 | } else if (attr == &dev_attr_vendor.attr) { |
| 1784 | if (!sw->vendor) |
| 1785 | return 0; |
| 1786 | } else if (attr == &dev_attr_vendor_name.attr) { |
| 1787 | if (!sw->vendor_name) |
| 1788 | return 0; |
| 1789 | } else if (attr == &dev_attr_key.attr) { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1790 | if (tb_route(sw) && |
| 1791 | sw->tb->security_level == TB_SECURITY_SECURE && |
| 1792 | sw->security_level == TB_SECURITY_SECURE) |
| 1793 | return attr->mode; |
| 1794 | return 0; |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1795 | } else if (attr == &dev_attr_rx_speed.attr || |
| 1796 | attr == &dev_attr_rx_lanes.attr || |
| 1797 | attr == &dev_attr_tx_speed.attr || |
| 1798 | attr == &dev_attr_tx_lanes.attr) { |
| 1799 | if (tb_route(sw)) |
| 1800 | return attr->mode; |
| 1801 | return 0; |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 1802 | } else if (attr == &dev_attr_nvm_authenticate.attr) { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1803 | if (nvm_upgradeable(sw)) |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 1804 | return attr->mode; |
| 1805 | return 0; |
| 1806 | } else if (attr == &dev_attr_nvm_version.attr) { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1807 | if (nvm_readable(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1808 | return attr->mode; |
| 1809 | return 0; |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 1810 | } else if (attr == &dev_attr_boot.attr) { |
| 1811 | if (tb_route(sw)) |
| 1812 | return attr->mode; |
| 1813 | return 0; |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1814 | } else if (attr == &dev_attr_nvm_authenticate_on_disconnect.attr) { |
| 1815 | if (sw->quirks & QUIRK_FORCE_POWER_LINK_CONTROLLER) |
| 1816 | return attr->mode; |
| 1817 | return 0; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1818 | } |
| 1819 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1820 | return sw->safe_mode ? 0 : attr->mode; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1821 | } |
| 1822 | |
Rikard Falkeborn | 6889e00f | 2021-01-09 00:09:19 +0100 | [diff] [blame] | 1823 | static const struct attribute_group switch_group = { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1824 | .is_visible = switch_attr_is_visible, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1825 | .attrs = switch_attrs, |
| 1826 | }; |
| 1827 | |
| 1828 | static const struct attribute_group *switch_groups[] = { |
| 1829 | &switch_group, |
| 1830 | NULL, |
| 1831 | }; |
| 1832 | |
| 1833 | static void tb_switch_release(struct device *dev) |
| 1834 | { |
| 1835 | struct tb_switch *sw = tb_to_switch(dev); |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 1836 | struct tb_port *port; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1837 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 1838 | dma_port_free(sw->dma_port); |
| 1839 | |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 1840 | tb_switch_for_each_port(sw, port) { |
| 1841 | if (!port->disabled) { |
| 1842 | ida_destroy(&port->in_hopids); |
| 1843 | ida_destroy(&port->out_hopids); |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 1844 | } |
| 1845 | } |
| 1846 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1847 | kfree(sw->uuid); |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1848 | kfree(sw->device_name); |
| 1849 | kfree(sw->vendor_name); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1850 | kfree(sw->ports); |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 1851 | kfree(sw->drom); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1852 | kfree(sw->key); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1853 | kfree(sw); |
| 1854 | } |
| 1855 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1856 | /* |
| 1857 | * Currently only need to provide the callbacks. Everything else is handled |
| 1858 | * in the connection manager. |
| 1859 | */ |
| 1860 | static int __maybe_unused tb_switch_runtime_suspend(struct device *dev) |
| 1861 | { |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1862 | struct tb_switch *sw = tb_to_switch(dev); |
| 1863 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; |
| 1864 | |
| 1865 | if (cm_ops->runtime_suspend_switch) |
| 1866 | return cm_ops->runtime_suspend_switch(sw); |
| 1867 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1868 | return 0; |
| 1869 | } |
| 1870 | |
| 1871 | static int __maybe_unused tb_switch_runtime_resume(struct device *dev) |
| 1872 | { |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1873 | struct tb_switch *sw = tb_to_switch(dev); |
| 1874 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; |
| 1875 | |
| 1876 | if (cm_ops->runtime_resume_switch) |
| 1877 | return cm_ops->runtime_resume_switch(sw); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1878 | return 0; |
| 1879 | } |
| 1880 | |
| 1881 | static const struct dev_pm_ops tb_switch_pm_ops = { |
| 1882 | SET_RUNTIME_PM_OPS(tb_switch_runtime_suspend, tb_switch_runtime_resume, |
| 1883 | NULL) |
| 1884 | }; |
| 1885 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1886 | struct device_type tb_switch_type = { |
| 1887 | .name = "thunderbolt_device", |
| 1888 | .release = tb_switch_release, |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1889 | .pm = &tb_switch_pm_ops, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1890 | }; |
| 1891 | |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 1892 | static int tb_switch_get_generation(struct tb_switch *sw) |
| 1893 | { |
| 1894 | switch (sw->config.device_id) { |
| 1895 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
| 1896 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: |
| 1897 | case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: |
| 1898 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: |
| 1899 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: |
| 1900 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: |
| 1901 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: |
| 1902 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: |
| 1903 | return 1; |
| 1904 | |
| 1905 | case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: |
| 1906 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: |
| 1907 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: |
| 1908 | return 2; |
| 1909 | |
| 1910 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: |
| 1911 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: |
| 1912 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: |
| 1913 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: |
| 1914 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: |
Radion Mirchevsky | 4bac471 | 2017-10-04 16:43:43 +0300 | [diff] [blame] | 1915 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: |
| 1916 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: |
| 1917 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: |
Mika Westerberg | 3cdb944 | 2018-01-16 22:19:00 +0200 | [diff] [blame] | 1918 | case PCI_DEVICE_ID_INTEL_ICL_NHI0: |
| 1919 | case PCI_DEVICE_ID_INTEL_ICL_NHI1: |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 1920 | return 3; |
| 1921 | |
| 1922 | default: |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1923 | if (tb_switch_is_usb4(sw)) |
| 1924 | return 4; |
| 1925 | |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 1926 | /* |
| 1927 | * For unknown switches assume generation to be 1 to be |
| 1928 | * on the safe side. |
| 1929 | */ |
| 1930 | tb_sw_warn(sw, "unsupported switch device id %#x\n", |
| 1931 | sw->config.device_id); |
| 1932 | return 1; |
| 1933 | } |
| 1934 | } |
| 1935 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1936 | static bool tb_switch_exceeds_max_depth(const struct tb_switch *sw, int depth) |
| 1937 | { |
| 1938 | int max_depth; |
| 1939 | |
| 1940 | if (tb_switch_is_usb4(sw) || |
| 1941 | (sw->tb->root_switch && tb_switch_is_usb4(sw->tb->root_switch))) |
| 1942 | max_depth = USB4_SWITCH_MAX_DEPTH; |
| 1943 | else |
| 1944 | max_depth = TB_SWITCH_MAX_DEPTH; |
| 1945 | |
| 1946 | return depth > max_depth; |
| 1947 | } |
| 1948 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1949 | /** |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1950 | * tb_switch_alloc() - allocate a switch |
| 1951 | * @tb: Pointer to the owning domain |
| 1952 | * @parent: Parent device for this switch |
| 1953 | * @route: Route string for this switch |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1954 | * |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1955 | * Allocates and initializes a switch. Will not upload configuration to |
| 1956 | * the switch. For that you need to call tb_switch_configure() |
| 1957 | * separately. The returned switch should be released by calling |
| 1958 | * tb_switch_put(). |
| 1959 | * |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1960 | * Return: Pointer to the allocated switch or ERR_PTR() in case of |
| 1961 | * failure. |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1962 | */ |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1963 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
| 1964 | u64 route) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1965 | { |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1966 | struct tb_switch *sw; |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1967 | int upstream_port; |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1968 | int i, ret, depth; |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1969 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1970 | /* Unlock the downstream port so we can access the switch below */ |
| 1971 | if (route) { |
| 1972 | struct tb_switch *parent_sw = tb_to_switch(parent); |
| 1973 | struct tb_port *down; |
| 1974 | |
| 1975 | down = tb_port_at(route, parent_sw); |
| 1976 | tb_port_unlock(down); |
| 1977 | } |
| 1978 | |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1979 | depth = tb_route_length(route); |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1980 | |
| 1981 | upstream_port = tb_cfg_get_upstream_port(tb->ctl, route); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1982 | if (upstream_port < 0) |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1983 | return ERR_PTR(upstream_port); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1984 | |
| 1985 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); |
| 1986 | if (!sw) |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1987 | return ERR_PTR(-ENOMEM); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1988 | |
| 1989 | sw->tb = tb; |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1990 | ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5); |
| 1991 | if (ret) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1992 | goto err_free_sw_ports; |
| 1993 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1994 | sw->generation = tb_switch_get_generation(sw); |
| 1995 | |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1996 | tb_dbg(tb, "current switch config:\n"); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1997 | tb_dump_switch(tb, sw); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1998 | |
| 1999 | /* configure switch */ |
| 2000 | sw->config.upstream_port_number = upstream_port; |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 2001 | sw->config.depth = depth; |
| 2002 | sw->config.route_hi = upper_32_bits(route); |
| 2003 | sw->config.route_lo = lower_32_bits(route); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2004 | sw->config.enabled = 0; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2005 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2006 | /* Make sure we do not exceed maximum topology limit */ |
Colin Ian King | 704a940 | 2019-12-20 22:05:26 +0000 | [diff] [blame] | 2007 | if (tb_switch_exceeds_max_depth(sw, depth)) { |
| 2008 | ret = -EADDRNOTAVAIL; |
| 2009 | goto err_free_sw_ports; |
| 2010 | } |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2011 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2012 | /* initialize ports */ |
| 2013 | sw->ports = kcalloc(sw->config.max_port_number + 1, sizeof(*sw->ports), |
| 2014 | GFP_KERNEL); |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2015 | if (!sw->ports) { |
| 2016 | ret = -ENOMEM; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2017 | goto err_free_sw_ports; |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2018 | } |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2019 | |
| 2020 | for (i = 0; i <= sw->config.max_port_number; i++) { |
| 2021 | /* minimum setup for tb_find_cap and tb_drom_read to work */ |
| 2022 | sw->ports[i].sw = sw; |
| 2023 | sw->ports[i].port = i; |
| 2024 | } |
| 2025 | |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2026 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2027 | if (ret > 0) |
| 2028 | sw->cap_plug_events = ret; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2029 | |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2030 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_LINK_CONTROLLER); |
| 2031 | if (ret > 0) |
| 2032 | sw->cap_lc = ret; |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2033 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2034 | /* Root switch is always authorized */ |
| 2035 | if (!route) |
| 2036 | sw->authorized = true; |
| 2037 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2038 | device_initialize(&sw->dev); |
| 2039 | sw->dev.parent = parent; |
| 2040 | sw->dev.bus = &tb_bus_type; |
| 2041 | sw->dev.type = &tb_switch_type; |
| 2042 | sw->dev.groups = switch_groups; |
| 2043 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); |
| 2044 | |
| 2045 | return sw; |
| 2046 | |
| 2047 | err_free_sw_ports: |
| 2048 | kfree(sw->ports); |
| 2049 | kfree(sw); |
| 2050 | |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2051 | return ERR_PTR(ret); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2052 | } |
| 2053 | |
| 2054 | /** |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2055 | * tb_switch_alloc_safe_mode() - allocate a switch that is in safe mode |
| 2056 | * @tb: Pointer to the owning domain |
| 2057 | * @parent: Parent device for this switch |
| 2058 | * @route: Route string for this switch |
| 2059 | * |
| 2060 | * This creates a switch in safe mode. This means the switch pretty much |
| 2061 | * lacks all capabilities except DMA configuration port before it is |
| 2062 | * flashed with a valid NVM firmware. |
| 2063 | * |
| 2064 | * The returned switch must be released by calling tb_switch_put(). |
| 2065 | * |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2066 | * Return: Pointer to the allocated switch or ERR_PTR() in case of failure |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2067 | */ |
| 2068 | struct tb_switch * |
| 2069 | tb_switch_alloc_safe_mode(struct tb *tb, struct device *parent, u64 route) |
| 2070 | { |
| 2071 | struct tb_switch *sw; |
| 2072 | |
| 2073 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); |
| 2074 | if (!sw) |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 2075 | return ERR_PTR(-ENOMEM); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2076 | |
| 2077 | sw->tb = tb; |
| 2078 | sw->config.depth = tb_route_length(route); |
| 2079 | sw->config.route_hi = upper_32_bits(route); |
| 2080 | sw->config.route_lo = lower_32_bits(route); |
| 2081 | sw->safe_mode = true; |
| 2082 | |
| 2083 | device_initialize(&sw->dev); |
| 2084 | sw->dev.parent = parent; |
| 2085 | sw->dev.bus = &tb_bus_type; |
| 2086 | sw->dev.type = &tb_switch_type; |
| 2087 | sw->dev.groups = switch_groups; |
| 2088 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); |
| 2089 | |
| 2090 | return sw; |
| 2091 | } |
| 2092 | |
| 2093 | /** |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2094 | * tb_switch_configure() - Uploads configuration to the switch |
| 2095 | * @sw: Switch to configure |
| 2096 | * |
| 2097 | * Call this function before the switch is added to the system. It will |
| 2098 | * upload configuration to the switch and makes it available for the |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2099 | * connection manager to use. Can be called to the switch again after |
| 2100 | * resume from low power states to re-initialize it. |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2101 | * |
| 2102 | * Return: %0 in case of success and negative errno in case of failure |
| 2103 | */ |
| 2104 | int tb_switch_configure(struct tb_switch *sw) |
| 2105 | { |
| 2106 | struct tb *tb = sw->tb; |
| 2107 | u64 route; |
| 2108 | int ret; |
| 2109 | |
| 2110 | route = tb_route(sw); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2111 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2112 | tb_dbg(tb, "%s Switch at %#llx (depth: %d, up port: %d)\n", |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 2113 | sw->config.enabled ? "restoring" : "initializing", route, |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2114 | tb_route_length(route), sw->config.upstream_port_number); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2115 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2116 | sw->config.enabled = 1; |
| 2117 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2118 | if (tb_switch_is_usb4(sw)) { |
| 2119 | /* |
| 2120 | * For USB4 devices, we need to program the CM version |
| 2121 | * accordingly so that it knows to expose all the |
| 2122 | * additional capabilities. |
| 2123 | */ |
| 2124 | sw->config.cmuv = USB4_VERSION_1_0; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2125 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2126 | /* Enumerate the switch */ |
| 2127 | ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, |
| 2128 | ROUTER_CS_1, 4); |
| 2129 | if (ret) |
| 2130 | return ret; |
| 2131 | |
| 2132 | ret = usb4_switch_setup(sw); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2133 | } else { |
| 2134 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL) |
| 2135 | tb_sw_warn(sw, "unknown switch vendor id %#x\n", |
| 2136 | sw->config.vendor_id); |
| 2137 | |
| 2138 | if (!sw->cap_plug_events) { |
| 2139 | tb_sw_warn(sw, "cannot find TB_VSE_CAP_PLUG_EVENTS aborting\n"); |
| 2140 | return -ENODEV; |
| 2141 | } |
| 2142 | |
| 2143 | /* Enumerate the switch */ |
| 2144 | ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, |
| 2145 | ROUTER_CS_1, 3); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2146 | } |
Mika Westerberg | e879a70 | 2018-10-11 12:33:08 +0300 | [diff] [blame] | 2147 | if (ret) |
| 2148 | return ret; |
| 2149 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2150 | return tb_plug_events_active(sw, true); |
| 2151 | } |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2152 | |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2153 | static int tb_switch_set_uuid(struct tb_switch *sw) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2154 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2155 | bool uid = false; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2156 | u32 uuid[4]; |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2157 | int ret; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2158 | |
| 2159 | if (sw->uuid) |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2160 | return 0; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2161 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2162 | if (tb_switch_is_usb4(sw)) { |
| 2163 | ret = usb4_switch_read_uid(sw, &sw->uid); |
| 2164 | if (ret) |
| 2165 | return ret; |
| 2166 | uid = true; |
| 2167 | } else { |
| 2168 | /* |
| 2169 | * The newer controllers include fused UUID as part of |
| 2170 | * link controller specific registers |
| 2171 | */ |
| 2172 | ret = tb_lc_read_uuid(sw, uuid); |
| 2173 | if (ret) { |
| 2174 | if (ret != -EINVAL) |
| 2175 | return ret; |
| 2176 | uid = true; |
| 2177 | } |
| 2178 | } |
| 2179 | |
| 2180 | if (uid) { |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2181 | /* |
| 2182 | * ICM generates UUID based on UID and fills the upper |
| 2183 | * two words with ones. This is not strictly following |
| 2184 | * UUID format but we want to be compatible with it so |
| 2185 | * we do the same here. |
| 2186 | */ |
| 2187 | uuid[0] = sw->uid & 0xffffffff; |
| 2188 | uuid[1] = (sw->uid >> 32) & 0xffffffff; |
| 2189 | uuid[2] = 0xffffffff; |
| 2190 | uuid[3] = 0xffffffff; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2191 | } |
| 2192 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2193 | sw->uuid = kmemdup(uuid, sizeof(uuid), GFP_KERNEL); |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2194 | if (!sw->uuid) |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2195 | return -ENOMEM; |
| 2196 | return 0; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2197 | } |
| 2198 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2199 | static int tb_switch_add_dma_port(struct tb_switch *sw) |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2200 | { |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2201 | u32 status; |
| 2202 | int ret; |
| 2203 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2204 | switch (sw->generation) { |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2205 | case 2: |
| 2206 | /* Only root switch can be upgraded */ |
| 2207 | if (tb_route(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2208 | return 0; |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2209 | |
Gustavo A. R. Silva | df561f66 | 2020-08-23 17:36:59 -0500 | [diff] [blame] | 2210 | fallthrough; |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2211 | case 3: |
Mika Westerberg | 661b194 | 2020-11-10 11:34:07 +0300 | [diff] [blame] | 2212 | case 4: |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2213 | ret = tb_switch_set_uuid(sw); |
| 2214 | if (ret) |
| 2215 | return ret; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2216 | break; |
| 2217 | |
| 2218 | default: |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2219 | /* |
| 2220 | * DMA port is the only thing available when the switch |
| 2221 | * is in safe mode. |
| 2222 | */ |
| 2223 | if (!sw->safe_mode) |
| 2224 | return 0; |
| 2225 | break; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2226 | } |
| 2227 | |
Mika Westerberg | 661b194 | 2020-11-10 11:34:07 +0300 | [diff] [blame] | 2228 | if (sw->no_nvm_upgrade) |
| 2229 | return 0; |
| 2230 | |
| 2231 | if (tb_switch_is_usb4(sw)) { |
| 2232 | ret = usb4_switch_nvm_authenticate_status(sw, &status); |
| 2233 | if (ret) |
| 2234 | return ret; |
| 2235 | |
| 2236 | if (status) { |
| 2237 | tb_sw_info(sw, "switch flash authentication failed\n"); |
| 2238 | nvm_set_auth_status(sw, status); |
| 2239 | } |
| 2240 | |
| 2241 | return 0; |
| 2242 | } |
| 2243 | |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 2244 | /* Root switch DMA port requires running firmware */ |
Mika Westerberg | f07a360 | 2019-06-25 15:10:01 +0300 | [diff] [blame] | 2245 | if (!tb_route(sw) && !tb_switch_is_icm(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2246 | return 0; |
| 2247 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2248 | sw->dma_port = dma_port_alloc(sw); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2249 | if (!sw->dma_port) |
| 2250 | return 0; |
| 2251 | |
| 2252 | /* |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2253 | * If there is status already set then authentication failed |
| 2254 | * when the dma_port_flash_update_auth() returned. Power cycling |
| 2255 | * is not needed (it was done already) so only thing we do here |
| 2256 | * is to unblock runtime PM of the root port. |
| 2257 | */ |
| 2258 | nvm_get_auth_status(sw, &status); |
| 2259 | if (status) { |
| 2260 | if (!tb_route(sw)) |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2261 | nvm_authenticate_complete_dma_port(sw); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2262 | return 0; |
| 2263 | } |
| 2264 | |
| 2265 | /* |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2266 | * Check status of the previous flash authentication. If there |
| 2267 | * is one we need to power cycle the switch in any case to make |
| 2268 | * it functional again. |
| 2269 | */ |
| 2270 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); |
| 2271 | if (ret <= 0) |
| 2272 | return ret; |
| 2273 | |
Mika Westerberg | 1830b6e | 2018-11-26 12:47:46 +0300 | [diff] [blame] | 2274 | /* Now we can allow root port to suspend again */ |
| 2275 | if (!tb_route(sw)) |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2276 | nvm_authenticate_complete_dma_port(sw); |
Mika Westerberg | 1830b6e | 2018-11-26 12:47:46 +0300 | [diff] [blame] | 2277 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2278 | if (status) { |
| 2279 | tb_sw_info(sw, "switch flash authentication failed\n"); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2280 | nvm_set_auth_status(sw, status); |
| 2281 | } |
| 2282 | |
| 2283 | tb_sw_info(sw, "power cycling the switch now\n"); |
| 2284 | dma_port_power_cycle(sw->dma_port); |
| 2285 | |
| 2286 | /* |
| 2287 | * We return error here which causes the switch adding failure. |
| 2288 | * It should appear back after power cycle is complete. |
| 2289 | */ |
| 2290 | return -ESHUTDOWN; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2291 | } |
| 2292 | |
Mika Westerberg | 0d46c08 | 2019-08-26 18:19:33 +0300 | [diff] [blame] | 2293 | static void tb_switch_default_link_ports(struct tb_switch *sw) |
| 2294 | { |
| 2295 | int i; |
| 2296 | |
| 2297 | for (i = 1; i <= sw->config.max_port_number; i += 2) { |
| 2298 | struct tb_port *port = &sw->ports[i]; |
| 2299 | struct tb_port *subordinate; |
| 2300 | |
| 2301 | if (!tb_port_is_null(port)) |
| 2302 | continue; |
| 2303 | |
| 2304 | /* Check for the subordinate port */ |
| 2305 | if (i == sw->config.max_port_number || |
| 2306 | !tb_port_is_null(&sw->ports[i + 1])) |
| 2307 | continue; |
| 2308 | |
| 2309 | /* Link them if not already done so (by DROM) */ |
| 2310 | subordinate = &sw->ports[i + 1]; |
| 2311 | if (!port->dual_link_port && !subordinate->dual_link_port) { |
| 2312 | port->link_nr = 0; |
| 2313 | port->dual_link_port = subordinate; |
| 2314 | subordinate->link_nr = 1; |
| 2315 | subordinate->dual_link_port = port; |
| 2316 | |
| 2317 | tb_sw_dbg(sw, "linked ports %d <-> %d\n", |
| 2318 | port->port, subordinate->port); |
| 2319 | } |
| 2320 | } |
| 2321 | } |
| 2322 | |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2323 | static bool tb_switch_lane_bonding_possible(struct tb_switch *sw) |
| 2324 | { |
| 2325 | const struct tb_port *up = tb_upstream_port(sw); |
| 2326 | |
| 2327 | if (!up->dual_link_port || !up->dual_link_port->remote) |
| 2328 | return false; |
| 2329 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2330 | if (tb_switch_is_usb4(sw)) |
| 2331 | return usb4_switch_lane_bonding_possible(sw); |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2332 | return tb_lc_lane_bonding_possible(sw); |
| 2333 | } |
| 2334 | |
| 2335 | static int tb_switch_update_link_attributes(struct tb_switch *sw) |
| 2336 | { |
| 2337 | struct tb_port *up; |
| 2338 | bool change = false; |
| 2339 | int ret; |
| 2340 | |
| 2341 | if (!tb_route(sw) || tb_switch_is_icm(sw)) |
| 2342 | return 0; |
| 2343 | |
| 2344 | up = tb_upstream_port(sw); |
| 2345 | |
| 2346 | ret = tb_port_get_link_speed(up); |
| 2347 | if (ret < 0) |
| 2348 | return ret; |
| 2349 | if (sw->link_speed != ret) |
| 2350 | change = true; |
| 2351 | sw->link_speed = ret; |
| 2352 | |
| 2353 | ret = tb_port_get_link_width(up); |
| 2354 | if (ret < 0) |
| 2355 | return ret; |
| 2356 | if (sw->link_width != ret) |
| 2357 | change = true; |
| 2358 | sw->link_width = ret; |
| 2359 | |
| 2360 | /* Notify userspace that there is possible link attribute change */ |
| 2361 | if (device_is_registered(&sw->dev) && change) |
| 2362 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); |
| 2363 | |
| 2364 | return 0; |
| 2365 | } |
| 2366 | |
| 2367 | /** |
| 2368 | * tb_switch_lane_bonding_enable() - Enable lane bonding |
| 2369 | * @sw: Switch to enable lane bonding |
| 2370 | * |
| 2371 | * Connection manager can call this function to enable lane bonding of a |
| 2372 | * switch. If conditions are correct and both switches support the feature, |
| 2373 | * lanes are bonded. It is safe to call this to any switch. |
| 2374 | */ |
| 2375 | int tb_switch_lane_bonding_enable(struct tb_switch *sw) |
| 2376 | { |
| 2377 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); |
| 2378 | struct tb_port *up, *down; |
| 2379 | u64 route = tb_route(sw); |
| 2380 | int ret; |
| 2381 | |
| 2382 | if (!route) |
| 2383 | return 0; |
| 2384 | |
| 2385 | if (!tb_switch_lane_bonding_possible(sw)) |
| 2386 | return 0; |
| 2387 | |
| 2388 | up = tb_upstream_port(sw); |
| 2389 | down = tb_port_at(route, parent); |
| 2390 | |
| 2391 | if (!tb_port_is_width_supported(up, 2) || |
| 2392 | !tb_port_is_width_supported(down, 2)) |
| 2393 | return 0; |
| 2394 | |
| 2395 | ret = tb_port_lane_bonding_enable(up); |
| 2396 | if (ret) { |
| 2397 | tb_port_warn(up, "failed to enable lane bonding\n"); |
| 2398 | return ret; |
| 2399 | } |
| 2400 | |
| 2401 | ret = tb_port_lane_bonding_enable(down); |
| 2402 | if (ret) { |
| 2403 | tb_port_warn(down, "failed to enable lane bonding\n"); |
| 2404 | tb_port_lane_bonding_disable(up); |
| 2405 | return ret; |
| 2406 | } |
| 2407 | |
| 2408 | tb_switch_update_link_attributes(sw); |
| 2409 | |
| 2410 | tb_sw_dbg(sw, "lane bonding enabled\n"); |
| 2411 | return ret; |
| 2412 | } |
| 2413 | |
| 2414 | /** |
| 2415 | * tb_switch_lane_bonding_disable() - Disable lane bonding |
| 2416 | * @sw: Switch whose lane bonding to disable |
| 2417 | * |
| 2418 | * Disables lane bonding between @sw and parent. This can be called even |
| 2419 | * if lanes were not bonded originally. |
| 2420 | */ |
| 2421 | void tb_switch_lane_bonding_disable(struct tb_switch *sw) |
| 2422 | { |
| 2423 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); |
| 2424 | struct tb_port *up, *down; |
| 2425 | |
| 2426 | if (!tb_route(sw)) |
| 2427 | return; |
| 2428 | |
| 2429 | up = tb_upstream_port(sw); |
| 2430 | if (!up->bonded) |
| 2431 | return; |
| 2432 | |
| 2433 | down = tb_port_at(tb_route(sw), parent); |
| 2434 | |
| 2435 | tb_port_lane_bonding_disable(up); |
| 2436 | tb_port_lane_bonding_disable(down); |
| 2437 | |
| 2438 | tb_switch_update_link_attributes(sw); |
| 2439 | tb_sw_dbg(sw, "lane bonding disabled\n"); |
| 2440 | } |
| 2441 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2442 | /** |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 2443 | * tb_switch_configure_link() - Set link configured |
| 2444 | * @sw: Switch whose link is configured |
| 2445 | * |
| 2446 | * Sets the link upstream from @sw configured (from both ends) so that |
| 2447 | * it will not be disconnected when the domain exits sleep. Can be |
| 2448 | * called for any switch. |
| 2449 | * |
| 2450 | * It is recommended that this is called after lane bonding is enabled. |
| 2451 | * |
| 2452 | * Returns %0 on success and negative errno in case of error. |
| 2453 | */ |
| 2454 | int tb_switch_configure_link(struct tb_switch *sw) |
| 2455 | { |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 2456 | struct tb_port *up, *down; |
| 2457 | int ret; |
| 2458 | |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 2459 | if (!tb_route(sw) || tb_switch_is_icm(sw)) |
| 2460 | return 0; |
| 2461 | |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 2462 | up = tb_upstream_port(sw); |
| 2463 | if (tb_switch_is_usb4(up->sw)) |
| 2464 | ret = usb4_port_configure(up); |
| 2465 | else |
| 2466 | ret = tb_lc_configure_port(up); |
| 2467 | if (ret) |
| 2468 | return ret; |
| 2469 | |
| 2470 | down = up->remote; |
| 2471 | if (tb_switch_is_usb4(down->sw)) |
| 2472 | return usb4_port_configure(down); |
| 2473 | return tb_lc_configure_port(down); |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 2474 | } |
| 2475 | |
| 2476 | /** |
| 2477 | * tb_switch_unconfigure_link() - Unconfigure link |
| 2478 | * @sw: Switch whose link is unconfigured |
| 2479 | * |
| 2480 | * Sets the link unconfigured so the @sw will be disconnected if the |
| 2481 | * domain exists sleep. |
| 2482 | */ |
| 2483 | void tb_switch_unconfigure_link(struct tb_switch *sw) |
| 2484 | { |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 2485 | struct tb_port *up, *down; |
| 2486 | |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 2487 | if (sw->is_unplugged) |
| 2488 | return; |
| 2489 | if (!tb_route(sw) || tb_switch_is_icm(sw)) |
| 2490 | return; |
| 2491 | |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 2492 | up = tb_upstream_port(sw); |
| 2493 | if (tb_switch_is_usb4(up->sw)) |
| 2494 | usb4_port_unconfigure(up); |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 2495 | else |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 2496 | tb_lc_unconfigure_port(up); |
| 2497 | |
| 2498 | down = up->remote; |
| 2499 | if (tb_switch_is_usb4(down->sw)) |
| 2500 | usb4_port_unconfigure(down); |
| 2501 | else |
| 2502 | tb_lc_unconfigure_port(down); |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 2503 | } |
| 2504 | |
| 2505 | /** |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2506 | * tb_switch_add() - Add a switch to the domain |
| 2507 | * @sw: Switch to add |
| 2508 | * |
| 2509 | * This is the last step in adding switch to the domain. It will read |
| 2510 | * identification information from DROM and initializes ports so that |
| 2511 | * they can be used to connect other switches. The switch will be |
| 2512 | * exposed to the userspace when this function successfully returns. To |
| 2513 | * remove and release the switch, call tb_switch_remove(). |
| 2514 | * |
| 2515 | * Return: %0 in case of success and negative errno in case of failure |
| 2516 | */ |
| 2517 | int tb_switch_add(struct tb_switch *sw) |
| 2518 | { |
| 2519 | int i, ret; |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 2520 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2521 | /* |
| 2522 | * Initialize DMA control port now before we read DROM. Recent |
| 2523 | * host controllers have more complete DROM on NVM that includes |
| 2524 | * vendor and model identification strings which we then expose |
| 2525 | * to the userspace. NVM can be accessed through DMA |
| 2526 | * configuration based mailbox. |
| 2527 | */ |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2528 | ret = tb_switch_add_dma_port(sw); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2529 | if (ret) { |
| 2530 | dev_err(&sw->dev, "failed to add DMA port\n"); |
Mika Westerberg | f53e767 | 2017-06-06 15:25:02 +0300 | [diff] [blame] | 2531 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2532 | } |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 2533 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2534 | if (!sw->safe_mode) { |
| 2535 | /* read drom */ |
| 2536 | ret = tb_drom_read(sw); |
| 2537 | if (ret) { |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2538 | dev_err(&sw->dev, "reading DROM failed\n"); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2539 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2540 | } |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 2541 | tb_sw_dbg(sw, "uid: %#llx\n", sw->uid); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2542 | |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2543 | ret = tb_switch_set_uuid(sw); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2544 | if (ret) { |
| 2545 | dev_err(&sw->dev, "failed to set UUID\n"); |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2546 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2547 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2548 | |
| 2549 | for (i = 0; i <= sw->config.max_port_number; i++) { |
| 2550 | if (sw->ports[i].disabled) { |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 2551 | tb_port_dbg(&sw->ports[i], "disabled by eeprom\n"); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2552 | continue; |
| 2553 | } |
| 2554 | ret = tb_init_port(&sw->ports[i]); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2555 | if (ret) { |
| 2556 | dev_err(&sw->dev, "failed to initialize port %d\n", i); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2557 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2558 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2559 | } |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2560 | |
Mika Westerberg | 0d46c08 | 2019-08-26 18:19:33 +0300 | [diff] [blame] | 2561 | tb_switch_default_link_ports(sw); |
| 2562 | |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2563 | ret = tb_switch_update_link_attributes(sw); |
| 2564 | if (ret) |
| 2565 | return ret; |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 2566 | |
| 2567 | ret = tb_switch_tmu_init(sw); |
| 2568 | if (ret) |
| 2569 | return ret; |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 2570 | } |
| 2571 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2572 | ret = device_add(&sw->dev); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2573 | if (ret) { |
| 2574 | dev_err(&sw->dev, "failed to add device: %d\n", ret); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2575 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2576 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2577 | |
Mika Westerberg | a83bc4a | 2018-10-01 12:31:20 +0300 | [diff] [blame] | 2578 | if (tb_route(sw)) { |
| 2579 | dev_info(&sw->dev, "new device found, vendor=%#x device=%#x\n", |
| 2580 | sw->vendor, sw->device); |
| 2581 | if (sw->vendor_name && sw->device_name) |
| 2582 | dev_info(&sw->dev, "%s %s\n", sw->vendor_name, |
| 2583 | sw->device_name); |
| 2584 | } |
| 2585 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2586 | ret = tb_switch_nvm_add(sw); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2587 | if (ret) { |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2588 | dev_err(&sw->dev, "failed to add NVM devices\n"); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2589 | device_del(&sw->dev); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2590 | return ret; |
| 2591 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2592 | |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 2593 | /* |
| 2594 | * Thunderbolt routers do not generate wakeups themselves but |
| 2595 | * they forward wakeups from tunneled protocols, so enable it |
| 2596 | * here. |
| 2597 | */ |
| 2598 | device_init_wakeup(&sw->dev, true); |
| 2599 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2600 | pm_runtime_set_active(&sw->dev); |
| 2601 | if (sw->rpm) { |
| 2602 | pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY); |
| 2603 | pm_runtime_use_autosuspend(&sw->dev); |
| 2604 | pm_runtime_mark_last_busy(&sw->dev); |
| 2605 | pm_runtime_enable(&sw->dev); |
| 2606 | pm_request_autosuspend(&sw->dev); |
| 2607 | } |
| 2608 | |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 2609 | tb_switch_debugfs_init(sw); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2610 | return 0; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2611 | } |
Andreas Noever | c90553b | 2014-06-03 22:04:11 +0200 | [diff] [blame] | 2612 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2613 | /** |
| 2614 | * tb_switch_remove() - Remove and release a switch |
| 2615 | * @sw: Switch to remove |
| 2616 | * |
| 2617 | * This will remove the switch from the domain and release it after last |
| 2618 | * reference count drops to zero. If there are switches connected below |
| 2619 | * this switch, they will be removed as well. |
| 2620 | */ |
| 2621 | void tb_switch_remove(struct tb_switch *sw) |
| 2622 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2623 | struct tb_port *port; |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 2624 | |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 2625 | tb_switch_debugfs_remove(sw); |
| 2626 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2627 | if (sw->rpm) { |
| 2628 | pm_runtime_get_sync(&sw->dev); |
| 2629 | pm_runtime_disable(&sw->dev); |
| 2630 | } |
| 2631 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2632 | /* port 0 is the switch itself and never has a remote */ |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2633 | tb_switch_for_each_port(sw, port) { |
| 2634 | if (tb_port_has_remote(port)) { |
| 2635 | tb_switch_remove(port->remote->sw); |
| 2636 | port->remote = NULL; |
| 2637 | } else if (port->xdomain) { |
| 2638 | tb_xdomain_remove(port->xdomain); |
| 2639 | port->xdomain = NULL; |
Mika Westerberg | dfe40ca | 2019-03-07 15:26:45 +0200 | [diff] [blame] | 2640 | } |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 2641 | |
| 2642 | /* Remove any downstream retimers */ |
| 2643 | tb_retimer_remove_all(port); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2644 | } |
| 2645 | |
| 2646 | if (!sw->is_unplugged) |
| 2647 | tb_plug_events_active(sw, false); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2648 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2649 | tb_switch_nvm_remove(sw); |
Mika Westerberg | a83bc4a | 2018-10-01 12:31:20 +0300 | [diff] [blame] | 2650 | |
| 2651 | if (tb_route(sw)) |
| 2652 | dev_info(&sw->dev, "device disconnected\n"); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2653 | device_unregister(&sw->dev); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2654 | } |
| 2655 | |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2656 | /** |
Lukas Wunner | aae20bb | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 2657 | * tb_sw_set_unplugged() - set is_unplugged on switch and downstream switches |
Mika Westerberg | 5c6b471 | 2021-01-28 13:51:03 +0300 | [diff] [blame^] | 2658 | * @sw: Router to mark unplugged |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2659 | */ |
Lukas Wunner | aae20bb | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 2660 | void tb_sw_set_unplugged(struct tb_switch *sw) |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2661 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2662 | struct tb_port *port; |
| 2663 | |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2664 | if (sw == sw->tb->root_switch) { |
| 2665 | tb_sw_WARN(sw, "cannot unplug root switch\n"); |
| 2666 | return; |
| 2667 | } |
| 2668 | if (sw->is_unplugged) { |
| 2669 | tb_sw_WARN(sw, "is_unplugged already set\n"); |
| 2670 | return; |
| 2671 | } |
| 2672 | sw->is_unplugged = true; |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2673 | tb_switch_for_each_port(sw, port) { |
| 2674 | if (tb_port_has_remote(port)) |
| 2675 | tb_sw_set_unplugged(port->remote->sw); |
| 2676 | else if (port->xdomain) |
| 2677 | port->xdomain->is_unplugged = true; |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2678 | } |
| 2679 | } |
| 2680 | |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 2681 | static int tb_switch_set_wake(struct tb_switch *sw, unsigned int flags) |
| 2682 | { |
| 2683 | if (flags) |
| 2684 | tb_sw_dbg(sw, "enabling wakeup: %#x\n", flags); |
| 2685 | else |
| 2686 | tb_sw_dbg(sw, "disabling wakeup\n"); |
| 2687 | |
| 2688 | if (tb_switch_is_usb4(sw)) |
| 2689 | return usb4_switch_set_wake(sw, flags); |
| 2690 | return tb_lc_set_wake(sw, flags); |
| 2691 | } |
| 2692 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2693 | int tb_switch_resume(struct tb_switch *sw) |
| 2694 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2695 | struct tb_port *port; |
| 2696 | int err; |
| 2697 | |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 2698 | tb_sw_dbg(sw, "resuming switch\n"); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2699 | |
Mika Westerberg | 08a5e4c | 2017-06-06 15:24:54 +0300 | [diff] [blame] | 2700 | /* |
| 2701 | * Check for UID of the connected switches except for root |
| 2702 | * switch which we assume cannot be removed. |
| 2703 | */ |
| 2704 | if (tb_route(sw)) { |
| 2705 | u64 uid; |
| 2706 | |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2707 | /* |
| 2708 | * Check first that we can still read the switch config |
| 2709 | * space. It may be that there is now another domain |
| 2710 | * connected. |
| 2711 | */ |
| 2712 | err = tb_cfg_get_upstream_port(sw->tb->ctl, tb_route(sw)); |
| 2713 | if (err < 0) { |
| 2714 | tb_sw_info(sw, "switch not present anymore\n"); |
| 2715 | return err; |
| 2716 | } |
| 2717 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2718 | if (tb_switch_is_usb4(sw)) |
| 2719 | err = usb4_switch_read_uid(sw, &uid); |
| 2720 | else |
| 2721 | err = tb_drom_read_uid_only(sw, &uid); |
Mika Westerberg | 08a5e4c | 2017-06-06 15:24:54 +0300 | [diff] [blame] | 2722 | if (err) { |
| 2723 | tb_sw_warn(sw, "uid read failed\n"); |
| 2724 | return err; |
| 2725 | } |
| 2726 | if (sw->uid != uid) { |
| 2727 | tb_sw_info(sw, |
| 2728 | "changed while suspended (uid %#llx -> %#llx)\n", |
| 2729 | sw->uid, uid); |
| 2730 | return -ENODEV; |
| 2731 | } |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2732 | } |
| 2733 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2734 | err = tb_switch_configure(sw); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2735 | if (err) |
| 2736 | return err; |
| 2737 | |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 2738 | /* Disable wakes */ |
| 2739 | tb_switch_set_wake(sw, 0); |
| 2740 | |
Mika Westerberg | 8145c43 | 2020-03-27 17:20:31 +0200 | [diff] [blame] | 2741 | err = tb_switch_tmu_init(sw); |
| 2742 | if (err) |
| 2743 | return err; |
| 2744 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2745 | /* check for surviving downstream switches */ |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2746 | tb_switch_for_each_port(sw, port) { |
Mika Westerberg | fdb0887 | 2020-11-26 12:52:43 +0300 | [diff] [blame] | 2747 | if (!tb_port_has_remote(port) && !port->xdomain) { |
| 2748 | /* |
| 2749 | * For disconnected downstream lane adapters |
| 2750 | * start lane initialization now so we detect |
| 2751 | * future connects. |
| 2752 | */ |
| 2753 | if (!tb_is_upstream_port(port) && tb_port_is_null(port)) |
| 2754 | tb_port_start_lane_initialization(port); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2755 | continue; |
Mika Westerberg | fdb0887 | 2020-11-26 12:52:43 +0300 | [diff] [blame] | 2756 | } else if (port->xdomain) { |
| 2757 | /* |
| 2758 | * Start lane initialization for XDomain so the |
| 2759 | * link gets re-established. |
| 2760 | */ |
| 2761 | tb_port_start_lane_initialization(port); |
| 2762 | } |
Mika Westerberg | dfe40ca | 2019-03-07 15:26:45 +0200 | [diff] [blame] | 2763 | |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2764 | if (tb_wait_for_port(port, true) <= 0) { |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2765 | tb_port_warn(port, |
| 2766 | "lost during suspend, disconnecting\n"); |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2767 | if (tb_port_has_remote(port)) |
| 2768 | tb_sw_set_unplugged(port->remote->sw); |
| 2769 | else if (port->xdomain) |
| 2770 | port->xdomain->is_unplugged = true; |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2771 | } else if (tb_port_has_remote(port) || port->xdomain) { |
| 2772 | /* |
| 2773 | * Always unlock the port so the downstream |
| 2774 | * switch/domain is accessible. |
| 2775 | */ |
| 2776 | if (tb_port_unlock(port)) |
| 2777 | tb_port_warn(port, "failed to unlock port\n"); |
| 2778 | if (port->remote && tb_switch_resume(port->remote->sw)) { |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2779 | tb_port_warn(port, |
| 2780 | "lost during suspend, disconnecting\n"); |
| 2781 | tb_sw_set_unplugged(port->remote->sw); |
| 2782 | } |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2783 | } |
| 2784 | } |
| 2785 | return 0; |
| 2786 | } |
| 2787 | |
Mika Westerberg | 6ac6fae | 2020-06-05 14:25:02 +0300 | [diff] [blame] | 2788 | /** |
| 2789 | * tb_switch_suspend() - Put a switch to sleep |
| 2790 | * @sw: Switch to suspend |
| 2791 | * @runtime: Is this runtime suspend or system sleep |
| 2792 | * |
| 2793 | * Suspends router and all its children. Enables wakes according to |
| 2794 | * value of @runtime and then sets sleep bit for the router. If @sw is |
| 2795 | * host router the domain is ready to go to sleep once this function |
| 2796 | * returns. |
| 2797 | */ |
| 2798 | void tb_switch_suspend(struct tb_switch *sw, bool runtime) |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2799 | { |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 2800 | unsigned int flags = 0; |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2801 | struct tb_port *port; |
| 2802 | int err; |
| 2803 | |
Mika Westerberg | 6ac6fae | 2020-06-05 14:25:02 +0300 | [diff] [blame] | 2804 | tb_sw_dbg(sw, "suspending switch\n"); |
| 2805 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2806 | err = tb_plug_events_active(sw, false); |
| 2807 | if (err) |
| 2808 | return; |
| 2809 | |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2810 | tb_switch_for_each_port(sw, port) { |
| 2811 | if (tb_port_has_remote(port)) |
Mika Westerberg | 6ac6fae | 2020-06-05 14:25:02 +0300 | [diff] [blame] | 2812 | tb_switch_suspend(port->remote->sw, runtime); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2813 | } |
Mika Westerberg | 5480dfc | 2019-01-09 17:25:43 +0200 | [diff] [blame] | 2814 | |
Mika Westerberg | 6ac6fae | 2020-06-05 14:25:02 +0300 | [diff] [blame] | 2815 | if (runtime) { |
| 2816 | /* Trigger wake when something is plugged in/out */ |
| 2817 | flags |= TB_WAKE_ON_CONNECT | TB_WAKE_ON_DISCONNECT; |
| 2818 | flags |= TB_WAKE_ON_USB4 | TB_WAKE_ON_USB3 | TB_WAKE_ON_PCIE; |
| 2819 | } else if (device_may_wakeup(&sw->dev)) { |
| 2820 | flags |= TB_WAKE_ON_USB4 | TB_WAKE_ON_USB3 | TB_WAKE_ON_PCIE; |
| 2821 | } |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 2822 | |
| 2823 | tb_switch_set_wake(sw, flags); |
| 2824 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2825 | if (tb_switch_is_usb4(sw)) |
| 2826 | usb4_switch_set_sleep(sw); |
| 2827 | else |
| 2828 | tb_lc_set_sleep(sw); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2829 | } |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2830 | |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2831 | /** |
| 2832 | * tb_switch_query_dp_resource() - Query availability of DP resource |
| 2833 | * @sw: Switch whose DP resource is queried |
| 2834 | * @in: DP IN port |
| 2835 | * |
| 2836 | * Queries availability of DP resource for DP tunneling using switch |
| 2837 | * specific means. Returns %true if resource is available. |
| 2838 | */ |
| 2839 | bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in) |
| 2840 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2841 | if (tb_switch_is_usb4(sw)) |
| 2842 | return usb4_switch_query_dp_resource(sw, in); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2843 | return tb_lc_dp_sink_query(sw, in); |
| 2844 | } |
| 2845 | |
| 2846 | /** |
| 2847 | * tb_switch_alloc_dp_resource() - Allocate available DP resource |
| 2848 | * @sw: Switch whose DP resource is allocated |
| 2849 | * @in: DP IN port |
| 2850 | * |
| 2851 | * Allocates DP resource for DP tunneling. The resource must be |
| 2852 | * available for this to succeed (see tb_switch_query_dp_resource()). |
| 2853 | * Returns %0 in success and negative errno otherwise. |
| 2854 | */ |
| 2855 | int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in) |
| 2856 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2857 | if (tb_switch_is_usb4(sw)) |
| 2858 | return usb4_switch_alloc_dp_resource(sw, in); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2859 | return tb_lc_dp_sink_alloc(sw, in); |
| 2860 | } |
| 2861 | |
| 2862 | /** |
| 2863 | * tb_switch_dealloc_dp_resource() - De-allocate DP resource |
| 2864 | * @sw: Switch whose DP resource is de-allocated |
| 2865 | * @in: DP IN port |
| 2866 | * |
| 2867 | * De-allocates DP resource that was previously allocated for DP |
| 2868 | * tunneling. |
| 2869 | */ |
| 2870 | void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in) |
| 2871 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2872 | int ret; |
| 2873 | |
| 2874 | if (tb_switch_is_usb4(sw)) |
| 2875 | ret = usb4_switch_dealloc_dp_resource(sw, in); |
| 2876 | else |
| 2877 | ret = tb_lc_dp_sink_dealloc(sw, in); |
| 2878 | |
| 2879 | if (ret) |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2880 | tb_sw_warn(sw, "failed to de-allocate DP resource for port %d\n", |
| 2881 | in->port); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2882 | } |
| 2883 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2884 | struct tb_sw_lookup { |
| 2885 | struct tb *tb; |
| 2886 | u8 link; |
| 2887 | u8 depth; |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 2888 | const uuid_t *uuid; |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 2889 | u64 route; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2890 | }; |
| 2891 | |
Suzuki K Poulose | 418e3ea | 2019-06-14 18:53:59 +0100 | [diff] [blame] | 2892 | static int tb_switch_match(struct device *dev, const void *data) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2893 | { |
| 2894 | struct tb_switch *sw = tb_to_switch(dev); |
Suzuki K Poulose | 418e3ea | 2019-06-14 18:53:59 +0100 | [diff] [blame] | 2895 | const struct tb_sw_lookup *lookup = data; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2896 | |
| 2897 | if (!sw) |
| 2898 | return 0; |
| 2899 | if (sw->tb != lookup->tb) |
| 2900 | return 0; |
| 2901 | |
| 2902 | if (lookup->uuid) |
| 2903 | return !memcmp(sw->uuid, lookup->uuid, sizeof(*lookup->uuid)); |
| 2904 | |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 2905 | if (lookup->route) { |
| 2906 | return sw->config.route_lo == lower_32_bits(lookup->route) && |
| 2907 | sw->config.route_hi == upper_32_bits(lookup->route); |
| 2908 | } |
| 2909 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2910 | /* Root switch is matched only by depth */ |
| 2911 | if (!lookup->depth) |
| 2912 | return !sw->depth; |
| 2913 | |
| 2914 | return sw->link == lookup->link && sw->depth == lookup->depth; |
| 2915 | } |
| 2916 | |
| 2917 | /** |
| 2918 | * tb_switch_find_by_link_depth() - Find switch by link and depth |
| 2919 | * @tb: Domain the switch belongs |
| 2920 | * @link: Link number the switch is connected |
| 2921 | * @depth: Depth of the switch in link |
| 2922 | * |
| 2923 | * Returned switch has reference count increased so the caller needs to |
| 2924 | * call tb_switch_put() when done with the switch. |
| 2925 | */ |
| 2926 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, u8 depth) |
| 2927 | { |
| 2928 | struct tb_sw_lookup lookup; |
| 2929 | struct device *dev; |
| 2930 | |
| 2931 | memset(&lookup, 0, sizeof(lookup)); |
| 2932 | lookup.tb = tb; |
| 2933 | lookup.link = link; |
| 2934 | lookup.depth = depth; |
| 2935 | |
| 2936 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); |
| 2937 | if (dev) |
| 2938 | return tb_to_switch(dev); |
| 2939 | |
| 2940 | return NULL; |
| 2941 | } |
| 2942 | |
| 2943 | /** |
Radion Mirchevsky | 432019d | 2017-10-04 15:07:40 +0300 | [diff] [blame] | 2944 | * tb_switch_find_by_uuid() - Find switch by UUID |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2945 | * @tb: Domain the switch belongs |
| 2946 | * @uuid: UUID to look for |
| 2947 | * |
| 2948 | * Returned switch has reference count increased so the caller needs to |
| 2949 | * call tb_switch_put() when done with the switch. |
| 2950 | */ |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 2951 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2952 | { |
| 2953 | struct tb_sw_lookup lookup; |
| 2954 | struct device *dev; |
| 2955 | |
| 2956 | memset(&lookup, 0, sizeof(lookup)); |
| 2957 | lookup.tb = tb; |
| 2958 | lookup.uuid = uuid; |
| 2959 | |
| 2960 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); |
| 2961 | if (dev) |
| 2962 | return tb_to_switch(dev); |
| 2963 | |
| 2964 | return NULL; |
| 2965 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2966 | |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 2967 | /** |
| 2968 | * tb_switch_find_by_route() - Find switch by route string |
| 2969 | * @tb: Domain the switch belongs |
| 2970 | * @route: Route string to look for |
| 2971 | * |
| 2972 | * Returned switch has reference count increased so the caller needs to |
| 2973 | * call tb_switch_put() when done with the switch. |
| 2974 | */ |
| 2975 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route) |
| 2976 | { |
| 2977 | struct tb_sw_lookup lookup; |
| 2978 | struct device *dev; |
| 2979 | |
| 2980 | if (!route) |
| 2981 | return tb_switch_get(tb->root_switch); |
| 2982 | |
| 2983 | memset(&lookup, 0, sizeof(lookup)); |
| 2984 | lookup.tb = tb; |
| 2985 | lookup.route = route; |
| 2986 | |
| 2987 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); |
| 2988 | if (dev) |
| 2989 | return tb_to_switch(dev); |
| 2990 | |
| 2991 | return NULL; |
| 2992 | } |
| 2993 | |
Mika Westerberg | 386e5e2 | 2019-12-17 15:33:37 +0300 | [diff] [blame] | 2994 | /** |
| 2995 | * tb_switch_find_port() - return the first port of @type on @sw or NULL |
| 2996 | * @sw: Switch to find the port from |
| 2997 | * @type: Port type to look for |
| 2998 | */ |
| 2999 | struct tb_port *tb_switch_find_port(struct tb_switch *sw, |
| 3000 | enum tb_port_type type) |
| 3001 | { |
| 3002 | struct tb_port *port; |
| 3003 | |
| 3004 | tb_switch_for_each_port(sw, port) { |
| 3005 | if (port->config.type == type) |
| 3006 | return port; |
| 3007 | } |
| 3008 | |
| 3009 | return NULL; |
| 3010 | } |